mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_rtc.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 186:707f6e361f3e
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32l0xx_hal_rtc.c |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @brief RTC HAL module driver. |
<> | 144:ef7eb2e8f9f7 | 6 | * This file provides firmware functions to manage the following |
<> | 144:ef7eb2e8f9f7 | 7 | * functionalities of the Real Time Clock (RTC) peripheral: |
<> | 144:ef7eb2e8f9f7 | 8 | * + Initialization/de-initialization functions |
<> | 144:ef7eb2e8f9f7 | 9 | * + I/O operation functions |
<> | 144:ef7eb2e8f9f7 | 10 | * + Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 11 | * + Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 12 | * |
<> | 144:ef7eb2e8f9f7 | 13 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 14 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 15 | ##### Backup Domain Operating Condition ##### |
<> | 144:ef7eb2e8f9f7 | 16 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 17 | [..] As long as the supply voltage remains in the operating range, |
<> | 144:ef7eb2e8f9f7 | 18 | the RTC never stops, regardless of the device status (Run mode, |
<> | 144:ef7eb2e8f9f7 | 19 | low power modes or under reset). |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | ##### Backup Domain Reset ##### |
<> | 144:ef7eb2e8f9f7 | 22 | ================================================================== |
<> | 144:ef7eb2e8f9f7 | 23 | [..] The backup domain reset sets all RTC registers and the RCC_CSR register |
<> | 144:ef7eb2e8f9f7 | 24 | to their reset values. |
<> | 144:ef7eb2e8f9f7 | 25 | [..] A backup domain reset is generated when one of the following events occurs: |
<> | 144:ef7eb2e8f9f7 | 26 | (+) Software reset, triggered by setting the RTCRST bit in the |
<> | 144:ef7eb2e8f9f7 | 27 | RCC Control Status register (RCC_CSR). |
<> | 144:ef7eb2e8f9f7 | 28 | (+) Power reset (BOR/POR/PDR). |
<> | 144:ef7eb2e8f9f7 | 29 | |
<> | 144:ef7eb2e8f9f7 | 30 | ##### Backup Domain Access ##### |
<> | 144:ef7eb2e8f9f7 | 31 | ================================================================== |
<> | 144:ef7eb2e8f9f7 | 32 | [..] After reset, the backup domain (RTC registers and RTC backup data registers) |
<> | 144:ef7eb2e8f9f7 | 33 | is protected against possible unwanted write accesses. |
<> | 144:ef7eb2e8f9f7 | 34 | [..] To enable access to the RTC Domain and RTC registers, proceed as follows: |
<> | 144:ef7eb2e8f9f7 | 35 | (+) Enable the Power Controller (PWR) APB1 interface clock using the |
<> | 144:ef7eb2e8f9f7 | 36 | __HAL_RCC_PWR_CLK_ENABLE() function. |
<> | 144:ef7eb2e8f9f7 | 37 | (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. |
<> | 144:ef7eb2e8f9f7 | 38 | (+) Select the RTC clock source using the __HAL_RCC_RTC_CONFIG() function. |
<> | 144:ef7eb2e8f9f7 | 39 | (+) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() function. |
<> | 144:ef7eb2e8f9f7 | 40 | |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | ##### How to use RTC Driver ##### |
<> | 144:ef7eb2e8f9f7 | 43 | =================================================================== |
<> | 144:ef7eb2e8f9f7 | 44 | [..] |
<> | 144:ef7eb2e8f9f7 | 45 | (+) Enable the RTC domain access (see description in the section above). |
<> | 144:ef7eb2e8f9f7 | 46 | (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour |
<> | 144:ef7eb2e8f9f7 | 47 | format using the HAL_RTC_Init() function. |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | *** Time and Date configuration *** |
<> | 144:ef7eb2e8f9f7 | 50 | =================================== |
<> | 144:ef7eb2e8f9f7 | 51 | [..] |
<> | 144:ef7eb2e8f9f7 | 52 | (+) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime() |
<> | 144:ef7eb2e8f9f7 | 53 | and HAL_RTC_SetDate() functions. |
<> | 144:ef7eb2e8f9f7 | 54 | (+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions. |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | *** Alarm configuration *** |
<> | 144:ef7eb2e8f9f7 | 57 | =========================== |
<> | 144:ef7eb2e8f9f7 | 58 | [..] |
<> | 144:ef7eb2e8f9f7 | 59 | (+) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function. |
<> | 144:ef7eb2e8f9f7 | 60 | You can also configure the RTC Alarm with interrupt mode using the |
<> | 144:ef7eb2e8f9f7 | 61 | HAL_RTC_SetAlarm_IT() function. |
<> | 144:ef7eb2e8f9f7 | 62 | (+) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function. |
<> | 144:ef7eb2e8f9f7 | 63 | |
<> | 144:ef7eb2e8f9f7 | 64 | ##### RTC and low power modes ##### |
<> | 144:ef7eb2e8f9f7 | 65 | ================================================================== |
<> | 144:ef7eb2e8f9f7 | 66 | [..] The MCU can be woken up from a low power mode by an RTC alternate |
<> | 144:ef7eb2e8f9f7 | 67 | function. |
<> | 144:ef7eb2e8f9f7 | 68 | [..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B), |
<> | 144:ef7eb2e8f9f7 | 69 | RTC wakeup, RTC tamper event detection and RTC time stamp event detection. |
<> | 144:ef7eb2e8f9f7 | 70 | These RTC alternate functions can wake up the system from the Stop and |
<> | 144:ef7eb2e8f9f7 | 71 | Standby low power modes. |
<> | 144:ef7eb2e8f9f7 | 72 | [..] The system can also wake up from low power modes without depending |
<> | 144:ef7eb2e8f9f7 | 73 | on an external interrupt (Auto-wakeup mode), by using the RTC alarm |
<> | 144:ef7eb2e8f9f7 | 74 | or the RTC wakeup events. |
<> | 144:ef7eb2e8f9f7 | 75 | [..] The RTC provides a programmable time base for waking up from the |
<> | 144:ef7eb2e8f9f7 | 76 | Stop or Standby mode at regular intervals. |
<> | 144:ef7eb2e8f9f7 | 77 | Wakeup from STOP and STANDBY modes is possible only when the RTC clock source |
<> | 144:ef7eb2e8f9f7 | 78 | is LSE or LSI. |
<> | 144:ef7eb2e8f9f7 | 79 | |
<> | 144:ef7eb2e8f9f7 | 80 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 81 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 82 | * @attention |
<> | 144:ef7eb2e8f9f7 | 83 | * |
<> | 144:ef7eb2e8f9f7 | 84 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 85 | * |
<> | 144:ef7eb2e8f9f7 | 86 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 87 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 88 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 89 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 90 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 91 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 92 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 93 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 94 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 95 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 96 | * |
<> | 144:ef7eb2e8f9f7 | 97 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 98 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 99 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 100 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 101 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 102 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 103 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 104 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 105 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 106 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 107 | * |
<> | 144:ef7eb2e8f9f7 | 108 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 109 | */ |
<> | 144:ef7eb2e8f9f7 | 110 | |
<> | 144:ef7eb2e8f9f7 | 111 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 112 | #include "stm32l0xx_hal.h" |
<> | 144:ef7eb2e8f9f7 | 113 | |
<> | 144:ef7eb2e8f9f7 | 114 | /** @addtogroup STM32L0xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 115 | * @{ |
<> | 144:ef7eb2e8f9f7 | 116 | */ |
<> | 144:ef7eb2e8f9f7 | 117 | |
<> | 144:ef7eb2e8f9f7 | 118 | |
<> | 144:ef7eb2e8f9f7 | 119 | /** @addtogroup RTC |
<> | 144:ef7eb2e8f9f7 | 120 | * @brief RTC HAL module driver |
<> | 144:ef7eb2e8f9f7 | 121 | * @{ |
<> | 144:ef7eb2e8f9f7 | 122 | */ |
<> | 144:ef7eb2e8f9f7 | 123 | |
<> | 144:ef7eb2e8f9f7 | 124 | #ifdef HAL_RTC_MODULE_ENABLED |
<> | 144:ef7eb2e8f9f7 | 125 | |
<> | 144:ef7eb2e8f9f7 | 126 | /* Private typedef -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 127 | /* Private define ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 128 | /* Private macro -------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 129 | /* Private variables ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 130 | /* Private function prototypes -----------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 131 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 132 | |
<> | 144:ef7eb2e8f9f7 | 133 | /** @addtogroup RTC_Exported_Functions |
<> | 144:ef7eb2e8f9f7 | 134 | * @{ |
<> | 144:ef7eb2e8f9f7 | 135 | */ |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | /** @addtogroup RTC_Exported_Functions_Group1 |
<> | 144:ef7eb2e8f9f7 | 138 | * @brief Initialization and Configuration functions |
<> | 144:ef7eb2e8f9f7 | 139 | * |
<> | 144:ef7eb2e8f9f7 | 140 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 141 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 142 | ##### Initialization and de-initialization functions ##### |
<> | 144:ef7eb2e8f9f7 | 143 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 144 | [..] This section provides functions allowing to initialize and configure the |
<> | 144:ef7eb2e8f9f7 | 145 | RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable |
<> | 144:ef7eb2e8f9f7 | 146 | RTC registers Write protection, enter and exit the RTC initialization mode, |
<> | 144:ef7eb2e8f9f7 | 147 | RTC registers synchronization check and reference clock detection enable. |
<> | 144:ef7eb2e8f9f7 | 148 | (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base. |
<> | 144:ef7eb2e8f9f7 | 149 | It is split into 2 programmable prescalers to minimize power consumption. |
<> | 144:ef7eb2e8f9f7 | 150 | (++) A 7-bit asynchronous prescaler and a 15-bit synchronous prescaler. |
<> | 144:ef7eb2e8f9f7 | 151 | (++) When both prescalers are used, it is recommended to configure the |
<> | 144:ef7eb2e8f9f7 | 152 | asynchronous prescaler to a high value to minimize power consumption. |
<> | 144:ef7eb2e8f9f7 | 153 | (#) All RTC registers are Write protected. Writing to the RTC registers |
<> | 144:ef7eb2e8f9f7 | 154 | is enabled by writing a key into the Write Protection register, RTC_WPR. |
<> | 144:ef7eb2e8f9f7 | 155 | (#) To configure the RTC Calendar, user application should enter |
<> | 144:ef7eb2e8f9f7 | 156 | initialization mode. In this mode, the calendar counter is stopped |
<> | 144:ef7eb2e8f9f7 | 157 | and its value can be updated. When the initialization sequence is |
<> | 144:ef7eb2e8f9f7 | 158 | complete, the calendar restarts counting after 4 RTCCLK cycles. |
<> | 144:ef7eb2e8f9f7 | 159 | (#) To read the calendar through the shadow registers after Calendar |
<> | 144:ef7eb2e8f9f7 | 160 | initialization, calendar update or after wakeup from low power modes |
<> | 144:ef7eb2e8f9f7 | 161 | the software must first clear the RSF flag. The software must then |
<> | 144:ef7eb2e8f9f7 | 162 | wait until it is set again before reading the calendar, which means |
<> | 144:ef7eb2e8f9f7 | 163 | that the calendar registers have been correctly copied into the |
<> | 144:ef7eb2e8f9f7 | 164 | RTC_TR and RTC_DR shadow registers.The HAL_RTC_WaitForSynchro() function |
<> | 144:ef7eb2e8f9f7 | 165 | implements the above software sequence (RSF clear and RSF check). |
<> | 144:ef7eb2e8f9f7 | 166 | |
<> | 144:ef7eb2e8f9f7 | 167 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 168 | * @{ |
<> | 144:ef7eb2e8f9f7 | 169 | */ |
<> | 144:ef7eb2e8f9f7 | 170 | |
<> | 144:ef7eb2e8f9f7 | 171 | /** |
<> | 144:ef7eb2e8f9f7 | 172 | * @brief Initialize the RTC peripheral |
<> | 144:ef7eb2e8f9f7 | 173 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 174 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 175 | */ |
<> | 144:ef7eb2e8f9f7 | 176 | HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 177 | { |
<> | 144:ef7eb2e8f9f7 | 178 | /* Check the RTC peripheral state */ |
<> | 144:ef7eb2e8f9f7 | 179 | if(hrtc == NULL) |
<> | 144:ef7eb2e8f9f7 | 180 | { |
<> | 144:ef7eb2e8f9f7 | 181 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 182 | } |
<> | 144:ef7eb2e8f9f7 | 183 | |
<> | 144:ef7eb2e8f9f7 | 184 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 185 | assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); |
<> | 144:ef7eb2e8f9f7 | 186 | assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat)); |
<> | 144:ef7eb2e8f9f7 | 187 | assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv)); |
<> | 144:ef7eb2e8f9f7 | 188 | assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv)); |
<> | 144:ef7eb2e8f9f7 | 189 | assert_param(IS_RTC_OUTPUT(hrtc->Init.OutPut)); |
<> | 144:ef7eb2e8f9f7 | 190 | assert_param(IS_RTC_OUTPUT_REMAP(hrtc->Init.OutPutRemap)); |
<> | 144:ef7eb2e8f9f7 | 191 | assert_param(IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity)); |
<> | 144:ef7eb2e8f9f7 | 192 | assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType)); |
<> | 144:ef7eb2e8f9f7 | 193 | |
<> | 144:ef7eb2e8f9f7 | 194 | if(hrtc->State == HAL_RTC_STATE_RESET) |
<> | 144:ef7eb2e8f9f7 | 195 | { |
<> | 144:ef7eb2e8f9f7 | 196 | /* Allocate lock resource and initialize it */ |
<> | 144:ef7eb2e8f9f7 | 197 | hrtc->Lock = HAL_UNLOCKED; |
<> | 144:ef7eb2e8f9f7 | 198 | |
<> | 144:ef7eb2e8f9f7 | 199 | /* Initialize RTC MSP */ |
<> | 144:ef7eb2e8f9f7 | 200 | HAL_RTC_MspInit(hrtc); |
<> | 144:ef7eb2e8f9f7 | 201 | } |
<> | 144:ef7eb2e8f9f7 | 202 | |
<> | 144:ef7eb2e8f9f7 | 203 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 204 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 205 | |
<> | 144:ef7eb2e8f9f7 | 206 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 207 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 208 | |
<> | 144:ef7eb2e8f9f7 | 209 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 210 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 211 | { |
<> | 144:ef7eb2e8f9f7 | 212 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 213 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 214 | |
<> | 144:ef7eb2e8f9f7 | 215 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 216 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 217 | |
<> | 144:ef7eb2e8f9f7 | 218 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 219 | } |
<> | 144:ef7eb2e8f9f7 | 220 | else |
<> | 144:ef7eb2e8f9f7 | 221 | { |
<> | 144:ef7eb2e8f9f7 | 222 | /* Clear RTC_CR FMT, OSEL and POL Bits */ |
<> | 144:ef7eb2e8f9f7 | 223 | hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL)); |
<> | 144:ef7eb2e8f9f7 | 224 | /* Set RTC_CR register */ |
<> | 144:ef7eb2e8f9f7 | 225 | hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity); |
<> | 144:ef7eb2e8f9f7 | 226 | |
<> | 144:ef7eb2e8f9f7 | 227 | /* Configure the RTC PRER */ |
<> | 144:ef7eb2e8f9f7 | 228 | hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv); |
<> | 151:5eaa88a5bcc7 | 229 | hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16U); |
<> | 144:ef7eb2e8f9f7 | 230 | |
<> | 144:ef7eb2e8f9f7 | 231 | /* Exit Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 232 | hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); |
<> | 144:ef7eb2e8f9f7 | 233 | |
<> | 144:ef7eb2e8f9f7 | 234 | hrtc->Instance->OR &= (uint32_t)~(RTC_OR_ALARMOUTTYPE | RTC_OR_OUT_RMP); |
<> | 144:ef7eb2e8f9f7 | 235 | hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType | hrtc->Init.OutPutRemap); |
<> | 144:ef7eb2e8f9f7 | 236 | |
<> | 144:ef7eb2e8f9f7 | 237 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 238 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 239 | |
<> | 144:ef7eb2e8f9f7 | 240 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 241 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 242 | |
<> | 144:ef7eb2e8f9f7 | 243 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 244 | } |
<> | 144:ef7eb2e8f9f7 | 245 | } |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | /** |
<> | 144:ef7eb2e8f9f7 | 248 | * @brief DeInitialize the RTC peripheral. |
<> | 144:ef7eb2e8f9f7 | 249 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 250 | * @note This function doesn't reset the RTC Backup Data registers. |
<> | 144:ef7eb2e8f9f7 | 251 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 252 | */ |
<> | 144:ef7eb2e8f9f7 | 253 | HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 254 | { |
<> | 151:5eaa88a5bcc7 | 255 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 256 | |
<> | 144:ef7eb2e8f9f7 | 257 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 258 | assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); |
<> | 144:ef7eb2e8f9f7 | 259 | |
<> | 144:ef7eb2e8f9f7 | 260 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 261 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 262 | |
<> | 144:ef7eb2e8f9f7 | 263 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 264 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 265 | |
<> | 144:ef7eb2e8f9f7 | 266 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 267 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 268 | { |
<> | 144:ef7eb2e8f9f7 | 269 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 270 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 271 | |
<> | 144:ef7eb2e8f9f7 | 272 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 273 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 274 | |
<> | 144:ef7eb2e8f9f7 | 275 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 276 | } |
<> | 144:ef7eb2e8f9f7 | 277 | else |
<> | 144:ef7eb2e8f9f7 | 278 | { |
<> | 144:ef7eb2e8f9f7 | 279 | /* Reset TR, DR and CR registers */ |
<> | 151:5eaa88a5bcc7 | 280 | hrtc->Instance->TR = (uint32_t)0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 281 | hrtc->Instance->DR = ((uint32_t)(RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0)); |
<> | 144:ef7eb2e8f9f7 | 282 | /* Reset All CR bits except CR[2:0] */ |
<> | 144:ef7eb2e8f9f7 | 283 | hrtc->Instance->CR &= RTC_CR_WUCKSEL; |
<> | 144:ef7eb2e8f9f7 | 284 | |
<> | 144:ef7eb2e8f9f7 | 285 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 286 | |
<> | 144:ef7eb2e8f9f7 | 287 | /* Wait till WUTWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 288 | while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 289 | { |
<> | 144:ef7eb2e8f9f7 | 290 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 291 | { |
<> | 144:ef7eb2e8f9f7 | 292 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 293 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 294 | |
<> | 144:ef7eb2e8f9f7 | 295 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 296 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 297 | |
<> | 144:ef7eb2e8f9f7 | 298 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 299 | } |
<> | 144:ef7eb2e8f9f7 | 300 | } |
<> | 144:ef7eb2e8f9f7 | 301 | |
<> | 144:ef7eb2e8f9f7 | 302 | /* Reset all RTC CR register bits */ |
<> | 151:5eaa88a5bcc7 | 303 | hrtc->Instance->CR &= (uint32_t)0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 304 | hrtc->Instance->WUTR = RTC_WUTR_WUT; |
<> | 151:5eaa88a5bcc7 | 305 | hrtc->Instance->PRER = ((uint32_t)(RTC_PRER_PREDIV_A | 0x000000FFU)); |
<> | 151:5eaa88a5bcc7 | 306 | hrtc->Instance->ALRMAR = (uint32_t)0x00000000U; |
<> | 151:5eaa88a5bcc7 | 307 | hrtc->Instance->ALRMBR = (uint32_t)0x00000000U; |
<> | 151:5eaa88a5bcc7 | 308 | hrtc->Instance->SHIFTR = (uint32_t)0x00000000U; |
<> | 151:5eaa88a5bcc7 | 309 | hrtc->Instance->CALR = (uint32_t)0x00000000U; |
<> | 151:5eaa88a5bcc7 | 310 | hrtc->Instance->ALRMASSR = (uint32_t)0x00000000U; |
<> | 151:5eaa88a5bcc7 | 311 | hrtc->Instance->ALRMBSSR = (uint32_t)0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 312 | |
<> | 144:ef7eb2e8f9f7 | 313 | /* Reset ISR register and exit initialization mode */ |
<> | 151:5eaa88a5bcc7 | 314 | hrtc->Instance->ISR = (uint32_t)0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 315 | |
<> | 144:ef7eb2e8f9f7 | 316 | /* Reset Tamper configuration register */ |
<> | 151:5eaa88a5bcc7 | 317 | hrtc->Instance->TAMPCR = 0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 318 | |
<> | 144:ef7eb2e8f9f7 | 319 | /* Reset Option register */ |
<> | 151:5eaa88a5bcc7 | 320 | hrtc->Instance->OR = 0x00000000U; |
<> | 144:ef7eb2e8f9f7 | 321 | |
<> | 144:ef7eb2e8f9f7 | 322 | /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ |
<> | 144:ef7eb2e8f9f7 | 323 | if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) |
<> | 144:ef7eb2e8f9f7 | 324 | { |
<> | 144:ef7eb2e8f9f7 | 325 | if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 326 | { |
<> | 144:ef7eb2e8f9f7 | 327 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 328 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 329 | |
<> | 144:ef7eb2e8f9f7 | 330 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 331 | |
<> | 144:ef7eb2e8f9f7 | 332 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 333 | } |
<> | 144:ef7eb2e8f9f7 | 334 | } |
<> | 144:ef7eb2e8f9f7 | 335 | } |
<> | 144:ef7eb2e8f9f7 | 336 | |
<> | 144:ef7eb2e8f9f7 | 337 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 338 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 339 | |
<> | 144:ef7eb2e8f9f7 | 340 | /* De-Initialize RTC MSP */ |
<> | 144:ef7eb2e8f9f7 | 341 | HAL_RTC_MspDeInit(hrtc); |
<> | 144:ef7eb2e8f9f7 | 342 | |
<> | 144:ef7eb2e8f9f7 | 343 | hrtc->State = HAL_RTC_STATE_RESET; |
<> | 144:ef7eb2e8f9f7 | 344 | |
<> | 144:ef7eb2e8f9f7 | 345 | /* Release Lock */ |
<> | 144:ef7eb2e8f9f7 | 346 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 347 | |
<> | 144:ef7eb2e8f9f7 | 348 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 349 | } |
<> | 144:ef7eb2e8f9f7 | 350 | |
<> | 144:ef7eb2e8f9f7 | 351 | /** |
<> | 144:ef7eb2e8f9f7 | 352 | * @brief Initialize the RTC MSP. |
<> | 144:ef7eb2e8f9f7 | 353 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 354 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 355 | */ |
<> | 144:ef7eb2e8f9f7 | 356 | __weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 357 | { |
<> | 144:ef7eb2e8f9f7 | 358 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 359 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 360 | |
<> | 144:ef7eb2e8f9f7 | 361 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 362 | the HAL_RTC_MspInit could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 363 | */ |
<> | 144:ef7eb2e8f9f7 | 364 | } |
<> | 144:ef7eb2e8f9f7 | 365 | |
<> | 144:ef7eb2e8f9f7 | 366 | /** |
<> | 144:ef7eb2e8f9f7 | 367 | * @brief DeInitialize the RTC MSP. |
<> | 144:ef7eb2e8f9f7 | 368 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 369 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 370 | */ |
<> | 144:ef7eb2e8f9f7 | 371 | __weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 372 | { |
<> | 144:ef7eb2e8f9f7 | 373 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 374 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 375 | |
<> | 144:ef7eb2e8f9f7 | 376 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 377 | the HAL_RTC_MspDeInit could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 378 | */ |
<> | 144:ef7eb2e8f9f7 | 379 | } |
<> | 144:ef7eb2e8f9f7 | 380 | |
<> | 144:ef7eb2e8f9f7 | 381 | /** |
<> | 144:ef7eb2e8f9f7 | 382 | * @} |
<> | 144:ef7eb2e8f9f7 | 383 | */ |
<> | 144:ef7eb2e8f9f7 | 384 | |
<> | 144:ef7eb2e8f9f7 | 385 | /** @addtogroup RTC_Exported_Functions_Group2 |
<> | 144:ef7eb2e8f9f7 | 386 | * @brief RTC Time and Date functions |
<> | 144:ef7eb2e8f9f7 | 387 | * |
<> | 144:ef7eb2e8f9f7 | 388 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 389 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 390 | ##### RTC Time and Date functions ##### |
<> | 144:ef7eb2e8f9f7 | 391 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 392 | |
<> | 144:ef7eb2e8f9f7 | 393 | [..] This section provides functions allowing to configure Time and Date features |
<> | 144:ef7eb2e8f9f7 | 394 | |
<> | 144:ef7eb2e8f9f7 | 395 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 396 | * @{ |
<> | 144:ef7eb2e8f9f7 | 397 | */ |
<> | 144:ef7eb2e8f9f7 | 398 | |
<> | 144:ef7eb2e8f9f7 | 399 | /** |
<> | 144:ef7eb2e8f9f7 | 400 | * @brief Set RTC current time. |
<> | 144:ef7eb2e8f9f7 | 401 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 402 | * @param sTime: Pointer to Time structure |
<> | 144:ef7eb2e8f9f7 | 403 | * @param Format: Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 404 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 405 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 406 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 407 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 408 | */ |
<> | 144:ef7eb2e8f9f7 | 409 | HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 410 | { |
<> | 151:5eaa88a5bcc7 | 411 | uint32_t tmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 412 | |
<> | 144:ef7eb2e8f9f7 | 413 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 414 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 415 | assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving)); |
<> | 144:ef7eb2e8f9f7 | 416 | assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation)); |
<> | 144:ef7eb2e8f9f7 | 417 | |
<> | 144:ef7eb2e8f9f7 | 418 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 419 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 420 | |
<> | 144:ef7eb2e8f9f7 | 421 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 422 | |
<> | 144:ef7eb2e8f9f7 | 423 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 424 | { |
<> | 144:ef7eb2e8f9f7 | 425 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 426 | { |
<> | 144:ef7eb2e8f9f7 | 427 | assert_param(IS_RTC_HOUR12(sTime->Hours)); |
<> | 144:ef7eb2e8f9f7 | 428 | assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 429 | } |
<> | 144:ef7eb2e8f9f7 | 430 | else |
<> | 144:ef7eb2e8f9f7 | 431 | { |
<> | 151:5eaa88a5bcc7 | 432 | sTime->TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 433 | assert_param(IS_RTC_HOUR24(sTime->Hours)); |
<> | 144:ef7eb2e8f9f7 | 434 | } |
<> | 144:ef7eb2e8f9f7 | 435 | assert_param(IS_RTC_MINUTES(sTime->Minutes)); |
<> | 144:ef7eb2e8f9f7 | 436 | assert_param(IS_RTC_SECONDS(sTime->Seconds)); |
<> | 144:ef7eb2e8f9f7 | 437 | |
<> | 151:5eaa88a5bcc7 | 438 | tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 439 | ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 440 | ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \ |
<> | 151:5eaa88a5bcc7 | 441 | (((uint32_t)sTime->TimeFormat) << 16U)); |
<> | 144:ef7eb2e8f9f7 | 442 | } |
<> | 144:ef7eb2e8f9f7 | 443 | else |
<> | 144:ef7eb2e8f9f7 | 444 | { |
<> | 144:ef7eb2e8f9f7 | 445 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 446 | { |
<> | 144:ef7eb2e8f9f7 | 447 | tmpreg = RTC_Bcd2ToByte(sTime->Hours); |
<> | 144:ef7eb2e8f9f7 | 448 | assert_param(IS_RTC_HOUR12(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 449 | assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 450 | } |
<> | 144:ef7eb2e8f9f7 | 451 | else |
<> | 144:ef7eb2e8f9f7 | 452 | { |
<> | 151:5eaa88a5bcc7 | 453 | sTime->TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 454 | assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours))); |
<> | 144:ef7eb2e8f9f7 | 455 | } |
<> | 144:ef7eb2e8f9f7 | 456 | assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes))); |
<> | 144:ef7eb2e8f9f7 | 457 | assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds))); |
<> | 151:5eaa88a5bcc7 | 458 | tmpreg = (((uint32_t)(sTime->Hours) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 459 | ((uint32_t)(sTime->Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 460 | ((uint32_t)sTime->Seconds) | \ |
<> | 151:5eaa88a5bcc7 | 461 | ((uint32_t)(sTime->TimeFormat) << 16U)); |
<> | 144:ef7eb2e8f9f7 | 462 | } |
<> | 144:ef7eb2e8f9f7 | 463 | UNUSED(tmpreg); |
<> | 144:ef7eb2e8f9f7 | 464 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 465 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 466 | |
<> | 144:ef7eb2e8f9f7 | 467 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 468 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 469 | { |
<> | 144:ef7eb2e8f9f7 | 470 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 471 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 472 | |
<> | 144:ef7eb2e8f9f7 | 473 | /* Set RTC state */ |
<> | 144:ef7eb2e8f9f7 | 474 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 475 | |
<> | 144:ef7eb2e8f9f7 | 476 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 477 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 478 | |
<> | 144:ef7eb2e8f9f7 | 479 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 480 | } |
<> | 144:ef7eb2e8f9f7 | 481 | else |
<> | 144:ef7eb2e8f9f7 | 482 | { |
<> | 144:ef7eb2e8f9f7 | 483 | /* Set the RTC_TR register */ |
<> | 144:ef7eb2e8f9f7 | 484 | hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 485 | |
<> | 144:ef7eb2e8f9f7 | 486 | /* Clear the bits to be configured */ |
<> | 144:ef7eb2e8f9f7 | 487 | hrtc->Instance->CR &= ((uint32_t)~RTC_CR_BCK); |
<> | 144:ef7eb2e8f9f7 | 488 | |
<> | 144:ef7eb2e8f9f7 | 489 | /* Configure the RTC_CR register */ |
<> | 144:ef7eb2e8f9f7 | 490 | hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation); |
<> | 144:ef7eb2e8f9f7 | 491 | |
<> | 144:ef7eb2e8f9f7 | 492 | /* Exit Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 493 | hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); |
<> | 144:ef7eb2e8f9f7 | 494 | |
<> | 144:ef7eb2e8f9f7 | 495 | /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ |
<> | 144:ef7eb2e8f9f7 | 496 | if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) |
<> | 144:ef7eb2e8f9f7 | 497 | { |
<> | 144:ef7eb2e8f9f7 | 498 | if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 499 | { |
<> | 144:ef7eb2e8f9f7 | 500 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 501 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 502 | |
<> | 144:ef7eb2e8f9f7 | 503 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 504 | |
<> | 144:ef7eb2e8f9f7 | 505 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 506 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 507 | |
<> | 144:ef7eb2e8f9f7 | 508 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 509 | } |
<> | 144:ef7eb2e8f9f7 | 510 | } |
<> | 144:ef7eb2e8f9f7 | 511 | |
<> | 144:ef7eb2e8f9f7 | 512 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 513 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 514 | |
<> | 144:ef7eb2e8f9f7 | 515 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 516 | |
<> | 144:ef7eb2e8f9f7 | 517 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 518 | |
<> | 144:ef7eb2e8f9f7 | 519 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 520 | } |
<> | 144:ef7eb2e8f9f7 | 521 | } |
<> | 144:ef7eb2e8f9f7 | 522 | |
<> | 144:ef7eb2e8f9f7 | 523 | /** |
<> | 144:ef7eb2e8f9f7 | 524 | * @brief Get RTC current time. |
<> | 144:ef7eb2e8f9f7 | 525 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 526 | * @param sTime: Pointer to Time structure with Hours, Minutes and Seconds fields returned |
<> | 144:ef7eb2e8f9f7 | 527 | * with input format (BIN or BCD), also SubSeconds field returning the |
<> | 144:ef7eb2e8f9f7 | 528 | * RTC_SSR register content and SecondFraction field the Synchronous pre-scaler |
<> | 144:ef7eb2e8f9f7 | 529 | * factor to be used for second fraction ratio computation. |
<> | 144:ef7eb2e8f9f7 | 530 | * @param Format: Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 531 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 532 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 533 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 534 | * @note You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds |
<> | 144:ef7eb2e8f9f7 | 535 | * value in second fraction ratio with time unit following generic formula: |
<> | 144:ef7eb2e8f9f7 | 536 | * Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit |
<> | 144:ef7eb2e8f9f7 | 537 | * This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS |
<> | 144:ef7eb2e8f9f7 | 538 | * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values |
<> | 144:ef7eb2e8f9f7 | 539 | * in the higher-order calendar shadow registers to ensure consistency between the time and date values. |
<> | 144:ef7eb2e8f9f7 | 540 | * Reading RTC current time locks the values in calendar shadow registers until Current date is read |
<> | 144:ef7eb2e8f9f7 | 541 | * to ensure consistency between the time and date values. |
<> | 144:ef7eb2e8f9f7 | 542 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 543 | */ |
<> | 144:ef7eb2e8f9f7 | 544 | HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 545 | { |
<> | 151:5eaa88a5bcc7 | 546 | uint32_t tmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 547 | |
<> | 144:ef7eb2e8f9f7 | 548 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 549 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 550 | |
<> | 144:ef7eb2e8f9f7 | 551 | /* Get subseconds structure field from the corresponding register*/ |
<> | 144:ef7eb2e8f9f7 | 552 | sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR); |
<> | 144:ef7eb2e8f9f7 | 553 | |
<> | 144:ef7eb2e8f9f7 | 554 | /* Get SecondFraction structure field from the corresponding register field*/ |
<> | 144:ef7eb2e8f9f7 | 555 | sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S); |
<> | 144:ef7eb2e8f9f7 | 556 | |
<> | 144:ef7eb2e8f9f7 | 557 | /* Get the TR register */ |
<> | 144:ef7eb2e8f9f7 | 558 | tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 559 | |
<> | 144:ef7eb2e8f9f7 | 560 | /* Fill the structure fields with the read parameters */ |
<> | 151:5eaa88a5bcc7 | 561 | sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16U); |
<> | 151:5eaa88a5bcc7 | 562 | sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8U); |
<> | 144:ef7eb2e8f9f7 | 563 | sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU)); |
<> | 151:5eaa88a5bcc7 | 564 | sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16U); |
<> | 144:ef7eb2e8f9f7 | 565 | |
<> | 144:ef7eb2e8f9f7 | 566 | /* Check the input parameters format */ |
<> | 144:ef7eb2e8f9f7 | 567 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 568 | { |
<> | 144:ef7eb2e8f9f7 | 569 | /* Convert the time structure parameters to Binary format */ |
<> | 144:ef7eb2e8f9f7 | 570 | sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours); |
<> | 144:ef7eb2e8f9f7 | 571 | sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes); |
<> | 144:ef7eb2e8f9f7 | 572 | sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds); |
<> | 144:ef7eb2e8f9f7 | 573 | } |
<> | 144:ef7eb2e8f9f7 | 574 | |
<> | 144:ef7eb2e8f9f7 | 575 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 576 | } |
<> | 144:ef7eb2e8f9f7 | 577 | |
<> | 144:ef7eb2e8f9f7 | 578 | /** |
<> | 144:ef7eb2e8f9f7 | 579 | * @brief Set RTC current date. |
<> | 144:ef7eb2e8f9f7 | 580 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 581 | * @param sDate: Pointer to date structure |
<> | 144:ef7eb2e8f9f7 | 582 | * @param Format: specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 583 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 584 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 585 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 586 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 587 | */ |
<> | 144:ef7eb2e8f9f7 | 588 | HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 589 | { |
<> | 151:5eaa88a5bcc7 | 590 | uint32_t datetmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 591 | |
<> | 144:ef7eb2e8f9f7 | 592 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 593 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 594 | |
<> | 144:ef7eb2e8f9f7 | 595 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 596 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 597 | |
<> | 144:ef7eb2e8f9f7 | 598 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 599 | |
<> | 151:5eaa88a5bcc7 | 600 | if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U)) |
<> | 144:ef7eb2e8f9f7 | 601 | { |
<> | 151:5eaa88a5bcc7 | 602 | sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU); |
<> | 144:ef7eb2e8f9f7 | 603 | } |
<> | 144:ef7eb2e8f9f7 | 604 | |
<> | 144:ef7eb2e8f9f7 | 605 | assert_param(IS_RTC_WEEKDAY(sDate->WeekDay)); |
<> | 144:ef7eb2e8f9f7 | 606 | |
<> | 144:ef7eb2e8f9f7 | 607 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 608 | { |
<> | 144:ef7eb2e8f9f7 | 609 | assert_param(IS_RTC_YEAR(sDate->Year)); |
<> | 144:ef7eb2e8f9f7 | 610 | assert_param(IS_RTC_MONTH(sDate->Month)); |
<> | 144:ef7eb2e8f9f7 | 611 | assert_param(IS_RTC_DATE(sDate->Date)); |
<> | 144:ef7eb2e8f9f7 | 612 | |
<> | 151:5eaa88a5bcc7 | 613 | datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 614 | ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 615 | ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \ |
<> | 151:5eaa88a5bcc7 | 616 | ((uint32_t)sDate->WeekDay << 13U)); |
<> | 144:ef7eb2e8f9f7 | 617 | } |
<> | 144:ef7eb2e8f9f7 | 618 | else |
<> | 144:ef7eb2e8f9f7 | 619 | { |
<> | 144:ef7eb2e8f9f7 | 620 | assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year))); |
<> | 144:ef7eb2e8f9f7 | 621 | datetmpreg = RTC_Bcd2ToByte(sDate->Month); |
<> | 144:ef7eb2e8f9f7 | 622 | assert_param(IS_RTC_MONTH(datetmpreg)); |
<> | 144:ef7eb2e8f9f7 | 623 | datetmpreg = RTC_Bcd2ToByte(sDate->Date); |
<> | 144:ef7eb2e8f9f7 | 624 | assert_param(IS_RTC_DATE(datetmpreg)); |
<> | 144:ef7eb2e8f9f7 | 625 | |
<> | 151:5eaa88a5bcc7 | 626 | datetmpreg = ((((uint32_t)sDate->Year) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 627 | (((uint32_t)sDate->Month) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 628 | ((uint32_t)sDate->Date) | \ |
<> | 151:5eaa88a5bcc7 | 629 | (((uint32_t)sDate->WeekDay) << 13U)); |
<> | 144:ef7eb2e8f9f7 | 630 | } |
<> | 144:ef7eb2e8f9f7 | 631 | |
<> | 144:ef7eb2e8f9f7 | 632 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 633 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 634 | |
<> | 144:ef7eb2e8f9f7 | 635 | /* Set Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 636 | if(RTC_EnterInitMode(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 637 | { |
<> | 144:ef7eb2e8f9f7 | 638 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 639 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 640 | |
<> | 144:ef7eb2e8f9f7 | 641 | /* Set RTC state*/ |
<> | 144:ef7eb2e8f9f7 | 642 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 643 | |
<> | 144:ef7eb2e8f9f7 | 644 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 645 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 646 | |
<> | 144:ef7eb2e8f9f7 | 647 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 648 | } |
<> | 144:ef7eb2e8f9f7 | 649 | else |
<> | 144:ef7eb2e8f9f7 | 650 | { |
<> | 144:ef7eb2e8f9f7 | 651 | /* Set the RTC_DR register */ |
<> | 144:ef7eb2e8f9f7 | 652 | hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 653 | |
<> | 144:ef7eb2e8f9f7 | 654 | /* Exit Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 655 | hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); |
<> | 144:ef7eb2e8f9f7 | 656 | |
<> | 144:ef7eb2e8f9f7 | 657 | /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ |
<> | 144:ef7eb2e8f9f7 | 658 | if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) |
<> | 144:ef7eb2e8f9f7 | 659 | { |
<> | 144:ef7eb2e8f9f7 | 660 | if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) |
<> | 144:ef7eb2e8f9f7 | 661 | { |
<> | 144:ef7eb2e8f9f7 | 662 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 663 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 664 | |
<> | 144:ef7eb2e8f9f7 | 665 | hrtc->State = HAL_RTC_STATE_ERROR; |
<> | 144:ef7eb2e8f9f7 | 666 | |
<> | 144:ef7eb2e8f9f7 | 667 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 668 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 669 | |
<> | 144:ef7eb2e8f9f7 | 670 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 671 | } |
<> | 144:ef7eb2e8f9f7 | 672 | } |
<> | 144:ef7eb2e8f9f7 | 673 | |
<> | 144:ef7eb2e8f9f7 | 674 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 675 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 676 | |
<> | 144:ef7eb2e8f9f7 | 677 | hrtc->State = HAL_RTC_STATE_READY ; |
<> | 144:ef7eb2e8f9f7 | 678 | |
<> | 144:ef7eb2e8f9f7 | 679 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 680 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 681 | |
<> | 144:ef7eb2e8f9f7 | 682 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 683 | } |
<> | 144:ef7eb2e8f9f7 | 684 | } |
<> | 144:ef7eb2e8f9f7 | 685 | |
<> | 144:ef7eb2e8f9f7 | 686 | /** |
<> | 144:ef7eb2e8f9f7 | 687 | * @brief Get RTC current date. |
<> | 144:ef7eb2e8f9f7 | 688 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 689 | * @param sDate: Pointer to Date structure |
<> | 144:ef7eb2e8f9f7 | 690 | * @param Format: Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 691 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 692 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 693 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 694 | * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values |
<> | 144:ef7eb2e8f9f7 | 695 | * in the higher-order calendar shadow registers to ensure consistency between the time and date values. |
<> | 144:ef7eb2e8f9f7 | 696 | * Reading RTC current time locks the values in calendar shadow registers until Current date is read. |
<> | 144:ef7eb2e8f9f7 | 697 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 698 | */ |
<> | 144:ef7eb2e8f9f7 | 699 | HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 700 | { |
<> | 151:5eaa88a5bcc7 | 701 | uint32_t datetmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 702 | |
<> | 144:ef7eb2e8f9f7 | 703 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 704 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 705 | |
<> | 144:ef7eb2e8f9f7 | 706 | /* Get the DR register */ |
<> | 144:ef7eb2e8f9f7 | 707 | datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK); |
<> | 144:ef7eb2e8f9f7 | 708 | |
<> | 144:ef7eb2e8f9f7 | 709 | /* Fill the structure fields with the read parameters */ |
<> | 151:5eaa88a5bcc7 | 710 | sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16U); |
<> | 151:5eaa88a5bcc7 | 711 | sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8U); |
<> | 144:ef7eb2e8f9f7 | 712 | sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU)); |
<> | 151:5eaa88a5bcc7 | 713 | sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13U); |
<> | 144:ef7eb2e8f9f7 | 714 | |
<> | 144:ef7eb2e8f9f7 | 715 | /* Check the input parameters format */ |
<> | 144:ef7eb2e8f9f7 | 716 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 717 | { |
<> | 144:ef7eb2e8f9f7 | 718 | /* Convert the date structure parameters to Binary format */ |
<> | 144:ef7eb2e8f9f7 | 719 | sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year); |
<> | 144:ef7eb2e8f9f7 | 720 | sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month); |
<> | 144:ef7eb2e8f9f7 | 721 | sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date); |
<> | 144:ef7eb2e8f9f7 | 722 | } |
<> | 144:ef7eb2e8f9f7 | 723 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 724 | } |
<> | 144:ef7eb2e8f9f7 | 725 | |
<> | 144:ef7eb2e8f9f7 | 726 | /** |
<> | 144:ef7eb2e8f9f7 | 727 | * @} |
<> | 144:ef7eb2e8f9f7 | 728 | */ |
<> | 144:ef7eb2e8f9f7 | 729 | |
<> | 144:ef7eb2e8f9f7 | 730 | /** @addtogroup RTC_Exported_Functions_Group3 |
<> | 144:ef7eb2e8f9f7 | 731 | * @brief RTC Alarm functions |
<> | 144:ef7eb2e8f9f7 | 732 | * |
<> | 144:ef7eb2e8f9f7 | 733 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 734 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 735 | ##### RTC Alarm functions ##### |
<> | 144:ef7eb2e8f9f7 | 736 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 737 | |
<> | 144:ef7eb2e8f9f7 | 738 | [..] This section provides functions allowing to configure Alarm feature |
<> | 144:ef7eb2e8f9f7 | 739 | |
<> | 144:ef7eb2e8f9f7 | 740 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 741 | * @{ |
<> | 144:ef7eb2e8f9f7 | 742 | */ |
<> | 144:ef7eb2e8f9f7 | 743 | /** |
<> | 144:ef7eb2e8f9f7 | 744 | * @brief Set the specified RTC Alarm. |
<> | 144:ef7eb2e8f9f7 | 745 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 746 | * @param sAlarm: Pointer to Alarm structure |
<> | 144:ef7eb2e8f9f7 | 747 | * @param Format: Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 748 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 749 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 750 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 751 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 752 | */ |
<> | 144:ef7eb2e8f9f7 | 753 | HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 754 | { |
<> | 151:5eaa88a5bcc7 | 755 | uint32_t tickstart = 0U; |
<> | 151:5eaa88a5bcc7 | 756 | uint32_t tmpreg = 0U, subsecondtmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 757 | |
<> | 144:ef7eb2e8f9f7 | 758 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 759 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 760 | assert_param(IS_RTC_ALARM(sAlarm->Alarm)); |
<> | 144:ef7eb2e8f9f7 | 761 | assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 762 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel)); |
<> | 144:ef7eb2e8f9f7 | 763 | assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds)); |
<> | 144:ef7eb2e8f9f7 | 764 | assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask)); |
<> | 144:ef7eb2e8f9f7 | 765 | |
<> | 144:ef7eb2e8f9f7 | 766 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 767 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 768 | |
<> | 144:ef7eb2e8f9f7 | 769 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 770 | |
<> | 144:ef7eb2e8f9f7 | 771 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 772 | { |
<> | 144:ef7eb2e8f9f7 | 773 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 774 | { |
<> | 144:ef7eb2e8f9f7 | 775 | assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); |
<> | 144:ef7eb2e8f9f7 | 776 | assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 777 | } |
<> | 144:ef7eb2e8f9f7 | 778 | else |
<> | 144:ef7eb2e8f9f7 | 779 | { |
<> | 151:5eaa88a5bcc7 | 780 | sAlarm->AlarmTime.TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 781 | assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours)); |
<> | 144:ef7eb2e8f9f7 | 782 | } |
<> | 144:ef7eb2e8f9f7 | 783 | assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes)); |
<> | 144:ef7eb2e8f9f7 | 784 | assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds)); |
<> | 144:ef7eb2e8f9f7 | 785 | |
<> | 144:ef7eb2e8f9f7 | 786 | if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) |
<> | 144:ef7eb2e8f9f7 | 787 | { |
<> | 144:ef7eb2e8f9f7 | 788 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay)); |
<> | 144:ef7eb2e8f9f7 | 789 | } |
<> | 144:ef7eb2e8f9f7 | 790 | else |
<> | 144:ef7eb2e8f9f7 | 791 | { |
<> | 144:ef7eb2e8f9f7 | 792 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay)); |
<> | 144:ef7eb2e8f9f7 | 793 | } |
<> | 144:ef7eb2e8f9f7 | 794 | |
<> | 151:5eaa88a5bcc7 | 795 | tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 796 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 797 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ |
<> | 151:5eaa88a5bcc7 | 798 | ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 799 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \ |
<> | 144:ef7eb2e8f9f7 | 800 | ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ |
<> | 144:ef7eb2e8f9f7 | 801 | ((uint32_t)sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 802 | } |
<> | 144:ef7eb2e8f9f7 | 803 | else |
<> | 144:ef7eb2e8f9f7 | 804 | { |
<> | 144:ef7eb2e8f9f7 | 805 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 806 | { |
<> | 144:ef7eb2e8f9f7 | 807 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); |
<> | 144:ef7eb2e8f9f7 | 808 | assert_param(IS_RTC_HOUR12(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 809 | assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 810 | } |
<> | 144:ef7eb2e8f9f7 | 811 | else |
<> | 144:ef7eb2e8f9f7 | 812 | { |
<> | 151:5eaa88a5bcc7 | 813 | sAlarm->AlarmTime.TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 814 | assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); |
<> | 144:ef7eb2e8f9f7 | 815 | } |
<> | 144:ef7eb2e8f9f7 | 816 | |
<> | 144:ef7eb2e8f9f7 | 817 | assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes))); |
<> | 144:ef7eb2e8f9f7 | 818 | assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds))); |
<> | 144:ef7eb2e8f9f7 | 819 | |
<> | 144:ef7eb2e8f9f7 | 820 | if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) |
<> | 144:ef7eb2e8f9f7 | 821 | { |
<> | 144:ef7eb2e8f9f7 | 822 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 823 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 824 | } |
<> | 144:ef7eb2e8f9f7 | 825 | else |
<> | 144:ef7eb2e8f9f7 | 826 | { |
<> | 144:ef7eb2e8f9f7 | 827 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 828 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 829 | } |
<> | 144:ef7eb2e8f9f7 | 830 | |
<> | 151:5eaa88a5bcc7 | 831 | tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 832 | ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 833 | ((uint32_t) sAlarm->AlarmTime.Seconds) | \ |
<> | 151:5eaa88a5bcc7 | 834 | ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 835 | ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \ |
<> | 144:ef7eb2e8f9f7 | 836 | ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ |
<> | 144:ef7eb2e8f9f7 | 837 | ((uint32_t)sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 838 | } |
<> | 144:ef7eb2e8f9f7 | 839 | |
<> | 144:ef7eb2e8f9f7 | 840 | /* Configure the Alarm A or Alarm B Sub Second registers */ |
<> | 144:ef7eb2e8f9f7 | 841 | subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask)); |
<> | 144:ef7eb2e8f9f7 | 842 | |
<> | 144:ef7eb2e8f9f7 | 843 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 844 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 845 | |
<> | 144:ef7eb2e8f9f7 | 846 | /* Configure the Alarm register */ |
<> | 144:ef7eb2e8f9f7 | 847 | if(sAlarm->Alarm == RTC_ALARM_A) |
<> | 144:ef7eb2e8f9f7 | 848 | { |
<> | 144:ef7eb2e8f9f7 | 849 | /* Disable the Alarm A interrupt */ |
<> | 144:ef7eb2e8f9f7 | 850 | __HAL_RTC_ALARMA_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 851 | |
<> | 144:ef7eb2e8f9f7 | 852 | /* In case of interrupt mode is used, the interrupt source must disabled */ |
<> | 144:ef7eb2e8f9f7 | 853 | __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); |
<> | 144:ef7eb2e8f9f7 | 854 | |
<> | 144:ef7eb2e8f9f7 | 855 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 856 | /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 857 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 858 | { |
<> | 144:ef7eb2e8f9f7 | 859 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 860 | { |
<> | 144:ef7eb2e8f9f7 | 861 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 862 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 863 | |
<> | 144:ef7eb2e8f9f7 | 864 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 865 | |
<> | 144:ef7eb2e8f9f7 | 866 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 867 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 868 | |
<> | 144:ef7eb2e8f9f7 | 869 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 870 | } |
<> | 144:ef7eb2e8f9f7 | 871 | } |
<> | 144:ef7eb2e8f9f7 | 872 | |
<> | 144:ef7eb2e8f9f7 | 873 | hrtc->Instance->ALRMAR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 874 | /* Configure the Alarm A Sub Second register */ |
<> | 144:ef7eb2e8f9f7 | 875 | hrtc->Instance->ALRMASSR = subsecondtmpreg; |
<> | 144:ef7eb2e8f9f7 | 876 | /* Configure the Alarm state: Enable Alarm */ |
<> | 144:ef7eb2e8f9f7 | 877 | __HAL_RTC_ALARMA_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 878 | } |
<> | 144:ef7eb2e8f9f7 | 879 | else |
<> | 144:ef7eb2e8f9f7 | 880 | { |
<> | 144:ef7eb2e8f9f7 | 881 | /* Disable the Alarm B interrupt */ |
<> | 144:ef7eb2e8f9f7 | 882 | __HAL_RTC_ALARMB_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 883 | |
<> | 144:ef7eb2e8f9f7 | 884 | /* In case of interrupt mode is used, the interrupt source must disabled */ |
<> | 144:ef7eb2e8f9f7 | 885 | __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB); |
<> | 144:ef7eb2e8f9f7 | 886 | |
<> | 144:ef7eb2e8f9f7 | 887 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 888 | /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 889 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 890 | { |
<> | 144:ef7eb2e8f9f7 | 891 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 892 | { |
<> | 144:ef7eb2e8f9f7 | 893 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 894 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 895 | |
<> | 144:ef7eb2e8f9f7 | 896 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 897 | |
<> | 144:ef7eb2e8f9f7 | 898 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 899 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 900 | |
<> | 144:ef7eb2e8f9f7 | 901 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 902 | } |
<> | 144:ef7eb2e8f9f7 | 903 | } |
<> | 144:ef7eb2e8f9f7 | 904 | |
<> | 144:ef7eb2e8f9f7 | 905 | hrtc->Instance->ALRMBR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 906 | /* Configure the Alarm B Sub Second register */ |
<> | 144:ef7eb2e8f9f7 | 907 | hrtc->Instance->ALRMBSSR = subsecondtmpreg; |
<> | 144:ef7eb2e8f9f7 | 908 | /* Configure the Alarm state: Enable Alarm */ |
<> | 144:ef7eb2e8f9f7 | 909 | __HAL_RTC_ALARMB_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 910 | } |
<> | 144:ef7eb2e8f9f7 | 911 | |
<> | 144:ef7eb2e8f9f7 | 912 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 913 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 914 | |
<> | 144:ef7eb2e8f9f7 | 915 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 916 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 917 | |
<> | 144:ef7eb2e8f9f7 | 918 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 919 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 920 | |
<> | 144:ef7eb2e8f9f7 | 921 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 922 | } |
<> | 144:ef7eb2e8f9f7 | 923 | |
<> | 144:ef7eb2e8f9f7 | 924 | /** |
<> | 144:ef7eb2e8f9f7 | 925 | * @brief Set the specified RTC Alarm with Interrupt. |
<> | 144:ef7eb2e8f9f7 | 926 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 927 | * @param sAlarm: Pointer to Alarm structure |
<> | 144:ef7eb2e8f9f7 | 928 | * @param Format: Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 929 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 930 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 931 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 932 | * @note The Alarm register can only be written when the corresponding Alarm |
<> | 144:ef7eb2e8f9f7 | 933 | * is disabled (Use the HAL_RTC_DeactivateAlarm()). |
<> | 144:ef7eb2e8f9f7 | 934 | * @note The HAL_RTC_SetTime() must be called before enabling the Alarm feature. |
<> | 144:ef7eb2e8f9f7 | 935 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 936 | */ |
<> | 144:ef7eb2e8f9f7 | 937 | HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 938 | { |
<> | 151:5eaa88a5bcc7 | 939 | uint32_t tickstart = 0U; |
<> | 151:5eaa88a5bcc7 | 940 | uint32_t tmpreg = 0U, subsecondtmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 941 | |
<> | 144:ef7eb2e8f9f7 | 942 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 943 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 944 | assert_param(IS_RTC_ALARM(sAlarm->Alarm)); |
<> | 144:ef7eb2e8f9f7 | 945 | assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 946 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel)); |
<> | 144:ef7eb2e8f9f7 | 947 | assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds)); |
<> | 144:ef7eb2e8f9f7 | 948 | assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask)); |
<> | 144:ef7eb2e8f9f7 | 949 | |
<> | 144:ef7eb2e8f9f7 | 950 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 951 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 952 | |
<> | 144:ef7eb2e8f9f7 | 953 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 954 | |
<> | 144:ef7eb2e8f9f7 | 955 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 956 | { |
<> | 144:ef7eb2e8f9f7 | 957 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 958 | { |
<> | 144:ef7eb2e8f9f7 | 959 | assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); |
<> | 144:ef7eb2e8f9f7 | 960 | assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 961 | } |
<> | 144:ef7eb2e8f9f7 | 962 | else |
<> | 144:ef7eb2e8f9f7 | 963 | { |
<> | 151:5eaa88a5bcc7 | 964 | sAlarm->AlarmTime.TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 965 | assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours)); |
<> | 144:ef7eb2e8f9f7 | 966 | } |
<> | 144:ef7eb2e8f9f7 | 967 | assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes)); |
<> | 144:ef7eb2e8f9f7 | 968 | assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds)); |
<> | 144:ef7eb2e8f9f7 | 969 | |
<> | 144:ef7eb2e8f9f7 | 970 | if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) |
<> | 144:ef7eb2e8f9f7 | 971 | { |
<> | 144:ef7eb2e8f9f7 | 972 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay)); |
<> | 144:ef7eb2e8f9f7 | 973 | } |
<> | 144:ef7eb2e8f9f7 | 974 | else |
<> | 144:ef7eb2e8f9f7 | 975 | { |
<> | 144:ef7eb2e8f9f7 | 976 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay)); |
<> | 144:ef7eb2e8f9f7 | 977 | } |
<> | 151:5eaa88a5bcc7 | 978 | tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 979 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 980 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ |
<> | 151:5eaa88a5bcc7 | 981 | ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 982 | ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \ |
<> | 144:ef7eb2e8f9f7 | 983 | ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ |
<> | 144:ef7eb2e8f9f7 | 984 | ((uint32_t)sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 985 | } |
<> | 144:ef7eb2e8f9f7 | 986 | else |
<> | 144:ef7eb2e8f9f7 | 987 | { |
<> | 144:ef7eb2e8f9f7 | 988 | if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 989 | { |
<> | 144:ef7eb2e8f9f7 | 990 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); |
<> | 144:ef7eb2e8f9f7 | 991 | assert_param(IS_RTC_HOUR12(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 992 | assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); |
<> | 144:ef7eb2e8f9f7 | 993 | } |
<> | 144:ef7eb2e8f9f7 | 994 | else |
<> | 144:ef7eb2e8f9f7 | 995 | { |
<> | 151:5eaa88a5bcc7 | 996 | sAlarm->AlarmTime.TimeFormat = 0x00U; |
<> | 144:ef7eb2e8f9f7 | 997 | assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); |
<> | 144:ef7eb2e8f9f7 | 998 | } |
<> | 144:ef7eb2e8f9f7 | 999 | |
<> | 144:ef7eb2e8f9f7 | 1000 | assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes))); |
<> | 144:ef7eb2e8f9f7 | 1001 | assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds))); |
<> | 144:ef7eb2e8f9f7 | 1002 | |
<> | 144:ef7eb2e8f9f7 | 1003 | if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) |
<> | 144:ef7eb2e8f9f7 | 1004 | { |
<> | 144:ef7eb2e8f9f7 | 1005 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 1006 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 1007 | } |
<> | 144:ef7eb2e8f9f7 | 1008 | else |
<> | 144:ef7eb2e8f9f7 | 1009 | { |
<> | 144:ef7eb2e8f9f7 | 1010 | tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 1011 | assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg)); |
<> | 144:ef7eb2e8f9f7 | 1012 | } |
<> | 151:5eaa88a5bcc7 | 1013 | tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 1014 | ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \ |
<> | 144:ef7eb2e8f9f7 | 1015 | ((uint32_t) sAlarm->AlarmTime.Seconds) | \ |
<> | 151:5eaa88a5bcc7 | 1016 | ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \ |
<> | 151:5eaa88a5bcc7 | 1017 | ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \ |
<> | 144:ef7eb2e8f9f7 | 1018 | ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ |
<> | 144:ef7eb2e8f9f7 | 1019 | ((uint32_t)sAlarm->AlarmMask)); |
<> | 144:ef7eb2e8f9f7 | 1020 | } |
<> | 144:ef7eb2e8f9f7 | 1021 | /* Configure the Alarm A or Alarm B Sub Second registers */ |
<> | 144:ef7eb2e8f9f7 | 1022 | subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask)); |
<> | 144:ef7eb2e8f9f7 | 1023 | |
<> | 144:ef7eb2e8f9f7 | 1024 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1025 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1026 | |
<> | 144:ef7eb2e8f9f7 | 1027 | /* Configure the Alarm register */ |
<> | 144:ef7eb2e8f9f7 | 1028 | if(sAlarm->Alarm == RTC_ALARM_A) |
<> | 144:ef7eb2e8f9f7 | 1029 | { |
<> | 144:ef7eb2e8f9f7 | 1030 | /* Disable the Alarm A interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1031 | __HAL_RTC_ALARMA_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1032 | |
<> | 144:ef7eb2e8f9f7 | 1033 | /* Clear flag alarm A */ |
<> | 144:ef7eb2e8f9f7 | 1034 | __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); |
<> | 144:ef7eb2e8f9f7 | 1035 | |
<> | 144:ef7eb2e8f9f7 | 1036 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1037 | /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 1038 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1039 | { |
<> | 144:ef7eb2e8f9f7 | 1040 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1041 | { |
<> | 144:ef7eb2e8f9f7 | 1042 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1043 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1044 | |
<> | 144:ef7eb2e8f9f7 | 1045 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1046 | |
<> | 144:ef7eb2e8f9f7 | 1047 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1048 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1049 | |
<> | 144:ef7eb2e8f9f7 | 1050 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1051 | } |
<> | 144:ef7eb2e8f9f7 | 1052 | } |
<> | 144:ef7eb2e8f9f7 | 1053 | |
<> | 144:ef7eb2e8f9f7 | 1054 | hrtc->Instance->ALRMAR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 1055 | /* Configure the Alarm A Sub Second register */ |
<> | 144:ef7eb2e8f9f7 | 1056 | hrtc->Instance->ALRMASSR = subsecondtmpreg; |
<> | 144:ef7eb2e8f9f7 | 1057 | /* Configure the Alarm state: Enable Alarm */ |
<> | 144:ef7eb2e8f9f7 | 1058 | __HAL_RTC_ALARMA_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1059 | /* Configure the Alarm interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1060 | __HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA); |
<> | 144:ef7eb2e8f9f7 | 1061 | } |
<> | 144:ef7eb2e8f9f7 | 1062 | else |
<> | 144:ef7eb2e8f9f7 | 1063 | { |
<> | 144:ef7eb2e8f9f7 | 1064 | /* Disable the Alarm B interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1065 | __HAL_RTC_ALARMB_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1066 | |
<> | 144:ef7eb2e8f9f7 | 1067 | /* Clear flag alarm B */ |
<> | 144:ef7eb2e8f9f7 | 1068 | __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); |
<> | 144:ef7eb2e8f9f7 | 1069 | |
<> | 144:ef7eb2e8f9f7 | 1070 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1071 | /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 1072 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1073 | { |
<> | 144:ef7eb2e8f9f7 | 1074 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1075 | { |
<> | 144:ef7eb2e8f9f7 | 1076 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1077 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1078 | |
<> | 144:ef7eb2e8f9f7 | 1079 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1080 | |
<> | 144:ef7eb2e8f9f7 | 1081 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1082 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1083 | |
<> | 144:ef7eb2e8f9f7 | 1084 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1085 | } |
<> | 144:ef7eb2e8f9f7 | 1086 | } |
<> | 144:ef7eb2e8f9f7 | 1087 | |
<> | 144:ef7eb2e8f9f7 | 1088 | hrtc->Instance->ALRMBR = (uint32_t)tmpreg; |
<> | 144:ef7eb2e8f9f7 | 1089 | /* Configure the Alarm B Sub Second register */ |
<> | 144:ef7eb2e8f9f7 | 1090 | hrtc->Instance->ALRMBSSR = subsecondtmpreg; |
<> | 144:ef7eb2e8f9f7 | 1091 | /* Configure the Alarm state: Enable Alarm */ |
<> | 144:ef7eb2e8f9f7 | 1092 | __HAL_RTC_ALARMB_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1093 | /* Configure the Alarm interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1094 | __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB); |
<> | 144:ef7eb2e8f9f7 | 1095 | } |
<> | 144:ef7eb2e8f9f7 | 1096 | |
<> | 144:ef7eb2e8f9f7 | 1097 | /* RTC Alarm Interrupt Configuration: EXTI configuration */ |
<> | 144:ef7eb2e8f9f7 | 1098 | __HAL_RTC_ALARM_EXTI_ENABLE_IT(); |
<> | 144:ef7eb2e8f9f7 | 1099 | |
<> | 144:ef7eb2e8f9f7 | 1100 | __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); |
<> | 144:ef7eb2e8f9f7 | 1101 | |
<> | 144:ef7eb2e8f9f7 | 1102 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1103 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1104 | |
<> | 144:ef7eb2e8f9f7 | 1105 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1106 | |
<> | 144:ef7eb2e8f9f7 | 1107 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1108 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1109 | |
<> | 144:ef7eb2e8f9f7 | 1110 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1111 | } |
<> | 144:ef7eb2e8f9f7 | 1112 | |
<> | 144:ef7eb2e8f9f7 | 1113 | /** |
<> | 144:ef7eb2e8f9f7 | 1114 | * @brief Deactivate the specified RTC Alarm. |
<> | 144:ef7eb2e8f9f7 | 1115 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 1116 | * @param Alarm: Specifies the Alarm. |
<> | 144:ef7eb2e8f9f7 | 1117 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 1118 | * @arg RTC_ALARM_A: AlarmA |
<> | 144:ef7eb2e8f9f7 | 1119 | * @arg RTC_ALARM_B: AlarmB |
<> | 144:ef7eb2e8f9f7 | 1120 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1121 | */ |
<> | 144:ef7eb2e8f9f7 | 1122 | HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm) |
<> | 144:ef7eb2e8f9f7 | 1123 | { |
<> | 151:5eaa88a5bcc7 | 1124 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1125 | |
<> | 144:ef7eb2e8f9f7 | 1126 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1127 | assert_param(IS_RTC_ALARM(Alarm)); |
<> | 144:ef7eb2e8f9f7 | 1128 | |
<> | 144:ef7eb2e8f9f7 | 1129 | /* Process Locked */ |
<> | 144:ef7eb2e8f9f7 | 1130 | __HAL_LOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1131 | |
<> | 144:ef7eb2e8f9f7 | 1132 | hrtc->State = HAL_RTC_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1133 | |
<> | 144:ef7eb2e8f9f7 | 1134 | /* Disable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1135 | __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1136 | |
<> | 144:ef7eb2e8f9f7 | 1137 | if(Alarm == RTC_ALARM_A) |
<> | 144:ef7eb2e8f9f7 | 1138 | { |
<> | 144:ef7eb2e8f9f7 | 1139 | /* AlarmA */ |
<> | 144:ef7eb2e8f9f7 | 1140 | __HAL_RTC_ALARMA_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1141 | |
<> | 144:ef7eb2e8f9f7 | 1142 | /* In case of interrupt mode is used, the interrupt source must disabled */ |
<> | 144:ef7eb2e8f9f7 | 1143 | __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); |
<> | 144:ef7eb2e8f9f7 | 1144 | |
<> | 144:ef7eb2e8f9f7 | 1145 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1146 | |
<> | 144:ef7eb2e8f9f7 | 1147 | /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 1148 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1149 | { |
<> | 144:ef7eb2e8f9f7 | 1150 | if( (HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1151 | { |
<> | 144:ef7eb2e8f9f7 | 1152 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1153 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1154 | |
<> | 144:ef7eb2e8f9f7 | 1155 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1156 | |
<> | 144:ef7eb2e8f9f7 | 1157 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1158 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1159 | |
<> | 144:ef7eb2e8f9f7 | 1160 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1161 | } |
<> | 144:ef7eb2e8f9f7 | 1162 | } |
<> | 144:ef7eb2e8f9f7 | 1163 | } |
<> | 144:ef7eb2e8f9f7 | 1164 | else |
<> | 144:ef7eb2e8f9f7 | 1165 | { |
<> | 144:ef7eb2e8f9f7 | 1166 | /* AlarmB */ |
<> | 144:ef7eb2e8f9f7 | 1167 | __HAL_RTC_ALARMB_DISABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1168 | |
<> | 144:ef7eb2e8f9f7 | 1169 | /* In case of interrupt mode is used, the interrupt source must disabled */ |
<> | 144:ef7eb2e8f9f7 | 1170 | __HAL_RTC_ALARM_DISABLE_IT(hrtc,RTC_IT_ALRB); |
<> | 144:ef7eb2e8f9f7 | 1171 | |
<> | 144:ef7eb2e8f9f7 | 1172 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1173 | |
<> | 144:ef7eb2e8f9f7 | 1174 | /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 1175 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1176 | { |
<> | 144:ef7eb2e8f9f7 | 1177 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1178 | { |
<> | 144:ef7eb2e8f9f7 | 1179 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1180 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1181 | |
<> | 144:ef7eb2e8f9f7 | 1182 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1183 | |
<> | 144:ef7eb2e8f9f7 | 1184 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1185 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1186 | |
<> | 144:ef7eb2e8f9f7 | 1187 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1188 | } |
<> | 144:ef7eb2e8f9f7 | 1189 | } |
<> | 144:ef7eb2e8f9f7 | 1190 | } |
<> | 144:ef7eb2e8f9f7 | 1191 | /* Enable the write protection for RTC registers */ |
<> | 144:ef7eb2e8f9f7 | 1192 | __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1193 | |
<> | 144:ef7eb2e8f9f7 | 1194 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1195 | |
<> | 144:ef7eb2e8f9f7 | 1196 | /* Process Unlocked */ |
<> | 144:ef7eb2e8f9f7 | 1197 | __HAL_UNLOCK(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1198 | |
<> | 144:ef7eb2e8f9f7 | 1199 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1200 | } |
<> | 144:ef7eb2e8f9f7 | 1201 | |
<> | 144:ef7eb2e8f9f7 | 1202 | /** |
<> | 144:ef7eb2e8f9f7 | 1203 | * @brief Get the RTC Alarm value and masks. |
<> | 144:ef7eb2e8f9f7 | 1204 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 1205 | * @param sAlarm: Pointer to Date structure |
<> | 144:ef7eb2e8f9f7 | 1206 | * @param Alarm: Specifies the Alarm. |
<> | 144:ef7eb2e8f9f7 | 1207 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 1208 | * @arg RTC_ALARM_A: AlarmA |
<> | 144:ef7eb2e8f9f7 | 1209 | * @arg RTC_ALARM_B: AlarmB |
<> | 144:ef7eb2e8f9f7 | 1210 | * @param Format: Specifies the format of the entered parameters. |
<> | 144:ef7eb2e8f9f7 | 1211 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 1212 | * @arg RTC_FORMAT_BIN: Binary data format |
<> | 144:ef7eb2e8f9f7 | 1213 | * @arg RTC_FORMAT_BCD: BCD data format |
<> | 144:ef7eb2e8f9f7 | 1214 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1215 | */ |
<> | 144:ef7eb2e8f9f7 | 1216 | HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format) |
<> | 144:ef7eb2e8f9f7 | 1217 | { |
<> | 151:5eaa88a5bcc7 | 1218 | uint32_t tmpreg = 0U, subsecondtmpreg = 0U; |
<> | 144:ef7eb2e8f9f7 | 1219 | |
<> | 144:ef7eb2e8f9f7 | 1220 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1221 | assert_param(IS_RTC_FORMAT(Format)); |
<> | 144:ef7eb2e8f9f7 | 1222 | assert_param(IS_RTC_ALARM(Alarm)); |
<> | 144:ef7eb2e8f9f7 | 1223 | |
<> | 144:ef7eb2e8f9f7 | 1224 | if(Alarm == RTC_ALARM_A) |
<> | 144:ef7eb2e8f9f7 | 1225 | { |
<> | 144:ef7eb2e8f9f7 | 1226 | /* AlarmA */ |
<> | 144:ef7eb2e8f9f7 | 1227 | sAlarm->Alarm = RTC_ALARM_A; |
<> | 144:ef7eb2e8f9f7 | 1228 | |
<> | 144:ef7eb2e8f9f7 | 1229 | tmpreg = (uint32_t)(hrtc->Instance->ALRMAR); |
<> | 144:ef7eb2e8f9f7 | 1230 | subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS); |
<> | 144:ef7eb2e8f9f7 | 1231 | |
<> | 144:ef7eb2e8f9f7 | 1232 | /* Fill the structure with the read parameters */ |
<> | 151:5eaa88a5bcc7 | 1233 | sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16U); |
<> | 151:5eaa88a5bcc7 | 1234 | sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8U); |
<> | 144:ef7eb2e8f9f7 | 1235 | sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU)); |
<> | 151:5eaa88a5bcc7 | 1236 | sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16U); |
<> | 144:ef7eb2e8f9f7 | 1237 | sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg; |
<> | 151:5eaa88a5bcc7 | 1238 | sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24U); |
<> | 144:ef7eb2e8f9f7 | 1239 | sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL); |
<> | 144:ef7eb2e8f9f7 | 1240 | sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL); |
<> | 144:ef7eb2e8f9f7 | 1241 | } |
<> | 144:ef7eb2e8f9f7 | 1242 | else |
<> | 144:ef7eb2e8f9f7 | 1243 | { |
<> | 144:ef7eb2e8f9f7 | 1244 | sAlarm->Alarm = RTC_ALARM_B; |
<> | 144:ef7eb2e8f9f7 | 1245 | |
<> | 144:ef7eb2e8f9f7 | 1246 | tmpreg = (uint32_t)(hrtc->Instance->ALRMBR); |
<> | 144:ef7eb2e8f9f7 | 1247 | subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS); |
<> | 144:ef7eb2e8f9f7 | 1248 | |
<> | 144:ef7eb2e8f9f7 | 1249 | /* Fill the structure with the read parameters */ |
<> | 151:5eaa88a5bcc7 | 1250 | sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMBR_HT | RTC_ALRMBR_HU)) >> 16U); |
<> | 151:5eaa88a5bcc7 | 1251 | sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU)) >> 8U); |
<> | 144:ef7eb2e8f9f7 | 1252 | sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMBR_ST | RTC_ALRMBR_SU)); |
<> | 151:5eaa88a5bcc7 | 1253 | sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMBR_PM) >> 16U); |
<> | 144:ef7eb2e8f9f7 | 1254 | sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg; |
<> | 151:5eaa88a5bcc7 | 1255 | sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMBR_DT | RTC_ALRMBR_DU)) >> 24U); |
<> | 144:ef7eb2e8f9f7 | 1256 | sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMBR_WDSEL); |
<> | 144:ef7eb2e8f9f7 | 1257 | sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL); |
<> | 144:ef7eb2e8f9f7 | 1258 | } |
<> | 144:ef7eb2e8f9f7 | 1259 | |
<> | 144:ef7eb2e8f9f7 | 1260 | if(Format == RTC_FORMAT_BIN) |
<> | 144:ef7eb2e8f9f7 | 1261 | { |
<> | 144:ef7eb2e8f9f7 | 1262 | sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); |
<> | 144:ef7eb2e8f9f7 | 1263 | sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes); |
<> | 144:ef7eb2e8f9f7 | 1264 | sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds); |
<> | 144:ef7eb2e8f9f7 | 1265 | sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); |
<> | 144:ef7eb2e8f9f7 | 1266 | } |
<> | 144:ef7eb2e8f9f7 | 1267 | |
<> | 144:ef7eb2e8f9f7 | 1268 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1269 | } |
<> | 144:ef7eb2e8f9f7 | 1270 | |
<> | 144:ef7eb2e8f9f7 | 1271 | /** |
<> | 144:ef7eb2e8f9f7 | 1272 | * @brief Handle Alarm interrupt request. |
<> | 144:ef7eb2e8f9f7 | 1273 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 1274 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1275 | */ |
<> | 144:ef7eb2e8f9f7 | 1276 | void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1277 | { |
<> | 144:ef7eb2e8f9f7 | 1278 | /* Get the AlarmA interrupt source enable status */ |
<> | 144:ef7eb2e8f9f7 | 1279 | if(__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1280 | { |
<> | 144:ef7eb2e8f9f7 | 1281 | /* Get the pending status of the AlarmA Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1282 | if(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1283 | { |
<> | 144:ef7eb2e8f9f7 | 1284 | /* AlarmA callback */ |
<> | 144:ef7eb2e8f9f7 | 1285 | HAL_RTC_AlarmAEventCallback(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1286 | |
<> | 144:ef7eb2e8f9f7 | 1287 | /* Clear the AlarmA interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 1288 | __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); |
<> | 144:ef7eb2e8f9f7 | 1289 | } |
<> | 144:ef7eb2e8f9f7 | 1290 | } |
<> | 144:ef7eb2e8f9f7 | 1291 | |
<> | 144:ef7eb2e8f9f7 | 1292 | /* Get the AlarmB interrupt source enable status */ |
<> | 144:ef7eb2e8f9f7 | 1293 | if(__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRB) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1294 | { |
<> | 144:ef7eb2e8f9f7 | 1295 | /* Get the pending status of the AlarmB Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1296 | if(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1297 | { |
<> | 144:ef7eb2e8f9f7 | 1298 | /* AlarmB callback */ |
<> | 144:ef7eb2e8f9f7 | 1299 | HAL_RTCEx_AlarmBEventCallback(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1300 | |
<> | 144:ef7eb2e8f9f7 | 1301 | /* Clear the AlarmB interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 1302 | __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); |
<> | 144:ef7eb2e8f9f7 | 1303 | } |
<> | 144:ef7eb2e8f9f7 | 1304 | } |
<> | 144:ef7eb2e8f9f7 | 1305 | |
<> | 144:ef7eb2e8f9f7 | 1306 | /* Clear the EXTI's line Flag for RTC Alarm */ |
<> | 144:ef7eb2e8f9f7 | 1307 | __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); |
<> | 144:ef7eb2e8f9f7 | 1308 | |
<> | 144:ef7eb2e8f9f7 | 1309 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1310 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1311 | } |
<> | 144:ef7eb2e8f9f7 | 1312 | |
<> | 144:ef7eb2e8f9f7 | 1313 | /** |
<> | 144:ef7eb2e8f9f7 | 1314 | * @brief Alarm A callback. |
<> | 144:ef7eb2e8f9f7 | 1315 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 1316 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1317 | */ |
<> | 144:ef7eb2e8f9f7 | 1318 | __weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc) |
<> | 144:ef7eb2e8f9f7 | 1319 | { |
<> | 144:ef7eb2e8f9f7 | 1320 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1321 | UNUSED(hrtc); |
<> | 144:ef7eb2e8f9f7 | 1322 | |
<> | 144:ef7eb2e8f9f7 | 1323 | /* NOTE : This function should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1324 | the HAL_RTC_AlarmAEventCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1325 | */ |
<> | 144:ef7eb2e8f9f7 | 1326 | } |
<> | 144:ef7eb2e8f9f7 | 1327 | |
<> | 144:ef7eb2e8f9f7 | 1328 | /** |
<> | 144:ef7eb2e8f9f7 | 1329 | * @brief Handle AlarmA Polling request. |
<> | 144:ef7eb2e8f9f7 | 1330 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 1331 | * @param Timeout: Timeout duration |
<> | 144:ef7eb2e8f9f7 | 1332 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1333 | */ |
<> | 144:ef7eb2e8f9f7 | 1334 | HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 1335 | { |
<> | 144:ef7eb2e8f9f7 | 1336 | |
<> | 144:ef7eb2e8f9f7 | 1337 | uint32_t tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1338 | |
<> | 144:ef7eb2e8f9f7 | 1339 | while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET) |
<> | 144:ef7eb2e8f9f7 | 1340 | { |
<> | 144:ef7eb2e8f9f7 | 1341 | if(Timeout != HAL_MAX_DELAY) |
<> | 144:ef7eb2e8f9f7 | 1342 | { |
<> | 151:5eaa88a5bcc7 | 1343 | if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout)) |
<> | 144:ef7eb2e8f9f7 | 1344 | { |
<> | 144:ef7eb2e8f9f7 | 1345 | hrtc->State = HAL_RTC_STATE_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1346 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1347 | } |
<> | 144:ef7eb2e8f9f7 | 1348 | } |
<> | 144:ef7eb2e8f9f7 | 1349 | } |
<> | 144:ef7eb2e8f9f7 | 1350 | |
<> | 144:ef7eb2e8f9f7 | 1351 | /* Clear the Alarm interrupt pending bit */ |
<> | 144:ef7eb2e8f9f7 | 1352 | __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); |
<> | 144:ef7eb2e8f9f7 | 1353 | |
<> | 144:ef7eb2e8f9f7 | 1354 | /* Change RTC state */ |
<> | 144:ef7eb2e8f9f7 | 1355 | hrtc->State = HAL_RTC_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1356 | |
<> | 144:ef7eb2e8f9f7 | 1357 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1358 | } |
<> | 144:ef7eb2e8f9f7 | 1359 | |
<> | 144:ef7eb2e8f9f7 | 1360 | /** |
<> | 144:ef7eb2e8f9f7 | 1361 | * @} |
<> | 144:ef7eb2e8f9f7 | 1362 | */ |
<> | 144:ef7eb2e8f9f7 | 1363 | |
<> | 144:ef7eb2e8f9f7 | 1364 | /** @addtogroup RTC_Exported_Functions_Group4 |
<> | 144:ef7eb2e8f9f7 | 1365 | * @brief Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 1366 | * |
<> | 144:ef7eb2e8f9f7 | 1367 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1368 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1369 | ##### Peripheral Control functions ##### |
<> | 144:ef7eb2e8f9f7 | 1370 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1371 | [..] |
<> | 144:ef7eb2e8f9f7 | 1372 | This subsection provides functions allowing to |
<> | 144:ef7eb2e8f9f7 | 1373 | (+) Wait for RTC Time and Date Synchronization |
<> | 144:ef7eb2e8f9f7 | 1374 | |
<> | 144:ef7eb2e8f9f7 | 1375 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1376 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1377 | */ |
<> | 144:ef7eb2e8f9f7 | 1378 | |
<> | 144:ef7eb2e8f9f7 | 1379 | /** |
<> | 144:ef7eb2e8f9f7 | 1380 | * @brief Wait until the RTC Time and Date registers (RTC_TR and RTC_DR) are |
<> | 144:ef7eb2e8f9f7 | 1381 | * synchronized with RTC APB clock. |
<> | 144:ef7eb2e8f9f7 | 1382 | * @note The RTC Resynchronization mode is write protected, use the |
<> | 144:ef7eb2e8f9f7 | 1383 | * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. |
<> | 144:ef7eb2e8f9f7 | 1384 | * @note To read the calendar through the shadow registers after Calendar |
<> | 144:ef7eb2e8f9f7 | 1385 | * initialization, calendar update or after wakeup from low power modes |
<> | 144:ef7eb2e8f9f7 | 1386 | * the software must first clear the RSF flag. |
<> | 144:ef7eb2e8f9f7 | 1387 | * The software must then wait until it is set again before reading |
<> | 144:ef7eb2e8f9f7 | 1388 | * the calendar, which means that the calendar registers have been |
<> | 144:ef7eb2e8f9f7 | 1389 | * correctly copied into the RTC_TR and RTC_DR shadow registers. |
<> | 144:ef7eb2e8f9f7 | 1390 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 1391 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1392 | */ |
<> | 144:ef7eb2e8f9f7 | 1393 | HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1394 | { |
<> | 151:5eaa88a5bcc7 | 1395 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1396 | |
<> | 144:ef7eb2e8f9f7 | 1397 | /* Clear RSF flag */ |
<> | 144:ef7eb2e8f9f7 | 1398 | hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK; |
<> | 144:ef7eb2e8f9f7 | 1399 | |
<> | 144:ef7eb2e8f9f7 | 1400 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1401 | |
<> | 144:ef7eb2e8f9f7 | 1402 | /* Wait the registers to be synchronised */ |
<> | 144:ef7eb2e8f9f7 | 1403 | while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 1404 | { |
<> | 144:ef7eb2e8f9f7 | 1405 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1406 | { |
<> | 144:ef7eb2e8f9f7 | 1407 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1408 | } |
<> | 144:ef7eb2e8f9f7 | 1409 | } |
<> | 144:ef7eb2e8f9f7 | 1410 | |
<> | 144:ef7eb2e8f9f7 | 1411 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1412 | } |
<> | 144:ef7eb2e8f9f7 | 1413 | |
<> | 144:ef7eb2e8f9f7 | 1414 | /** |
<> | 144:ef7eb2e8f9f7 | 1415 | * @} |
<> | 144:ef7eb2e8f9f7 | 1416 | */ |
<> | 144:ef7eb2e8f9f7 | 1417 | |
<> | 144:ef7eb2e8f9f7 | 1418 | /** @addtogroup RTC_Exported_Functions_Group5 |
<> | 144:ef7eb2e8f9f7 | 1419 | * @brief Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 1420 | * |
<> | 144:ef7eb2e8f9f7 | 1421 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1422 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1423 | ##### Peripheral State functions ##### |
<> | 144:ef7eb2e8f9f7 | 1424 | =============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1425 | [..] |
<> | 144:ef7eb2e8f9f7 | 1426 | This subsection provides functions allowing to |
<> | 144:ef7eb2e8f9f7 | 1427 | (+) Get RTC state |
<> | 144:ef7eb2e8f9f7 | 1428 | |
<> | 144:ef7eb2e8f9f7 | 1429 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1430 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1431 | */ |
<> | 144:ef7eb2e8f9f7 | 1432 | /** |
<> | 144:ef7eb2e8f9f7 | 1433 | * @brief Return the RTC handle state. |
<> | 144:ef7eb2e8f9f7 | 1434 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 1435 | * @retval HAL state |
<> | 144:ef7eb2e8f9f7 | 1436 | */ |
<> | 144:ef7eb2e8f9f7 | 1437 | HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1438 | { |
<> | 144:ef7eb2e8f9f7 | 1439 | /* Return RTC handle state */ |
<> | 144:ef7eb2e8f9f7 | 1440 | return hrtc->State; |
<> | 144:ef7eb2e8f9f7 | 1441 | } |
<> | 144:ef7eb2e8f9f7 | 1442 | |
<> | 144:ef7eb2e8f9f7 | 1443 | /** |
<> | 144:ef7eb2e8f9f7 | 1444 | * @} |
<> | 144:ef7eb2e8f9f7 | 1445 | */ |
<> | 144:ef7eb2e8f9f7 | 1446 | /** |
<> | 144:ef7eb2e8f9f7 | 1447 | * @} |
<> | 144:ef7eb2e8f9f7 | 1448 | */ |
<> | 144:ef7eb2e8f9f7 | 1449 | |
<> | 144:ef7eb2e8f9f7 | 1450 | /** @addtogroup RTC_Private_Functions |
<> | 144:ef7eb2e8f9f7 | 1451 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1452 | */ |
<> | 144:ef7eb2e8f9f7 | 1453 | /** |
<> | 144:ef7eb2e8f9f7 | 1454 | * @brief Enter the RTC Initialization mode. |
<> | 144:ef7eb2e8f9f7 | 1455 | * @note The RTC Initialization mode is write protected, use the |
<> | 144:ef7eb2e8f9f7 | 1456 | * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. |
<> | 144:ef7eb2e8f9f7 | 1457 | * @param hrtc: RTC handle |
<> | 144:ef7eb2e8f9f7 | 1458 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1459 | */ |
<> | 144:ef7eb2e8f9f7 | 1460 | HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc) |
<> | 144:ef7eb2e8f9f7 | 1461 | { |
<> | 151:5eaa88a5bcc7 | 1462 | uint32_t tickstart = 0U; |
<> | 144:ef7eb2e8f9f7 | 1463 | |
<> | 144:ef7eb2e8f9f7 | 1464 | /* Check if the Initialization mode is set */ |
<> | 144:ef7eb2e8f9f7 | 1465 | if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 1466 | { |
<> | 144:ef7eb2e8f9f7 | 1467 | /* Set the Initialization mode */ |
<> | 144:ef7eb2e8f9f7 | 1468 | hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK; |
<> | 144:ef7eb2e8f9f7 | 1469 | |
<> | 144:ef7eb2e8f9f7 | 1470 | tickstart = HAL_GetTick(); |
<> | 144:ef7eb2e8f9f7 | 1471 | /* Wait till RTC is in INIT state and if Time out is reached exit */ |
<> | 144:ef7eb2e8f9f7 | 1472 | while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET) |
<> | 144:ef7eb2e8f9f7 | 1473 | { |
<> | 144:ef7eb2e8f9f7 | 1474 | if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) |
<> | 144:ef7eb2e8f9f7 | 1475 | { |
<> | 144:ef7eb2e8f9f7 | 1476 | return HAL_TIMEOUT; |
<> | 144:ef7eb2e8f9f7 | 1477 | } |
<> | 144:ef7eb2e8f9f7 | 1478 | } |
<> | 144:ef7eb2e8f9f7 | 1479 | } |
<> | 144:ef7eb2e8f9f7 | 1480 | |
<> | 144:ef7eb2e8f9f7 | 1481 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1482 | } |
<> | 144:ef7eb2e8f9f7 | 1483 | |
<> | 144:ef7eb2e8f9f7 | 1484 | |
<> | 144:ef7eb2e8f9f7 | 1485 | /** |
<> | 144:ef7eb2e8f9f7 | 1486 | * @brief Convert a 2 digit decimal to BCD format. |
<> | 144:ef7eb2e8f9f7 | 1487 | * @param Value: Byte to be converted |
<> | 144:ef7eb2e8f9f7 | 1488 | * @retval Converted byte |
<> | 144:ef7eb2e8f9f7 | 1489 | */ |
<> | 144:ef7eb2e8f9f7 | 1490 | uint8_t RTC_ByteToBcd2(uint8_t Value) |
<> | 144:ef7eb2e8f9f7 | 1491 | { |
<> | 151:5eaa88a5bcc7 | 1492 | uint32_t bcdhigh = 0U; |
<> | 144:ef7eb2e8f9f7 | 1493 | |
<> | 151:5eaa88a5bcc7 | 1494 | while(Value >= 10U) |
<> | 144:ef7eb2e8f9f7 | 1495 | { |
<> | 144:ef7eb2e8f9f7 | 1496 | bcdhigh++; |
<> | 151:5eaa88a5bcc7 | 1497 | Value -= 10U; |
<> | 144:ef7eb2e8f9f7 | 1498 | } |
<> | 144:ef7eb2e8f9f7 | 1499 | |
<> | 151:5eaa88a5bcc7 | 1500 | return ((uint8_t)(bcdhigh << 4U) | Value); |
<> | 144:ef7eb2e8f9f7 | 1501 | } |
<> | 144:ef7eb2e8f9f7 | 1502 | |
<> | 144:ef7eb2e8f9f7 | 1503 | /** |
<> | 144:ef7eb2e8f9f7 | 1504 | * @brief Convert from 2 digit BCD to Binary. |
<> | 144:ef7eb2e8f9f7 | 1505 | * @param Value: BCD value to be converted |
<> | 144:ef7eb2e8f9f7 | 1506 | * @retval Converted word |
<> | 144:ef7eb2e8f9f7 | 1507 | */ |
<> | 144:ef7eb2e8f9f7 | 1508 | uint8_t RTC_Bcd2ToByte(uint8_t Value) |
<> | 144:ef7eb2e8f9f7 | 1509 | { |
<> | 151:5eaa88a5bcc7 | 1510 | uint32_t tmp = 0U; |
<> | 151:5eaa88a5bcc7 | 1511 | tmp = ((uint8_t)(Value & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U; |
<> | 151:5eaa88a5bcc7 | 1512 | return (tmp + (Value & (uint8_t)0x0FU)); |
<> | 144:ef7eb2e8f9f7 | 1513 | } |
<> | 144:ef7eb2e8f9f7 | 1514 | |
<> | 144:ef7eb2e8f9f7 | 1515 | /** |
<> | 144:ef7eb2e8f9f7 | 1516 | * @} |
<> | 144:ef7eb2e8f9f7 | 1517 | */ |
<> | 144:ef7eb2e8f9f7 | 1518 | |
<> | 144:ef7eb2e8f9f7 | 1519 | #endif /* HAL_RTC_MODULE_ENABLED */ |
<> | 144:ef7eb2e8f9f7 | 1520 | /** |
<> | 144:ef7eb2e8f9f7 | 1521 | * @} |
<> | 144:ef7eb2e8f9f7 | 1522 | */ |
<> | 144:ef7eb2e8f9f7 | 1523 | |
<> | 144:ef7eb2e8f9f7 | 1524 | /** |
<> | 144:ef7eb2e8f9f7 | 1525 | * @} |
<> | 144:ef7eb2e8f9f7 | 1526 | */ |
<> | 144:ef7eb2e8f9f7 | 1527 | |
<> | 144:ef7eb2e8f9f7 | 1528 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
<> | 144:ef7eb2e8f9f7 | 1529 |