mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
186:707f6e361f3e
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_pwr_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Extended PWR HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the Power Controller (PWR) peripheral:
<> 144:ef7eb2e8f9f7 8 * + Extended Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 9 * + Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 ******************************************************************************
<> 144:ef7eb2e8f9f7 12 * @attention
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 17 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 18 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 19 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 20 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 21 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 22 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 23 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 24 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 25 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 28 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 30 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 34 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 35 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 37 *
<> 144:ef7eb2e8f9f7 38 ******************************************************************************
<> 144:ef7eb2e8f9f7 39 */
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 42 #include "stm32l0xx_hal.h"
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #ifdef HAL_PWR_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 45 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 46 * @{
<> 144:ef7eb2e8f9f7 47 */
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup PWREx
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup PWREx_Private
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /** @defgroup PWR_Extended_TimeOut_Value PWREx Flag Setting Time Out Value
<> 144:ef7eb2e8f9f7 58 * @{
<> 144:ef7eb2e8f9f7 59 */
<> 151:5eaa88a5bcc7 60 #define PWR_FLAG_SETTING_DELAY_US 50U
<> 144:ef7eb2e8f9f7 61 /**
<> 144:ef7eb2e8f9f7 62 * @}
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 /**
<> 144:ef7eb2e8f9f7 66 * @}
<> 144:ef7eb2e8f9f7 67 */
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 /** @addtogroup PWREx_Exported_Functions
<> 144:ef7eb2e8f9f7 71 * @brief Low Power modes configuration functions
<> 144:ef7eb2e8f9f7 72 *
<> 144:ef7eb2e8f9f7 73 @verbatim
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 ===============================================================================
<> 144:ef7eb2e8f9f7 76 ##### Peripheral extended features functions #####
<> 144:ef7eb2e8f9f7 77 ===============================================================================
<> 144:ef7eb2e8f9f7 78 @endverbatim
<> 144:ef7eb2e8f9f7 79 * @{
<> 144:ef7eb2e8f9f7 80 */
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /**
Anna Bridge 186:707f6e361f3e 83 * @brief Return Voltage Scaling Range.
Anna Bridge 186:707f6e361f3e 84 * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1, PWR_REGULATOR_VOLTAGE_SCALE2 or PWR_REGULATOR_VOLTAGE_SCALE3)
Anna Bridge 186:707f6e361f3e 85 */
Anna Bridge 186:707f6e361f3e 86 uint32_t HAL_PWREx_GetVoltageRange(void)
Anna Bridge 186:707f6e361f3e 87 {
Anna Bridge 186:707f6e361f3e 88 return (PWR->CR & PWR_CR_VOS);
Anna Bridge 186:707f6e361f3e 89 }
Anna Bridge 186:707f6e361f3e 90
Anna Bridge 186:707f6e361f3e 91
Anna Bridge 186:707f6e361f3e 92 /**
<> 144:ef7eb2e8f9f7 93 * @brief Enables the Fast WakeUp from Ultra Low Power mode.
<> 144:ef7eb2e8f9f7 94 * @note This bit works in conjunction with ULP bit.
<> 144:ef7eb2e8f9f7 95 * Means, when ULP = 1 and FWU = 1 :VREFINT startup time is ignored when
<> 144:ef7eb2e8f9f7 96 * exiting from low power mode.
<> 144:ef7eb2e8f9f7 97 * @retval None
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99 void HAL_PWREx_EnableFastWakeUp(void)
<> 144:ef7eb2e8f9f7 100 {
<> 144:ef7eb2e8f9f7 101 /* Enable the fast wake up */
<> 144:ef7eb2e8f9f7 102 SET_BIT(PWR->CR, PWR_CR_FWU);
<> 144:ef7eb2e8f9f7 103 }
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 /**
<> 144:ef7eb2e8f9f7 106 * @brief Disables the Fast WakeUp from Ultra Low Power mode.
<> 144:ef7eb2e8f9f7 107 * @retval None
<> 144:ef7eb2e8f9f7 108 */
<> 144:ef7eb2e8f9f7 109 void HAL_PWREx_DisableFastWakeUp(void)
<> 144:ef7eb2e8f9f7 110 {
<> 144:ef7eb2e8f9f7 111 /* Disable the fast wake up */
<> 144:ef7eb2e8f9f7 112 CLEAR_BIT(PWR->CR, PWR_CR_FWU);
<> 144:ef7eb2e8f9f7 113 }
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 /**
<> 144:ef7eb2e8f9f7 116 * @brief Enables the Ultra Low Power mode
<> 144:ef7eb2e8f9f7 117 * @retval None
<> 144:ef7eb2e8f9f7 118 */
<> 144:ef7eb2e8f9f7 119 void HAL_PWREx_EnableUltraLowPower(void)
<> 144:ef7eb2e8f9f7 120 {
<> 144:ef7eb2e8f9f7 121 /* Enable the Ultra Low Power mode */
<> 144:ef7eb2e8f9f7 122 SET_BIT(PWR->CR, PWR_CR_ULP);
<> 144:ef7eb2e8f9f7 123 }
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 /**
<> 144:ef7eb2e8f9f7 126 * @brief Disables the Ultra Low Power mode
<> 144:ef7eb2e8f9f7 127 * @retval None
<> 144:ef7eb2e8f9f7 128 */
<> 144:ef7eb2e8f9f7 129 void HAL_PWREx_DisableUltraLowPower(void)
<> 144:ef7eb2e8f9f7 130 {
<> 144:ef7eb2e8f9f7 131 /* Disable the Ultra Low Power mode */
<> 144:ef7eb2e8f9f7 132 CLEAR_BIT(PWR->CR, PWR_CR_ULP);
<> 144:ef7eb2e8f9f7 133 }
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 /**
<> 144:ef7eb2e8f9f7 136 * @brief Enable the Low Power Run mode.
<> 144:ef7eb2e8f9f7 137 * @note Low power run mode can only be entered when VCORE is in range 2.
<> 144:ef7eb2e8f9f7 138 * In addition, the dynamic voltage scaling must not be used when Low
<> 144:ef7eb2e8f9f7 139 * power run mode is selected. Only Stop and Sleep modes with regulator
<> 144:ef7eb2e8f9f7 140 * configured in Low power mode is allowed when Low power run mode is
<> 144:ef7eb2e8f9f7 141 * selected.
<> 144:ef7eb2e8f9f7 142 * @note The frequency of the system clock must be decreased to not exceed the
<> 144:ef7eb2e8f9f7 143 * frequency of RCC_MSIRANGE_1.
<> 144:ef7eb2e8f9f7 144 * @note In Low power run mode, all I/O pins keep the same state as in Run mode.
<> 144:ef7eb2e8f9f7 145 * @retval None
<> 144:ef7eb2e8f9f7 146 */
<> 144:ef7eb2e8f9f7 147 void HAL_PWREx_EnableLowPowerRunMode(void)
<> 144:ef7eb2e8f9f7 148 {
<> 144:ef7eb2e8f9f7 149 /* Enters the Low Power Run mode */
<> 144:ef7eb2e8f9f7 150 SET_BIT(PWR->CR, PWR_CR_LPSDSR);
<> 144:ef7eb2e8f9f7 151 SET_BIT(PWR->CR, PWR_CR_LPRUN);
<> 144:ef7eb2e8f9f7 152 }
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /**
<> 144:ef7eb2e8f9f7 155 * @brief Disable the Low Power Run mode.
<> 144:ef7eb2e8f9f7 156 * @note Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that
<> 144:ef7eb2e8f9f7 157 * REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode
<> 144:ef7eb2e8f9f7 158 * returns HAL_TIMEOUT status). The system clock frequency can then be
<> 144:ef7eb2e8f9f7 159 * increased above 2 MHz.
<> 144:ef7eb2e8f9f7 160 * @retval HAL_StatusTypeDef
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162 HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void)
<> 144:ef7eb2e8f9f7 163 {
<> 151:5eaa88a5bcc7 164 uint32_t wait_loop_index = 0U;
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 /* Exit the Low Power Run mode */
<> 144:ef7eb2e8f9f7 167 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
<> 144:ef7eb2e8f9f7 168 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR);
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /* Wait until REGLPF is reset */
<> 151:5eaa88a5bcc7 171 wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000U));
<> 144:ef7eb2e8f9f7 172
<> 151:5eaa88a5bcc7 173 while ((wait_loop_index != 0U) && (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF)))
<> 144:ef7eb2e8f9f7 174 {
<> 144:ef7eb2e8f9f7 175 wait_loop_index--;
<> 144:ef7eb2e8f9f7 176 }
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 if (HAL_IS_BIT_SET(PWR->CSR, PWR_CSR_REGLPF))
<> 144:ef7eb2e8f9f7 179 {
<> 144:ef7eb2e8f9f7 180 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 181 }
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 return HAL_OK;
<> 144:ef7eb2e8f9f7 184 }
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 /**
<> 144:ef7eb2e8f9f7 187 * @}
<> 144:ef7eb2e8f9f7 188 */
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /**
<> 144:ef7eb2e8f9f7 191 * @}
<> 144:ef7eb2e8f9f7 192 */
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 /**
<> 144:ef7eb2e8f9f7 195 * @}
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197 #endif /* HAL_PWR_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 200