mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_gpio_ex.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
186:707f6e361f3e 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_gpio_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Header file of GPIO HAL Extension module.
<> 144:ef7eb2e8f9f7 6 ******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @attention
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 12 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 14 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 17 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 19 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 20 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 ******************************************************************************
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 37 #ifndef __STM32L0xx_HAL_GPIO_EX_H
<> 144:ef7eb2e8f9f7 38 #define __STM32L0xx_HAL_GPIO_EX_H
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 41 extern "C" {
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 45 #include "stm32l0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 48 * @{
<> 144:ef7eb2e8f9f7 49 */
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @defgroup GPIOEx GPIOEx
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /** @defgroup GPIOEx_Exported_Constants GPIOEx Exported Constants
<> 144:ef7eb2e8f9f7 60 * @{
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 65 /*------------------------- STM32L083xx/STM32L073xx---------------------------*/
<> 144:ef7eb2e8f9f7 66 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 #if defined (STM32L083xx) || defined (STM32L073xx)
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 /* The table below gives an overview of the different alternate functions per port.
<> 144:ef7eb2e8f9f7 71 * For more details refer yourself to the product data sheet.
<> 144:ef7eb2e8f9f7 72 *
<> 144:ef7eb2e8f9f7 73 */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 /* | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
<> 144:ef7eb2e8f9f7 76 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 77 * PA0 | | |TIM2_C1 |TSC |USART2 |TIM2_TR |USART4 |COMP1 |
<> 144:ef7eb2e8f9f7 78 * PA1 |EVENTOUT|LCD |TIM2_C2 |TSC |USART2 |TIM21_TR|USART4 | |
<> 144:ef7eb2e8f9f7 79 * PA2 |TIM21_C1|LCD |TIM2_C3 |TSC |USART2 | |LPUART1 |COMP2 |
<> 144:ef7eb2e8f9f7 80 * PA3 |TIM21_C2|LCD |TIM2_C4 |TSC |USART2 | |LPUART1 | |
<> 144:ef7eb2e8f9f7 81 * PA4 |SPI1 | | |TSC |USART2 |TIM22_TR| | |
<> 144:ef7eb2e8f9f7 82 * PA5 |SPI1 | |TIM2_TR |TSC | |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 83 * PA6 |SPI1 |LCD |TIM3_C1 |TSC |LPUART1 |TIM22_C1|EVENTOUT|COMP1 |
<> 144:ef7eb2e8f9f7 84 * PA7 |SPI1 |LCD |TIM3_C2 |TSC | |TIM22_C2|EVENTOUT|COMP2 |
<> 144:ef7eb2e8f9f7 85 * PA8 |MCO |LCD |USB |EVENTOUT|USART1 | | |I2C3 |
<> 144:ef7eb2e8f9f7 86 * PA9 |MCO |LCD | |TSC |USART1 | |I2C1 |I2C3 |
<> 144:ef7eb2e8f9f7 87 * PA10| |LCD | |TSC |USART1 | |I2C1 | |
<> 144:ef7eb2e8f9f7 88 * PA11|SPI1 | |EVENTOUT|TSC |USART1 | |I2C2 |COMP1 |
<> 144:ef7eb2e8f9f7 89 * PA12|SPI1 | |EVENTOUT|TSC |USART1 | |I2C2 |COMP2 |
<> 144:ef7eb2e8f9f7 90 * PA13|SWDIO | |USB | | | |LPUART1 | |
<> 144:ef7eb2e8f9f7 91 * PA14|SWCLK | | | |USART2 | |LPUART1 | |
<> 144:ef7eb2e8f9f7 92 * PA15|SPI1 |LCD |TIM2_TR |EVENTOUT|USART2 |TIM2_C1 |USART4 | |
<> 144:ef7eb2e8f9f7 93 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 94 * PB0 |EVENTOUT|LCD |TIM3_C3 |TSC | | | | |
<> 144:ef7eb2e8f9f7 95 * PB1 | |LCD |TIM3_C4 |TSC |LPUART1 | | | |
<> 144:ef7eb2e8f9f7 96 * PB2 | | |LPTIM1_O|TSC | | | |I2C3 |
<> 144:ef7eb2e8f9f7 97 * PB3 |SPI1 |LCD |TIM2_C2 |TSC |EVENTOUT|USART1 |USART5 | |
<> 144:ef7eb2e8f9f7 98 * PB4 |SPI1 |LCD |TIM3_C1 |TSC |TIM22_C1|USART1 |USART5 |I2C3 |
<> 144:ef7eb2e8f9f7 99 * PB5 |SPI1 |LCD |LPTIM1_I|I2C1 |TIM3_C2 |USART1 |USART5 | |
<> 144:ef7eb2e8f9f7 100 * | | | | |TIM22_C2| | | |
<> 144:ef7eb2e8f9f7 101 * PB6 |USART1 |I2C1 |LPTIM1_T|TSC | | | | |
<> 144:ef7eb2e8f9f7 102 * PB7 |USART1 |I2C1 |LPTIM1_I|TSC | | |USART4 | |
<> 144:ef7eb2e8f9f7 103 * PB8 | |LCD | |TSC |I2C1 | | | |
<> 144:ef7eb2e8f9f7 104 * PB9 | |LCD |EVENTOUT| |I2C1 |SPI2 | | |
<> 144:ef7eb2e8f9f7 105 * PB10| |LCD |TIM2_C3 |TSC |LPUART1 |SPI2 |I2C2 |LPUART1 |
<> 144:ef7eb2e8f9f7 106 * PB11|EVENTOUT|LCD |TIM2_C4 |TSC |LPUART1 | |I2C2 |LPUART1 |
<> 144:ef7eb2e8f9f7 107 * PB12|SPI2 |LCD |LPUART1 |TSC | |I2C2 |EVENTOUT| |
<> 144:ef7eb2e8f9f7 108 * PB13|SPI2 |LCD |MCO |TSC |LPUART1 |I2C2 |TIM21_C1| |
<> 144:ef7eb2e8f9f7 109 * PB14|SPI2 |LCD |RTC |TSC |LPUART1 |I2C2 |TIM21_C2| |
<> 144:ef7eb2e8f9f7 110 * PB15|SPI2 |LCD |RTC | | | | | |
<> 144:ef7eb2e8f9f7 111 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 112 * PC0 |LPTIM1_I|LCD |EVENTOUT|TSC | | |LPUART1 |I2C3 |
<> 144:ef7eb2e8f9f7 113 * PC1 |LPTIM1_O|LCD |EVENTOUT|TSC | | |LPUART1 |I2C3 |
<> 144:ef7eb2e8f9f7 114 * PC2 |LPTIM1_I|LCD |SPI2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 115 * PC3 |LPTIM1_T|LCD |SPI2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 116 * PC4 |EVENTOUT|LCD |LPUART1 | | | | | |
<> 144:ef7eb2e8f9f7 117 * PC5 | |LCD |LPUART1 |TSC | | | | |
<> 144:ef7eb2e8f9f7 118 * PC6 |TIM22_C1|LCD |TIM3_C1 |TSC | | | | |
<> 144:ef7eb2e8f9f7 119 * PC7 |TIM22_C2|LCD |TIM3_C2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 120 * PC8 |TIM22_TR|LCD |TIM3_C3 |TSC | | | | |
<> 144:ef7eb2e8f9f7 121 * PC9 |TIM21_TR|LCD |USB |TSC | | | |I2C3 |
<> 144:ef7eb2e8f9f7 122 * | | |TIM3_C4 | | | | | |
<> 144:ef7eb2e8f9f7 123 * PC10|LPUART1 |LCD | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 124 * PC11|LPUART1 |LCD | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 125 * PC12| |LCD |USART5 | | | |USART4 | |
<> 144:ef7eb2e8f9f7 126 * PC13| | | | | | | | |
<> 144:ef7eb2e8f9f7 127 * PC14| | | | | | | | |
<> 144:ef7eb2e8f9f7 128 * PC15| | | | | | | | |
<> 144:ef7eb2e8f9f7 129 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 130 * PD0 |TIM21_C1|SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 131 * PD1 | |SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 132 * PD2 |LPUART1 |LCD |TIM3_TR | | | |USART5 | |
<> 144:ef7eb2e8f9f7 133 * PD3 |USART2 |LCD |SPI2 | | | | | |
<> 144:ef7eb2e8f9f7 134 * PD4 |USART2 |SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 135 * PD5 |USART2 | | | | | | | |
<> 144:ef7eb2e8f9f7 136 * PD6 |USART2 | | | | | | | |
<> 144:ef7eb2e8f9f7 137 * PD7 |USART2 |TIM21_C2| | | | | | |
<> 144:ef7eb2e8f9f7 138 * PD8 |LPUART1 |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 139 * PD9 |LPUART1 |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 140 * PD10| |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 141 * PD11|LPUART1 |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 142 * PD12|LPUART1 |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 143 * PD13| |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 144 * PD14| |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 145 * PD15|USB |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 146 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 147 * PE0 | |LCD |EVENTOUT| | | | | |
<> 144:ef7eb2e8f9f7 148 * PE1 | |LCD |EVENTOUT| | | | | |
<> 144:ef7eb2e8f9f7 149 * PE2 | |LCD |TIM3_TR | | | | | |
<> 144:ef7eb2e8f9f7 150 * PE3 |TIM22_C1|LCD |TIM3_C1 | | | | | |
<> 144:ef7eb2e8f9f7 151 * PE4 |TIM22_C2| |TIM3_C2 | | | | | |
<> 144:ef7eb2e8f9f7 152 * PE5 |TIM21_C1| |TIM3_C3 | | | | | |
<> 144:ef7eb2e8f9f7 153 * PE6 |TIM21_C2| |TIM3_C4 | | | | | |
<> 144:ef7eb2e8f9f7 154 * PE7 | |LCD | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 155 * PE8 | |LCD | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 156 * PE9 |TIM2_C1 |LCD |TIM2_TR | | | |USART4 | |
<> 144:ef7eb2e8f9f7 157 * PE10|TIM2_C2 |LCD | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 158 * PE11|TIM2_C3 | | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 159 * PE12|TIM2_C4 | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 160 * PE13| |LCD |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 161 * PE14| |LCD |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 162 * PE15| |LCD |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 163 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 164 * PH0 |USB | | | | | | | |
<> 144:ef7eb2e8f9f7 165 * PH1 | | | | | | | | |
<> 144:ef7eb2e8f9f7 166 * PH9 | | | | | | | | |
<> 144:ef7eb2e8f9f7 167 * PH10| | | | | | | | |
<> 144:ef7eb2e8f9f7 168 *
<> 144:ef7eb2e8f9f7 169 */
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 /** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
<> 144:ef7eb2e8f9f7 172 * @{
<> 144:ef7eb2e8f9f7 173 */
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /*
<> 144:ef7eb2e8f9f7 176 * Alternate function AF0
<> 144:ef7eb2e8f9f7 177 */
<> 151:5eaa88a5bcc7 178 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 179 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 180 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 181 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 182 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
<> 151:5eaa88a5bcc7 183 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
<> 151:5eaa88a5bcc7 184 #define GPIO_AF0_USART1 ((uint8_t)0x00U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 185 #define GPIO_AF0_SPI2 ((uint8_t)0x00U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 186 #define GPIO_AF0_LPTIM1 ((uint8_t)0x00U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 187 #define GPIO_AF0_TIM22 ((uint8_t)0x00U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 188 #define GPIO_AF0_LPUART1 ((uint8_t)0x00U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 189 #define GPIO_AF0_USART2 ((uint8_t)0x00U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 190 #define GPIO_AF0_TIM2 ((uint8_t)0x00U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 191 #define GPIO_AF0_USB ((uint8_t)0x00U) /* USB Alternate Function mapping */
<> 144:ef7eb2e8f9f7 192 /**
<> 144:ef7eb2e8f9f7 193 *
<> 144:ef7eb2e8f9f7 194 */
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 /*
<> 144:ef7eb2e8f9f7 197 * Alternate function AF1
<> 144:ef7eb2e8f9f7 198 */
<> 151:5eaa88a5bcc7 199 #define GPIO_AF1_I2C1 ((uint8_t)0x01U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 200 #define GPIO_AF1_SPI2 ((uint8_t)0x01U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 201 #define GPIO_AF1_TIM21 ((uint8_t)0x01U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 202 #define GPIO_AF1_LCD ((uint8_t)0x01U) /* LCD Alternate Function mapping */
<> 144:ef7eb2e8f9f7 203 /**
<> 144:ef7eb2e8f9f7 204 *
<> 144:ef7eb2e8f9f7 205 */
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /*
<> 144:ef7eb2e8f9f7 208 * Alternate function AF2
<> 144:ef7eb2e8f9f7 209 */
<> 151:5eaa88a5bcc7 210 #define GPIO_AF2_TIM2 ((uint8_t)0x02U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 211 #define GPIO_AF2_TIM3 ((uint8_t)0x02U) /* TIM3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 212 #define GPIO_AF2_EVENTOUT ((uint8_t)0x02U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 213 #define GPIO_AF2_LPTIM1 ((uint8_t)0x02U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 214 #define GPIO_AF2_LPUART1 ((uint8_t)0x02U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 215 #define GPIO_AF2_MCO ((uint8_t)0x02U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 216 #define GPIO_AF2_RTC ((uint8_t)0x02U) /* RTC Alternate Function mapping */
<> 151:5eaa88a5bcc7 217 #define GPIO_AF2_SPI2 ((uint8_t)0x02U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 218 #define GPIO_AF2_USART5 ((uint8_t)0x02U) /* USART5 Alternate Function mapping */
<> 151:5eaa88a5bcc7 219 #define GPIO_AF2_SPI1 ((uint8_t)0x02U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 220 #define GPIO_AF2_USB ((uint8_t)0x00U) /* USB Alternate Function mapping */
<> 144:ef7eb2e8f9f7 221 /**
<> 144:ef7eb2e8f9f7 222 *
<> 144:ef7eb2e8f9f7 223 */
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /*
<> 144:ef7eb2e8f9f7 226 * Alternate function AF3
<> 144:ef7eb2e8f9f7 227 */
<> 151:5eaa88a5bcc7 228 #define GPIO_AF3_EVENTOUT ((uint8_t)0x03U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 229 #define GPIO_AF3_I2C1 ((uint8_t)0x03U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 230 #define GPIO_AF3_TSC ((uint8_t)0x03U) /* TSC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 231 /**
<> 144:ef7eb2e8f9f7 232 *
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /*
<> 144:ef7eb2e8f9f7 236 * Alternate function AF4
<> 144:ef7eb2e8f9f7 237 */
<> 151:5eaa88a5bcc7 238 #define GPIO_AF4_USART2 ((uint8_t)0x04U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 239 #define GPIO_AF4_LPUART1 ((uint8_t)0x04U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 240 #define GPIO_AF4_USART1 ((uint8_t)0x04U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 241 #define GPIO_AF4_EVENTOUT ((uint8_t)0x04U) /* EVENTOUT Alternate Function mapping*/
<> 151:5eaa88a5bcc7 242 #define GPIO_AF4_TIM22 ((uint8_t)0x04U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 243 #define GPIO_AF4_TIM3 ((uint8_t)0x04U) /* TIM3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 244 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 245 /**
<> 144:ef7eb2e8f9f7 246 *
<> 144:ef7eb2e8f9f7 247 */
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /*
<> 144:ef7eb2e8f9f7 250 * Alternate function AF5
<> 144:ef7eb2e8f9f7 251 */
<> 151:5eaa88a5bcc7 252 #define GPIO_AF5_TIM2 ((uint8_t)0x05U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 253 #define GPIO_AF5_TIM21 ((uint8_t)0x05U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 254 #define GPIO_AF5_TIM22 ((uint8_t)0x05U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 255 #define GPIO_AF5_USART1 ((uint8_t)0x05U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 256 #define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 257 #define GPIO_AF5_I2C2 ((uint8_t)0x05U) /* I2C2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 258 /**
<> 144:ef7eb2e8f9f7 259 *
<> 144:ef7eb2e8f9f7 260 */
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 /*
<> 144:ef7eb2e8f9f7 263 * Alternate function AF6
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265
<> 151:5eaa88a5bcc7 266 #define GPIO_AF6_USART4 ((uint8_t)0x06U) /* USART4 Alternate Function mapping */
<> 151:5eaa88a5bcc7 267 #define GPIO_AF6_LPUART1 ((uint8_t)0x06U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 268 #define GPIO_AF6_EVENTOUT ((uint8_t)0x06U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 269 #define GPIO_AF6_I2C1 ((uint8_t)0x06U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 270 #define GPIO_AF6_I2C2 ((uint8_t)0x06U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 271 #define GPIO_AF6_USART5 ((uint8_t)0x06U) /* USART5 Alternate Function mapping */
<> 151:5eaa88a5bcc7 272 #define GPIO_AF6_TIM21 ((uint8_t)0x06U) /* TIM21 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 273 /**
<> 144:ef7eb2e8f9f7 274 *
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /*
<> 144:ef7eb2e8f9f7 278 * Alternate function AF7
<> 144:ef7eb2e8f9f7 279 */
<> 151:5eaa88a5bcc7 280 #define GPIO_AF7_COMP1 ((uint8_t)0x07U) /* COMP1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 281 #define GPIO_AF7_COMP2 ((uint8_t)0x07U) /* COMP2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 282 #define GPIO_AF7_I2C3 ((uint8_t)0x07U) /* I2C3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 283 #define GPIO_AF7_LPUART1 ((uint8_t)0x07U) /* LPUART1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 284 /**
<> 144:ef7eb2e8f9f7 285 *
<> 144:ef7eb2e8f9f7 286 */
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /**
<> 144:ef7eb2e8f9f7 289 * @}
<> 144:ef7eb2e8f9f7 290 */
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 /**
<> 144:ef7eb2e8f9f7 293 * @}
<> 144:ef7eb2e8f9f7 294 */
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 /** @defgroup GPIOEx_Private GPIOEx Private
<> 144:ef7eb2e8f9f7 297 * @{
<> 144:ef7eb2e8f9f7 298 */
<> 144:ef7eb2e8f9f7 299 /**
<> 144:ef7eb2e8f9f7 300 * IS_GPIO_AF macro definition
<> 144:ef7eb2e8f9f7 301 */
<> 144:ef7eb2e8f9f7 302 #define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 303 ((__AF__) == GPIO_AF0_SPI1) || ((__AF__) == GPIO_AF1_I2C1) || \
<> 144:ef7eb2e8f9f7 304 ((__AF__) == GPIO_AF0_TIM21) || ((__AF__) == GPIO_AF1_SPI2) || \
<> 144:ef7eb2e8f9f7 305 ((__AF__) == GPIO_AF0_MCO) || ((__AF__) == GPIO_AF1_TIM21) || \
<> 144:ef7eb2e8f9f7 306 ((__AF__) == GPIO_AF0_SWDIO) || ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 307 ((__AF__) == GPIO_AF0_SWCLK) || ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 308 ((__AF__) == GPIO_AF0_USART1) || ((__AF__) == GPIO_AF2_USB) || \
<> 144:ef7eb2e8f9f7 309 ((__AF__) == GPIO_AF0_SPI2) || ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 310 ((__AF__) == GPIO_AF0_LPTIM1) || ((__AF__) == GPIO_AF2_LPTIM1) || \
<> 144:ef7eb2e8f9f7 311 ((__AF__) == GPIO_AF0_TIM2) || ((__AF__) == GPIO_AF2_LPUART1) || \
<> 144:ef7eb2e8f9f7 312 ((__AF__) == GPIO_AF0_LPUART1) || ((__AF__) == GPIO_AF2_MCO) || \
<> 144:ef7eb2e8f9f7 313 ((__AF__) == GPIO_AF0_USART2) || ((__AF__) == GPIO_AF2_RTC) || \
<> 144:ef7eb2e8f9f7 314 ((__AF__) == GPIO_AF0_USB) || ((__AF__) == GPIO_AF2_SPI2) || \
<> 144:ef7eb2e8f9f7 315 ((__AF__) == GPIO_AF0_TIM2) || ((__AF__) == GPIO_AF2_USART5) || \
<> 144:ef7eb2e8f9f7 316 ((__AF__) == GPIO_AF3_TSC) || ((__AF__) == GPIO_AF2_SPI1) || \
<> 144:ef7eb2e8f9f7 317 ((__AF__) == GPIO_AF3_EVENTOUT) || ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 318 ((__AF__) == GPIO_AF3_I2C1) || ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 319 ((__AF__) == GPIO_AF5_TIM21) || ((__AF__) == GPIO_AF4_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 320 ((__AF__) == GPIO_AF5_TIM2) || ((__AF__) == GPIO_AF4_USART1) || \
<> 144:ef7eb2e8f9f7 321 ((__AF__) == GPIO_AF5_USART1) || ((__AF__) == GPIO_AF4_TIM22) || \
<> 144:ef7eb2e8f9f7 322 ((__AF__) == GPIO_AF5_TIM22) || ((__AF__) == GPIO_AF4_TIM3) || \
<> 144:ef7eb2e8f9f7 323 ((__AF__) == GPIO_AF5_SPI2) || ((__AF__) == GPIO_AF4_I2C1) || \
<> 144:ef7eb2e8f9f7 324 ((__AF__) == GPIO_AF5_I2C2) || ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 325 ((__AF__) == GPIO_AF7_COMP2) || ((__AF__) == GPIO_AF6_LPUART1) || \
<> 144:ef7eb2e8f9f7 326 ((__AF__) == GPIO_AF7_COMP1) || ((__AF__) == GPIO_AF6_I2C1) || \
<> 144:ef7eb2e8f9f7 327 ((__AF__) == GPIO_AF7_I2C3) || ((__AF__) == GPIO_AF6_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 328 ((__AF__) == GPIO_AF7_LPUART1) || ((__AF__) == GPIO_AF6_I2C2) || \
<> 144:ef7eb2e8f9f7 329 ((__AF__) == GPIO_AF6_USART5) || ((__AF__) == GPIO_AF6_TIM21))
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__) \
<> 144:ef7eb2e8f9f7 333 ((((__INSTANCE__) == GPIOA) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 334 ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 335 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 336 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 337 ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 338 ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 339 ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 340 ((__AF__) == GPIO_AF7_I2C3))) || \
<> 144:ef7eb2e8f9f7 341 (((__INSTANCE__) == GPIOB) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 342 ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 343 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 344 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 345 ((__AF__) == GPIO_AF4_TIM3) || \
<> 144:ef7eb2e8f9f7 346 ((__AF__) == GPIO_AF5_I2C2) || \
<> 144:ef7eb2e8f9f7 347 ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 348 ((__AF__) == GPIO_AF7_LPUART1))) || \
<> 144:ef7eb2e8f9f7 349 (((__INSTANCE__) == GPIOC) && (((__AF__) == GPIO_AF0_LPTIM1) || \
<> 144:ef7eb2e8f9f7 350 ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 351 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 352 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 353 ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 354 ((__AF__) == GPIO_AF7_I2C3))) || \
<> 144:ef7eb2e8f9f7 355 (((__INSTANCE__) == GPIOD) && (((__AF__) == GPIO_AF0_LPUART1) || \
<> 144:ef7eb2e8f9f7 356 ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 357 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 358 ((__AF__) == GPIO_AF6_USART5))) || \
<> 144:ef7eb2e8f9f7 359 (((__INSTANCE__) == GPIOE) && (((__AF__) == GPIO_AF0_TIM22) || \
<> 144:ef7eb2e8f9f7 360 ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 361 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 362 ((__AF__) == GPIO_AF6_USART4))) || \
<> 144:ef7eb2e8f9f7 363 (((__INSTANCE__) == GPIOH) && (((__AF__) == GPIO_AF0_USB))))
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 /**
<> 144:ef7eb2e8f9f7 366 * @}
<> 144:ef7eb2e8f9f7 367 */
<> 144:ef7eb2e8f9f7 368 #endif /* (STM32L083xx) || (STM32L073xx) */
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 371 /*------------------------- STM32L082xx and STM32L072xx-----------------------*/
<> 144:ef7eb2e8f9f7 372 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 373 #if defined (STM32L082xx) || defined (STM32L072xx)
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 /* The table below gives an overview of the different alternate functions per port.
<> 144:ef7eb2e8f9f7 376 * For more details refer yourself to the product data sheet.
<> 144:ef7eb2e8f9f7 377 */
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379
<> 144:ef7eb2e8f9f7 380 /* | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
<> 144:ef7eb2e8f9f7 381 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 382 * PA0 | | |TIM2_C1 |TSC |USART2 |TIM2_TR |USART4 |COMP1 |
<> 144:ef7eb2e8f9f7 383 * PA1 |EVENTOUT| |TIM2_C2 |TSC |USART2 |TIM21_TR|USART4 | |
<> 144:ef7eb2e8f9f7 384 * PA2 |TIM21_C1| |TIM2_C3 |TSC |USART2 | |LPUART1 |COMP2 |
<> 144:ef7eb2e8f9f7 385 * PA3 |TIM21_C2| |TIM2_C4 |TSC |USART2 | |LPUART1 | |
<> 144:ef7eb2e8f9f7 386 * PA4 |SPI1 | | |TSC |USART2 |TIM22_TR| | |
<> 144:ef7eb2e8f9f7 387 * PA5 |SPI1 | |TIM2_TR |TSC | |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 388 * PA6 |SPI1 | |TIM3_C1 |TSC |LPUART1 |TIM22_C1|EVENTOUT|COMP1 |
<> 144:ef7eb2e8f9f7 389 * PA7 |SPI1 | |TIM3_C2 |TSC | |TIM22_C2|EVENTOUT|COMP2 |
<> 144:ef7eb2e8f9f7 390 * PA8 |MCO | |USB |EVENTOUT|USART1 | | |I2C3 |
<> 144:ef7eb2e8f9f7 391 * PA9 |MCO | | |TSC |USART1 | |I2C1 |I2C3 |
<> 144:ef7eb2e8f9f7 392 * PA10| | | |TSC |USART1 | |I2C1 | |
<> 144:ef7eb2e8f9f7 393 * PA11|SPI1 | |EVENTOUT|TSC |USART1 | |I2C2 |COMP1 |
<> 144:ef7eb2e8f9f7 394 * PA12|SPI1 | |EVENTOUT|TSC |USART1 | |I2C2 |COMP2 |
<> 144:ef7eb2e8f9f7 395 * PA13|SWDIO | |USB | | | |LPUART1 | |
<> 144:ef7eb2e8f9f7 396 * PA14|SWCLK | | | |USART2 | |LPUART1 | |
<> 144:ef7eb2e8f9f7 397 * PA15|SPI1 | |TIM2_TR |EVENTOUT|USART2 |TIM2_C1 |USART4 | |
<> 144:ef7eb2e8f9f7 398 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 399 * PB0 |EVENTOUT| |TIM3_C3 |TSC | | | | |
<> 144:ef7eb2e8f9f7 400 * PB1 | | |TIM3_C4 |TSC |LPUART1 | | | |
<> 144:ef7eb2e8f9f7 401 * PB2 | | |LPTIM1_O|TSC | | | |I2C3 |
<> 144:ef7eb2e8f9f7 402 * PB3 |SPI1 | |TIM2_C2 |TSC |EVENTOUT|USART1 |USART5 | |
<> 144:ef7eb2e8f9f7 403 * PB4 |SPI1 | |TIM3_C1 |TSC |TIM22_C1|USART1 |USART5 |I2C3 |
<> 144:ef7eb2e8f9f7 404 * PB5 |SPI1 | |LPTIM1_I|I2C1 |TIM3_C2 |USART1 |USART5 | |
<> 144:ef7eb2e8f9f7 405 * | | | | |TIM22_C2| | | |
<> 144:ef7eb2e8f9f7 406 * PB6 |USART1 |I2C1 |LPTIM1_T|TSC | | | | |
<> 144:ef7eb2e8f9f7 407 * PB7 |USART1 |I2C1 |LPTIM1_I|TSC | | |USART4 | |
<> 144:ef7eb2e8f9f7 408 * PB8 | | | |TSC |I2C1 | | | |
<> 144:ef7eb2e8f9f7 409 * PB9 | | |EVENTOUT| |I2C1 |SPI2 | | |
<> 144:ef7eb2e8f9f7 410 * PB10| | |TIM2_C3 |TSC |LPUART1 |SPI2 |I2C2 |LPUART1 |
<> 144:ef7eb2e8f9f7 411 * PB11|EVENTOUT| |TIM2_C4 |TSC |LPUART1 | |I2C2 |LPUART1 |
<> 144:ef7eb2e8f9f7 412 * PB12|SPI2 | |LPUART1 |TSC | |I2C2 |EVENTOUT| |
<> 144:ef7eb2e8f9f7 413 * PB13|SPI2 | |MCO |TSC |LPUART1 |I2C2 |TIM21_C1| |
<> 144:ef7eb2e8f9f7 414 * PB14|SPI2 | |RTC |TSC |LPUART1 |I2C2 |TIM21_C2| |
<> 144:ef7eb2e8f9f7 415 * PB15|SPI2 | |RTC | | | | | |
<> 144:ef7eb2e8f9f7 416 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 417 * PC0 |LPTIM1_I| |EVENTOUT|TSC | | |LPUART1 |I2C3 |
<> 144:ef7eb2e8f9f7 418 * PC1 |LPTIM1_O| |EVENTOUT|TSC | | |LPUART1 |I2C3 |
<> 144:ef7eb2e8f9f7 419 * PC2 |LPTIM1_I| |SPI2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 420 * PC3 |LPTIM1_T| |SPI2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 421 * PC4 |EVENTOUT| |LPUART1 | | | | | |
<> 144:ef7eb2e8f9f7 422 * PC5 | | |LPUART1 |TSC | | | | |
<> 144:ef7eb2e8f9f7 423 * PC6 |TIM22_C1| |TIM3_C1 |TSC | | | | |
<> 144:ef7eb2e8f9f7 424 * PC7 |TIM22_C2| |TIM3_C2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 425 * PC8 |TIM22_TR| |TIM3_C3 |TSC | | | | |
<> 144:ef7eb2e8f9f7 426 * PC9 |TIM21_TR| |USB |TSC | | | |I2C3 |
<> 144:ef7eb2e8f9f7 427 * | | |TIM3_C4 | | | | | |
<> 144:ef7eb2e8f9f7 428 * PC10|LPUART1 | | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 429 * PC11|LPUART1 | | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 430 * PC12| | |USART5 | | | |USART4 | |
<> 144:ef7eb2e8f9f7 431 * PC13| | | | | | | | |
<> 144:ef7eb2e8f9f7 432 * PC14| | | | | | | | |
<> 144:ef7eb2e8f9f7 433 * PC15| | | | | | | | |
<> 144:ef7eb2e8f9f7 434 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 435 * PD0 |TIM21_C1|SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 436 * PD1 | |SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 437 * PD2 |LPUART1 | |TIM3_TR | | | |USART5 | |
<> 144:ef7eb2e8f9f7 438 * PD3 |USART2 | |SPI2 | | | | | |
<> 144:ef7eb2e8f9f7 439 * PD4 |USART2 |SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 440 * PD5 |USART2 | | | | | | | |
<> 144:ef7eb2e8f9f7 441 * PD6 |USART2 | | | | | | | |
<> 144:ef7eb2e8f9f7 442 * PD7 |USART2 |TIM21_C2| | | | | | |
<> 144:ef7eb2e8f9f7 443 * PD8 |LPUART1 | | | | | | | |
<> 144:ef7eb2e8f9f7 444 * PD9 |LPUART1 | | | | | | | |
<> 144:ef7eb2e8f9f7 445 * PD10| | | | | | | | |
<> 144:ef7eb2e8f9f7 446 * PD11|LPUART1 | | | | | | | |
<> 144:ef7eb2e8f9f7 447 * PD12|LPUART1 | | | | | | | |
<> 144:ef7eb2e8f9f7 448 * PD13| | | | | | | | |
<> 144:ef7eb2e8f9f7 449 * PD14| | | | | | | | |
<> 144:ef7eb2e8f9f7 450 * PD15|USB | | | | | | | |
<> 144:ef7eb2e8f9f7 451 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 452 * PE0 | | |EVENTOUT| | | | | |
<> 144:ef7eb2e8f9f7 453 * PE1 | | |EVENTOUT| | | | | |
<> 144:ef7eb2e8f9f7 454 * PE2 | | |TIM3_TR | | | | | |
<> 144:ef7eb2e8f9f7 455 * PE3 |TIM22_C1| |TIM3_C1 | | | | | |
<> 144:ef7eb2e8f9f7 456 * PE4 |TIM22_C2| |TIM3_C2 | | | | | |
<> 144:ef7eb2e8f9f7 457 * PE5 |TIM21_C1| |TIM3_C3 | | | | | |
<> 144:ef7eb2e8f9f7 458 * PE6 |TIM21_C2| |TIM3_C4 | | | | | |
<> 144:ef7eb2e8f9f7 459 * PE7 | | | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 460 * PE8 | | | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 461 * PE9 |TIM2_C1 | |TIM2_TR | | | |USART4 | |
<> 144:ef7eb2e8f9f7 462 * PE10|TIM2_C2 | | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 463 * PE11|TIM2_C3 | | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 464 * PE12|TIM2_C4 | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 465 * PE13| | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 466 * PE14| | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 467 * PE15| | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 468 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 469 * PH0 |USB | | | | | | | |
<> 144:ef7eb2e8f9f7 470 * PH1 | | | | | | | | |
<> 144:ef7eb2e8f9f7 471 * PH9 | | | | | | | | |
<> 144:ef7eb2e8f9f7 472 * PH10| | | | | | | | |
<> 144:ef7eb2e8f9f7 473 *
<> 144:ef7eb2e8f9f7 474 */
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
<> 144:ef7eb2e8f9f7 477 * @{
<> 144:ef7eb2e8f9f7 478 */
<> 144:ef7eb2e8f9f7 479
<> 144:ef7eb2e8f9f7 480 /*
<> 144:ef7eb2e8f9f7 481 * Alternate function AF0
<> 144:ef7eb2e8f9f7 482 */
<> 151:5eaa88a5bcc7 483 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 484 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 485 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 486 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 487 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
<> 151:5eaa88a5bcc7 488 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
<> 151:5eaa88a5bcc7 489 #define GPIO_AF0_USART1 ((uint8_t)0x00U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 490 #define GPIO_AF0_SPI2 ((uint8_t)0x00U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 491 #define GPIO_AF0_LPTIM1 ((uint8_t)0x00U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 492 #define GPIO_AF0_TIM22 ((uint8_t)0x00U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 493 #define GPIO_AF0_LPUART1 ((uint8_t)0x00U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 494 #define GPIO_AF0_USART2 ((uint8_t)0x00U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 495 #define GPIO_AF0_TIM2 ((uint8_t)0x00U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 496 #define GPIO_AF0_USB ((uint8_t)0x00U) /* USB Alternate Function mapping */
<> 144:ef7eb2e8f9f7 497 /**
<> 144:ef7eb2e8f9f7 498 *
<> 144:ef7eb2e8f9f7 499 */
<> 144:ef7eb2e8f9f7 500
<> 144:ef7eb2e8f9f7 501 /*
<> 144:ef7eb2e8f9f7 502 * Alternate function AF1
<> 144:ef7eb2e8f9f7 503 */
<> 151:5eaa88a5bcc7 504 #define GPIO_AF1_I2C1 ((uint8_t)0x01U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 505 #define GPIO_AF1_SPI2 ((uint8_t)0x01U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 506 #define GPIO_AF1_TIM21 ((uint8_t)0x01U) /* TIM21 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 507 /**
<> 144:ef7eb2e8f9f7 508 *
<> 144:ef7eb2e8f9f7 509 */
<> 144:ef7eb2e8f9f7 510
<> 144:ef7eb2e8f9f7 511 /*
<> 144:ef7eb2e8f9f7 512 * Alternate function AF2
<> 144:ef7eb2e8f9f7 513 */
<> 151:5eaa88a5bcc7 514 #define GPIO_AF2_TIM2 ((uint8_t)0x02U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 515 #define GPIO_AF2_TIM3 ((uint8_t)0x02U) /* TIM3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 516 #define GPIO_AF2_EVENTOUT ((uint8_t)0x02U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 517 #define GPIO_AF2_LPTIM1 ((uint8_t)0x02U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 518 #define GPIO_AF2_LPUART1 ((uint8_t)0x02U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 519 #define GPIO_AF2_MCO ((uint8_t)0x02U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 520 #define GPIO_AF2_RTC ((uint8_t)0x02U) /* RTC Alternate Function mapping */
<> 151:5eaa88a5bcc7 521 #define GPIO_AF2_SPI2 ((uint8_t)0x02U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 522 #define GPIO_AF2_USART5 ((uint8_t)0x02U) /* USART5 Alternate Function mapping */
<> 151:5eaa88a5bcc7 523 #define GPIO_AF2_SPI1 ((uint8_t)0x02U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 524 #define GPIO_AF2_USB ((uint8_t)0x00U) /* USB Alternate Function mapping */
<> 144:ef7eb2e8f9f7 525 /**
<> 144:ef7eb2e8f9f7 526 *
<> 144:ef7eb2e8f9f7 527 */
<> 144:ef7eb2e8f9f7 528
<> 144:ef7eb2e8f9f7 529 /*
<> 144:ef7eb2e8f9f7 530 * Alternate function AF3
<> 144:ef7eb2e8f9f7 531 */
<> 151:5eaa88a5bcc7 532 #define GPIO_AF3_EVENTOUT ((uint8_t)0x03U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 533 #define GPIO_AF3_I2C1 ((uint8_t)0x03U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 534 #define GPIO_AF3_TSC ((uint8_t)0x03U) /* TSC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 535 /**
<> 144:ef7eb2e8f9f7 536 *
<> 144:ef7eb2e8f9f7 537 */
<> 144:ef7eb2e8f9f7 538
<> 144:ef7eb2e8f9f7 539 /*
<> 144:ef7eb2e8f9f7 540 * Alternate function AF4
<> 144:ef7eb2e8f9f7 541 */
<> 151:5eaa88a5bcc7 542 #define GPIO_AF4_USART2 ((uint8_t)0x04U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 543 #define GPIO_AF4_LPUART1 ((uint8_t)0x04U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 544 #define GPIO_AF4_USART1 ((uint8_t)0x04U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 545 #define GPIO_AF4_EVENTOUT ((uint8_t)0x04U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 546 #define GPIO_AF4_TIM22 ((uint8_t)0x04U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 547 #define GPIO_AF4_TIM3 ((uint8_t)0x04U) /* TIM3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 548 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 549 /**
<> 144:ef7eb2e8f9f7 550 *
<> 144:ef7eb2e8f9f7 551 */
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 /*
<> 144:ef7eb2e8f9f7 554 * Alternate function AF5
<> 144:ef7eb2e8f9f7 555 */
<> 151:5eaa88a5bcc7 556 #define GPIO_AF5_TIM2 ((uint8_t)0x05U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 557 #define GPIO_AF5_TIM21 ((uint8_t)0x05U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 558 #define GPIO_AF5_TIM22 ((uint8_t)0x05U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 559 #define GPIO_AF5_USART1 ((uint8_t)0x05U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 560 #define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 561 #define GPIO_AF5_I2C2 ((uint8_t)0x05U) /* I2C2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 562 /**
<> 144:ef7eb2e8f9f7 563 *
<> 144:ef7eb2e8f9f7 564 */
<> 144:ef7eb2e8f9f7 565
<> 144:ef7eb2e8f9f7 566 /*
<> 144:ef7eb2e8f9f7 567 * Alternate function AF6
<> 144:ef7eb2e8f9f7 568 */
<> 151:5eaa88a5bcc7 569 #define GPIO_AF6_USART4 ((uint8_t)0x06U) /* USART4 Alternate Function mapping */
<> 151:5eaa88a5bcc7 570 #define GPIO_AF6_LPUART1 ((uint8_t)0x06U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 571 #define GPIO_AF6_EVENTOUT ((uint8_t)0x06U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 572 #define GPIO_AF6_I2C1 ((uint8_t)0x06U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 573 #define GPIO_AF6_I2C2 ((uint8_t)0x06U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 574 #define GPIO_AF6_USART5 ((uint8_t)0x06U) /* USART5 Alternate Function mapping */
<> 151:5eaa88a5bcc7 575 #define GPIO_AF6_TIM21 ((uint8_t)0x06U) /* TIM21 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 576 /**
<> 144:ef7eb2e8f9f7 577 *
<> 144:ef7eb2e8f9f7 578 */
<> 144:ef7eb2e8f9f7 579
<> 144:ef7eb2e8f9f7 580 /*
<> 144:ef7eb2e8f9f7 581 * Alternate function AF7
<> 144:ef7eb2e8f9f7 582 */
<> 151:5eaa88a5bcc7 583 #define GPIO_AF7_COMP1 ((uint8_t)0x07U) /* COMP1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 584 #define GPIO_AF7_COMP2 ((uint8_t)0x07U) /* COMP2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 585 #define GPIO_AF7_I2C3 ((uint8_t)0x07U) /* I2C3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 586 #define GPIO_AF7_LPUART1 ((uint8_t)0x07U) /* LPUART1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 587 /**
<> 144:ef7eb2e8f9f7 588 *
<> 144:ef7eb2e8f9f7 589 */
<> 144:ef7eb2e8f9f7 590
<> 144:ef7eb2e8f9f7 591 /**
<> 144:ef7eb2e8f9f7 592 * @}
<> 144:ef7eb2e8f9f7 593 */
<> 144:ef7eb2e8f9f7 594
<> 144:ef7eb2e8f9f7 595 /**
<> 144:ef7eb2e8f9f7 596 * @}
<> 144:ef7eb2e8f9f7 597 */
<> 144:ef7eb2e8f9f7 598
<> 144:ef7eb2e8f9f7 599 /** @defgroup GPIOEx_Private GPIOEx Private
<> 144:ef7eb2e8f9f7 600 * @{
<> 144:ef7eb2e8f9f7 601 */
<> 144:ef7eb2e8f9f7 602 /**
<> 144:ef7eb2e8f9f7 603 * @brief IS_GPIO_AF macro definition
<> 144:ef7eb2e8f9f7 604 */
<> 144:ef7eb2e8f9f7 605 #define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF6_TIM21) || \
<> 144:ef7eb2e8f9f7 606 ((__AF__) == GPIO_AF0_SPI1) || ((__AF__) == GPIO_AF1_I2C1) || \
<> 144:ef7eb2e8f9f7 607 ((__AF__) == GPIO_AF0_TIM21) || ((__AF__) == GPIO_AF1_SPI2) || \
<> 144:ef7eb2e8f9f7 608 ((__AF__) == GPIO_AF0_MCO) || ((__AF__) == GPIO_AF1_TIM21) || \
<> 144:ef7eb2e8f9f7 609 ((__AF__) == GPIO_AF0_SWDIO) || ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 610 ((__AF__) == GPIO_AF0_SWCLK) || ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 611 ((__AF__) == GPIO_AF0_USART1) || ((__AF__) == GPIO_AF2_USB) || \
<> 144:ef7eb2e8f9f7 612 ((__AF__) == GPIO_AF0_SPI2) || ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 613 ((__AF__) == GPIO_AF0_LPTIM1) || ((__AF__) == GPIO_AF2_LPTIM1) || \
<> 144:ef7eb2e8f9f7 614 ((__AF__) == GPIO_AF0_TIM2) || ((__AF__) == GPIO_AF2_LPUART1) || \
<> 144:ef7eb2e8f9f7 615 ((__AF__) == GPIO_AF0_LPUART1) || ((__AF__) == GPIO_AF2_MCO) || \
<> 144:ef7eb2e8f9f7 616 ((__AF__) == GPIO_AF0_USART2) || ((__AF__) == GPIO_AF2_RTC) || \
<> 144:ef7eb2e8f9f7 617 ((__AF__) == GPIO_AF0_USB) || ((__AF__) == GPIO_AF2_SPI2) || \
<> 144:ef7eb2e8f9f7 618 ((__AF__) == GPIO_AF0_TIM2) || ((__AF__) == GPIO_AF2_USART5) || \
<> 144:ef7eb2e8f9f7 619 ((__AF__) == GPIO_AF3_TSC) || ((__AF__) == GPIO_AF2_SPI1) || \
<> 144:ef7eb2e8f9f7 620 ((__AF__) == GPIO_AF3_EVENTOUT) || ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 621 ((__AF__) == GPIO_AF3_I2C1) || ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 622 ((__AF__) == GPIO_AF5_TIM21) || ((__AF__) == GPIO_AF4_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 623 ((__AF__) == GPIO_AF5_TIM2) || ((__AF__) == GPIO_AF4_USART1) || \
<> 144:ef7eb2e8f9f7 624 ((__AF__) == GPIO_AF5_USART1) || ((__AF__) == GPIO_AF4_TIM22) || \
<> 144:ef7eb2e8f9f7 625 ((__AF__) == GPIO_AF5_TIM22) || ((__AF__) == GPIO_AF4_TIM3) || \
<> 144:ef7eb2e8f9f7 626 ((__AF__) == GPIO_AF5_SPI2) || ((__AF__) == GPIO_AF4_I2C1) || \
<> 144:ef7eb2e8f9f7 627 ((__AF__) == GPIO_AF5_I2C2) || ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 628 ((__AF__) == GPIO_AF7_COMP2) || ((__AF__) == GPIO_AF6_LPUART1) || \
<> 144:ef7eb2e8f9f7 629 ((__AF__) == GPIO_AF7_COMP1) || ((__AF__) == GPIO_AF6_I2C1) || \
<> 144:ef7eb2e8f9f7 630 ((__AF__) == GPIO_AF7_I2C3) || ((__AF__) == GPIO_AF6_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 631 ((__AF__) == GPIO_AF7_LPUART1) || ((__AF__) == GPIO_AF6_I2C2) || \
<> 144:ef7eb2e8f9f7 632 ((__AF__) == GPIO_AF6_USART5))
<> 144:ef7eb2e8f9f7 633
<> 144:ef7eb2e8f9f7 634 #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__) \
<> 144:ef7eb2e8f9f7 635 ((((__INSTANCE__) == GPIOA) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 636 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 637 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 638 ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 639 ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 640 ((__AF__) == GPIO_AF6_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 641 ((__AF__) == GPIO_AF7_COMP1))) || \
<> 144:ef7eb2e8f9f7 642 (((__INSTANCE__) == GPIOB) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 643 ((__AF__) == GPIO_AF1_I2C1) || \
<> 144:ef7eb2e8f9f7 644 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 645 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 646 ((__AF__) == GPIO_AF4_TIM22) || \
<> 144:ef7eb2e8f9f7 647 ((__AF__) == GPIO_AF5_I2C2) || \
<> 144:ef7eb2e8f9f7 648 ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 649 ((__AF__) == GPIO_AF7_LPUART1))) || \
<> 144:ef7eb2e8f9f7 650 (((__INSTANCE__) == GPIOC) && (((__AF__) == GPIO_AF0_TIM22) || \
<> 144:ef7eb2e8f9f7 651 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 652 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 653 ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 654 ((__AF__) == GPIO_AF7_I2C3))) || \
<> 144:ef7eb2e8f9f7 655 (((__INSTANCE__) == GPIOD) && (((__AF__) == GPIO_AF0_TIM21) || \
<> 144:ef7eb2e8f9f7 656 ((__AF__) == GPIO_AF1_TIM21) || \
<> 144:ef7eb2e8f9f7 657 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 658 ((__AF__) == GPIO_AF6_USART5))) || \
<> 144:ef7eb2e8f9f7 659 (((__INSTANCE__) == GPIOE) && (((__AF__) == GPIO_AF0_TIM22) || \
<> 144:ef7eb2e8f9f7 660 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 661 ((__AF__) == GPIO_AF6_USART4))) || \
<> 144:ef7eb2e8f9f7 662 (((__INSTANCE__) == GPIOH) && (((__AF__) == GPIO_AF0_USB))))
<> 144:ef7eb2e8f9f7 663
<> 144:ef7eb2e8f9f7 664 /**
<> 144:ef7eb2e8f9f7 665 * @}
<> 144:ef7eb2e8f9f7 666 */
<> 144:ef7eb2e8f9f7 667 #endif /* (STM32L082xx) || (STM32L072xx) */
<> 144:ef7eb2e8f9f7 668
<> 144:ef7eb2e8f9f7 669
<> 144:ef7eb2e8f9f7 670 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 671 /*------------------------- STM32L081xx and STM32L071xx-----------------------*/
<> 144:ef7eb2e8f9f7 672 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 673 #if defined (STM32L081xx) || defined (STM32L071xx)
<> 144:ef7eb2e8f9f7 674
<> 144:ef7eb2e8f9f7 675 /* The table below gives an overview of the different alternate functions per port.
<> 144:ef7eb2e8f9f7 676 * For more details refer yourself to the product data sheet.
<> 144:ef7eb2e8f9f7 677 *
<> 144:ef7eb2e8f9f7 678 */
<> 144:ef7eb2e8f9f7 679
<> 144:ef7eb2e8f9f7 680
<> 144:ef7eb2e8f9f7 681 /* | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
<> 144:ef7eb2e8f9f7 682 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 683 * PA0 | | |TIM2_C1 | |USART2 |TIM2_TR |USART4 |COMP1 |
<> 144:ef7eb2e8f9f7 684 * PA1 |EVENTOUT| |TIM2_C2 | |USART2 |TIM21_TR|USART4 | |
<> 144:ef7eb2e8f9f7 685 * PA2 |TIM21_C1| |TIM2_C3 | |USART2 | |LPUART1 |COMP2 |
<> 144:ef7eb2e8f9f7 686 * PA3 |TIM21_C2| |TIM2_C4 | |USART2 | |LPUART1 | |
<> 144:ef7eb2e8f9f7 687 * PA4 |SPI1 | | | |USART2 |TIM22_TR| | |
<> 144:ef7eb2e8f9f7 688 * PA5 |SPI1 | |TIM2_TR | | |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 689 * PA6 |SPI1 | |TIM3_C1 | |LPUART1 |TIM22_C1|EVENTOUT|COMP1 |
<> 144:ef7eb2e8f9f7 690 * PA7 |SPI1 | |TIM3_C2 | | |TIM22_C2|EVENTOUT|COMP2 |
<> 144:ef7eb2e8f9f7 691 * PA8 |MCO | | |EVENTOUT|USART1 | | |I2C3 |
<> 144:ef7eb2e8f9f7 692 * PA9 |MCO | | | |USART1 | |I2C1 |I2C3 |
<> 144:ef7eb2e8f9f7 693 * PA10| | | | |USART1 | |I2C1 | |
<> 144:ef7eb2e8f9f7 694 * PA11|SPI1 | |EVENTOUT| |USART1 | |I2C2 |COMP1 |
<> 144:ef7eb2e8f9f7 695 * PA12|SPI1 | |EVENTOUT| |USART1 | |I2C2 |COMP2 |
<> 144:ef7eb2e8f9f7 696 * PA13|SWDIO | | | | | |LPUART1 | |
<> 144:ef7eb2e8f9f7 697 * PA14|SWCLK | | | |USART2 | |LPUART1 | |
<> 144:ef7eb2e8f9f7 698 * PA15|SPI1 | |TIM2_TR |EVENTOUT|USART2 |TIM2_C1 |USART4 | |
<> 144:ef7eb2e8f9f7 699 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 700 * PB0 |EVENTOUT| |TIM3_C3 | | | | | |
<> 144:ef7eb2e8f9f7 701 * PB1 | | |TIM3_C4 | |LPUART1 | | | |
<> 144:ef7eb2e8f9f7 702 * PB2 | | |LPTIM1_O| | | | |I2C3 |
<> 144:ef7eb2e8f9f7 703 * PB3 |SPI1 | |TIM2_C2 | |EVENTOUT|USART1 |USART5 | |
<> 144:ef7eb2e8f9f7 704 * PB4 |SPI1 | |TIM3_C1 | |TIM22_C1|USART1 |USART5 |I2C3 |
<> 144:ef7eb2e8f9f7 705 * PB5 |SPI1 | |LPTIM1_I|I2C1 |TIM3_C2 |USART1 |USART5 | |
<> 144:ef7eb2e8f9f7 706 * | | | | |TIM22_C2| | | |
<> 144:ef7eb2e8f9f7 707 * PB6 |USART1 |I2C1 |LPTIM1_T| | | | | |
<> 144:ef7eb2e8f9f7 708 * PB7 |USART1 |I2C1 |LPTIM1_I| | | |USART4 | |
<> 144:ef7eb2e8f9f7 709 * PB8 | | | | |I2C1 | | | |
<> 144:ef7eb2e8f9f7 710 * PB9 | | |EVENTOUT| |I2C1 |SPI2 | | |
<> 144:ef7eb2e8f9f7 711 * PB10| | |TIM2_C3 | |LPUART1 |SPI2 |I2C2 |LPUART1 |
<> 144:ef7eb2e8f9f7 712 * PB11|EVENTOUT| |TIM2_C4 | |LPUART1 | |I2C2 |LPUART1 |
<> 144:ef7eb2e8f9f7 713 * PB12|SPI2 | |LPUART1 | | |I2C2 |EVENTOUT| |
<> 144:ef7eb2e8f9f7 714 * PB13|SPI2 | |MCO | |LPUART1 |I2C2 |TIM21_C1| |
<> 144:ef7eb2e8f9f7 715 * PB14|SPI2 | |RTC | |LPUART1 |I2C2 |TIM21_C2| |
<> 144:ef7eb2e8f9f7 716 * PB15|SPI2 | |RTC | | | | | |
<> 144:ef7eb2e8f9f7 717 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 718 * PC0 |LPTIM1_I| |EVENTOUT| | | |LPUART1 |I2C3 |
<> 144:ef7eb2e8f9f7 719 * PC1 |LPTIM1_O| |EVENTOUT| | | |LPUART1 |I2C3 |
<> 144:ef7eb2e8f9f7 720 * PC2 |LPTIM1_I| |SPI2 | | | | | |
<> 144:ef7eb2e8f9f7 721 * PC3 |LPTIM1_T| |SPI2 | | | | | |
<> 144:ef7eb2e8f9f7 722 * PC4 |EVENTOUT| |LPUART1 | | | | | |
<> 144:ef7eb2e8f9f7 723 * PC5 | | |LPUART1 | | | | | |
<> 144:ef7eb2e8f9f7 724 * PC6 |TIM22_C1| |TIM3_C1 | | | | | |
<> 144:ef7eb2e8f9f7 725 * PC7 |TIM22_C2| |TIM3_C2 | | | | | |
<> 144:ef7eb2e8f9f7 726 * PC8 |TIM22_TR| |TIM3_C3 | | | | | |
<> 144:ef7eb2e8f9f7 727 * PC9 |TIM21_TR| | | | | | |I2C3 |
<> 144:ef7eb2e8f9f7 728 * | | |TIM3_C4 | | | | | |
<> 144:ef7eb2e8f9f7 729 * PC10|LPUART1 | | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 730 * PC11|LPUART1 | | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 731 * PC12| | |USART5 | | | |USART4 | |
<> 144:ef7eb2e8f9f7 732 * PC13| | | | | | | | |
<> 144:ef7eb2e8f9f7 733 * PC14| | | | | | | | |
<> 144:ef7eb2e8f9f7 734 * PC15| | | | | | | | |
<> 144:ef7eb2e8f9f7 735 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 736 * PD0 |TIM21_C1|SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 737 * PD1 | |SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 738 * PD2 |LPUART1 | |TIM3_TR | | | |USART5 | |
<> 144:ef7eb2e8f9f7 739 * PD3 |USART2 | |SPI2 | | | | | |
<> 144:ef7eb2e8f9f7 740 * PD4 |USART2 |SPI2 | | | | | | |
<> 144:ef7eb2e8f9f7 741 * PD5 |USART2 | | | | | | | |
<> 144:ef7eb2e8f9f7 742 * PD6 |USART2 | | | | | | | |
<> 144:ef7eb2e8f9f7 743 * PD7 |USART2 |TIM21_C2| | | | | | |
<> 144:ef7eb2e8f9f7 744 * PD8 |LPUART1 | | | | | | | |
<> 144:ef7eb2e8f9f7 745 * PD9 |LPUART1 | | | | | | | |
<> 144:ef7eb2e8f9f7 746 * PD10| | | | | | | | |
<> 144:ef7eb2e8f9f7 747 * PD11|LPUART1 | | | | | | | |
<> 144:ef7eb2e8f9f7 748 * PD12|LPUART1 | | | | | | | |
<> 144:ef7eb2e8f9f7 749 * PD13| | | | | | | | |
<> 144:ef7eb2e8f9f7 750 * PD14| | | | | | | | |
<> 144:ef7eb2e8f9f7 751 * PD15| | | | | | | | |
<> 144:ef7eb2e8f9f7 752 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 753 * PE0 | | |EVENTOUT| | | | | |
<> 144:ef7eb2e8f9f7 754 * PE1 | | |EVENTOUT| | | | | |
<> 144:ef7eb2e8f9f7 755 * PE2 | | |TIM3_TR | | | | | |
<> 144:ef7eb2e8f9f7 756 * PE3 |TIM22_C1| |TIM3_C1 | | | | | |
<> 144:ef7eb2e8f9f7 757 * PE4 |TIM22_C2| |TIM3_C2 | | | | | |
<> 144:ef7eb2e8f9f7 758 * PE5 |TIM21_C1| |TIM3_C3 | | | | | |
<> 144:ef7eb2e8f9f7 759 * PE6 |TIM21_C2| |TIM3_C4 | | | | | |
<> 144:ef7eb2e8f9f7 760 * PE7 | | | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 761 * PE8 | | | | | | |USART4 | |
<> 144:ef7eb2e8f9f7 762 * PE9 |TIM2_C1 | |TIM2_TR | | | |USART4 | |
<> 144:ef7eb2e8f9f7 763 * PE10|TIM2_C2 | | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 764 * PE11|TIM2_C3 | | | | | |USART5 | |
<> 144:ef7eb2e8f9f7 765 * PE12|TIM2_C4 | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 766 * PE13| | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 767 * PE14| | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 768 * PE15| | |SPI1 | | | | | |
<> 144:ef7eb2e8f9f7 769 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 770 * PH0 | | | | | | | | |
<> 144:ef7eb2e8f9f7 771 * PH1 | | | | | | | | |
<> 144:ef7eb2e8f9f7 772 * PH9 | | | | | | | | |
<> 144:ef7eb2e8f9f7 773 * PH10| | | | | | | | |
<> 144:ef7eb2e8f9f7 774 *
<> 144:ef7eb2e8f9f7 775 */
<> 144:ef7eb2e8f9f7 776
<> 144:ef7eb2e8f9f7 777 /** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
<> 144:ef7eb2e8f9f7 778 * @{
<> 144:ef7eb2e8f9f7 779 */
<> 144:ef7eb2e8f9f7 780
<> 144:ef7eb2e8f9f7 781 /*
<> 144:ef7eb2e8f9f7 782 * Alternate function AF0
<> 144:ef7eb2e8f9f7 783 *
<> 144:ef7eb2e8f9f7 784 */
<> 151:5eaa88a5bcc7 785 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 786 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 787 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 788 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 789 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
<> 151:5eaa88a5bcc7 790 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
<> 151:5eaa88a5bcc7 791 #define GPIO_AF0_USART1 ((uint8_t)0x00U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 792 #define GPIO_AF0_SPI2 ((uint8_t)0x00U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 793 #define GPIO_AF0_LPTIM1 ((uint8_t)0x00U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 794 #define GPIO_AF0_TIM22 ((uint8_t)0x00U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 795 #define GPIO_AF0_LPUART1 ((uint8_t)0x00U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 796 #define GPIO_AF0_USART2 ((uint8_t)0x00U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 797 #define GPIO_AF0_TIM2 ((uint8_t)0x00U) /* TIM2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 798 /**
<> 144:ef7eb2e8f9f7 799 *
<> 144:ef7eb2e8f9f7 800 */
<> 144:ef7eb2e8f9f7 801
<> 144:ef7eb2e8f9f7 802 /*
<> 144:ef7eb2e8f9f7 803 * Alternate function AF1
<> 144:ef7eb2e8f9f7 804 *
<> 144:ef7eb2e8f9f7 805 */
<> 151:5eaa88a5bcc7 806 #define GPIO_AF1_I2C1 ((uint8_t)0x01U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 807 #define GPIO_AF1_SPI2 ((uint8_t)0x01U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 808 #define GPIO_AF1_TIM21 ((uint8_t)0x01U) /* TIM21 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 809 /**
<> 144:ef7eb2e8f9f7 810 *
<> 144:ef7eb2e8f9f7 811 */
<> 144:ef7eb2e8f9f7 812
<> 144:ef7eb2e8f9f7 813 /*
<> 144:ef7eb2e8f9f7 814 * Alternate function AF2
<> 144:ef7eb2e8f9f7 815 *
<> 144:ef7eb2e8f9f7 816 */
<> 151:5eaa88a5bcc7 817 #define GPIO_AF2_TIM2 ((uint8_t)0x02U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 818 #define GPIO_AF2_TIM3 ((uint8_t)0x02U) /* TIM3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 819 #define GPIO_AF2_EVENTOUT ((uint8_t)0x02U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 820 #define GPIO_AF2_LPTIM1 ((uint8_t)0x02U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 821 #define GPIO_AF2_LPUART1 ((uint8_t)0x02U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 822 #define GPIO_AF2_MCO ((uint8_t)0x02U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 823 #define GPIO_AF2_RTC ((uint8_t)0x02U) /* RTC Alternate Function mapping */
<> 151:5eaa88a5bcc7 824 #define GPIO_AF2_SPI2 ((uint8_t)0x02U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 825 #define GPIO_AF2_USART5 ((uint8_t)0x02U) /* USART5 Alternate Function mapping */
<> 151:5eaa88a5bcc7 826 #define GPIO_AF2_SPI1 ((uint8_t)0x02U) /* SPI1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 827 /**
<> 144:ef7eb2e8f9f7 828 *
<> 144:ef7eb2e8f9f7 829 */
<> 144:ef7eb2e8f9f7 830
<> 144:ef7eb2e8f9f7 831 /*
<> 144:ef7eb2e8f9f7 832 * Alternate function AF3
<> 144:ef7eb2e8f9f7 833 * @{
<> 144:ef7eb2e8f9f7 834 */
<> 151:5eaa88a5bcc7 835 #define GPIO_AF3_EVENTOUT ((uint8_t)0x03U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 836 #define GPIO_AF3_I2C1 ((uint8_t)0x03U) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 837 /**
<> 144:ef7eb2e8f9f7 838 *
<> 144:ef7eb2e8f9f7 839 */
<> 144:ef7eb2e8f9f7 840
<> 144:ef7eb2e8f9f7 841 /*
<> 144:ef7eb2e8f9f7 842 * Alternate function AF4
<> 144:ef7eb2e8f9f7 843 *
<> 144:ef7eb2e8f9f7 844 */
<> 151:5eaa88a5bcc7 845 #define GPIO_AF4_USART2 ((uint8_t)0x04U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 846 #define GPIO_AF4_LPUART1 ((uint8_t)0x04U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 847 #define GPIO_AF4_USART1 ((uint8_t)0x04U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 848 #define GPIO_AF4_EVENTOUT ((uint8_t)0x04U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 849 #define GPIO_AF4_TIM22 ((uint8_t)0x04U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 850 #define GPIO_AF4_TIM3 ((uint8_t)0x04U) /* TIM3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 851 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 852 /**
<> 144:ef7eb2e8f9f7 853 *
<> 144:ef7eb2e8f9f7 854 */
<> 144:ef7eb2e8f9f7 855
<> 144:ef7eb2e8f9f7 856 /*
<> 144:ef7eb2e8f9f7 857 * Alternate function AF5
<> 144:ef7eb2e8f9f7 858 *
<> 144:ef7eb2e8f9f7 859 */
<> 151:5eaa88a5bcc7 860 #define GPIO_AF5_TIM2 ((uint8_t)0x05U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 861 #define GPIO_AF5_TIM21 ((uint8_t)0x05U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 862 #define GPIO_AF5_TIM22 ((uint8_t)0x05U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 863 #define GPIO_AF5_USART1 ((uint8_t)0x05U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 864 #define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 865 #define GPIO_AF5_I2C2 ((uint8_t)0x05U) /* I2C2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 866 /**
<> 144:ef7eb2e8f9f7 867 *
<> 144:ef7eb2e8f9f7 868 */
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 /*
<> 144:ef7eb2e8f9f7 871 * Alternate function AF6
<> 144:ef7eb2e8f9f7 872 *
<> 144:ef7eb2e8f9f7 873 */
<> 151:5eaa88a5bcc7 874 #define GPIO_AF6_USART4 ((uint8_t)0x06U) /* USART4 Alternate Function mapping */
<> 151:5eaa88a5bcc7 875 #define GPIO_AF6_LPUART1 ((uint8_t)0x06U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 876 #define GPIO_AF6_EVENTOUT ((uint8_t)0x06U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 877 #define GPIO_AF6_I2C1 ((uint8_t)0x06U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 878 #define GPIO_AF6_I2C2 ((uint8_t)0x06U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 879 #define GPIO_AF6_USART5 ((uint8_t)0x06U) /* USART5 Alternate Function mapping */
<> 151:5eaa88a5bcc7 880 #define GPIO_AF6_TIM21 ((uint8_t)0x06U) /* TIM21 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 881 /**
<> 144:ef7eb2e8f9f7 882 *
<> 144:ef7eb2e8f9f7 883 */
<> 144:ef7eb2e8f9f7 884
<> 144:ef7eb2e8f9f7 885 /*
<> 144:ef7eb2e8f9f7 886 * Alternate function AF7
<> 144:ef7eb2e8f9f7 887 *
<> 144:ef7eb2e8f9f7 888 */
<> 151:5eaa88a5bcc7 889 #define GPIO_AF7_COMP1 ((uint8_t)0x07U) /* COMP1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 890 #define GPIO_AF7_COMP2 ((uint8_t)0x07U) /* COMP2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 891 #define GPIO_AF7_I2C3 ((uint8_t)0x07U) /* I2C3 Alternate Function mapping */
<> 151:5eaa88a5bcc7 892 #define GPIO_AF7_LPUART1 ((uint8_t)0x07U) /* LPUART1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 893 /**
<> 144:ef7eb2e8f9f7 894 *
<> 144:ef7eb2e8f9f7 895 */
<> 144:ef7eb2e8f9f7 896
<> 144:ef7eb2e8f9f7 897 /**
<> 144:ef7eb2e8f9f7 898 * @}
<> 144:ef7eb2e8f9f7 899 */
<> 144:ef7eb2e8f9f7 900
<> 144:ef7eb2e8f9f7 901 /**
<> 144:ef7eb2e8f9f7 902 * @}
<> 144:ef7eb2e8f9f7 903 */
<> 144:ef7eb2e8f9f7 904
<> 144:ef7eb2e8f9f7 905 /** @defgroup GPIOEx_Private GPIOEx Private
<> 144:ef7eb2e8f9f7 906 * @{
<> 144:ef7eb2e8f9f7 907 */
<> 144:ef7eb2e8f9f7 908
<> 144:ef7eb2e8f9f7 909 /**
<> 144:ef7eb2e8f9f7 910 * IS_GPIO_AF macro definition
<> 144:ef7eb2e8f9f7 911 */
<> 144:ef7eb2e8f9f7 912 #define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF7_LPUART1) || \
<> 144:ef7eb2e8f9f7 913 ((__AF__) == GPIO_AF0_SPI1) || ((__AF__) == GPIO_AF1_I2C1) || \
<> 144:ef7eb2e8f9f7 914 ((__AF__) == GPIO_AF0_TIM21) || ((__AF__) == GPIO_AF1_SPI2) || \
<> 144:ef7eb2e8f9f7 915 ((__AF__) == GPIO_AF0_MCO) || ((__AF__) == GPIO_AF1_TIM21) || \
<> 144:ef7eb2e8f9f7 916 ((__AF__) == GPIO_AF0_SWDIO) || ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 917 ((__AF__) == GPIO_AF0_SWCLK) || ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 918 ((__AF__) == GPIO_AF0_USART1) || ((__AF__) == GPIO_AF6_TIM21) || \
<> 144:ef7eb2e8f9f7 919 ((__AF__) == GPIO_AF0_SPI2) || ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 920 ((__AF__) == GPIO_AF0_LPTIM1) || ((__AF__) == GPIO_AF2_LPTIM1) || \
<> 144:ef7eb2e8f9f7 921 ((__AF__) == GPIO_AF0_TIM2) || ((__AF__) == GPIO_AF2_LPUART1) || \
<> 144:ef7eb2e8f9f7 922 ((__AF__) == GPIO_AF0_LPUART1) || ((__AF__) == GPIO_AF2_MCO) || \
<> 144:ef7eb2e8f9f7 923 ((__AF__) == GPIO_AF0_USART2) || ((__AF__) == GPIO_AF2_RTC) || \
<> 144:ef7eb2e8f9f7 924 ((__AF__) == GPIO_AF2_SPI2) || ((__AF__) == GPIO_AF6_USART5) || \
<> 144:ef7eb2e8f9f7 925 ((__AF__) == GPIO_AF0_TIM2) || ((__AF__) == GPIO_AF2_USART5) || \
<> 144:ef7eb2e8f9f7 926 ((__AF__) == GPIO_AF2_SPI1) || ((__AF__) == GPIO_AF6_I2C2) || \
<> 144:ef7eb2e8f9f7 927 ((__AF__) == GPIO_AF3_EVENTOUT) || ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 928 ((__AF__) == GPIO_AF3_I2C1) || ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 929 ((__AF__) == GPIO_AF5_TIM21) || ((__AF__) == GPIO_AF4_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 930 ((__AF__) == GPIO_AF5_TIM2) || ((__AF__) == GPIO_AF4_USART1) || \
<> 144:ef7eb2e8f9f7 931 ((__AF__) == GPIO_AF5_USART1) || ((__AF__) == GPIO_AF4_TIM22) || \
<> 144:ef7eb2e8f9f7 932 ((__AF__) == GPIO_AF5_TIM22) || ((__AF__) == GPIO_AF4_TIM3) || \
<> 144:ef7eb2e8f9f7 933 ((__AF__) == GPIO_AF5_SPI2) || ((__AF__) == GPIO_AF4_I2C1) || \
<> 144:ef7eb2e8f9f7 934 ((__AF__) == GPIO_AF5_I2C2) || ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 935 ((__AF__) == GPIO_AF7_COMP2) || ((__AF__) == GPIO_AF6_LPUART1) || \
<> 144:ef7eb2e8f9f7 936 ((__AF__) == GPIO_AF7_COMP1) || ((__AF__) == GPIO_AF6_I2C1) || \
<> 144:ef7eb2e8f9f7 937 ((__AF__) == GPIO_AF7_I2C3) || ((__AF__) == GPIO_AF6_EVENTOUT))
<> 144:ef7eb2e8f9f7 938
<> 144:ef7eb2e8f9f7 939
<> 144:ef7eb2e8f9f7 940 #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__) \
<> 144:ef7eb2e8f9f7 941 ((((__INSTANCE__) == GPIOA) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 942 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 943 ((__AF__) == GPIO_AF3_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 944 ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 945 ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 946 ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 947 ((__AF__) == GPIO_AF7_COMP1))) || \
<> 144:ef7eb2e8f9f7 948 (((__INSTANCE__) == GPIOB) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 949 ((__AF__) == GPIO_AF1_I2C1) || \
<> 144:ef7eb2e8f9f7 950 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 951 ((__AF__) == GPIO_AF3_I2C1) || \
<> 144:ef7eb2e8f9f7 952 ((__AF__) == GPIO_AF4_I2C1) || \
<> 144:ef7eb2e8f9f7 953 ((__AF__) == GPIO_AF5_I2C2) || \
<> 144:ef7eb2e8f9f7 954 ((__AF__) == GPIO_AF6_USART4) || \
<> 144:ef7eb2e8f9f7 955 ((__AF__) == GPIO_AF7_LPUART1))) || \
<> 144:ef7eb2e8f9f7 956 (((__INSTANCE__) == GPIOC) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 957 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 958 ((__AF__) == GPIO_AF6_LPUART1) || \
<> 144:ef7eb2e8f9f7 959 ((__AF__) == GPIO_AF7_I2C3))) || \
<> 144:ef7eb2e8f9f7 960 (((__INSTANCE__) == GPIOD) && (((__AF__) == GPIO_AF0_LPUART1) || \
<> 144:ef7eb2e8f9f7 961 ((__AF__) == GPIO_AF1_SPI2) || \
<> 144:ef7eb2e8f9f7 962 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 963 ((__AF__) == GPIO_AF6_USART5))) || \
<> 144:ef7eb2e8f9f7 964 (((__INSTANCE__) == GPIOE) && (((__AF__) == GPIO_AF0_TIM22) || \
<> 144:ef7eb2e8f9f7 965 ((__AF__) == GPIO_AF2_TIM3) || \
<> 144:ef7eb2e8f9f7 966 ((__AF__) == GPIO_AF6_USART4))))
<> 144:ef7eb2e8f9f7 967
<> 144:ef7eb2e8f9f7 968 /**
<> 144:ef7eb2e8f9f7 969 * @}
<> 144:ef7eb2e8f9f7 970 */
<> 144:ef7eb2e8f9f7 971 #endif /* (STM32L081xx) || (STM32L071xx) */
<> 144:ef7eb2e8f9f7 972
<> 144:ef7eb2e8f9f7 973 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 974 /*------------------------- STM32L053xx/STM32L063xx---------------------------*/
<> 144:ef7eb2e8f9f7 975 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 976 #if defined (STM32L053xx) || defined (STM32L063xx)
<> 144:ef7eb2e8f9f7 977
<> 144:ef7eb2e8f9f7 978 /* The table below gives an overview of the different alternate functions per port.
<> 144:ef7eb2e8f9f7 979 * For more details refer yourself to the product data sheet.
<> 144:ef7eb2e8f9f7 980 *
<> 144:ef7eb2e8f9f7 981 */
<> 144:ef7eb2e8f9f7 982 /* | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
<> 144:ef7eb2e8f9f7 983 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 984 * PA0 | | |TIM2_C1 |TSC |USART2 |TIM2_TR | |COMP1 |
<> 144:ef7eb2e8f9f7 985 * PA1 |EVENTOUT|LCD |TIM2_C2 |TSC |USART2 |TIM21_TR| | |
<> 144:ef7eb2e8f9f7 986 * PA2 |TIM21_C1|LCD |TIM2_C3 |TSC |USART2 | | |COMP2 |
<> 144:ef7eb2e8f9f7 987 * PA3 |TIM21_C2|LCD |TIM2_C4 |TSC |USART2 | | | |
<> 144:ef7eb2e8f9f7 988 * PA4 |SPI1 | | |TSC |USART2 |TIM22_TR| | |
<> 144:ef7eb2e8f9f7 989 * PA5 |SPI1 | |TIM2_TR |TSC | |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 990 * PA6 |SPI1 |LCD | |TSC |LPUART |TIM22_C1|EVENTOUT|COMP1 |
<> 144:ef7eb2e8f9f7 991 * PA7 |SPI1 |LCD | |TSC | |TIM22_C2|EVENTOUT|COMP2 |
<> 144:ef7eb2e8f9f7 992 * PA8 |MCO |LCD |USB |EVENTOUT|USART1 | | | |
<> 144:ef7eb2e8f9f7 993 * PA9 |MCO |LCD | |TSC |USART1 | | | |
<> 144:ef7eb2e8f9f7 994 * PA10| |LCD | |TSC |USART1 | | | |
<> 144:ef7eb2e8f9f7 995 * PA11|SPI1 | |EVENTOUT|TSC |USART1 | | |COMP1 |
<> 144:ef7eb2e8f9f7 996 * PA12|SPI1 | |EVENTOUT|TSC |USART1 | | |COMP2 |
<> 144:ef7eb2e8f9f7 997 * PA13|SWDIO | |USB | | | | | |
<> 144:ef7eb2e8f9f7 998 * PA14|SWCLK | | | |USART2 | | | |
<> 144:ef7eb2e8f9f7 999 * PA15|SPI1 |LCD |TIM2_TR |EVENTOUT|USART2 |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1000 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1001 * PB0 |EVENTOUT|LCD | |TSC | | | | |
<> 144:ef7eb2e8f9f7 1002 * PB1 | |LCD | |TSC |LPUART1 | | | |
<> 144:ef7eb2e8f9f7 1003 * PB2 | | |LPTIM1_O|TSC | | | | |
<> 144:ef7eb2e8f9f7 1004 * PB3 |SPI1 |LCD |TIM2_C2 |TSC |EVENTOUT| | | |
<> 144:ef7eb2e8f9f7 1005 * PB4 |SPI1 |LCD |EVENTOUT|TSC |TIM22_C1| | | |
<> 144:ef7eb2e8f9f7 1006 * PB5 |SPI1 |LCD |LPTIM1_I|I2C1 |TIM22_C2| | | |
<> 144:ef7eb2e8f9f7 1007 * PB6 |USART1 |I2C1 |LPTIM1_T|TSC | | | | |
<> 144:ef7eb2e8f9f7 1008 * PB7 |USART1 |I2C1 |LPTIM1_I|TSC | | | | |
<> 144:ef7eb2e8f9f7 1009 * PB8 | |LCD | |TSC |I2C1 | | | |
<> 144:ef7eb2e8f9f7 1010 * PB9 | |LCD |EVENTOUT| |I2C1 |SPI2 | | |
<> 144:ef7eb2e8f9f7 1011 * PB10| |LCD |TIM2_C3 |TSC |LPUART1 |SPI2 |I2C2 | |
<> 144:ef7eb2e8f9f7 1012 * PB11|EVENTOUT|LCD |TIM2_C4 |TSC |LPUART1 | |I2C2 | |
<> 144:ef7eb2e8f9f7 1013 * PB12|SPI2 |LCD |LPUART1 |TSC | |I2C2 |EVENTOUT| |
<> 144:ef7eb2e8f9f7 1014 * PB13|SPI2 |LCD | |TSC |LPUART1 |I2C2 |TIM21_C1| |
<> 144:ef7eb2e8f9f7 1015 * PB14|SPI2 |LCD |RTC |TSC |LPUART1 |I2C2 |TIM21_C2| |
<> 144:ef7eb2e8f9f7 1016 * PB15|SPI2 |LCD |RTC | | | | | |
<> 144:ef7eb2e8f9f7 1017 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1018 * PC0 |LPTIM1_I|LCD |EVENTOUT|TSC | | | | |
<> 144:ef7eb2e8f9f7 1019 * PC1 |LPTIM1_O|LCD |EVENTOUT|TSC | | | | |
<> 144:ef7eb2e8f9f7 1020 * PC2 |LPTIM1_I|LCD |SPI2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 1021 * PC3 |LPTIM1_T|LCD |SPI2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 1022 * PC4 |EVENTOUT|LCD |LPUART | | | | | |
<> 144:ef7eb2e8f9f7 1023 * PC5 | |LCD |LPUART |TSC | | | | |
<> 144:ef7eb2e8f9f7 1024 * PC6 |TIM22_C1|LCD | |TSC | | | | |
<> 144:ef7eb2e8f9f7 1025 * PC7 |TIM22_C2|LCD | |TSC | | | | |
<> 144:ef7eb2e8f9f7 1026 * PC8 |TIM22_TR|LCD | |TSC | | | | |
<> 144:ef7eb2e8f9f7 1027 * PC9 |TIM21_TR|LCD |USB |TSC | | | | |
<> 144:ef7eb2e8f9f7 1028 * PC10|LPUART |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 1029 * PC11|LPUART |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 1030 * PC12| |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 1031 * PC13| | | | | | | | |
<> 144:ef7eb2e8f9f7 1032 * PC14| | | | | | | | |
<> 144:ef7eb2e8f9f7 1033 * PC15| | | | | | | | |
<> 144:ef7eb2e8f9f7 1034 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1035 * PD2 |LPUART |LCD | | | | | | |
<> 144:ef7eb2e8f9f7 1036 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1037 * PH0 |USB | | | | | | | |
<> 144:ef7eb2e8f9f7 1038 * PH1 | | | | | | | | |
<> 144:ef7eb2e8f9f7 1039 * *
<> 144:ef7eb2e8f9f7 1040 */
<> 144:ef7eb2e8f9f7 1041
<> 144:ef7eb2e8f9f7 1042 /** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
<> 144:ef7eb2e8f9f7 1043 * @{
<> 144:ef7eb2e8f9f7 1044 */
<> 144:ef7eb2e8f9f7 1045
<> 144:ef7eb2e8f9f7 1046 /*
<> 144:ef7eb2e8f9f7 1047 * Alternate function AF0
<> 144:ef7eb2e8f9f7 1048 */
<> 151:5eaa88a5bcc7 1049 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1050 #define GPIO_AF0_SPI2 ((uint8_t)0x00U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1051 #define GPIO_AF0_USART1 ((uint8_t)0x00U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1052 #define GPIO_AF0_USART2 ((uint8_t)0x00U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1053 #define GPIO_AF0_LPUART1 ((uint8_t)0x00U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1054 #define GPIO_AF0_USB ((uint8_t)0x00U) /* USB Alternate Function mapping */
<> 151:5eaa88a5bcc7 1055 #define GPIO_AF0_LPTIM1 ((uint8_t)0x00U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1056 #define GPIO_AF0_TSC ((uint8_t)0x00U) /* TSC Alternate Function mapping */
<> 151:5eaa88a5bcc7 1057 #define GPIO_AF0_TIM2 ((uint8_t)0x00U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1058 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1059 #define GPIO_AF0_TIM22 ((uint8_t)0x00U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1060 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1061 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1062 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1063 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1064 /**
<> 144:ef7eb2e8f9f7 1065 *
<> 144:ef7eb2e8f9f7 1066 */
<> 144:ef7eb2e8f9f7 1067
<> 144:ef7eb2e8f9f7 1068 /*
<> 144:ef7eb2e8f9f7 1069 * Alternate function AF1
<> 144:ef7eb2e8f9f7 1070 */
<> 151:5eaa88a5bcc7 1071 #define GPIO_AF1_SPI1 ((uint8_t)0x01U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1072 #define GPIO_AF1_SPI2 ((uint8_t)0x01U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1073 #define GPIO_AF1_I2C1 ((uint8_t)0x01U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1074 #define GPIO_AF1_LCD ((uint8_t)0x01U) /* LCD Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1075 /**
<> 144:ef7eb2e8f9f7 1076 *
<> 144:ef7eb2e8f9f7 1077 */
<> 144:ef7eb2e8f9f7 1078
<> 144:ef7eb2e8f9f7 1079 /*
<> 144:ef7eb2e8f9f7 1080 * Alternate function AF2
<> 144:ef7eb2e8f9f7 1081 */
<> 151:5eaa88a5bcc7 1082 #define GPIO_AF2_SPI2 ((uint8_t)0x02U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1083 #define GPIO_AF2_LPUART1 ((uint8_t)0x02U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1084 #define GPIO_AF2_USB ((uint8_t)0x02U) /* USB Alternate Function mapping */
<> 151:5eaa88a5bcc7 1085 #define GPIO_AF2_LPTIM1 ((uint8_t)0x02U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1086 #define GPIO_AF2_TIM2 ((uint8_t)0x02U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1087 #define GPIO_AF2_EVENTOUT ((uint8_t)0x02U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1088 #define GPIO_AF2_RTC ((uint8_t)0x02U) /* RTC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1089 /**
<> 144:ef7eb2e8f9f7 1090 *
<> 144:ef7eb2e8f9f7 1091 */
<> 144:ef7eb2e8f9f7 1092
<> 144:ef7eb2e8f9f7 1093 /*
<> 144:ef7eb2e8f9f7 1094 * Alternate function AF3
<> 144:ef7eb2e8f9f7 1095 */
<> 151:5eaa88a5bcc7 1096 #define GPIO_AF3_I2C1 ((uint8_t)0x03U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1097 #define GPIO_AF3_TSC ((uint8_t)0x03U) /* TSC Alternate Function mapping */
<> 151:5eaa88a5bcc7 1098 #define GPIO_AF3_EVENTOUT ((uint8_t)0x03U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1099 /**
<> 144:ef7eb2e8f9f7 1100 *
<> 144:ef7eb2e8f9f7 1101 */
<> 144:ef7eb2e8f9f7 1102
<> 144:ef7eb2e8f9f7 1103 /*
<> 144:ef7eb2e8f9f7 1104 * Alternate function AF4
<> 144:ef7eb2e8f9f7 1105 */
<> 151:5eaa88a5bcc7 1106 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1107 #define GPIO_AF4_USART1 ((uint8_t)0x04U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1108 #define GPIO_AF4_USART2 ((uint8_t)0x04U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1109 #define GPIO_AF4_LPUART1 ((uint8_t)0x04U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1110 #define GPIO_AF4_TIM22 ((uint8_t)0x04U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1111 #define GPIO_AF4_EVENTOUT ((uint8_t)0x04U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1112 /**
<> 144:ef7eb2e8f9f7 1113 *
<> 144:ef7eb2e8f9f7 1114 */
<> 144:ef7eb2e8f9f7 1115
<> 144:ef7eb2e8f9f7 1116 /*
<> 144:ef7eb2e8f9f7 1117 * Alternate function AF5
<> 144:ef7eb2e8f9f7 1118 */
<> 151:5eaa88a5bcc7 1119 #define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1120 #define GPIO_AF5_I2C2 ((uint8_t)0x05U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1121 #define GPIO_AF5_TIM2 ((uint8_t)0x05U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1122 #define GPIO_AF5_TIM21 ((uint8_t)0x05U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1123 #define GPIO_AF5_TIM22 ((uint8_t)0x05U) /* TIM22 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1124 /**
<> 144:ef7eb2e8f9f7 1125 *
<> 144:ef7eb2e8f9f7 1126 */
<> 144:ef7eb2e8f9f7 1127
<> 144:ef7eb2e8f9f7 1128 /*
<> 144:ef7eb2e8f9f7 1129 * Alternate function AF6
<> 144:ef7eb2e8f9f7 1130 */
<> 151:5eaa88a5bcc7 1131 #define GPIO_AF6_I2C2 ((uint8_t)0x06U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1132 #define GPIO_AF6_TIM21 ((uint8_t)0x06U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1133 #define GPIO_AF6_EVENTOUT ((uint8_t)0x06U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1134 /**
<> 144:ef7eb2e8f9f7 1135 *
<> 144:ef7eb2e8f9f7 1136 */
<> 144:ef7eb2e8f9f7 1137
<> 144:ef7eb2e8f9f7 1138 /*
<> 144:ef7eb2e8f9f7 1139 * Alternate function AF7
<> 144:ef7eb2e8f9f7 1140 */
<> 151:5eaa88a5bcc7 1141 #define GPIO_AF7_COMP1 ((uint8_t)0x07U) /* COMP1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1142 #define GPIO_AF7_COMP2 ((uint8_t)0x07U) /* COMP2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1143 /**
<> 144:ef7eb2e8f9f7 1144 *
<> 144:ef7eb2e8f9f7 1145 */
<> 144:ef7eb2e8f9f7 1146
<> 144:ef7eb2e8f9f7 1147 /**
<> 144:ef7eb2e8f9f7 1148 * @}
<> 144:ef7eb2e8f9f7 1149 */
<> 144:ef7eb2e8f9f7 1150
<> 144:ef7eb2e8f9f7 1151 /**
<> 144:ef7eb2e8f9f7 1152 * @}
<> 144:ef7eb2e8f9f7 1153 */
<> 144:ef7eb2e8f9f7 1154
<> 144:ef7eb2e8f9f7 1155 /** @defgroup GPIOEx_Private GPIOEx Private
<> 144:ef7eb2e8f9f7 1156 * @{
<> 144:ef7eb2e8f9f7 1157 */
<> 144:ef7eb2e8f9f7 1158 /**
<> 144:ef7eb2e8f9f7 1159 * @brief IS_GPIO_AF macro definition
<> 144:ef7eb2e8f9f7 1160 */
<> 144:ef7eb2e8f9f7 1161
<> 144:ef7eb2e8f9f7 1162 #define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_SPI1) || ((__AF__) == GPIO_AF2_SPI2) || \
<> 144:ef7eb2e8f9f7 1163 ((__AF__) == GPIO_AF0_SPI2) || ((__AF__) == GPIO_AF2_LPUART1) || \
<> 144:ef7eb2e8f9f7 1164 ((__AF__) == GPIO_AF0_USART1) || ((__AF__) == GPIO_AF2_USB) || \
<> 144:ef7eb2e8f9f7 1165 ((__AF__) == GPIO_AF0_USART2) || ((__AF__) == GPIO_AF2_LPTIM1) || \
<> 144:ef7eb2e8f9f7 1166 ((__AF__) == GPIO_AF0_LPUART1) || ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1167 ((__AF__) == GPIO_AF0_USB) || ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 1168 ((__AF__) == GPIO_AF0_LPTIM1) || ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1169 ((__AF__) == GPIO_AF0_TSC) || ((__AF__) == GPIO_AF2_RTC) || \
<> 144:ef7eb2e8f9f7 1170 ((__AF__) == GPIO_AF3_I2C1) || ((__AF__) == GPIO_AF7_COMP2) || \
<> 144:ef7eb2e8f9f7 1171 ((__AF__) == GPIO_AF0_TIM22) || ((__AF__) == GPIO_AF3_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1172 ((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF4_I2C1) || \
<> 144:ef7eb2e8f9f7 1173 ((__AF__) == GPIO_AF0_MCO) || ((__AF__) == GPIO_AF4_USART1) || \
<> 144:ef7eb2e8f9f7 1174 ((__AF__) == GPIO_AF0_SWDIO) || ((__AF__) == GPIO_AF0_SWCLK) || \
<> 144:ef7eb2e8f9f7 1175 ((__AF__) == GPIO_AF1_SPI1) || ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 1176 ((__AF__) == GPIO_AF1_SPI2) || ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 1177 ((__AF__) == GPIO_AF7_COMP2) || ((__AF__) == GPIO_AF4_TIM22) || \
<> 144:ef7eb2e8f9f7 1178 ((__AF__) == GPIO_AF1_I2C1) || ((__AF__) == GPIO_AF4_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1179 ((__AF__) == GPIO_AF1_LCD) || ((__AF__) == GPIO_AF5_SPI2) || \
<> 144:ef7eb2e8f9f7 1180 ((__AF__) == GPIO_AF5_I2C2) || ((__AF__) == GPIO_AF5_TIM2) || \
<> 144:ef7eb2e8f9f7 1181 ((__AF__) == GPIO_AF5_TIM21) || ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 1182 ((__AF__) == GPIO_AF6_I2C2) || ((__AF__) == GPIO_AF6_TIM21) || \
<> 144:ef7eb2e8f9f7 1183 ((__AF__) == GPIO_AF6_EVENTOUT) || ((__AF__) == GPIO_AF7_COMP1))
<> 144:ef7eb2e8f9f7 1184
<> 144:ef7eb2e8f9f7 1185
<> 144:ef7eb2e8f9f7 1186
<> 144:ef7eb2e8f9f7 1187 #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__) \
<> 144:ef7eb2e8f9f7 1188 ((((__INSTANCE__) == GPIOA) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1189 ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 1190 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1191 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 1192 ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 1193 ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 1194 ((__AF__) == GPIO_AF6_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1195 ((__AF__) == GPIO_AF7_COMP1))) || \
<> 144:ef7eb2e8f9f7 1196 (((__INSTANCE__) == GPIOB) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1197 ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 1198 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1199 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 1200 ((__AF__) == GPIO_AF4_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1201 ((__AF__) == GPIO_AF5_I2C2) || \
<> 144:ef7eb2e8f9f7 1202 ((__AF__) == GPIO_AF6_TIM21))) || \
<> 144:ef7eb2e8f9f7 1203 (((__INSTANCE__) == GPIOC) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1204 ((__AF__) == GPIO_AF1_LCD) || \
<> 144:ef7eb2e8f9f7 1205 ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1206 ((__AF__) == GPIO_AF3_TSC))) || \
<> 144:ef7eb2e8f9f7 1207 (((__INSTANCE__) == GPIOD) && (((__AF__) == GPIO_AF0_LPUART1) || \
<> 144:ef7eb2e8f9f7 1208 ((__AF__) == GPIO_AF1_LCD))) || \
<> 144:ef7eb2e8f9f7 1209 (((__INSTANCE__) == GPIOH) && (((__AF__) == GPIO_AF0_USB))))
<> 144:ef7eb2e8f9f7 1210
<> 144:ef7eb2e8f9f7 1211 /**
<> 144:ef7eb2e8f9f7 1212 * @}
<> 144:ef7eb2e8f9f7 1213 */
<> 144:ef7eb2e8f9f7 1214
<> 144:ef7eb2e8f9f7 1215 #endif /* STM32L053xx || STM32L063xx */
<> 144:ef7eb2e8f9f7 1216 /*------------------------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1217
<> 144:ef7eb2e8f9f7 1218 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1219 /*------------------------- STM32L052xx/STM32L062xx---------------------------*/
<> 144:ef7eb2e8f9f7 1220 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1221 #if defined (STM32L052xx) || defined (STM32L062xx)
<> 144:ef7eb2e8f9f7 1222
<> 144:ef7eb2e8f9f7 1223 /* The table below gives an overview of the different alternate functions per port.
<> 144:ef7eb2e8f9f7 1224 * For more details refer yourself to the product data sheet.
<> 144:ef7eb2e8f9f7 1225 *
<> 144:ef7eb2e8f9f7 1226 */
<> 144:ef7eb2e8f9f7 1227 /* | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
<> 144:ef7eb2e8f9f7 1228 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1229 * PA0 | | |TIM2_C1 |TSC |USART2 |TIM2_TR | |COMP1 |
<> 144:ef7eb2e8f9f7 1230 * PA1 |EVENTOUT| |TIM2_C2 |TSC |USART2 |TIM21_TR| | |
<> 144:ef7eb2e8f9f7 1231 * PA2 |TIM21_C1| |TIM2_C3 |TSC |USART2 | | |COMP2 |
<> 144:ef7eb2e8f9f7 1232 * PA3 |TIM21_C2| |TIM2_C4 |TSC |USART2 | | | |
<> 144:ef7eb2e8f9f7 1233 * PA4 |SPI1 | | |TSC |USART2 |TIM22_TR| | |
<> 144:ef7eb2e8f9f7 1234 * PA5 |SPI1 | |TIM2_TR |TSC | |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1235 * PA6 |SPI1 | | |TSC |LPUART |TIM22_C1|EVENTOUT|COMP1 |
<> 144:ef7eb2e8f9f7 1236 * PA7 |SPI1 | | |TSC | |TIM22_C2|EVENTOUT|COMP2 |
<> 144:ef7eb2e8f9f7 1237 * PA8 |MCO | |USB |EVENTOUT|USART1 | | | |
<> 144:ef7eb2e8f9f7 1238 * PA9 |MCO | | |TSC |USART1 | | | |
<> 144:ef7eb2e8f9f7 1239 * PA10| | | |TSC |USART1 | | | |
<> 144:ef7eb2e8f9f7 1240 * PA11|SPI1 | |EVENTOUT|TSC |USART1 | | |COMP1 |
<> 144:ef7eb2e8f9f7 1241 * PA12|SPI1 | |EVENTOUT|TSC |USART1 | | |COMP2 |
<> 144:ef7eb2e8f9f7 1242 * PA13|SWDIO | |USB | | | | | |
<> 144:ef7eb2e8f9f7 1243 * PA14|SWCLK | | | |USART2 | | | |
<> 144:ef7eb2e8f9f7 1244 * PA15|SPI1 | |TIM2_TR |EVENTOUT|USART2 |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1245 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1246 * PB0 |EVENTOUT| | |TSC | | | | |
<> 144:ef7eb2e8f9f7 1247 * PB1 | | | |TSC |LPUART1 | | | |
<> 144:ef7eb2e8f9f7 1248 * PB2 | | |LPTIM1_O|TSC | | | | |
<> 144:ef7eb2e8f9f7 1249 * PB3 |SPI1 | |TIM2_C2 |TSC |EVENTOUT| | | |
<> 144:ef7eb2e8f9f7 1250 * PB4 |SPI1 | |EVENTOUT|TSC |TIM22_C1| | | |
<> 144:ef7eb2e8f9f7 1251 * PB5 |SPI1 | |LPTIM1_I|I2C1 |TIM22_C2| | | |
<> 144:ef7eb2e8f9f7 1252 * PB6 |USART1 |I2C1 |LPTIM1_T|TSC | | | | |
<> 144:ef7eb2e8f9f7 1253 * PB7 |USART1 |I2C1 |LPTIM1_I|TSC | | | | |
<> 144:ef7eb2e8f9f7 1254 * PB8 | | | |TSC |I2C1 | | | |
<> 144:ef7eb2e8f9f7 1255 * PB9 | | |EVENTOUT| |I2C1 |SPI2 | | |
<> 144:ef7eb2e8f9f7 1256 * PB10| | |TIM2_C3 |TSC |LPUART1 |SPI2 |I2C2 | |
<> 144:ef7eb2e8f9f7 1257 * PB11|EVENTOUT| |TIM2_C4 |TSC |LPUART1 | |I2C2 | |
<> 144:ef7eb2e8f9f7 1258 * PB12|SPI2 | |LPUART1 |TSC | |I2C2 |EVENTOUT| |
<> 144:ef7eb2e8f9f7 1259 * PB13|SPI2 | | |TSC |LPUART1 |I2C2 |TIM21_C1| |
<> 144:ef7eb2e8f9f7 1260 * PB14|SPI2 | |RTC |TSC |LPUART1 |I2C2 |TIM21_C2| |
<> 144:ef7eb2e8f9f7 1261 * PB15|SPI2 | |RTC | | | | | |
<> 144:ef7eb2e8f9f7 1262 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1263 * PC0 |LPTIM1_I| |EVENTOUT|TSC | | | | |
<> 144:ef7eb2e8f9f7 1264 * PC1 |LPTIM1_O| |EVENTOUT|TSC | | | | |
<> 144:ef7eb2e8f9f7 1265 * PC2 |LPTIM1_I| |SPI2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 1266 * PC3 |LPTIM1_T| |SPI2 |TSC | | | | |
<> 144:ef7eb2e8f9f7 1267 * PC4 |EVENTOUT| |LPUART | | | | | |
<> 144:ef7eb2e8f9f7 1268 * PC5 | | |LPUART |TSC | | | | |
<> 144:ef7eb2e8f9f7 1269 * PC6 |TIM22_C1| | |TSC | | | | |
<> 144:ef7eb2e8f9f7 1270 * PC7 |TIM22_C2| | |TSC | | | | |
<> 144:ef7eb2e8f9f7 1271 * PC8 |TIM22_TR| | |TSC | | | | |
<> 144:ef7eb2e8f9f7 1272 * PC9 |TIM21_TR| |USB |TSC | | | | |
<> 144:ef7eb2e8f9f7 1273 * PC10|LPUART | | | | | | | |
<> 144:ef7eb2e8f9f7 1274 * PC11|LPUART | | | | | | | |
<> 144:ef7eb2e8f9f7 1275 * PC12| | | | | | | | |
<> 144:ef7eb2e8f9f7 1276 * PC13| | | | | | | | |
<> 144:ef7eb2e8f9f7 1277 * PC14| | | | | | | | |
<> 144:ef7eb2e8f9f7 1278 * PC15| | | | | | | | |
<> 144:ef7eb2e8f9f7 1279 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1280 * PD2 |LPUART | | | | | | | |
<> 144:ef7eb2e8f9f7 1281 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1282 * PH0 |USB | | | | | | | |
<> 144:ef7eb2e8f9f7 1283 * PH1 | | | | | | | | |
<> 144:ef7eb2e8f9f7 1284 * *
<> 144:ef7eb2e8f9f7 1285 */
<> 144:ef7eb2e8f9f7 1286
<> 144:ef7eb2e8f9f7 1287 /** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
<> 144:ef7eb2e8f9f7 1288 * @{
<> 144:ef7eb2e8f9f7 1289 */
<> 144:ef7eb2e8f9f7 1290
<> 144:ef7eb2e8f9f7 1291 /*
<> 144:ef7eb2e8f9f7 1292 * Alternate function AF0
<> 144:ef7eb2e8f9f7 1293 */
<> 151:5eaa88a5bcc7 1294 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1295 #define GPIO_AF0_SPI2 ((uint8_t)0x00U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1296 #define GPIO_AF0_USART1 ((uint8_t)0x00U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1297 #define GPIO_AF0_USART2 ((uint8_t)0x00U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1298 #define GPIO_AF0_LPUART1 ((uint8_t)0x00U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1299 #define GPIO_AF0_USB ((uint8_t)0x00U) /* USB Alternate Function mapping */
<> 151:5eaa88a5bcc7 1300 #define GPIO_AF0_LPTIM1 ((uint8_t)0x00U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1301 #define GPIO_AF0_TSC ((uint8_t)0x00U) /* TSC Alternate Function mapping */
<> 151:5eaa88a5bcc7 1302 #define GPIO_AF0_TIM2 ((uint8_t)0x00U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1303 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1304 #define GPIO_AF0_TIM22 ((uint8_t)0x00U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1305 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1306 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1307 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1308 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1309 /**
<> 144:ef7eb2e8f9f7 1310 *
<> 144:ef7eb2e8f9f7 1311 */
<> 144:ef7eb2e8f9f7 1312
<> 144:ef7eb2e8f9f7 1313 /*
<> 144:ef7eb2e8f9f7 1314 * Alternate function AF1
<> 144:ef7eb2e8f9f7 1315 */
<> 151:5eaa88a5bcc7 1316 #define GPIO_AF1_SPI1 ((uint8_t)0x01U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1317 #define GPIO_AF1_SPI2 ((uint8_t)0x01U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1318 #define GPIO_AF1_I2C1 ((uint8_t)0x01U) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1319 /**
<> 144:ef7eb2e8f9f7 1320 *
<> 144:ef7eb2e8f9f7 1321 */
<> 144:ef7eb2e8f9f7 1322
<> 144:ef7eb2e8f9f7 1323 /**
<> 144:ef7eb2e8f9f7 1324 * Alternate function AF2
<> 144:ef7eb2e8f9f7 1325 */
<> 151:5eaa88a5bcc7 1326 #define GPIO_AF2_SPI2 ((uint8_t)0x02U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1327 #define GPIO_AF2_LPUART1 ((uint8_t)0x02U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1328 #define GPIO_AF2_USB ((uint8_t)0x02U) /* USB Alternate Function mapping */
<> 151:5eaa88a5bcc7 1329 #define GPIO_AF2_LPTIM1 ((uint8_t)0x02U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1330 #define GPIO_AF2_TIM2 ((uint8_t)0x02U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1331 #define GPIO_AF2_EVENTOUT ((uint8_t)0x02U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1332 #define GPIO_AF2_RTC ((uint8_t)0x02U) /* RTC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1333 /**
<> 144:ef7eb2e8f9f7 1334 *
<> 144:ef7eb2e8f9f7 1335 */
<> 144:ef7eb2e8f9f7 1336
<> 144:ef7eb2e8f9f7 1337 /*
<> 144:ef7eb2e8f9f7 1338 * Alternate function AF3
<> 144:ef7eb2e8f9f7 1339 */
<> 151:5eaa88a5bcc7 1340 #define GPIO_AF3_I2C1 ((uint8_t)0x03U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1341 #define GPIO_AF3_TSC ((uint8_t)0x03U) /* TSC Alternate Function mapping */
<> 151:5eaa88a5bcc7 1342 #define GPIO_AF3_EVENTOUT ((uint8_t)0x03U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1343 /**
<> 144:ef7eb2e8f9f7 1344 *
<> 144:ef7eb2e8f9f7 1345 */
<> 144:ef7eb2e8f9f7 1346
<> 144:ef7eb2e8f9f7 1347 /*
<> 144:ef7eb2e8f9f7 1348 * Alternate function AF4
<> 144:ef7eb2e8f9f7 1349 */
<> 151:5eaa88a5bcc7 1350 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1351 #define GPIO_AF4_USART1 ((uint8_t)0x04U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1352 #define GPIO_AF4_USART2 ((uint8_t)0x04U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1353 #define GPIO_AF4_LPUART1 ((uint8_t)0x04U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1354 #define GPIO_AF4_TIM22 ((uint8_t)0x04U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1355 #define GPIO_AF4_EVENTOUT ((uint8_t)0x04U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1356 /**
<> 144:ef7eb2e8f9f7 1357 *
<> 144:ef7eb2e8f9f7 1358 */
<> 144:ef7eb2e8f9f7 1359
<> 144:ef7eb2e8f9f7 1360 /*
<> 144:ef7eb2e8f9f7 1361 * Alternate function AF5
<> 144:ef7eb2e8f9f7 1362 */
<> 151:5eaa88a5bcc7 1363 #define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1364 #define GPIO_AF5_I2C2 ((uint8_t)0x05U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1365 #define GPIO_AF5_TIM2 ((uint8_t)0x05U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1366 #define GPIO_AF5_TIM21 ((uint8_t)0x05U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1367 #define GPIO_AF5_TIM22 ((uint8_t)0x05U) /* TIM22 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1368 /**
<> 144:ef7eb2e8f9f7 1369 *
<> 144:ef7eb2e8f9f7 1370 */
<> 144:ef7eb2e8f9f7 1371
<> 144:ef7eb2e8f9f7 1372 /*
<> 144:ef7eb2e8f9f7 1373 * Alternate function AF6
<> 144:ef7eb2e8f9f7 1374 */
<> 151:5eaa88a5bcc7 1375 #define GPIO_AF6_I2C2 ((uint8_t)0x06U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1376 #define GPIO_AF6_TIM21 ((uint8_t)0x06U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1377 #define GPIO_AF6_EVENTOUT ((uint8_t)0x06U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1378 /**
<> 144:ef7eb2e8f9f7 1379 *
<> 144:ef7eb2e8f9f7 1380 */
<> 144:ef7eb2e8f9f7 1381
<> 144:ef7eb2e8f9f7 1382 /*
<> 144:ef7eb2e8f9f7 1383 * Alternate function AF7
<> 144:ef7eb2e8f9f7 1384 */
<> 151:5eaa88a5bcc7 1385 #define GPIO_AF7_COMP1 ((uint8_t)0x07U) /* COMP1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1386 #define GPIO_AF7_COMP2 ((uint8_t)0x07U) /* COMP2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1387 /**
<> 144:ef7eb2e8f9f7 1388 *
<> 144:ef7eb2e8f9f7 1389 */
<> 144:ef7eb2e8f9f7 1390
<> 144:ef7eb2e8f9f7 1391 /**
<> 144:ef7eb2e8f9f7 1392 * @}
<> 144:ef7eb2e8f9f7 1393 */
<> 144:ef7eb2e8f9f7 1394
<> 144:ef7eb2e8f9f7 1395 /**
<> 144:ef7eb2e8f9f7 1396 * @}
<> 144:ef7eb2e8f9f7 1397 */
<> 144:ef7eb2e8f9f7 1398
<> 144:ef7eb2e8f9f7 1399 /** @defgroup GPIOEx_Private GPIOEx Private
<> 144:ef7eb2e8f9f7 1400 * @{
<> 144:ef7eb2e8f9f7 1401 */
<> 144:ef7eb2e8f9f7 1402 /**
<> 144:ef7eb2e8f9f7 1403 * @brief IS_GPIO_AF macro definition
<> 144:ef7eb2e8f9f7 1404 */
<> 144:ef7eb2e8f9f7 1405
<> 144:ef7eb2e8f9f7 1406 #define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_SPI1) || ((__AF__) == GPIO_AF2_SPI2) || \
<> 144:ef7eb2e8f9f7 1407 ((__AF__) == GPIO_AF0_SPI2) || ((__AF__) == GPIO_AF2_LPUART1) || \
<> 144:ef7eb2e8f9f7 1408 ((__AF__) == GPIO_AF0_USART1) || ((__AF__) == GPIO_AF2_USB) || \
<> 144:ef7eb2e8f9f7 1409 ((__AF__) == GPIO_AF0_USART2) || ((__AF__) == GPIO_AF2_LPTIM1) || \
<> 144:ef7eb2e8f9f7 1410 ((__AF__) == GPIO_AF0_LPUART1) || ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1411 ((__AF__) == GPIO_AF0_USB) || ((__AF__) == GPIO_AF4_TIM22) || \
<> 144:ef7eb2e8f9f7 1412 ((__AF__) == GPIO_AF0_LPTIM1) || ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1413 ((__AF__) == GPIO_AF0_TSC) || ((__AF__) == GPIO_AF2_RTC) || \
<> 144:ef7eb2e8f9f7 1414 ((__AF__) == GPIO_AF0_TIM2) || ((__AF__) == GPIO_AF3_I2C1) || \
<> 144:ef7eb2e8f9f7 1415 ((__AF__) == GPIO_AF0_TIM21) || ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 1416 ((__AF__) == GPIO_AF0_TIM22) || ((__AF__) == GPIO_AF3_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1417 ((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF4_I2C1) || \
<> 144:ef7eb2e8f9f7 1418 ((__AF__) == GPIO_AF0_MCO) || ((__AF__) == GPIO_AF4_USART1) || \
<> 144:ef7eb2e8f9f7 1419 ((__AF__) == GPIO_AF0_SWDIO) || ((__AF__) == GPIO_AF0_SWCLK) || \
<> 144:ef7eb2e8f9f7 1420 ((__AF__) == GPIO_AF1_SPI1) || ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 1421 ((__AF__) == GPIO_AF1_SPI2) || ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 1422 ((__AF__) == GPIO_AF1_I2C1) || ((__AF__) == GPIO_AF4_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1423 ((__AF__) == GPIO_AF6_EVENTOUT) || ((__AF__) == GPIO_AF5_SPI2) || \
<> 144:ef7eb2e8f9f7 1424 ((__AF__) == GPIO_AF5_I2C2) || ((__AF__) == GPIO_AF5_TIM2) || \
<> 144:ef7eb2e8f9f7 1425 ((__AF__) == GPIO_AF5_TIM21) || ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 1426 ((__AF__) == GPIO_AF6_I2C2) || ((__AF__) == GPIO_AF6_TIM21) || \
<> 144:ef7eb2e8f9f7 1427 ((__AF__) == GPIO_AF7_COMP2) || ((__AF__) == GPIO_AF7_COMP1))
<> 144:ef7eb2e8f9f7 1428
<> 144:ef7eb2e8f9f7 1429
<> 144:ef7eb2e8f9f7 1430 #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__) \
<> 144:ef7eb2e8f9f7 1431 ((((__INSTANCE__) == GPIOA) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1432 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1433 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 1434 ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 1435 ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 1436 ((__AF__) == GPIO_AF6_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1437 ((__AF__) == GPIO_AF7_COMP1))) || \
<> 144:ef7eb2e8f9f7 1438 (((__INSTANCE__) == GPIOB) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1439 ((__AF__) == GPIO_AF1_I2C1) || \
<> 144:ef7eb2e8f9f7 1440 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1441 ((__AF__) == GPIO_AF3_TSC) || \
<> 144:ef7eb2e8f9f7 1442 ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 1443 ((__AF__) == GPIO_AF5_I2C2) || \
<> 144:ef7eb2e8f9f7 1444 ((__AF__) == GPIO_AF6_EVENTOUT))) || \
<> 144:ef7eb2e8f9f7 1445 (((__INSTANCE__) == GPIOC) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1446 ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1447 ((__AF__) == GPIO_AF3_TSC))) || \
<> 144:ef7eb2e8f9f7 1448 (((__INSTANCE__) == GPIOD) && (((__AF__) == GPIO_AF0_LPUART1))) || \
<> 144:ef7eb2e8f9f7 1449 (((__INSTANCE__) == GPIOH) && (((__AF__) == GPIO_AF0_USB))))
<> 144:ef7eb2e8f9f7 1450
<> 144:ef7eb2e8f9f7 1451 /**
<> 144:ef7eb2e8f9f7 1452 * @}
<> 144:ef7eb2e8f9f7 1453 */
<> 144:ef7eb2e8f9f7 1454 #endif /* STM32L052xx || STM32L062xx */
<> 144:ef7eb2e8f9f7 1455 /*------------------------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1456
<> 144:ef7eb2e8f9f7 1457 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1458 /*------------------------- STM32L051xx/STM32L061xx---------------------------*/
<> 144:ef7eb2e8f9f7 1459 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1460 #if defined (STM32L051xx)|| defined (STM32L061xx)
<> 144:ef7eb2e8f9f7 1461 /* The table below gives an overview of the different alternate functions per port.
<> 144:ef7eb2e8f9f7 1462 * For more details refer yourself to the product data sheet.
<> 144:ef7eb2e8f9f7 1463 *
<> 144:ef7eb2e8f9f7 1464 */
<> 144:ef7eb2e8f9f7 1465 /* | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
<> 144:ef7eb2e8f9f7 1466 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1467 * PA0 | | |TIM2_C1 | |USART2 |TIM2_TR | |COMP1 |
<> 144:ef7eb2e8f9f7 1468 * PA1 |EVENTOUT| |TIM2_C2 | |USART2 |TIM21_TR| | |
<> 144:ef7eb2e8f9f7 1469 * PA2 |TIM21_C1| |TIM2_C3 | |USART2 | | |COMP2 |
<> 144:ef7eb2e8f9f7 1470 * PA3 |TIM21_C2| |TIM2_C4 | |USART2 | | | |
<> 144:ef7eb2e8f9f7 1471 * PA4 |SPI1 | | | |USART2 |TIM22_TR| | |
<> 144:ef7eb2e8f9f7 1472 * PA5 |SPI1 | |TIM2_TR | | |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1473 * PA6 |SPI1 | | | |LPUART |TIM22_C1|EVENTOUT|COMP1 |
<> 144:ef7eb2e8f9f7 1474 * PA7 |SPI1 | | | | |TIM22_C2|EVENTOUT|COMP2 |
<> 144:ef7eb2e8f9f7 1475 * PA8 |MCO | | |EVENTOUT|USART1 | | | |
<> 144:ef7eb2e8f9f7 1476 * PA9 |MCO | | | |USART1 | | | |
<> 144:ef7eb2e8f9f7 1477 * PA10| | | | |USART1 | | | |
<> 144:ef7eb2e8f9f7 1478 * PA11|SPI1 | |EVENTOUT| |USART1 | | |COMP1 |
<> 144:ef7eb2e8f9f7 1479 * PA12|SPI1 | |EVENTOUT| |USART1 | | |COMP2 |
<> 144:ef7eb2e8f9f7 1480 * PA13|SWDIO | | | | | | | |
<> 144:ef7eb2e8f9f7 1481 * PA14|SWCLK | | | |USART2 | | | |
<> 144:ef7eb2e8f9f7 1482 * PA15|SPI1 | |TIM2_TR |EVENTOUT|USART2 |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1483 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1484 * PB0 |EVENTOUT| | | | | | | |
<> 144:ef7eb2e8f9f7 1485 * PB1 | | | | |LPUART1 | | | |
<> 144:ef7eb2e8f9f7 1486 * PB2 | | |LPTIM1_O| | | | | |
<> 144:ef7eb2e8f9f7 1487 * PB3 |SPI1 | |TIM2_C2 | |EVENTOUT| | | |
<> 144:ef7eb2e8f9f7 1488 * PB4 |SPI1 | |EVENTOUT| |TIM22_C1| | | |
<> 144:ef7eb2e8f9f7 1489 * PB5 |SPI1 | |LPTIM1_I|I2C1 |TIM22_C2| | | |
<> 144:ef7eb2e8f9f7 1490 * PB6 |USART1 |I2C1 |LPTIM1_T| | | | | |
<> 144:ef7eb2e8f9f7 1491 * PB7 |USART1 |I2C1 |LPTIM1_I| | | | | |
<> 144:ef7eb2e8f9f7 1492 * PB8 | | | | |I2C1 | | | |
<> 144:ef7eb2e8f9f7 1493 * PB9 | | |EVENTOUT| |I2C1 |SPI2 | | |
<> 144:ef7eb2e8f9f7 1494 * PB10| | |TIM2_C3 | |LPUART1 |SPI2 |I2C2 | |
<> 144:ef7eb2e8f9f7 1495 * PB11|EVENTOUT| |TIM2_C4 | |LPUART1 | |I2C2 | |
<> 144:ef7eb2e8f9f7 1496 * PB12|SPI2 | |LPUART1 | | |I2C2 |EVENTOUT| |
<> 144:ef7eb2e8f9f7 1497 * PB13|SPI2 | | | |LPUART1 |I2C2 |TIM21_C1| |
<> 144:ef7eb2e8f9f7 1498 * PB14|SPI2 | |RTC | |LPUART1 |I2C2 |TIM21_C2| |
<> 144:ef7eb2e8f9f7 1499 * PB15|SPI2 | |RTC | | | | | |
<> 144:ef7eb2e8f9f7 1500 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1501 * PC0 |LPTIM1_I| |EVENTOUT| | | | | |
<> 144:ef7eb2e8f9f7 1502 * PC1 |LPTIM1_O| |EVENTOUT| | | | | |
<> 144:ef7eb2e8f9f7 1503 * PC2 |LPTIM1_I| |SPI2 | | | | | |
<> 144:ef7eb2e8f9f7 1504 * PC3 |LPTIM1_T| |SPI2 | | | | | |
<> 144:ef7eb2e8f9f7 1505 * PC4 |EVENTOUT| |LPUART | | | | | |
<> 144:ef7eb2e8f9f7 1506 * PC5 | | |LPUART | | | | | |
<> 144:ef7eb2e8f9f7 1507 * PC6 |TIM22_C1| | | | | | | |
<> 144:ef7eb2e8f9f7 1508 * PC7 |TIM22_C2| | | | | | | |
<> 144:ef7eb2e8f9f7 1509 * PC8 |TIM22_TR| | | | | | | |
<> 144:ef7eb2e8f9f7 1510 * PC9 |TIM21_TR| | | | | | | |
<> 144:ef7eb2e8f9f7 1511 * PC10|LPUART | | | | | | | |
<> 144:ef7eb2e8f9f7 1512 * PC11|LPUART | | | | | | | |
<> 144:ef7eb2e8f9f7 1513 * PC12| | | | | | | | |
<> 144:ef7eb2e8f9f7 1514 * PC13| | | | | | | | |
<> 144:ef7eb2e8f9f7 1515 * PC14| | | | | | | | |
<> 144:ef7eb2e8f9f7 1516 * PC15| | | | | | | | |
<> 144:ef7eb2e8f9f7 1517 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1518 * PD2 |LPUART | | | | | | | |
<> 144:ef7eb2e8f9f7 1519 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1520 * PH0 | | | | | | | | |
<> 144:ef7eb2e8f9f7 1521 * PH1 | | | | | | | | |
<> 144:ef7eb2e8f9f7 1522 * *
<> 144:ef7eb2e8f9f7 1523 */
<> 144:ef7eb2e8f9f7 1524
<> 144:ef7eb2e8f9f7 1525 /** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
<> 144:ef7eb2e8f9f7 1526 * @{
<> 144:ef7eb2e8f9f7 1527 */
<> 144:ef7eb2e8f9f7 1528
<> 144:ef7eb2e8f9f7 1529 /*
<> 144:ef7eb2e8f9f7 1530 * Alternate function AF0
<> 144:ef7eb2e8f9f7 1531 */
<> 151:5eaa88a5bcc7 1532 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1533 #define GPIO_AF0_SPI2 ((uint8_t)0x00U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1534 #define GPIO_AF0_USART1 ((uint8_t)0x00U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1535 #define GPIO_AF0_USART2 ((uint8_t)0x00U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1536 #define GPIO_AF0_LPUART1 ((uint8_t)0x00U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1537 #define GPIO_AF0_LPTIM1 ((uint8_t)0x00U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1538 #define GPIO_AF0_TIM2 ((uint8_t)0x00U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1539 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1540 #define GPIO_AF0_TIM22 ((uint8_t)0x00U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1541 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1542 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1543 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1544 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1545 /**
<> 144:ef7eb2e8f9f7 1546 *
<> 144:ef7eb2e8f9f7 1547 */
<> 144:ef7eb2e8f9f7 1548
<> 144:ef7eb2e8f9f7 1549 /*
<> 144:ef7eb2e8f9f7 1550 * Alternate function AF1
<> 144:ef7eb2e8f9f7 1551 */
<> 151:5eaa88a5bcc7 1552 #define GPIO_AF1_SPI1 ((uint8_t)0x01U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1553 #define GPIO_AF1_SPI2 ((uint8_t)0x01U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1554 #define GPIO_AF1_I2C1 ((uint8_t)0x01U) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1555 /**
<> 144:ef7eb2e8f9f7 1556 *
<> 144:ef7eb2e8f9f7 1557 */
<> 144:ef7eb2e8f9f7 1558
<> 144:ef7eb2e8f9f7 1559 /*
<> 144:ef7eb2e8f9f7 1560 * Alternate function AF2
<> 144:ef7eb2e8f9f7 1561 */
<> 151:5eaa88a5bcc7 1562 #define GPIO_AF2_SPI2 ((uint8_t)0x02U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1563 #define GPIO_AF2_LPUART1 ((uint8_t)0x02U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1564 #define GPIO_AF2_USB ((uint8_t)0x02U) /* USB Alternate Function mapping */
<> 151:5eaa88a5bcc7 1565 #define GPIO_AF2_LPTIM1 ((uint8_t)0x02U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1566 #define GPIO_AF2_TIM2 ((uint8_t)0x02U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1567 #define GPIO_AF2_EVENTOUT ((uint8_t)0x02U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1568 #define GPIO_AF2_RTC ((uint8_t)0x02U) /* RTC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1569 /**
<> 144:ef7eb2e8f9f7 1570 *
<> 144:ef7eb2e8f9f7 1571 */
<> 144:ef7eb2e8f9f7 1572
<> 144:ef7eb2e8f9f7 1573 /*
<> 144:ef7eb2e8f9f7 1574 * Alternate function AF3
<> 144:ef7eb2e8f9f7 1575 */
<> 151:5eaa88a5bcc7 1576 #define GPIO_AF3_I2C1 ((uint8_t)0x03U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1577 #define GPIO_AF3_EVENTOUT ((uint8_t)0x03U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1578 /**
<> 144:ef7eb2e8f9f7 1579 *
<> 144:ef7eb2e8f9f7 1580 */
<> 144:ef7eb2e8f9f7 1581
<> 144:ef7eb2e8f9f7 1582 /*
<> 144:ef7eb2e8f9f7 1583 * Alternate function AF4
<> 144:ef7eb2e8f9f7 1584 */
<> 151:5eaa88a5bcc7 1585 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1586 #define GPIO_AF4_USART1 ((uint8_t)0x04U) /* USART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1587 #define GPIO_AF4_USART2 ((uint8_t)0x04U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1588 #define GPIO_AF4_LPUART1 ((uint8_t)0x04U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1589 #define GPIO_AF4_TIM22 ((uint8_t)0x04U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1590 #define GPIO_AF4_EVENTOUT ((uint8_t)0x04U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1591 /**
<> 144:ef7eb2e8f9f7 1592 *
<> 144:ef7eb2e8f9f7 1593 */
<> 144:ef7eb2e8f9f7 1594
<> 144:ef7eb2e8f9f7 1595 /*
<> 144:ef7eb2e8f9f7 1596 * Alternate function AF5
<> 144:ef7eb2e8f9f7 1597 */
<> 151:5eaa88a5bcc7 1598 #define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1599 #define GPIO_AF5_I2C2 ((uint8_t)0x05U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1600 #define GPIO_AF5_TIM2 ((uint8_t)0x05U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1601 #define GPIO_AF5_TIM21 ((uint8_t)0x05U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1602 #define GPIO_AF5_TIM22 ((uint8_t)0x05U) /* TIM22 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1603 /**
<> 144:ef7eb2e8f9f7 1604 *
<> 144:ef7eb2e8f9f7 1605 */
<> 144:ef7eb2e8f9f7 1606
<> 144:ef7eb2e8f9f7 1607 /*
<> 144:ef7eb2e8f9f7 1608 * Alternate function AF6
<> 144:ef7eb2e8f9f7 1609 */
<> 151:5eaa88a5bcc7 1610 #define GPIO_AF6_I2C2 ((uint8_t)0x06U) /* I2C2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1611 #define GPIO_AF6_TIM21 ((uint8_t)0x06U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1612 #define GPIO_AF6_EVENTOUT ((uint8_t)0x06U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1613 /**
<> 144:ef7eb2e8f9f7 1614 *
<> 144:ef7eb2e8f9f7 1615 */
<> 144:ef7eb2e8f9f7 1616
<> 144:ef7eb2e8f9f7 1617 /*
<> 144:ef7eb2e8f9f7 1618 * Alternate function AF7
<> 144:ef7eb2e8f9f7 1619 */
<> 151:5eaa88a5bcc7 1620 #define GPIO_AF7_COMP1 ((uint8_t)0x07U) /* COMP1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1621 #define GPIO_AF7_COMP2 ((uint8_t)0x07U) /* COMP2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1622 /**
<> 144:ef7eb2e8f9f7 1623 *
<> 144:ef7eb2e8f9f7 1624 */
<> 144:ef7eb2e8f9f7 1625
<> 144:ef7eb2e8f9f7 1626 /**
<> 144:ef7eb2e8f9f7 1627 * @}
<> 144:ef7eb2e8f9f7 1628 */
<> 144:ef7eb2e8f9f7 1629
<> 144:ef7eb2e8f9f7 1630 /**
<> 144:ef7eb2e8f9f7 1631 * @}
<> 144:ef7eb2e8f9f7 1632 */
<> 144:ef7eb2e8f9f7 1633
<> 144:ef7eb2e8f9f7 1634 /** @defgroup GPIOEx_Private GPIOEx Private
<> 144:ef7eb2e8f9f7 1635 * @{
<> 144:ef7eb2e8f9f7 1636 */
<> 144:ef7eb2e8f9f7 1637
<> 144:ef7eb2e8f9f7 1638 /**
<> 144:ef7eb2e8f9f7 1639 * @brief IS_GPIO_AF macro definition
<> 144:ef7eb2e8f9f7 1640 */
<> 144:ef7eb2e8f9f7 1641 #define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_SPI1) || ((__AF__) == GPIO_AF2_SPI2) || \
<> 144:ef7eb2e8f9f7 1642 ((__AF__) == GPIO_AF0_SPI2) || ((__AF__) == GPIO_AF2_LPUART1) || \
<> 144:ef7eb2e8f9f7 1643 ((__AF__) == GPIO_AF0_USART1) || ((__AF__) == GPIO_AF7_COMP1) || \
<> 144:ef7eb2e8f9f7 1644 ((__AF__) == GPIO_AF0_USART2) || ((__AF__) == GPIO_AF2_LPTIM1) || \
<> 144:ef7eb2e8f9f7 1645 ((__AF__) == GPIO_AF0_LPUART1) || ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1646 ((__AF__) == GPIO_AF0_LPTIM1) || ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1647 ((__AF__) == GPIO_AF2_RTC) || ((__AF__) == GPIO_AF4_TIM22) || \
<> 144:ef7eb2e8f9f7 1648 ((__AF__) == GPIO_AF0_TIM2) || ((__AF__) == GPIO_AF3_I2C1) || \
<> 144:ef7eb2e8f9f7 1649 ((__AF__) == GPIO_AF0_TIM21) || ((__AF__) == GPIO_AF7_COMP2) || \
<> 144:ef7eb2e8f9f7 1650 ((__AF__) == GPIO_AF0_TIM22) || ((__AF__) == GPIO_AF3_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1651 ((__AF__) == GPIO_AF0_EVENTOUT) || ((__AF__) == GPIO_AF4_I2C1) || \
<> 144:ef7eb2e8f9f7 1652 ((__AF__) == GPIO_AF0_MCO) || ((__AF__) == GPIO_AF4_USART1) || \
<> 144:ef7eb2e8f9f7 1653 ((__AF__) == GPIO_AF0_SWDIO) || ((__AF__) == GPIO_AF0_SWCLK) || \
<> 144:ef7eb2e8f9f7 1654 ((__AF__) == GPIO_AF1_SPI1) || ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 1655 ((__AF__) == GPIO_AF1_SPI2) || ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 1656 ((__AF__) == GPIO_AF1_I2C1) || ((__AF__) == GPIO_AF4_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1657 ((__AF__) == GPIO_AF6_EVENTOUT) || ((__AF__) == GPIO_AF5_SPI2) || \
<> 144:ef7eb2e8f9f7 1658 ((__AF__) == GPIO_AF5_I2C2) || ((__AF__) == GPIO_AF5_TIM2) || \
<> 144:ef7eb2e8f9f7 1659 ((__AF__) == GPIO_AF5_TIM21) || ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 1660 ((__AF__) == GPIO_AF6_I2C2) || ((__AF__) == GPIO_AF6_TIM21))
<> 144:ef7eb2e8f9f7 1661
<> 144:ef7eb2e8f9f7 1662
<> 144:ef7eb2e8f9f7 1663
<> 144:ef7eb2e8f9f7 1664 #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__) \
<> 144:ef7eb2e8f9f7 1665 ((((__INSTANCE__) == GPIOA) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1666 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1667 ((__AF__) == GPIO_AF3_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1668 ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 1669 ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 1670 ((__AF__) == GPIO_AF6_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1671 ((__AF__) == GPIO_AF7_COMP2))) || \
<> 144:ef7eb2e8f9f7 1672 (((__INSTANCE__) == GPIOB) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1673 ((__AF__) == GPIO_AF1_I2C1) || \
<> 144:ef7eb2e8f9f7 1674 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1675 ((__AF__) == GPIO_AF3_I2C1) || \
<> 144:ef7eb2e8f9f7 1676 ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 1677 ((__AF__) == GPIO_AF5_I2C2) || \
<> 144:ef7eb2e8f9f7 1678 ((__AF__) == GPIO_AF6_TIM21))) || \
<> 144:ef7eb2e8f9f7 1679 (((__INSTANCE__) == GPIOC) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1680 ((__AF__) == GPIO_AF2_LPUART1))) || \
<> 144:ef7eb2e8f9f7 1681 (((__INSTANCE__) == GPIOD) && (((__AF__) == GPIO_AF0_LPUART1))))
<> 144:ef7eb2e8f9f7 1682
<> 144:ef7eb2e8f9f7 1683 /**
<> 144:ef7eb2e8f9f7 1684 * @}
<> 144:ef7eb2e8f9f7 1685 */
<> 144:ef7eb2e8f9f7 1686 #endif /* STM32L051xx/STM32L061xx*/
<> 144:ef7eb2e8f9f7 1687 /*------------------------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1688
<> 144:ef7eb2e8f9f7 1689 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1690 /*------------------------- STM32L031xx/STM32L041xx---------------------------*/
<> 144:ef7eb2e8f9f7 1691 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1692 #if defined (STM32L031xx)|| defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 1693 /* The table below gives an overview of the different alternate functions per port.
<> 144:ef7eb2e8f9f7 1694 * For more details refer yourself to the product data sheet.
<> 144:ef7eb2e8f9f7 1695 *
<> 144:ef7eb2e8f9f7 1696 */
<> 144:ef7eb2e8f9f7 1697 /* | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
<> 144:ef7eb2e8f9f7 1698 *______________________________________________________________________________
<> 144:ef7eb2e8f9f7 1699 * PA0 | |LPTIM1 |TIM2_C1 | |USART2 |TIM2_TR | |COMP1 |
<> 144:ef7eb2e8f9f7 1700 * PA1 |EVENTOUT|LPTIM1 |TIM2_C2 |I2C1 |USART2 |TIM21_TR| | |
<> 144:ef7eb2e8f9f7 1701 * PA2 |TIM21_C1| |TIM2_C3 | |USART2 | |LPUART1 |COMP2 |
<> 144:ef7eb2e8f9f7 1702 * PA3 |TIM21_C2| |TIM2_C4 | |USART2 | |LPUART1 | |
<> 144:ef7eb2e8f9f7 1703 * PA4 |SPI1 |LPTIM1 | | |USART2 |TIM22_TR| | |
<> 144:ef7eb2e8f9f7 1704 * PA5 |SPI1 |LPTIM1 |TIM2_TR | | |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1705 * PA6 |SPI1 |LPTIM1 | | |LPUART |TIM22_C1|EVENTOUT|COMP1 |
<> 144:ef7eb2e8f9f7 1706 * PA7 |SPI1 |LPTIM1 | | |USART2 |TIM22_C2|EVENTOUT|COMP2 |
<> 144:ef7eb2e8f9f7 1707 * PA8 |MCO | |LPTIM1 |EVENTOUT|USART2 |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1708 * PA9 |MCO |I2C1 | | |USART2 |TIM22_C1| | |
<> 144:ef7eb2e8f9f7 1709 * PA10| |I2C1 | | |USART2 |TIM22_C2| | |
<> 144:ef7eb2e8f9f7 1710 * PA11|SPI1 | |EVENTOUT| |USART2 |TIM21_C2| |COMP1 |
<> 144:ef7eb2e8f9f7 1711 * PA12|SPI1 | |EVENTOUT| |USART2 | | |COMP2 |
<> 144:ef7eb2e8f9f7 1712 * PA13|SWDIO |LPTIM1 | | | | |LPUART1 | |
<> 144:ef7eb2e8f9f7 1713 * PA14|SWCLK |LPTIM1 | |I2C1 |USART2 | |LPUART1 | |
<> 144:ef7eb2e8f9f7 1714 * PA15|SPI1 | |TIM2_TR |EVENTOUT|USART2 |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1715 *_____________________________________________________________________________|
<> 144:ef7eb2e8f9f7 1716 * PB0 |EVENTOUT|SPI1 | | |USART2 |TIM2_C3 | | |
<> 144:ef7eb2e8f9f7 1717 * PB1 |USART2 |SPI1 | | |LPUART1 |TIM2_C4 | | |
<> 144:ef7eb2e8f9f7 1718 * PB2 | | |LPTIM1_O| | | | | |
<> 144:ef7eb2e8f9f7 1719 * PB3 |SPI1 | |TIM2_C2 | |EVENTOUT| | | |
<> 144:ef7eb2e8f9f7 1720 * PB4 |SPI1 | |EVENTOUT| |TIM22_C1| | | |
<> 144:ef7eb2e8f9f7 1721 * PB5 |SPI1 | |LPTIM1_I|I2C1 |TIM22_C2| | | |
<> 144:ef7eb2e8f9f7 1722 * PB6 |USART2 |I2C1 |LPTIM1_T| | |TIM21_C1| | |
<> 144:ef7eb2e8f9f7 1723 * PB7 |USART2 |I2C1 |LPTIM1_I| | | | | |
<> 144:ef7eb2e8f9f7 1724 * PB8 | | | | |I2C1 | | | |
<> 144:ef7eb2e8f9f7 1725 * PB9 | | |EVENTOUT| |I2C1 | | | |
<> 144:ef7eb2e8f9f7 1726 * PB10| | |TIM2_C3 | | | |LPUART1 | |
<> 144:ef7eb2e8f9f7 1727 * PB11|EVENTOUT| |TIM2_C4 | | | |LPUART1 | |
<> 144:ef7eb2e8f9f7 1728 * PB12|SPI2 | | | | | |EVENTOUT| |
<> 144:ef7eb2e8f9f7 1729 * PB13|SPI2 | |MCO | | |TIM21_C1|LPUART1 | |
<> 144:ef7eb2e8f9f7 1730 * PB14|SPI2 | |RTC | | |TIM21_C2|LPUART1 | |
<> 144:ef7eb2e8f9f7 1731 * PB15|SPI2 | |RTC | | | | | |
<> 144:ef7eb2e8f9f7 1732 *_____________________________________________________________________________|
<> 144:ef7eb2e8f9f7 1733 * PC0 |LPTIM1_I| |EVENTOUT| | | |LPUART1 | |
<> 144:ef7eb2e8f9f7 1734 * PC13| | | | | | | | |
<> 144:ef7eb2e8f9f7 1735 * PC14| | | | | | | | |
<> 144:ef7eb2e8f9f7 1736 * PC15| | | | | | | | |
<> 144:ef7eb2e8f9f7 1737 *_____________________________________________________________________________|
<> 144:ef7eb2e8f9f7 1738 * PH0 | | | | | | | | |
<> 144:ef7eb2e8f9f7 1739 * PH1 | | | | | | | | |
<> 144:ef7eb2e8f9f7 1740 *_____________________________________________________________________________|
<> 144:ef7eb2e8f9f7 1741 */
<> 144:ef7eb2e8f9f7 1742
<> 144:ef7eb2e8f9f7 1743 /** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
<> 144:ef7eb2e8f9f7 1744 * @{
<> 144:ef7eb2e8f9f7 1745 */
<> 144:ef7eb2e8f9f7 1746
<> 144:ef7eb2e8f9f7 1747 /*
<> 144:ef7eb2e8f9f7 1748 * Alternate function AF0
<> 144:ef7eb2e8f9f7 1749 */
<> 151:5eaa88a5bcc7 1750 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1751 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1752 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1753 #define GPIO_AF0_USART2 ((uint8_t)0x00U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1754 #define GPIO_AF0_LPTIM1 ((uint8_t)0x00U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1755 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1756 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1757 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1758 /**
<> 144:ef7eb2e8f9f7 1759 *
<> 144:ef7eb2e8f9f7 1760 */
<> 144:ef7eb2e8f9f7 1761
<> 144:ef7eb2e8f9f7 1762 /*
<> 144:ef7eb2e8f9f7 1763 * Alternate function AF1
<> 144:ef7eb2e8f9f7 1764 */
<> 151:5eaa88a5bcc7 1765 #define GPIO_AF1_SPI1 ((uint8_t)0x01U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1766 #define GPIO_AF1_I2C1 ((uint8_t)0x01U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1767 #define GPIO_AF1_LPTIM1 ((uint8_t)0x01U) /* LPTIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1768 /**
<> 144:ef7eb2e8f9f7 1769 *
<> 144:ef7eb2e8f9f7 1770 */
<> 144:ef7eb2e8f9f7 1771
<> 144:ef7eb2e8f9f7 1772 /*
<> 144:ef7eb2e8f9f7 1773 * Alternate function AF2
<> 144:ef7eb2e8f9f7 1774 */
<> 151:5eaa88a5bcc7 1775 #define GPIO_AF2_LPTIM1 ((uint8_t)0x02U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1776 #define GPIO_AF2_TIM2 ((uint8_t)0x02U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1777 #define GPIO_AF2_MCO ((uint8_t)0x02U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1778 #define GPIO_AF2_EVENTOUT ((uint8_t)0x02U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1779 #define GPIO_AF2_RTC ((uint8_t)0x02U) /* RTC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1780 /**
<> 144:ef7eb2e8f9f7 1781 *
<> 144:ef7eb2e8f9f7 1782 */
<> 144:ef7eb2e8f9f7 1783
<> 144:ef7eb2e8f9f7 1784 /*
<> 144:ef7eb2e8f9f7 1785 * Alternate function AF3
<> 144:ef7eb2e8f9f7 1786 */
<> 151:5eaa88a5bcc7 1787 #define GPIO_AF3_I2C1 ((uint8_t)0x03U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1788 #define GPIO_AF3_EVENTOUT ((uint8_t)0x03U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1789 /**
<> 144:ef7eb2e8f9f7 1790 *
<> 144:ef7eb2e8f9f7 1791 */
<> 144:ef7eb2e8f9f7 1792
<> 144:ef7eb2e8f9f7 1793 /*
<> 144:ef7eb2e8f9f7 1794 * Alternate function AF4
<> 144:ef7eb2e8f9f7 1795 */
<> 151:5eaa88a5bcc7 1796 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1797 #define GPIO_AF4_USART2 ((uint8_t)0x04U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1798 #define GPIO_AF4_LPUART1 ((uint8_t)0x04U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1799 #define GPIO_AF4_TIM22 ((uint8_t)0x04U) /* TIM22 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1800 #define GPIO_AF4_EVENTOUT ((uint8_t)0x04U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1801 /**
<> 144:ef7eb2e8f9f7 1802 *
<> 144:ef7eb2e8f9f7 1803 */
<> 144:ef7eb2e8f9f7 1804
<> 144:ef7eb2e8f9f7 1805 /*
<> 144:ef7eb2e8f9f7 1806 * Alternate function AF5
<> 144:ef7eb2e8f9f7 1807 */
<> 151:5eaa88a5bcc7 1808 #define GPIO_AF5_TIM2 ((uint8_t)0x05U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1809 #define GPIO_AF5_TIM21 ((uint8_t)0x05U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1810 #define GPIO_AF5_TIM22 ((uint8_t)0x05U) /* TIM22 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1811 /**
<> 144:ef7eb2e8f9f7 1812 *
<> 144:ef7eb2e8f9f7 1813 */
<> 144:ef7eb2e8f9f7 1814
<> 144:ef7eb2e8f9f7 1815 /*
<> 144:ef7eb2e8f9f7 1816 * Alternate function AF6
<> 144:ef7eb2e8f9f7 1817 */
<> 151:5eaa88a5bcc7 1818 #define GPIO_AF6_LPUART1 ((uint8_t)0x06U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1819 #define GPIO_AF6_EVENTOUT ((uint8_t)0x06U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1820 /**
<> 144:ef7eb2e8f9f7 1821 *
<> 144:ef7eb2e8f9f7 1822 */
<> 144:ef7eb2e8f9f7 1823
<> 144:ef7eb2e8f9f7 1824 /*
<> 144:ef7eb2e8f9f7 1825 * Alternate function AF7
<> 144:ef7eb2e8f9f7 1826 */
<> 151:5eaa88a5bcc7 1827 #define GPIO_AF7_COMP1 ((uint8_t)0x07U) /* COMP1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1828 #define GPIO_AF7_COMP2 ((uint8_t)0x07U) /* COMP2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1829 /**
<> 144:ef7eb2e8f9f7 1830 *
<> 144:ef7eb2e8f9f7 1831 */
<> 144:ef7eb2e8f9f7 1832
<> 144:ef7eb2e8f9f7 1833 /**
<> 144:ef7eb2e8f9f7 1834 * @}
<> 144:ef7eb2e8f9f7 1835 */
<> 144:ef7eb2e8f9f7 1836
<> 144:ef7eb2e8f9f7 1837 /**
<> 144:ef7eb2e8f9f7 1838 * @}
<> 144:ef7eb2e8f9f7 1839 */
<> 144:ef7eb2e8f9f7 1840
<> 144:ef7eb2e8f9f7 1841 /** @defgroup GPIOEx_Private GPIOEx Private
<> 144:ef7eb2e8f9f7 1842 * @{
<> 144:ef7eb2e8f9f7 1843 */
<> 144:ef7eb2e8f9f7 1844 /**
<> 144:ef7eb2e8f9f7 1845 * @brief IS_GPIO_AF macro definition
<> 144:ef7eb2e8f9f7 1846 */
<> 144:ef7eb2e8f9f7 1847
<> 144:ef7eb2e8f9f7 1848 #define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 1849 ((__AF__) == GPIO_AF0_TIM21 ) || \
<> 144:ef7eb2e8f9f7 1850 ((__AF__) == GPIO_AF0_SPI1 ) || \
<> 144:ef7eb2e8f9f7 1851 ((__AF__) == GPIO_AF0_USART2 ) || \
<> 144:ef7eb2e8f9f7 1852 ((__AF__) == GPIO_AF0_LPTIM1 ) || \
<> 144:ef7eb2e8f9f7 1853 ((__AF__) == GPIO_AF0_MCO ) || \
<> 144:ef7eb2e8f9f7 1854 ((__AF__) == GPIO_AF0_SWDIO ) || \
<> 144:ef7eb2e8f9f7 1855 ((__AF__) == GPIO_AF0_SWCLK ) || \
<> 144:ef7eb2e8f9f7 1856 ((__AF__) == GPIO_AF1_SPI1 ) || \
<> 144:ef7eb2e8f9f7 1857 ((__AF__) == GPIO_AF1_I2C1 ) || \
<> 144:ef7eb2e8f9f7 1858 ((__AF__) == GPIO_AF1_LPTIM1 ) || \
<> 144:ef7eb2e8f9f7 1859 ((__AF__) == GPIO_AF2_LPTIM1 ) || \
<> 144:ef7eb2e8f9f7 1860 ((__AF__) == GPIO_AF2_TIM2 ) || \
<> 144:ef7eb2e8f9f7 1861 ((__AF__) == GPIO_AF2_MCO ) || \
<> 144:ef7eb2e8f9f7 1862 ((__AF__) == GPIO_AF2_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 1863 ((__AF__) == GPIO_AF2_RTC ) || \
<> 144:ef7eb2e8f9f7 1864 ((__AF__) == GPIO_AF3_I2C1 ) || \
<> 144:ef7eb2e8f9f7 1865 ((__AF__) == GPIO_AF3_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 1866 ((__AF__) == GPIO_AF4_I2C1 ) || \
<> 144:ef7eb2e8f9f7 1867 ((__AF__) == GPIO_AF4_USART2 ) || \
<> 144:ef7eb2e8f9f7 1868 ((__AF__) == GPIO_AF4_LPUART1 ) || \
<> 144:ef7eb2e8f9f7 1869 ((__AF__) == GPIO_AF4_TIM22 ) || \
<> 144:ef7eb2e8f9f7 1870 ((__AF__) == GPIO_AF4_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 1871 ((__AF__) == GPIO_AF5_TIM2 ) || \
<> 144:ef7eb2e8f9f7 1872 ((__AF__) == GPIO_AF5_TIM21 ) || \
<> 144:ef7eb2e8f9f7 1873 ((__AF__) == GPIO_AF5_TIM22 ) || \
<> 144:ef7eb2e8f9f7 1874 ((__AF__) == GPIO_AF6_LPUART1 ) || \
<> 144:ef7eb2e8f9f7 1875 ((__AF__) == GPIO_AF6_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 1876 ((__AF__) == GPIO_AF7_COMP1 ) || \
<> 144:ef7eb2e8f9f7 1877 ((__AF__) == GPIO_AF7_COMP2 ))
<> 144:ef7eb2e8f9f7 1878
<> 144:ef7eb2e8f9f7 1879
<> 144:ef7eb2e8f9f7 1880 #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__) \
<> 144:ef7eb2e8f9f7 1881 ((((__INSTANCE__) == GPIOA) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1882 ((__AF__) == GPIO_AF1_LPTIM1) || \
<> 144:ef7eb2e8f9f7 1883 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 1884 ((__AF__) == GPIO_AF3_I2C1) || \
<> 144:ef7eb2e8f9f7 1885 ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 1886 ((__AF__) == GPIO_AF5_TIM22) || \
<> 144:ef7eb2e8f9f7 1887 ((__AF__) == GPIO_AF6_LPUART1) || \
<> 144:ef7eb2e8f9f7 1888 ((__AF__) == GPIO_AF7_COMP2))) || \
<> 144:ef7eb2e8f9f7 1889 (((__INSTANCE__) == GPIOB) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1890 ((__AF__) == GPIO_AF1_SPI1) || \
<> 144:ef7eb2e8f9f7 1891 ((__AF__) == GPIO_AF2_LPTIM1) || \
<> 144:ef7eb2e8f9f7 1892 ((__AF__) == GPIO_AF3_I2C1) || \
<> 144:ef7eb2e8f9f7 1893 ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 1894 ((__AF__) == GPIO_AF5_TIM2) || \
<> 144:ef7eb2e8f9f7 1895 ((__AF__) == GPIO_AF6_EVENTOUT))) || \
<> 144:ef7eb2e8f9f7 1896 (((__INSTANCE__) == GPIOC) && (((__AF__) == GPIO_AF0_LPTIM1) || \
<> 144:ef7eb2e8f9f7 1897 ((__AF__) == GPIO_AF2_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 1898 ((__AF__) == GPIO_AF6_LPUART1))))
<> 144:ef7eb2e8f9f7 1899
<> 144:ef7eb2e8f9f7 1900 /**
<> 144:ef7eb2e8f9f7 1901 * @}
<> 144:ef7eb2e8f9f7 1902 */
<> 144:ef7eb2e8f9f7 1903
<> 144:ef7eb2e8f9f7 1904 #endif /* STM32L031xx/STM32L041xx*/
<> 144:ef7eb2e8f9f7 1905 /*------------------------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1906
<> 144:ef7eb2e8f9f7 1907 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1908 /*------------------------- STM32L011xx/STM32L021xx---------------------------*/
<> 144:ef7eb2e8f9f7 1909 /*----------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1910 #if defined (STM32L011xx)|| defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 1911 /* The table below gives an overview of the different alternate functions per port.
<> 144:ef7eb2e8f9f7 1912 * For more details refer yourself to the product data sheet.
<> 144:ef7eb2e8f9f7 1913 *
<> 144:ef7eb2e8f9f7 1914 */
<> 144:ef7eb2e8f9f7 1915 /* | AF0 | AF1 | AF2 | AF3 | AF4 | AF5 | AF6 | AF7 |
<> 144:ef7eb2e8f9f7 1916 *______________________________________________________________________________________
<> 144:ef7eb2e8f9f7 1917 * PA0 |USART2_RX|LPTIM1_IN1|TIM2_C1 | |USART2_CTS|TIM2_ETR|LPUART1_RX |COMP1_OUT|
<> 144:ef7eb2e8f9f7 1918 * PA1 |EVENTOUT |LPTIM1_IN2|TIM2_C2 |I2C1 |USART2_RTS|TIM21_TR|LPUART1_TX | |
<> 144:ef7eb2e8f9f7 1919 * PA2 |TIM21_C1 | |TIM2_C3 | |USART2_TX | |LPUART1_TX |COMP2_OUT|
<> 144:ef7eb2e8f9f7 1920 * PA3 |TIM21_C2 | |TIM2_C4 | |USART2_RX | |LPUART1_RX | |
<> 144:ef7eb2e8f9f7 1921 * PA4 |SPI1 |LPTIM1_IN1|LPTIM1_TR|I2C1_SCL|USART2_CK |TIM2_TR |LPUART1_TX |COMP2_OUT|
<> 144:ef7eb2e8f9f7 1922 * PA5 |SPI1 |LPTIM1_IN2|TIM2_TR | | |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1923 * PA6 |SPI1 |LPTIM1_ETR| | |LPUART1_CT| |EVENTOUT |COMP1_OUT|
<> 144:ef7eb2e8f9f7 1924 * PA7 |SPI1 |LPTIM1_OUT| | |USART2_CTS|TIM21_T |EVENTOUT |COMP2_OUT|
<> 144:ef7eb2e8f9f7 1925 * PA8 |MCO | |LPTIM1_I1|EVENTOUT|USART2_CK |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1926 * PA9 |MCO |I2C1_SCL |LPTIM1_O | |USART2_TX |TIM21_C2| |COMP1_OUT|
<> 144:ef7eb2e8f9f7 1927 * PA10|TIM21_C1 |I2C1_SDA |RTC_REFIN| |USART2_RX |TIM2_C3 | |COMP1_OUT|
<> 144:ef7eb2e8f9f7 1928 * PA11|SPI1 |LPTIM1_OUT|EVENTOUT | |USART2_CTS|TIM21_C2| |COMP1_OUT|
<> 144:ef7eb2e8f9f7 1929 * PA12|SPI1 | |EVENTOUT | |USART2_RTS| | |COMP2_OUT|
<> 144:ef7eb2e8f9f7 1930 * PA13|SWDIO |LPTIM1_T | |I2C1_SDA| |SPI1 |LPUART1_RX |COMP1_OUT|
<> 144:ef7eb2e8f9f7 1931 * PA14|SWCLK |LPTIM1_O | |I2C1_SMB|USART2_TX |SPI1 |LPUART1_TX |COMP2_OUT|
<> 144:ef7eb2e8f9f7 1932 * PA15|SPI1 | |TIM2_TR |EVENTOUT|USART2_RX |TIM2_C1 | | |
<> 144:ef7eb2e8f9f7 1933 *______________________________________________________________________________________ |
<> 144:ef7eb2e8f9f7 1934 * PB0 |EVENTOUT |SPI1 |TIM2_C2 | |USART2_RTS|TIM2_C3 | | |
<> 144:ef7eb2e8f9f7 1935 * PB1 |USART2_CK|SPI1 |LPTIM1_I1| |LPUART1_RT|TIM2_C4 | | |
<> 144:ef7eb2e8f9f7 1936 * PB2 | | |LPTIM1_O | | | | | |
<> 144:ef7eb2e8f9f7 1937 * PB3 |SPI1 | |TIM2_C2 | |EVENTOUT | | | |
<> 144:ef7eb2e8f9f7 1938 * PB4 |SPI1 | |EVENTOUT | | | | | |
<> 144:ef7eb2e8f9f7 1939 * PB5 |SPI1 | |LPTIM1_I1|I2C1 | |TIM21_C1| | |
<> 144:ef7eb2e8f9f7 1940 * PB6 |USART2_TX|I2C1_SCL |LPTIM1_T | | |TIM2_C3 |LPUART1_TX | |
<> 144:ef7eb2e8f9f7 1941 * PB7 |USART2_RX|I2C1 |LPTIM1_I2| | |TIM2_C4 |LPUART1_RX | |
<> 144:ef7eb2e8f9f7 1942 * PB8 |USART2_TX| |EVENTOUT | |I2C1 |SPI1 | | |
<> 144:ef7eb2e8f9f7 1943 * PB9 | | | | | | | | |
<> 144:ef7eb2e8f9f7 1944 *______________________________________________________________________________________ |
<> 144:ef7eb2e8f9f7 1945 * PC14| | | | | | | | |
<> 144:ef7eb2e8f9f7 1946 * PC15| | | | | | | | |
<> 144:ef7eb2e8f9f7 1947 *______________________________________________________________________________________ |
<> 144:ef7eb2e8f9f7 1948 */
<> 144:ef7eb2e8f9f7 1949
<> 144:ef7eb2e8f9f7 1950 /** @defgroup GPIOEx_Alternate_function_selection Alternate function selection
<> 144:ef7eb2e8f9f7 1951 * @{
<> 144:ef7eb2e8f9f7 1952 */
<> 144:ef7eb2e8f9f7 1953
<> 144:ef7eb2e8f9f7 1954 /*
<> 144:ef7eb2e8f9f7 1955 * Alternate function AF0
<> 144:ef7eb2e8f9f7 1956 */
<> 151:5eaa88a5bcc7 1957 #define GPIO_AF0_EVENTOUT ((uint8_t)0x00U) /* EVENTOUT Alternate Function mapping */
<> 151:5eaa88a5bcc7 1958 #define GPIO_AF0_TIM21 ((uint8_t)0x00U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1959 #define GPIO_AF0_SPI1 ((uint8_t)0x00U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1960 #define GPIO_AF0_USART2 ((uint8_t)0x00U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1961 #define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1962 #define GPIO_AF0_SWDIO ((uint8_t)0x00U) /* SWDIO Alternate Function mapping */
<> 151:5eaa88a5bcc7 1963 #define GPIO_AF0_SWCLK ((uint8_t)0x00U) /* SWCLK Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1964 /**
<> 144:ef7eb2e8f9f7 1965 *
<> 144:ef7eb2e8f9f7 1966 */
<> 144:ef7eb2e8f9f7 1967
<> 144:ef7eb2e8f9f7 1968 /*
<> 144:ef7eb2e8f9f7 1969 * Alternate function AF1
<> 144:ef7eb2e8f9f7 1970 */
<> 151:5eaa88a5bcc7 1971 #define GPIO_AF1_SPI1 ((uint8_t)0x01U) /* SPI1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1972 #define GPIO_AF1_I2C1 ((uint8_t)0x01U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1973 #define GPIO_AF1_LPTIM1 ((uint8_t)0x01U) /* LPTIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1974 /**
<> 144:ef7eb2e8f9f7 1975 *
<> 144:ef7eb2e8f9f7 1976 */
<> 144:ef7eb2e8f9f7 1977
<> 144:ef7eb2e8f9f7 1978 /* Alternate function AF2
<> 144:ef7eb2e8f9f7 1979 *
<> 144:ef7eb2e8f9f7 1980 */
<> 151:5eaa88a5bcc7 1981 #define GPIO_AF2_LPTIM1 ((uint8_t)0x02U) /* LPTIM1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1982 #define GPIO_AF2_TIM2 ((uint8_t)0x02U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1983 #define GPIO_AF2_RTC ((uint8_t)0x02U) /* RTC Alternate Function mapping */
<> 151:5eaa88a5bcc7 1984 #define GPIO_AF2_EVENTOUT ((uint8_t)0x02U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1985 /**
<> 144:ef7eb2e8f9f7 1986 *
<> 144:ef7eb2e8f9f7 1987 */
<> 144:ef7eb2e8f9f7 1988
<> 144:ef7eb2e8f9f7 1989 /*
<> 144:ef7eb2e8f9f7 1990 * Alternate function AF3
<> 144:ef7eb2e8f9f7 1991 */
<> 151:5eaa88a5bcc7 1992 #define GPIO_AF3_I2C1 ((uint8_t)0x03U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 1993 #define GPIO_AF3_EVENTOUT ((uint8_t)0x03U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 1994 /**
<> 144:ef7eb2e8f9f7 1995 *
<> 144:ef7eb2e8f9f7 1996 */
<> 144:ef7eb2e8f9f7 1997
<> 144:ef7eb2e8f9f7 1998 /*
<> 144:ef7eb2e8f9f7 1999 * Alternate function AF4
<> 144:ef7eb2e8f9f7 2000 */
<> 151:5eaa88a5bcc7 2001 #define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 2002 #define GPIO_AF4_USART2 ((uint8_t)0x04U) /* USART2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 2003 #define GPIO_AF4_LPUART1 ((uint8_t)0x04U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 2004 #define GPIO_AF4_EVENTOUT ((uint8_t)0x04U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 2005 /**
<> 144:ef7eb2e8f9f7 2006 *
<> 144:ef7eb2e8f9f7 2007 */
<> 144:ef7eb2e8f9f7 2008
<> 144:ef7eb2e8f9f7 2009 /*
<> 144:ef7eb2e8f9f7 2010 * Alternate function AF5
<> 144:ef7eb2e8f9f7 2011 */
<> 151:5eaa88a5bcc7 2012 #define GPIO_AF5_TIM2 ((uint8_t)0x05U) /* TIM2 Alternate Function mapping */
<> 151:5eaa88a5bcc7 2013 #define GPIO_AF5_TIM21 ((uint8_t)0x05U) /* TIM21 Alternate Function mapping */
<> 151:5eaa88a5bcc7 2014 #define GPIO_AF5_SPI1 ((uint8_t)0x05U) /* SPI1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 2015 /**
<> 144:ef7eb2e8f9f7 2016 *
<> 144:ef7eb2e8f9f7 2017 */
<> 144:ef7eb2e8f9f7 2018
<> 144:ef7eb2e8f9f7 2019 /*
<> 144:ef7eb2e8f9f7 2020 * Alternate function AF6
<> 144:ef7eb2e8f9f7 2021 */
<> 151:5eaa88a5bcc7 2022 #define GPIO_AF6_LPUART1 ((uint8_t)0x06U) /* LPUART1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 2023 #define GPIO_AF6_EVENTOUT ((uint8_t)0x06U) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 2024 /**
<> 144:ef7eb2e8f9f7 2025 *
<> 144:ef7eb2e8f9f7 2026 */
<> 144:ef7eb2e8f9f7 2027
<> 144:ef7eb2e8f9f7 2028 /*
<> 144:ef7eb2e8f9f7 2029 * Alternate function AF7
<> 144:ef7eb2e8f9f7 2030 */
<> 151:5eaa88a5bcc7 2031 #define GPIO_AF7_COMP1 ((uint8_t)0x07U) /* COMP1 Alternate Function mapping */
<> 151:5eaa88a5bcc7 2032 #define GPIO_AF7_COMP2 ((uint8_t)0x07U) /* COMP2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 2033 /**
<> 144:ef7eb2e8f9f7 2034 *
<> 144:ef7eb2e8f9f7 2035 */
<> 144:ef7eb2e8f9f7 2036
<> 144:ef7eb2e8f9f7 2037 /**
<> 144:ef7eb2e8f9f7 2038 * @}
<> 144:ef7eb2e8f9f7 2039 */
<> 144:ef7eb2e8f9f7 2040
<> 144:ef7eb2e8f9f7 2041 /**
<> 144:ef7eb2e8f9f7 2042 * @}
<> 144:ef7eb2e8f9f7 2043 */
<> 144:ef7eb2e8f9f7 2044
<> 144:ef7eb2e8f9f7 2045 /** @defgroup GPIOEx_Private GPIOEx Private
<> 144:ef7eb2e8f9f7 2046 * @{
<> 144:ef7eb2e8f9f7 2047 */
<> 144:ef7eb2e8f9f7 2048 /**
<> 144:ef7eb2e8f9f7 2049 * IS_GPIO_AF macro definition
<> 144:ef7eb2e8f9f7 2050 */
<> 144:ef7eb2e8f9f7 2051
<> 144:ef7eb2e8f9f7 2052 #define IS_GPIO_AF(__AF__) (((__AF__) == GPIO_AF0_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 2053 ((__AF__) == GPIO_AF0_TIM21 ) || \
<> 144:ef7eb2e8f9f7 2054 ((__AF__) == GPIO_AF0_SPI1 ) || \
<> 144:ef7eb2e8f9f7 2055 ((__AF__) == GPIO_AF0_USART2 ) || \
<> 144:ef7eb2e8f9f7 2056 ((__AF__) == GPIO_AF0_MCO ) || \
<> 144:ef7eb2e8f9f7 2057 ((__AF__) == GPIO_AF0_SWDIO ) || \
<> 144:ef7eb2e8f9f7 2058 ((__AF__) == GPIO_AF0_SWCLK ) || \
<> 144:ef7eb2e8f9f7 2059 ((__AF__) == GPIO_AF1_SPI1 ) || \
<> 144:ef7eb2e8f9f7 2060 ((__AF__) == GPIO_AF1_I2C1 ) || \
<> 144:ef7eb2e8f9f7 2061 ((__AF__) == GPIO_AF1_LPTIM1 ) || \
<> 144:ef7eb2e8f9f7 2062 ((__AF__) == GPIO_AF2_LPTIM1 ) || \
<> 144:ef7eb2e8f9f7 2063 ((__AF__) == GPIO_AF2_TIM2 ) || \
<> 144:ef7eb2e8f9f7 2064 ((__AF__) == GPIO_AF2_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 2065 ((__AF__) == GPIO_AF2_RTC ) || \
<> 144:ef7eb2e8f9f7 2066 ((__AF__) == GPIO_AF3_I2C1 ) || \
<> 144:ef7eb2e8f9f7 2067 ((__AF__) == GPIO_AF3_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 2068 ((__AF__) == GPIO_AF4_I2C1 ) || \
<> 144:ef7eb2e8f9f7 2069 ((__AF__) == GPIO_AF4_USART2 ) || \
<> 144:ef7eb2e8f9f7 2070 ((__AF__) == GPIO_AF4_LPUART1 ) || \
<> 144:ef7eb2e8f9f7 2071 ((__AF__) == GPIO_AF4_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 2072 ((__AF__) == GPIO_AF5_TIM2 ) || \
<> 144:ef7eb2e8f9f7 2073 ((__AF__) == GPIO_AF5_TIM21 ) || \
<> 144:ef7eb2e8f9f7 2074 ((__AF__) == GPIO_AF5_SPI1 ) || \
<> 144:ef7eb2e8f9f7 2075 ((__AF__) == GPIO_AF6_LPUART1 ) || \
<> 144:ef7eb2e8f9f7 2076 ((__AF__) == GPIO_AF6_EVENTOUT ) || \
<> 144:ef7eb2e8f9f7 2077 ((__AF__) == GPIO_AF7_COMP1 ) || \
<> 144:ef7eb2e8f9f7 2078 ((__AF__) == GPIO_AF7_COMP2 ))
<> 144:ef7eb2e8f9f7 2079
<> 144:ef7eb2e8f9f7 2080
<> 144:ef7eb2e8f9f7 2081 #define IS_GPIO_AF_AVAILABLE(__INSTANCE__,__AF__) \
<> 144:ef7eb2e8f9f7 2082 ((((__INSTANCE__) == GPIOA) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 2083 ((__AF__) == GPIO_AF1_LPTIM1) || \
<> 144:ef7eb2e8f9f7 2084 ((__AF__) == GPIO_AF2_TIM2) || \
<> 144:ef7eb2e8f9f7 2085 ((__AF__) == GPIO_AF3_I2C1) || \
<> 144:ef7eb2e8f9f7 2086 ((__AF__) == GPIO_AF4_USART2) || \
<> 144:ef7eb2e8f9f7 2087 ((__AF__) == GPIO_AF5_TIM2) || \
<> 144:ef7eb2e8f9f7 2088 ((__AF__) == GPIO_AF6_LPUART1) || \
<> 144:ef7eb2e8f9f7 2089 ((__AF__) == GPIO_AF7_COMP2))) || \
<> 144:ef7eb2e8f9f7 2090 (((__INSTANCE__) == GPIOB) && (((__AF__) == GPIO_AF0_EVENTOUT) || \
<> 144:ef7eb2e8f9f7 2091 ((__AF__) == GPIO_AF1_SPI1) || \
<> 144:ef7eb2e8f9f7 2092 ((__AF__) == GPIO_AF2_LPTIM1) || \
<> 144:ef7eb2e8f9f7 2093 ((__AF__) == GPIO_AF3_I2C1) || \
<> 144:ef7eb2e8f9f7 2094 ((__AF__) == GPIO_AF4_LPUART1) || \
<> 144:ef7eb2e8f9f7 2095 ((__AF__) == GPIO_AF5_TIM2) || \
<> 144:ef7eb2e8f9f7 2096 ((__AF__) == GPIO_AF6_EVENTOUT))))
<> 144:ef7eb2e8f9f7 2097
<> 144:ef7eb2e8f9f7 2098 /**
<> 144:ef7eb2e8f9f7 2099 * @}
<> 144:ef7eb2e8f9f7 2100 */
<> 144:ef7eb2e8f9f7 2101
<> 144:ef7eb2e8f9f7 2102 #endif /* STM32L011xx/STM32L021xx*/
<> 144:ef7eb2e8f9f7 2103 /*------------------------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 2104
<> 144:ef7eb2e8f9f7 2105
<> 144:ef7eb2e8f9f7 2106
<> 144:ef7eb2e8f9f7 2107 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 2108 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx)
<> 144:ef7eb2e8f9f7 2109
<> 144:ef7eb2e8f9f7 2110 /** @addtogroup GPIOEx_Exported_Constants
<> 144:ef7eb2e8f9f7 2111 * @{
<> 144:ef7eb2e8f9f7 2112 */
<> 144:ef7eb2e8f9f7 2113 /** @defgroup GPIOEx_Pin_Available Pin available
<> 144:ef7eb2e8f9f7 2114 * @{
<> 144:ef7eb2e8f9f7 2115 */
<> 144:ef7eb2e8f9f7 2116 #define GPIOA_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2117 #define GPIOB_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2118 #define GPIOC_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2119 #define GPIOD_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2120 #define GPIOE_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2121 #define GPIOH_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_9 | GPIO_PIN_10)
<> 144:ef7eb2e8f9f7 2122 /**
<> 144:ef7eb2e8f9f7 2123 * @}
<> 144:ef7eb2e8f9f7 2124 */
<> 144:ef7eb2e8f9f7 2125 /**
<> 144:ef7eb2e8f9f7 2126 * @}
<> 144:ef7eb2e8f9f7 2127 */
<> 144:ef7eb2e8f9f7 2128
<> 144:ef7eb2e8f9f7 2129 /** @addtogroup GPIOEx_Private
<> 144:ef7eb2e8f9f7 2130 * @{
<> 144:ef7eb2e8f9f7 2131 */
<> 144:ef7eb2e8f9f7 2132 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
<> 144:ef7eb2e8f9f7 2133 ((__GPIOx__) == (GPIOB))? 1U :\
<> 144:ef7eb2e8f9f7 2134 ((__GPIOx__) == (GPIOC))? 2U :\
<> 144:ef7eb2e8f9f7 2135 ((__GPIOx__) == (GPIOD))? 3U :\
<> 144:ef7eb2e8f9f7 2136 ((__GPIOx__) == (GPIOE))? 4U :\
<> 144:ef7eb2e8f9f7 2137 ((__GPIOx__) == (GPIOH))? 5U : 6U)
<> 144:ef7eb2e8f9f7 2138
<> 144:ef7eb2e8f9f7 2139 #define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
<> 151:5eaa88a5bcc7 2140 ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2141 (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2142 (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2143 (((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2144 (((__INSTANCE__) == GPIOE) && (((__PIN__) & (GPIOE_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOE_PIN_AVAILABLE)) == (GPIOE_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2145 (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
<> 144:ef7eb2e8f9f7 2146 /**
<> 144:ef7eb2e8f9f7 2147 * @}
<> 144:ef7eb2e8f9f7 2148 */
<> 144:ef7eb2e8f9f7 2149 #elif defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 2150
<> 144:ef7eb2e8f9f7 2151 /** @addtogroup GPIOEx_Exported_Constants
<> 144:ef7eb2e8f9f7 2152 * @{
<> 144:ef7eb2e8f9f7 2153 */
<> 144:ef7eb2e8f9f7 2154 /** @defgroup GPIOEx_Pin_Available Pin available
<> 144:ef7eb2e8f9f7 2155 * @{
<> 144:ef7eb2e8f9f7 2156 */
<> 144:ef7eb2e8f9f7 2157
<> 144:ef7eb2e8f9f7 2158 #define GPIOA_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2159 #define GPIOB_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2160 #define GPIOC_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15)
<> 144:ef7eb2e8f9f7 2161 #define GPIOH_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1)
<> 144:ef7eb2e8f9f7 2162 /**
<> 144:ef7eb2e8f9f7 2163 * @}
<> 144:ef7eb2e8f9f7 2164 */
<> 144:ef7eb2e8f9f7 2165 /**
<> 144:ef7eb2e8f9f7 2166 * @}
<> 144:ef7eb2e8f9f7 2167 */
<> 144:ef7eb2e8f9f7 2168
<> 144:ef7eb2e8f9f7 2169 /** @addtogroup GPIOEx_Private
<> 144:ef7eb2e8f9f7 2170 * @{
<> 144:ef7eb2e8f9f7 2171 */
<> 144:ef7eb2e8f9f7 2172 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
<> 144:ef7eb2e8f9f7 2173 ((__GPIOx__) == (GPIOB))? 1U :\
<> 144:ef7eb2e8f9f7 2174 ((__GPIOx__) == (GPIOC))? 2U :\
<> 144:ef7eb2e8f9f7 2175 ((__GPIOx__) == (GPIOH))? 5U : 6U)
<> 144:ef7eb2e8f9f7 2176
<> 144:ef7eb2e8f9f7 2177
<> 144:ef7eb2e8f9f7 2178 #define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
<> 151:5eaa88a5bcc7 2179 ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2180 (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2181 (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2182 (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
<> 144:ef7eb2e8f9f7 2183
<> 144:ef7eb2e8f9f7 2184 /**
<> 144:ef7eb2e8f9f7 2185 * @}
<> 144:ef7eb2e8f9f7 2186 */
<> 144:ef7eb2e8f9f7 2187
<> 144:ef7eb2e8f9f7 2188 #elif defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 2189
<> 144:ef7eb2e8f9f7 2190 /** @addtogroup GPIOEx_Exported_Constants
<> 144:ef7eb2e8f9f7 2191 * @{
<> 144:ef7eb2e8f9f7 2192 */
<> 144:ef7eb2e8f9f7 2193 /** @defgroup GPIOEx_Pin_Available Pin available
<> 144:ef7eb2e8f9f7 2194 * @{
<> 144:ef7eb2e8f9f7 2195 */
<> 144:ef7eb2e8f9f7 2196
<> 144:ef7eb2e8f9f7 2197 #define GPIOA_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2198 #define GPIOB_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
<> 144:ef7eb2e8f9f7 2199 GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 )
<> 144:ef7eb2e8f9f7 2200 #define GPIOC_PIN_AVAILABLE (GPIO_PIN_14 | GPIO_PIN_15)
<> 144:ef7eb2e8f9f7 2201
<> 144:ef7eb2e8f9f7 2202 /**
<> 144:ef7eb2e8f9f7 2203 * @}
<> 144:ef7eb2e8f9f7 2204 */
<> 144:ef7eb2e8f9f7 2205 /**
<> 144:ef7eb2e8f9f7 2206 * @}
<> 144:ef7eb2e8f9f7 2207 */
<> 144:ef7eb2e8f9f7 2208
<> 144:ef7eb2e8f9f7 2209 /** @addtogroup GPIOEx_Private
<> 144:ef7eb2e8f9f7 2210 * @{
<> 144:ef7eb2e8f9f7 2211 */
<> 144:ef7eb2e8f9f7 2212 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
<> 144:ef7eb2e8f9f7 2213 ((__GPIOx__) == (GPIOB))? 1U :\
<> 144:ef7eb2e8f9f7 2214 ((__GPIOx__) == (GPIOC))? 2U : 6U)
<> 144:ef7eb2e8f9f7 2215
<> 144:ef7eb2e8f9f7 2216
<> 144:ef7eb2e8f9f7 2217 #define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
<> 151:5eaa88a5bcc7 2218 ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2219 (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2220 (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))))
<> 144:ef7eb2e8f9f7 2221 /**
<> 144:ef7eb2e8f9f7 2222 * @}
<> 144:ef7eb2e8f9f7 2223 */
<> 144:ef7eb2e8f9f7 2224
<> 144:ef7eb2e8f9f7 2225 #elif defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 2226 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
<> 144:ef7eb2e8f9f7 2227
<> 144:ef7eb2e8f9f7 2228 /** @addtogroup GPIOEx_Exported_Constants
<> 144:ef7eb2e8f9f7 2229 * @{
<> 144:ef7eb2e8f9f7 2230 */
<> 144:ef7eb2e8f9f7 2231 /** @defgroup GPIOEx_Pin_Available Pin available
<> 144:ef7eb2e8f9f7 2232 * @{
<> 144:ef7eb2e8f9f7 2233 */
<> 144:ef7eb2e8f9f7 2234 #define GPIOA_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2235 #define GPIOB_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2236 #define GPIOC_PIN_AVAILABLE GPIO_PIN_All
<> 144:ef7eb2e8f9f7 2237 #define GPIOD_PIN_AVAILABLE GPIO_PIN_2
<> 144:ef7eb2e8f9f7 2238 #define GPIOH_PIN_AVAILABLE GPIO_PIN_0 | GPIO_PIN_1
<> 144:ef7eb2e8f9f7 2239 /**
<> 144:ef7eb2e8f9f7 2240 * @}
<> 144:ef7eb2e8f9f7 2241 */
<> 144:ef7eb2e8f9f7 2242 /**
<> 144:ef7eb2e8f9f7 2243 * @}
<> 144:ef7eb2e8f9f7 2244 */
<> 144:ef7eb2e8f9f7 2245
<> 144:ef7eb2e8f9f7 2246 /** @addtogroup GPIOEx_Private
<> 144:ef7eb2e8f9f7 2247 * @{
<> 144:ef7eb2e8f9f7 2248 */
<> 144:ef7eb2e8f9f7 2249 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
<> 144:ef7eb2e8f9f7 2250 ((__GPIOx__) == (GPIOB))? 1U :\
<> 144:ef7eb2e8f9f7 2251 ((__GPIOx__) == (GPIOC))? 2U :\
<> 144:ef7eb2e8f9f7 2252 ((__GPIOx__) == (GPIOD))? 3U :\
<> 144:ef7eb2e8f9f7 2253 ((__GPIOx__) == (GPIOH))? 5U : 6U)
<> 144:ef7eb2e8f9f7 2254
<> 144:ef7eb2e8f9f7 2255 #define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
<> 151:5eaa88a5bcc7 2256 ((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2257 (((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2258 (((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2259 (((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) || \
<> 151:5eaa88a5bcc7 2260 (((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0U) && (((__PIN__) | (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
<> 144:ef7eb2e8f9f7 2261 /**
<> 144:ef7eb2e8f9f7 2262 * @}
<> 144:ef7eb2e8f9f7 2263 */
<> 144:ef7eb2e8f9f7 2264
<> 144:ef7eb2e8f9f7 2265 #endif /* STM32L083xx || STM32L082xx || STM32L081xx || STM32L073xx || STM32L072xx || STM32L071xx*/
<> 144:ef7eb2e8f9f7 2266
<> 144:ef7eb2e8f9f7 2267
<> 144:ef7eb2e8f9f7 2268 /**
<> 144:ef7eb2e8f9f7 2269 * @}
<> 144:ef7eb2e8f9f7 2270 */
<> 144:ef7eb2e8f9f7 2271
<> 144:ef7eb2e8f9f7 2272 /**
<> 144:ef7eb2e8f9f7 2273 * @}
<> 144:ef7eb2e8f9f7 2274 */
<> 144:ef7eb2e8f9f7 2275 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 2276 }
<> 144:ef7eb2e8f9f7 2277 #endif
<> 144:ef7eb2e8f9f7 2278
<> 144:ef7eb2e8f9f7 2279 #endif /* __STM32L0xx_HAL_GPIO_EX_H */
<> 144:ef7eb2e8f9f7 2280
<> 144:ef7eb2e8f9f7 2281 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 2282