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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_flash_ramfunc.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
186:707f6e361f3e 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_flash_ramfunc.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief FLASH RAMFUNC driver.
<> 144:ef7eb2e8f9f7 6 * This file provides a Flash firmware functions which should be
<> 144:ef7eb2e8f9f7 7 * executed from internal SRAM
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * @verbatim
<> 144:ef7eb2e8f9f7 10
<> 144:ef7eb2e8f9f7 11 *** ARM Compiler ***
<> 144:ef7eb2e8f9f7 12 --------------------
<> 144:ef7eb2e8f9f7 13 [..] RAM functions are defined using the toolchain options.
<> 144:ef7eb2e8f9f7 14 Functions that are be executed in RAM should reside in a separate
<> 144:ef7eb2e8f9f7 15 source module. Using the 'Options for File' dialog you can simply change
<> 144:ef7eb2e8f9f7 16 the 'Code / Const' area of a module to a memory space in physical RAM.
<> 144:ef7eb2e8f9f7 17 Available memory areas are declared in the 'Target' tab of the
<> 144:ef7eb2e8f9f7 18 Options for Target' dialog.
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 *** ICCARM Compiler ***
<> 144:ef7eb2e8f9f7 21 -----------------------
<> 144:ef7eb2e8f9f7 22 [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 *** GNU Compiler ***
<> 144:ef7eb2e8f9f7 25 --------------------
<> 144:ef7eb2e8f9f7 26 [..] RAM functions are defined using a specific toolchain attribute
<> 144:ef7eb2e8f9f7 27 "__attribute__((section(".RamFunc")))".
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 @endverbatim
<> 144:ef7eb2e8f9f7 30 ******************************************************************************
<> 144:ef7eb2e8f9f7 31 * @attention
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 36 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 37 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 38 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 39 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 40 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 41 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 42 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 43 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 44 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 45 *
<> 144:ef7eb2e8f9f7 46 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 47 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 49 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 52 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 53 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 54 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 55 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 56 *
<> 144:ef7eb2e8f9f7 57 ******************************************************************************
Anna Bridge 186:707f6e361f3e 58 */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 61 #include "stm32l0xx_hal.h"
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 64 * @{
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 #ifdef HAL_FLASH_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 68
Anna Bridge 186:707f6e361f3e 69 /** @addtogroup FLASH
Anna Bridge 186:707f6e361f3e 70 * @{
Anna Bridge 186:707f6e361f3e 71 */
Anna Bridge 186:707f6e361f3e 72 /** @addtogroup FLASH_Private_Variables
Anna Bridge 186:707f6e361f3e 73 * @{
Anna Bridge 186:707f6e361f3e 74 */
Anna Bridge 186:707f6e361f3e 75 extern FLASH_ProcessTypeDef pFlash;
Anna Bridge 186:707f6e361f3e 76 /**
Anna Bridge 186:707f6e361f3e 77 * @}
Anna Bridge 186:707f6e361f3e 78 */
<> 144:ef7eb2e8f9f7 79
Anna Bridge 186:707f6e361f3e 80 /**
Anna Bridge 186:707f6e361f3e 81 * @}
Anna Bridge 186:707f6e361f3e 82 */
Anna Bridge 186:707f6e361f3e 83
Anna Bridge 186:707f6e361f3e 84 /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC
<> 144:ef7eb2e8f9f7 85 * @brief FLASH functions executed from RAM
<> 144:ef7eb2e8f9f7 86 * @{
Anna Bridge 186:707f6e361f3e 87 */
Anna Bridge 186:707f6e361f3e 88
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 91 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 92 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 93 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 94 /* Private function prototypes -----------------------------------------------*/
Anna Bridge 186:707f6e361f3e 95 /** @defgroup FLASH_RAMFUNC_Private_Functions FLASH RAM Private Functions
Anna Bridge 186:707f6e361f3e 96 * @{
Anna Bridge 186:707f6e361f3e 97 */
Anna Bridge 186:707f6e361f3e 98
<> 144:ef7eb2e8f9f7 99 static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout);
<> 144:ef7eb2e8f9f7 100 static __RAM_FUNC FLASHRAM_SetErrorCode(void);
Anna Bridge 186:707f6e361f3e 101
<> 144:ef7eb2e8f9f7 102 /**
<> 144:ef7eb2e8f9f7 103 * @}
<> 144:ef7eb2e8f9f7 104 */
<> 144:ef7eb2e8f9f7 105
Anna Bridge 186:707f6e361f3e 106 /* Private functions ---------------------------------------------------------*/
Anna Bridge 186:707f6e361f3e 107
Anna Bridge 186:707f6e361f3e 108 /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAM Exported Functions
<> 144:ef7eb2e8f9f7 109 *
Anna Bridge 186:707f6e361f3e 110 @verbatim
<> 144:ef7eb2e8f9f7 111 ===============================================================================
<> 144:ef7eb2e8f9f7 112 ##### ramfunc functions #####
<> 144:ef7eb2e8f9f7 113 ===============================================================================
<> 144:ef7eb2e8f9f7 114 [..]
<> 144:ef7eb2e8f9f7 115 This subsection provides a set of functions that should be executed from RAM
<> 144:ef7eb2e8f9f7 116 transfers.
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 @endverbatim
<> 144:ef7eb2e8f9f7 119 * @{
Anna Bridge 186:707f6e361f3e 120 */
<> 144:ef7eb2e8f9f7 121
Anna Bridge 186:707f6e361f3e 122 /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions
<> 144:ef7eb2e8f9f7 123 * @{
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /**
<> 144:ef7eb2e8f9f7 127 * @brief Enable the power down mode during RUN mode.
Anna Bridge 186:707f6e361f3e 128 * @note This function can be used only when the user code is running from Internal SRAM.
Anna Bridge 186:707f6e361f3e 129 * @retval HAL status
<> 144:ef7eb2e8f9f7 130 */
<> 144:ef7eb2e8f9f7 131 __RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void)
<> 144:ef7eb2e8f9f7 132 {
<> 144:ef7eb2e8f9f7 133 /* Enable the Power Down in Run mode*/
<> 144:ef7eb2e8f9f7 134 __HAL_FLASH_POWER_DOWN_ENABLE();
Anna Bridge 186:707f6e361f3e 135
<> 144:ef7eb2e8f9f7 136 return HAL_OK;
<> 144:ef7eb2e8f9f7 137 }
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 /**
<> 144:ef7eb2e8f9f7 140 * @brief Disable the power down mode during RUN mode.
Anna Bridge 186:707f6e361f3e 141 * @note This function can be used only when the user code is running from Internal SRAM.
Anna Bridge 186:707f6e361f3e 142 * @retval HAL status
<> 144:ef7eb2e8f9f7 143 */
<> 144:ef7eb2e8f9f7 144 __RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void)
<> 144:ef7eb2e8f9f7 145 {
<> 144:ef7eb2e8f9f7 146 /* Disable the Power Down in Run mode*/
<> 144:ef7eb2e8f9f7 147 __HAL_FLASH_POWER_DOWN_DISABLE();
Anna Bridge 186:707f6e361f3e 148
<> 144:ef7eb2e8f9f7 149 return HAL_OK;
<> 144:ef7eb2e8f9f7 150 }
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 /**
<> 144:ef7eb2e8f9f7 153 * @}
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155
Anna Bridge 186:707f6e361f3e 156 /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group2 Programming and erasing operation functions
<> 144:ef7eb2e8f9f7 157 *
<> 144:ef7eb2e8f9f7 158 @verbatim
<> 144:ef7eb2e8f9f7 159 @endverbatim
<> 144:ef7eb2e8f9f7 160 * @{
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162
Anna Bridge 186:707f6e361f3e 163 #if defined(FLASH_PECR_PARALLBANK)
<> 144:ef7eb2e8f9f7 164 /**
<> 144:ef7eb2e8f9f7 165 * @brief Erases a specified 2 pages in program memory in parallel.
<> 144:ef7eb2e8f9f7 166 * @note This function can be used only for STM32L07xxx/STM32L08xxx devices.
Anna Bridge 186:707f6e361f3e 167 * To correctly run this function, the @ref HAL_FLASH_Unlock() function
<> 144:ef7eb2e8f9f7 168 * must be called before.
Anna Bridge 186:707f6e361f3e 169 * Call the @ref HAL_FLASH_Lock() to disable the flash memory access
Anna Bridge 186:707f6e361f3e 170 * (recommended to protect the FLASH memory against possible unwanted operation).
<> 144:ef7eb2e8f9f7 171 * @param Page_Address1: The page address in program memory to be erased in
<> 144:ef7eb2e8f9f7 172 * the first Bank (BANK1). This parameter should be between FLASH_BASE
<> 144:ef7eb2e8f9f7 173 * and FLASH_BANK1_END.
<> 144:ef7eb2e8f9f7 174 * @param Page_Address2: The page address in program memory to be erased in
<> 144:ef7eb2e8f9f7 175 * the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE
<> 144:ef7eb2e8f9f7 176 * and FLASH_BANK2_END.
<> 144:ef7eb2e8f9f7 177 * @note A Page is erased in the Program memory only if the address to load
Anna Bridge 186:707f6e361f3e 178 * is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes).
Anna Bridge 186:707f6e361f3e 179 * @retval HAL status
<> 144:ef7eb2e8f9f7 180 */
<> 144:ef7eb2e8f9f7 181 __RAM_FUNC HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2)
<> 144:ef7eb2e8f9f7 182 {
<> 144:ef7eb2e8f9f7 183 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 186 status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 189 {
<> 144:ef7eb2e8f9f7 190 /* Proceed to erase the page */
<> 144:ef7eb2e8f9f7 191 SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
<> 144:ef7eb2e8f9f7 192 SET_BIT(FLASH->PECR, FLASH_PECR_ERASE);
<> 144:ef7eb2e8f9f7 193 SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /* Write 00000000h to the first word of the first program page to erase */
<> 151:5eaa88a5bcc7 196 *(__IO uint32_t *)Page_Address1 = 0x00000000U;
<> 144:ef7eb2e8f9f7 197 /* Write 00000000h to the first word of the second program page to erase */
Anna Bridge 186:707f6e361f3e 198 *(__IO uint32_t *)Page_Address2 = 0x00000000U;
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 201 status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */
<> 144:ef7eb2e8f9f7 204 CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
<> 144:ef7eb2e8f9f7 205 CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE);
<> 144:ef7eb2e8f9f7 206 CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
<> 144:ef7eb2e8f9f7 207 }
Anna Bridge 186:707f6e361f3e 208 /* Return the Erase Status */
<> 144:ef7eb2e8f9f7 209 return status;
<> 144:ef7eb2e8f9f7 210 }
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 /**
Anna Bridge 186:707f6e361f3e 213 * @brief Program 2 half pages in program memory in parallel (half page size is 16 Words).
Anna Bridge 186:707f6e361f3e 214 * @note This function can be used only for STM32L07xxx/STM32L08xxx devices.
<> 144:ef7eb2e8f9f7 215 * @param Address1: specifies the first address to be written in the first bank
Anna Bridge 186:707f6e361f3e 216 * (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_SIZE).
<> 144:ef7eb2e8f9f7 217 * @param pBuffer1: pointer to the buffer containing the data to be written
<> 144:ef7eb2e8f9f7 218 * to the first half page in the first bank.
<> 144:ef7eb2e8f9f7 219 * @param Address2: specifies the second address to be written in the second bank
Anna Bridge 186:707f6e361f3e 220 * (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_PAGE_SIZE).
<> 144:ef7eb2e8f9f7 221 * @param pBuffer2: pointer to the buffer containing the data to be written
<> 144:ef7eb2e8f9f7 222 * to the second half page in the second bank.
Anna Bridge 186:707f6e361f3e 223 * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function
<> 144:ef7eb2e8f9f7 224 * must be called before.
Anna Bridge 186:707f6e361f3e 225 * Call the @ref HAL_FLASH_Lock() to disable the flash memory access
<> 144:ef7eb2e8f9f7 226 * (recommended to protect the FLASH memory against possible unwanted operation).
<> 144:ef7eb2e8f9f7 227 * @note Half page write is possible only from SRAM.
<> 144:ef7eb2e8f9f7 228 * @note A half page is written to the program memory only if the first
<> 144:ef7eb2e8f9f7 229 * address to load is the start address of a half page (multiple of 64
<> 144:ef7eb2e8f9f7 230 * bytes) and the 15 remaining words to load are in the same half page.
<> 144:ef7eb2e8f9f7 231 * @note During the Program memory half page write all read operations are
<> 144:ef7eb2e8f9f7 232 * forbidden (this includes DMA read operations and debugger read
<> 144:ef7eb2e8f9f7 233 * operations such as breakpoints, periodic updates, etc.).
<> 144:ef7eb2e8f9f7 234 * @note If a PGAERR is set during a Program memory half page write, the
<> 144:ef7eb2e8f9f7 235 * complete write operation is aborted. Software should then reset the
<> 144:ef7eb2e8f9f7 236 * FPRG and PROG/DATA bits and restart the write operation from the
<> 144:ef7eb2e8f9f7 237 * beginning.
Anna Bridge 186:707f6e361f3e 238 * @retval HAL status
<> 144:ef7eb2e8f9f7 239 */
<> 144:ef7eb2e8f9f7 240 __RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2)
<> 144:ef7eb2e8f9f7 241 {
Anna Bridge 186:707f6e361f3e 242 uint32_t count = 0U;
Anna Bridge 186:707f6e361f3e 243 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 246 status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 249 {
<> 144:ef7eb2e8f9f7 250 /* Proceed to program the new half page */
<> 144:ef7eb2e8f9f7 251 SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
<> 144:ef7eb2e8f9f7 252 SET_BIT(FLASH->PECR, FLASH_PECR_FPRG);
<> 144:ef7eb2e8f9f7 253 SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 256 status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 257 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 258 {
<> 144:ef7eb2e8f9f7 259 /* Disable all IRQs */
<> 144:ef7eb2e8f9f7 260 __disable_irq();
<> 144:ef7eb2e8f9f7 261
Anna Bridge 186:707f6e361f3e 262 /* Write the first half page directly with 16 different words */
<> 151:5eaa88a5bcc7 263 while(count < 16U)
<> 144:ef7eb2e8f9f7 264 {
Anna Bridge 186:707f6e361f3e 265 /* Address1 doesn't need to be increased */
<> 144:ef7eb2e8f9f7 266 *(__IO uint32_t*) Address1 = *pBuffer1;
<> 144:ef7eb2e8f9f7 267 pBuffer1++;
Anna Bridge 186:707f6e361f3e 268 count ++;
<> 144:ef7eb2e8f9f7 269 }
Anna Bridge 186:707f6e361f3e 270
Anna Bridge 186:707f6e361f3e 271 /* Write the second half page directly with 16 different words */
<> 151:5eaa88a5bcc7 272 count = 0U;
<> 151:5eaa88a5bcc7 273 while(count < 16U)
<> 144:ef7eb2e8f9f7 274 {
Anna Bridge 186:707f6e361f3e 275 /* Address2 doesn't need to be increased */
<> 144:ef7eb2e8f9f7 276 *(__IO uint32_t*) Address2 = *pBuffer2;
<> 144:ef7eb2e8f9f7 277 pBuffer2++;
Anna Bridge 186:707f6e361f3e 278 count ++;
<> 144:ef7eb2e8f9f7 279 }
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 /* Enable IRQs */
<> 144:ef7eb2e8f9f7 282 __enable_irq();
Anna Bridge 186:707f6e361f3e 283
<> 144:ef7eb2e8f9f7 284 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 285 status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
Anna Bridge 186:707f6e361f3e 286 }
Anna Bridge 186:707f6e361f3e 287
<> 144:ef7eb2e8f9f7 288 /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */
<> 144:ef7eb2e8f9f7 289 CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
<> 144:ef7eb2e8f9f7 290 CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG);
<> 144:ef7eb2e8f9f7 291 CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK);
<> 144:ef7eb2e8f9f7 292 }
Anna Bridge 186:707f6e361f3e 293
<> 144:ef7eb2e8f9f7 294 /* Return the Write Status */
<> 144:ef7eb2e8f9f7 295 return status;
<> 144:ef7eb2e8f9f7 296 }
Anna Bridge 186:707f6e361f3e 297 #endif /* FLASH_PECR_PARALLBANK */
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /**
Anna Bridge 186:707f6e361f3e 300 * @brief Program a half page in program memory.
<> 144:ef7eb2e8f9f7 301 * @param Address: specifies the address to be written.
<> 144:ef7eb2e8f9f7 302 * @param pBuffer: pointer to the buffer containing the data to be written to
<> 144:ef7eb2e8f9f7 303 * the half page.
Anna Bridge 186:707f6e361f3e 304 * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function
<> 144:ef7eb2e8f9f7 305 * must be called before.
Anna Bridge 186:707f6e361f3e 306 * Call the @ref HAL_FLASH_Lock() to disable the flash memory access
<> 144:ef7eb2e8f9f7 307 * (recommended to protect the FLASH memory against possible unwanted operation)
<> 144:ef7eb2e8f9f7 308 * @note Half page write is possible only from SRAM.
<> 144:ef7eb2e8f9f7 309 * @note A half page is written to the program memory only if the first
<> 144:ef7eb2e8f9f7 310 * address to load is the start address of a half page (multiple of 64
<> 144:ef7eb2e8f9f7 311 * bytes) and the 15 remaining words to load are in the same half page.
<> 144:ef7eb2e8f9f7 312 * @note During the Program memory half page write all read operations are
<> 144:ef7eb2e8f9f7 313 * forbidden (this includes DMA read operations and debugger read
<> 144:ef7eb2e8f9f7 314 * operations such as breakpoints, periodic updates, etc.).
<> 144:ef7eb2e8f9f7 315 * @note If a PGAERR is set during a Program memory half page write, the
<> 144:ef7eb2e8f9f7 316 * complete write operation is aborted. Software should then reset the
<> 144:ef7eb2e8f9f7 317 * FPRG and PROG/DATA bits and restart the write operation from the
<> 144:ef7eb2e8f9f7 318 * beginning.
Anna Bridge 186:707f6e361f3e 319 * @retval HAL status
<> 144:ef7eb2e8f9f7 320 */
Anna Bridge 186:707f6e361f3e 321 __RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer)
<> 144:ef7eb2e8f9f7 322 {
Anna Bridge 186:707f6e361f3e 323 uint32_t count = 0U;
Anna Bridge 186:707f6e361f3e 324 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 327 status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
Anna Bridge 186:707f6e361f3e 328
<> 144:ef7eb2e8f9f7 329 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 330 {
<> 144:ef7eb2e8f9f7 331 /* Proceed to program the new half page */
<> 144:ef7eb2e8f9f7 332 SET_BIT(FLASH->PECR, FLASH_PECR_FPRG);
<> 144:ef7eb2e8f9f7 333 SET_BIT(FLASH->PECR, FLASH_PECR_PROG);
Anna Bridge 186:707f6e361f3e 334
<> 144:ef7eb2e8f9f7 335 /* Disable all IRQs */
<> 144:ef7eb2e8f9f7 336 __disable_irq();
<> 144:ef7eb2e8f9f7 337
Anna Bridge 186:707f6e361f3e 338 /* Write one half page directly with 16 different words */
<> 151:5eaa88a5bcc7 339 while(count < 16U)
<> 144:ef7eb2e8f9f7 340 {
Anna Bridge 186:707f6e361f3e 341 /* Address doesn't need to be increased */
<> 144:ef7eb2e8f9f7 342 *(__IO uint32_t*) Address = *pBuffer;
<> 144:ef7eb2e8f9f7 343 pBuffer++;
Anna Bridge 186:707f6e361f3e 344 count ++;
<> 144:ef7eb2e8f9f7 345 }
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 /* Enable IRQs */
<> 144:ef7eb2e8f9f7 348 __enable_irq();
Anna Bridge 186:707f6e361f3e 349
<> 144:ef7eb2e8f9f7 350 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 351 status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
Anna Bridge 186:707f6e361f3e 352
<> 144:ef7eb2e8f9f7 353 /* If the write operation is completed, disable the PROG and FPRG bits */
<> 144:ef7eb2e8f9f7 354 CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG);
<> 144:ef7eb2e8f9f7 355 CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG);
<> 144:ef7eb2e8f9f7 356 }
Anna Bridge 186:707f6e361f3e 357
Anna Bridge 186:707f6e361f3e 358 /* Return the Write Status */
<> 144:ef7eb2e8f9f7 359 return status;
<> 144:ef7eb2e8f9f7 360 }
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /**
Anna Bridge 186:707f6e361f3e 363 * @}
Anna Bridge 186:707f6e361f3e 364 */
Anna Bridge 186:707f6e361f3e 365
Anna Bridge 186:707f6e361f3e 366 /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group3 Peripheral errors functions
Anna Bridge 186:707f6e361f3e 367 * @brief Peripheral errors functions
Anna Bridge 186:707f6e361f3e 368 *
Anna Bridge 186:707f6e361f3e 369 @verbatim
Anna Bridge 186:707f6e361f3e 370 ===============================================================================
Anna Bridge 186:707f6e361f3e 371 ##### Peripheral errors functions #####
Anna Bridge 186:707f6e361f3e 372 ===============================================================================
Anna Bridge 186:707f6e361f3e 373 [..]
Anna Bridge 186:707f6e361f3e 374 This subsection permit to get in run-time errors of the FLASH peripheral.
Anna Bridge 186:707f6e361f3e 375
Anna Bridge 186:707f6e361f3e 376 @endverbatim
Anna Bridge 186:707f6e361f3e 377 * @{
Anna Bridge 186:707f6e361f3e 378 */
Anna Bridge 186:707f6e361f3e 379
Anna Bridge 186:707f6e361f3e 380 /**
<> 144:ef7eb2e8f9f7 381 * @brief Get the specific FLASH errors flag.
Anna Bridge 186:707f6e361f3e 382 * @param Error pointer is the error value. It can be a mixed of:
Anna Bridge 186:707f6e361f3e 383 * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP)
Anna Bridge 186:707f6e361f3e 384 * @arg @ref HAL_FLASH_ERROR_SIZE FLASH Programming Parallelism error flag
Anna Bridge 186:707f6e361f3e 385 * @arg @ref HAL_FLASH_ERROR_PGA FLASH Programming Alignment error flag
Anna Bridge 186:707f6e361f3e 386 * @arg @ref HAL_FLASH_ERROR_WRP FLASH Write protected error flag
Anna Bridge 186:707f6e361f3e 387 * @arg @ref HAL_FLASH_ERROR_OPTV FLASH Option valid error flag
Anna Bridge 186:707f6e361f3e 388 * @arg @ref HAL_FLASH_ERROR_FWWERR FLASH Write or Erase operation aborted
Anna Bridge 186:707f6e361f3e 389 * @arg @ref HAL_FLASH_ERROR_NOTZERO FLASH Write operation is done in a not-erased region
<> 144:ef7eb2e8f9f7 390 * @retval HAL Status
<> 144:ef7eb2e8f9f7 391 */
Anna Bridge 186:707f6e361f3e 392 __RAM_FUNC HAL_FLASHEx_GetError(uint32_t * Error)
<> 144:ef7eb2e8f9f7 393 {
Anna Bridge 186:707f6e361f3e 394 *Error = pFlash.ErrorCode;
<> 144:ef7eb2e8f9f7 395 return HAL_OK;
<> 144:ef7eb2e8f9f7 396 }
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 /**
<> 144:ef7eb2e8f9f7 399 * @}
<> 144:ef7eb2e8f9f7 400 */
<> 144:ef7eb2e8f9f7 401
<> 144:ef7eb2e8f9f7 402 /**
<> 144:ef7eb2e8f9f7 403 * @}
<> 144:ef7eb2e8f9f7 404 */
<> 144:ef7eb2e8f9f7 405
Anna Bridge 186:707f6e361f3e 406 /** @addtogroup FLASH_RAMFUNC_Private_Functions
<> 144:ef7eb2e8f9f7 407 * @{
<> 144:ef7eb2e8f9f7 408 */
<> 144:ef7eb2e8f9f7 409
<> 144:ef7eb2e8f9f7 410 /**
<> 144:ef7eb2e8f9f7 411 * @brief Set the specific FLASH error flag.
<> 144:ef7eb2e8f9f7 412 * @retval HAL Status
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414 static __RAM_FUNC FLASHRAM_SetErrorCode(void)
Anna Bridge 186:707f6e361f3e 415 {
Anna Bridge 186:707f6e361f3e 416 uint32_t flags = 0;
Anna Bridge 186:707f6e361f3e 417
<> 144:ef7eb2e8f9f7 418 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
Anna Bridge 186:707f6e361f3e 419 {
Anna Bridge 186:707f6e361f3e 420 pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
Anna Bridge 186:707f6e361f3e 421 flags |= FLASH_FLAG_WRPERR;
<> 144:ef7eb2e8f9f7 422 }
<> 144:ef7eb2e8f9f7 423 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR))
Anna Bridge 186:707f6e361f3e 424 {
Anna Bridge 186:707f6e361f3e 425 pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA;
Anna Bridge 186:707f6e361f3e 426 flags |= FLASH_FLAG_PGAERR;
<> 144:ef7eb2e8f9f7 427 }
<> 144:ef7eb2e8f9f7 428 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR))
<> 144:ef7eb2e8f9f7 429 {
Anna Bridge 186:707f6e361f3e 430 pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZE;
Anna Bridge 186:707f6e361f3e 431 flags |= FLASH_FLAG_SIZERR;
<> 144:ef7eb2e8f9f7 432 }
<> 144:ef7eb2e8f9f7 433 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
Anna Bridge 186:707f6e361f3e 434 {
<> 144:ef7eb2e8f9f7 435 /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices,
<> 151:5eaa88a5bcc7 436 * (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving
<> 144:ef7eb2e8f9f7 437 * as expected. If the user run an application using the first
<> 144:ef7eb2e8f9f7 438 * cut of the STM32L031xx device or the first cut of the STM32L041xx
<> 151:5eaa88a5bcc7 439 * device, this error should be ignored. The revId of the device
<> 144:ef7eb2e8f9f7 440 * can be retrieved via the HAL_GetREVID() function.
<> 144:ef7eb2e8f9f7 441 *
<> 144:ef7eb2e8f9f7 442 */
Anna Bridge 186:707f6e361f3e 443 pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
Anna Bridge 186:707f6e361f3e 444 flags |= FLASH_FLAG_OPTVERR;
<> 144:ef7eb2e8f9f7 445 }
Anna Bridge 186:707f6e361f3e 446
<> 144:ef7eb2e8f9f7 447 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR))
Anna Bridge 186:707f6e361f3e 448 {
Anna Bridge 186:707f6e361f3e 449 pFlash.ErrorCode |= HAL_FLASH_ERROR_RD;
Anna Bridge 186:707f6e361f3e 450 flags |= FLASH_FLAG_RDERR;
<> 144:ef7eb2e8f9f7 451 }
<> 144:ef7eb2e8f9f7 452 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR))
<> 144:ef7eb2e8f9f7 453 {
Anna Bridge 186:707f6e361f3e 454 pFlash.ErrorCode |= HAL_FLASH_ERROR_FWWERR;
Anna Bridge 186:707f6e361f3e 455 flags |= HAL_FLASH_ERROR_FWWERR;
<> 144:ef7eb2e8f9f7 456 }
<> 144:ef7eb2e8f9f7 457 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR))
<> 144:ef7eb2e8f9f7 458 {
Anna Bridge 186:707f6e361f3e 459 pFlash.ErrorCode |= HAL_FLASH_ERROR_NOTZERO;
Anna Bridge 186:707f6e361f3e 460 flags |= FLASH_FLAG_NOTZEROERR;
<> 144:ef7eb2e8f9f7 461 }
<> 144:ef7eb2e8f9f7 462
Anna Bridge 186:707f6e361f3e 463 /* Clear FLASH error pending bits */
Anna Bridge 186:707f6e361f3e 464 __HAL_FLASH_CLEAR_FLAG(flags);
Anna Bridge 186:707f6e361f3e 465
<> 144:ef7eb2e8f9f7 466 return HAL_OK;
Anna Bridge 186:707f6e361f3e 467 }
<> 144:ef7eb2e8f9f7 468
<> 144:ef7eb2e8f9f7 469 /**
<> 144:ef7eb2e8f9f7 470 * @brief Wait for a FLASH operation to complete.
<> 144:ef7eb2e8f9f7 471 * @param Timeout: maximum flash operationtimeout
<> 144:ef7eb2e8f9f7 472 * @retval HAL status
<> 144:ef7eb2e8f9f7 473 */
Anna Bridge 186:707f6e361f3e 474 static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout)
<> 144:ef7eb2e8f9f7 475 {
<> 144:ef7eb2e8f9f7 476 /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
<> 144:ef7eb2e8f9f7 477 Even if the FLASH operation fails, the BUSY flag will be reset and an error
<> 144:ef7eb2e8f9f7 478 flag will be set */
<> 144:ef7eb2e8f9f7 479
<> 151:5eaa88a5bcc7 480 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00U))
<> 144:ef7eb2e8f9f7 481 {
<> 144:ef7eb2e8f9f7 482 Timeout--;
<> 144:ef7eb2e8f9f7 483 }
<> 144:ef7eb2e8f9f7 484
Anna Bridge 186:707f6e361f3e 485 if(Timeout == 0x00U)
<> 144:ef7eb2e8f9f7 486 {
<> 144:ef7eb2e8f9f7 487 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 488 }
<> 144:ef7eb2e8f9f7 489
Anna Bridge 186:707f6e361f3e 490 /* Check FLASH End of Operation flag */
Anna Bridge 186:707f6e361f3e 491 if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
Anna Bridge 186:707f6e361f3e 492 {
Anna Bridge 186:707f6e361f3e 493 /* Clear FLASH End of Operation pending bit */
Anna Bridge 186:707f6e361f3e 494 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
Anna Bridge 186:707f6e361f3e 495 }
Anna Bridge 186:707f6e361f3e 496
Anna Bridge 186:707f6e361f3e 497 if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
Anna Bridge 186:707f6e361f3e 498 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) ||
Anna Bridge 186:707f6e361f3e 499 __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) ||
Anna Bridge 186:707f6e361f3e 500 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
Anna Bridge 186:707f6e361f3e 501 __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) ||
Anna Bridge 186:707f6e361f3e 502 __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) ||
Anna Bridge 186:707f6e361f3e 503 __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) )
Anna Bridge 186:707f6e361f3e 504 {
Anna Bridge 186:707f6e361f3e 505 /*Save the error code*/
<> 144:ef7eb2e8f9f7 506
Anna Bridge 186:707f6e361f3e 507 /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices,
Anna Bridge 186:707f6e361f3e 508 * (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving
Anna Bridge 186:707f6e361f3e 509 * as expected. If the user run an application using the first
Anna Bridge 186:707f6e361f3e 510 * cut of the STM32L031xx device or the first cut of the STM32L041xx
Anna Bridge 186:707f6e361f3e 511 * device, this error should be ignored. The revId of the device
Anna Bridge 186:707f6e361f3e 512 * can be retrieved via the HAL_GetREVID() function.
Anna Bridge 186:707f6e361f3e 513 *
Anna Bridge 186:707f6e361f3e 514 */
Anna Bridge 186:707f6e361f3e 515 FLASHRAM_SetErrorCode();
Anna Bridge 186:707f6e361f3e 516 return HAL_ERROR;
Anna Bridge 186:707f6e361f3e 517 }
<> 144:ef7eb2e8f9f7 518
Anna Bridge 186:707f6e361f3e 519 /* There is no error flag set */
Anna Bridge 186:707f6e361f3e 520 return HAL_OK;
<> 144:ef7eb2e8f9f7 521 }
<> 144:ef7eb2e8f9f7 522
<> 144:ef7eb2e8f9f7 523 /**
<> 144:ef7eb2e8f9f7 524 * @}
<> 144:ef7eb2e8f9f7 525 */
<> 144:ef7eb2e8f9f7 526
<> 144:ef7eb2e8f9f7 527 /**
<> 144:ef7eb2e8f9f7 528 * @}
<> 144:ef7eb2e8f9f7 529 */
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 #endif /* HAL_FLASH_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 532 /**
<> 144:ef7eb2e8f9f7 533 * @}
<> 144:ef7eb2e8f9f7 534 */
<> 144:ef7eb2e8f9f7 535
Anna Bridge 186:707f6e361f3e 536
<> 144:ef7eb2e8f9f7 537 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/