mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_cryp.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 186:707f6e361f3e
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32l0xx_hal_cryp.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @brief Header file of CRYP HAL module. |
<> | 144:ef7eb2e8f9f7 | 6 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 7 | * @attention |
<> | 144:ef7eb2e8f9f7 | 8 | * |
<> | 144:ef7eb2e8f9f7 | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 12 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 14 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 17 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 19 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 20 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 21 | * |
<> | 144:ef7eb2e8f9f7 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 32 | * |
<> | 144:ef7eb2e8f9f7 | 33 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 34 | */ |
<> | 144:ef7eb2e8f9f7 | 35 | |
<> | 144:ef7eb2e8f9f7 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 37 | #ifndef __STM32L0xx_HAL_CRYP_H |
<> | 144:ef7eb2e8f9f7 | 38 | #define __STM32L0xx_HAL_CRYP_H |
<> | 144:ef7eb2e8f9f7 | 39 | |
<> | 144:ef7eb2e8f9f7 | 40 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 41 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 42 | #endif |
<> | 144:ef7eb2e8f9f7 | 43 | |
Anna Bridge |
186:707f6e361f3e | 44 | #if defined (STM32L021xx) || defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 47 | #include "stm32l0xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | /** @addtogroup STM32L0xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 50 | * @{ |
<> | 144:ef7eb2e8f9f7 | 51 | */ |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | /** @defgroup CRYP CRYP |
<> | 144:ef7eb2e8f9f7 | 54 | * @{ |
<> | 144:ef7eb2e8f9f7 | 55 | */ |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 144:ef7eb2e8f9f7 | 57 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 58 | |
<> | 144:ef7eb2e8f9f7 | 59 | /** @defgroup CRYP_Exported_Types CRYP Exported Types |
<> | 144:ef7eb2e8f9f7 | 60 | * @{ |
<> | 144:ef7eb2e8f9f7 | 61 | */ |
<> | 144:ef7eb2e8f9f7 | 62 | |
<> | 144:ef7eb2e8f9f7 | 63 | /** |
<> | 144:ef7eb2e8f9f7 | 64 | * @brief CRYP Configuration Structure definition |
<> | 144:ef7eb2e8f9f7 | 65 | */ |
<> | 144:ef7eb2e8f9f7 | 66 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 67 | { |
<> | 144:ef7eb2e8f9f7 | 68 | uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. |
<> | 144:ef7eb2e8f9f7 | 69 | This parameter can be a value of @ref CRYP_Data_Type */ |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | uint8_t* pKey; /*!< The key used for encryption/decryption */ |
<> | 144:ef7eb2e8f9f7 | 72 | |
<> | 144:ef7eb2e8f9f7 | 73 | uint8_t* pInitVect; /*!< The initialization vector used also as initialization |
<> | 144:ef7eb2e8f9f7 | 74 | counter in CTR mode */ |
<> | 144:ef7eb2e8f9f7 | 75 | |
<> | 144:ef7eb2e8f9f7 | 76 | }CRYP_InitTypeDef; |
<> | 144:ef7eb2e8f9f7 | 77 | |
<> | 144:ef7eb2e8f9f7 | 78 | /** |
<> | 144:ef7eb2e8f9f7 | 79 | * @brief HAL CRYP State structures definition |
<> | 144:ef7eb2e8f9f7 | 80 | */ |
<> | 144:ef7eb2e8f9f7 | 81 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 82 | { |
<> | 151:5eaa88a5bcc7 | 83 | HAL_CRYP_STATE_RESET = 0x00U, /*!< CRYP not yet initialized or disabled */ |
<> | 151:5eaa88a5bcc7 | 84 | HAL_CRYP_STATE_READY = 0x01U, /*!< CRYP initialized and ready for use */ |
<> | 151:5eaa88a5bcc7 | 85 | HAL_CRYP_STATE_BUSY = 0x02U, /*!< CRYP internal processing is ongoing */ |
<> | 151:5eaa88a5bcc7 | 86 | HAL_CRYP_STATE_TIMEOUT = 0x03U, /*!< CRYP timeout state */ |
<> | 151:5eaa88a5bcc7 | 87 | HAL_CRYP_STATE_ERROR = 0x04U /*!< CRYP error state */ |
<> | 144:ef7eb2e8f9f7 | 88 | |
<> | 144:ef7eb2e8f9f7 | 89 | }HAL_CRYP_STATETypeDef; |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 144:ef7eb2e8f9f7 | 91 | /** |
<> | 144:ef7eb2e8f9f7 | 92 | * @brief HAL CRYP phase structures definition |
<> | 144:ef7eb2e8f9f7 | 93 | */ |
<> | 144:ef7eb2e8f9f7 | 94 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 95 | { |
<> | 151:5eaa88a5bcc7 | 96 | HAL_CRYP_PHASE_READY = 0x01U, /*!< CRYP peripheral is ready for initialization. */ |
<> | 151:5eaa88a5bcc7 | 97 | HAL_CRYP_PHASE_PROCESS = 0x02U, /*!< CRYP peripheral is in processing phase */ |
<> | 144:ef7eb2e8f9f7 | 98 | }HAL_PhaseTypeDef; |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | /** |
<> | 144:ef7eb2e8f9f7 | 101 | * @brief CRYP handle Structure definition |
<> | 144:ef7eb2e8f9f7 | 102 | */ |
<> | 144:ef7eb2e8f9f7 | 103 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 104 | { |
<> | 144:ef7eb2e8f9f7 | 105 | AES_TypeDef *Instance; /*!< Register base address */ |
<> | 144:ef7eb2e8f9f7 | 106 | |
<> | 144:ef7eb2e8f9f7 | 107 | CRYP_InitTypeDef Init; /*!< CRYP required parameters */ |
<> | 144:ef7eb2e8f9f7 | 108 | |
<> | 144:ef7eb2e8f9f7 | 109 | uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */ |
<> | 144:ef7eb2e8f9f7 | 110 | |
<> | 144:ef7eb2e8f9f7 | 111 | uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */ |
<> | 144:ef7eb2e8f9f7 | 112 | |
<> | 144:ef7eb2e8f9f7 | 113 | __IO uint16_t CrypInCount; /*!< Counter of inputed data */ |
<> | 144:ef7eb2e8f9f7 | 114 | |
<> | 144:ef7eb2e8f9f7 | 115 | __IO uint16_t CrypOutCount; /*!< Counter of outputed data */ |
<> | 144:ef7eb2e8f9f7 | 116 | |
<> | 144:ef7eb2e8f9f7 | 117 | HAL_StatusTypeDef Status; /*!< CRYP peripheral status */ |
<> | 144:ef7eb2e8f9f7 | 118 | |
<> | 144:ef7eb2e8f9f7 | 119 | HAL_PhaseTypeDef Phase; /*!< CRYP peripheral phase */ |
<> | 144:ef7eb2e8f9f7 | 120 | |
<> | 144:ef7eb2e8f9f7 | 121 | DMA_HandleTypeDef *hdmain; /*!< CRYP In DMA handle parameters */ |
<> | 144:ef7eb2e8f9f7 | 122 | |
<> | 144:ef7eb2e8f9f7 | 123 | DMA_HandleTypeDef *hdmaout; /*!< CRYP Out DMA handle parameters */ |
<> | 144:ef7eb2e8f9f7 | 124 | |
<> | 144:ef7eb2e8f9f7 | 125 | HAL_LockTypeDef Lock; /*!< CRYP locking object */ |
<> | 144:ef7eb2e8f9f7 | 126 | |
<> | 144:ef7eb2e8f9f7 | 127 | __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ |
<> | 144:ef7eb2e8f9f7 | 128 | |
<> | 144:ef7eb2e8f9f7 | 129 | }CRYP_HandleTypeDef; |
<> | 144:ef7eb2e8f9f7 | 130 | |
<> | 144:ef7eb2e8f9f7 | 131 | /** |
<> | 144:ef7eb2e8f9f7 | 132 | * @} |
<> | 144:ef7eb2e8f9f7 | 133 | */ |
<> | 144:ef7eb2e8f9f7 | 134 | |
<> | 144:ef7eb2e8f9f7 | 135 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | /** @defgroup CRYP_Exported_Constants CRYP Exported Constants |
<> | 144:ef7eb2e8f9f7 | 138 | * @{ |
<> | 144:ef7eb2e8f9f7 | 139 | */ |
<> | 144:ef7eb2e8f9f7 | 140 | |
<> | 144:ef7eb2e8f9f7 | 141 | /** @defgroup CRYP_Data_Type CRYP Data Type |
<> | 144:ef7eb2e8f9f7 | 142 | * @{ |
<> | 144:ef7eb2e8f9f7 | 143 | */ |
<> | 151:5eaa88a5bcc7 | 144 | #define CRYP_DATATYPE_32B ((uint32_t)0x00000000U) |
<> | 144:ef7eb2e8f9f7 | 145 | #define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 |
<> | 144:ef7eb2e8f9f7 | 146 | #define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 |
<> | 144:ef7eb2e8f9f7 | 147 | #define CRYP_DATATYPE_1B AES_CR_DATATYPE |
<> | 144:ef7eb2e8f9f7 | 148 | |
<> | 144:ef7eb2e8f9f7 | 149 | #define IS_CRYP_DATATYPE(DATATYPE) (((DATATYPE) == CRYP_DATATYPE_32B) || \ |
<> | 144:ef7eb2e8f9f7 | 150 | ((DATATYPE) == CRYP_DATATYPE_16B) || \ |
<> | 144:ef7eb2e8f9f7 | 151 | ((DATATYPE) == CRYP_DATATYPE_8B) || \ |
<> | 144:ef7eb2e8f9f7 | 152 | ((DATATYPE) == CRYP_DATATYPE_1B)) |
<> | 144:ef7eb2e8f9f7 | 153 | /** |
<> | 144:ef7eb2e8f9f7 | 154 | * @} |
<> | 144:ef7eb2e8f9f7 | 155 | */ |
<> | 144:ef7eb2e8f9f7 | 156 | |
<> | 144:ef7eb2e8f9f7 | 157 | /** @defgroup CRYP_AlgoModeDirection CRYP Algo Mode Direction |
<> | 144:ef7eb2e8f9f7 | 158 | * @{ |
<> | 144:ef7eb2e8f9f7 | 159 | */ |
<> | 144:ef7eb2e8f9f7 | 160 | #define CRYP_CR_ALGOMODE_DIRECTION (uint32_t)(AES_CR_MODE|AES_CR_CHMOD) |
<> | 144:ef7eb2e8f9f7 | 161 | |
<> | 151:5eaa88a5bcc7 | 162 | #define CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT ((uint32_t)0x00000000U) |
<> | 144:ef7eb2e8f9f7 | 163 | #define CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT (AES_CR_MODE) |
<> | 144:ef7eb2e8f9f7 | 164 | #define CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT (AES_CR_CHMOD_0) |
<> | 144:ef7eb2e8f9f7 | 165 | #define CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT ((uint32_t)(AES_CR_CHMOD_0|AES_CR_MODE)) |
<> | 144:ef7eb2e8f9f7 | 166 | #define CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT (AES_CR_CHMOD_1) |
<> | 144:ef7eb2e8f9f7 | 167 | #define CRYP_CR_ALGOMODE_AES_CTR_DECRYPT ((uint32_t)(AES_CR_CHMOD_1 | AES_CR_MODE_1)) |
<> | 144:ef7eb2e8f9f7 | 168 | /** |
<> | 144:ef7eb2e8f9f7 | 169 | * @} |
<> | 144:ef7eb2e8f9f7 | 170 | */ |
<> | 144:ef7eb2e8f9f7 | 171 | |
<> | 144:ef7eb2e8f9f7 | 172 | /** @defgroup CRYP_AES_Interrupts AES Interrupts |
<> | 144:ef7eb2e8f9f7 | 173 | * @{ |
<> | 144:ef7eb2e8f9f7 | 174 | */ |
<> | 144:ef7eb2e8f9f7 | 175 | #define CRYP_IT_CC AES_CR_CCIE /*!< Computation Complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 176 | #define CRYP_IT_ERR AES_CR_ERRIE /*!< Error interrupt */ |
<> | 144:ef7eb2e8f9f7 | 177 | |
<> | 144:ef7eb2e8f9f7 | 178 | /** |
<> | 144:ef7eb2e8f9f7 | 179 | * @} |
<> | 144:ef7eb2e8f9f7 | 180 | */ |
<> | 144:ef7eb2e8f9f7 | 181 | |
<> | 144:ef7eb2e8f9f7 | 182 | |
<> | 144:ef7eb2e8f9f7 | 183 | /** @defgroup CRYP_AES_Flags AES Flags |
<> | 144:ef7eb2e8f9f7 | 184 | * @{ |
<> | 144:ef7eb2e8f9f7 | 185 | */ |
<> | 144:ef7eb2e8f9f7 | 186 | #define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation Complete Flag */ |
<> | 144:ef7eb2e8f9f7 | 187 | #define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read Error Flag */ |
<> | 144:ef7eb2e8f9f7 | 188 | #define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error Flag */ |
<> | 144:ef7eb2e8f9f7 | 189 | |
<> | 144:ef7eb2e8f9f7 | 190 | /** |
<> | 144:ef7eb2e8f9f7 | 191 | * @} |
<> | 144:ef7eb2e8f9f7 | 192 | */ |
<> | 144:ef7eb2e8f9f7 | 193 | |
<> | 144:ef7eb2e8f9f7 | 194 | /** @defgroup CRYP_AES_Clear_Flags AES Clear Flags |
<> | 144:ef7eb2e8f9f7 | 195 | * @{ |
<> | 144:ef7eb2e8f9f7 | 196 | */ |
<> | 144:ef7eb2e8f9f7 | 197 | #define CRYP_CLEARFLAG_CCF AES_CR_CCFC /*!< Computation Complete Flag Clear */ |
<> | 144:ef7eb2e8f9f7 | 198 | #define CRYP_CLEARFLAG_RDERR AES_CR_ERRC /*!< Read Error Clear */ |
<> | 144:ef7eb2e8f9f7 | 199 | #define CRYP_CLEARFLAG_WRERR AES_CR_ERRC /*!< Write Error Clear */ |
<> | 144:ef7eb2e8f9f7 | 200 | |
<> | 144:ef7eb2e8f9f7 | 201 | /** |
<> | 144:ef7eb2e8f9f7 | 202 | * @} |
<> | 144:ef7eb2e8f9f7 | 203 | */ |
<> | 144:ef7eb2e8f9f7 | 204 | |
<> | 144:ef7eb2e8f9f7 | 205 | /** |
<> | 144:ef7eb2e8f9f7 | 206 | * @} |
<> | 144:ef7eb2e8f9f7 | 207 | */ |
<> | 144:ef7eb2e8f9f7 | 208 | |
<> | 144:ef7eb2e8f9f7 | 209 | /* Exported macro ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 210 | |
<> | 144:ef7eb2e8f9f7 | 211 | /** @defgroup CRYP_Exported_Macros CRYP Exported Macros |
<> | 144:ef7eb2e8f9f7 | 212 | * @{ |
<> | 144:ef7eb2e8f9f7 | 213 | */ |
<> | 144:ef7eb2e8f9f7 | 214 | |
<> | 144:ef7eb2e8f9f7 | 215 | /** @brief Reset CRYP handle state |
<> | 144:ef7eb2e8f9f7 | 216 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 217 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 218 | */ |
<> | 144:ef7eb2e8f9f7 | 219 | #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) |
<> | 144:ef7eb2e8f9f7 | 220 | |
<> | 144:ef7eb2e8f9f7 | 221 | /** |
<> | 144:ef7eb2e8f9f7 | 222 | * @brief Enable/Disable the CRYP peripheral. |
<> | 144:ef7eb2e8f9f7 | 223 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 224 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 225 | */ |
<> | 144:ef7eb2e8f9f7 | 226 | #define __HAL_CRYP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, AES_CR_EN) |
<> | 144:ef7eb2e8f9f7 | 227 | #define __HAL_CRYP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, AES_CR_EN) |
<> | 144:ef7eb2e8f9f7 | 228 | |
<> | 144:ef7eb2e8f9f7 | 229 | /** |
<> | 144:ef7eb2e8f9f7 | 230 | * @brief Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC,... |
<> | 144:ef7eb2e8f9f7 | 231 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 232 | * @param __MODE__: The algorithm mode. |
<> | 144:ef7eb2e8f9f7 | 233 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 234 | */ |
<> | 144:ef7eb2e8f9f7 | 235 | #define __HAL_CRYP_SET_MODE(__HANDLE__,__MODE__) SET_BIT((__HANDLE__)->Instance->CR, (__MODE__)) |
<> | 144:ef7eb2e8f9f7 | 236 | |
<> | 144:ef7eb2e8f9f7 | 237 | |
<> | 144:ef7eb2e8f9f7 | 238 | /** @brief Check whether the specified CRYP flag is set or not. |
<> | 144:ef7eb2e8f9f7 | 239 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 240 | * @param __FLAG__: specifies the flag to check. |
<> | 144:ef7eb2e8f9f7 | 241 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 242 | * @arg CRYP_FLAG_CCF : Computation Complete Flag |
<> | 144:ef7eb2e8f9f7 | 243 | * @arg CRYP_FLAG_RDERR : Read Error Flag |
<> | 144:ef7eb2e8f9f7 | 244 | * @arg CRYP_FLAG_WRERR : Write Error Flag |
<> | 144:ef7eb2e8f9f7 | 245 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
<> | 144:ef7eb2e8f9f7 | 246 | */ |
<> | 144:ef7eb2e8f9f7 | 247 | #define __HAL_CRYP_GET_FLAG(__HANDLE__,__FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
<> | 144:ef7eb2e8f9f7 | 248 | |
<> | 144:ef7eb2e8f9f7 | 249 | /** @brief Clear the CRYP pending flag. |
<> | 144:ef7eb2e8f9f7 | 250 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 251 | * @param __FLAG__: specifies the flag to clear. |
<> | 144:ef7eb2e8f9f7 | 252 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 253 | * @arg CRYP_CLEARFLAG_CCF : Computation Complete Clear Flag |
<> | 144:ef7eb2e8f9f7 | 254 | * @arg CRYP_CLEARFLAG_RDERR : Read Error Clear |
<> | 144:ef7eb2e8f9f7 | 255 | * @arg CRYP_CLEARFLAG_WRERR : Write Error Clear |
<> | 144:ef7eb2e8f9f7 | 256 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 257 | */ |
<> | 144:ef7eb2e8f9f7 | 258 | #define __HAL_CRYP_CLEAR_FLAG(__HANDLE__, __FLAG__) SET_BIT((__HANDLE__)->Instance->CR, (__FLAG__)) |
<> | 144:ef7eb2e8f9f7 | 259 | |
<> | 144:ef7eb2e8f9f7 | 260 | /** |
<> | 144:ef7eb2e8f9f7 | 261 | * @brief Enable the CRYP interrupt. |
<> | 144:ef7eb2e8f9f7 | 262 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 263 | * @param __INTERRUPT__: CRYP Interrupt. |
<> | 144:ef7eb2e8f9f7 | 264 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 265 | */ |
<> | 144:ef7eb2e8f9f7 | 266 | #define __HAL_CRYP_ENABLE_IT(__HANDLE__,__INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 267 | |
<> | 144:ef7eb2e8f9f7 | 268 | /** |
<> | 144:ef7eb2e8f9f7 | 269 | * @brief Disable the CRYP interrupt. |
<> | 144:ef7eb2e8f9f7 | 270 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 271 | * @param __INTERRUPT__: CRYP interrupt. |
<> | 144:ef7eb2e8f9f7 | 272 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 273 | */ |
<> | 144:ef7eb2e8f9f7 | 274 | #define __HAL_CRYP_DISABLE_IT(__HANDLE__,__INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 275 | |
<> | 144:ef7eb2e8f9f7 | 276 | /** @brief Checks if the specified CRYP interrupt source is enabled or disabled. |
<> | 144:ef7eb2e8f9f7 | 277 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 278 | * @param __INTERRUPT__: CRYP interrupt source to check |
<> | 144:ef7eb2e8f9f7 | 279 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 280 | * @arg CRYP_IT_CC : Computation Complete interrupt |
<> | 144:ef7eb2e8f9f7 | 281 | * @arg CRYP_IT_ERR : Error interrupt (used for RDERR and WRERR) |
<> | 144:ef7eb2e8f9f7 | 282 | * @retval State of interruption (SET or RESET) |
<> | 144:ef7eb2e8f9f7 | 283 | */ |
<> | 144:ef7eb2e8f9f7 | 284 | #define __HAL_CRYP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
<> | 144:ef7eb2e8f9f7 | 285 | (( ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__) \ |
<> | 144:ef7eb2e8f9f7 | 286 | )? SET : RESET \ |
<> | 144:ef7eb2e8f9f7 | 287 | ) |
<> | 144:ef7eb2e8f9f7 | 288 | |
<> | 144:ef7eb2e8f9f7 | 289 | /** @brief Clear the CRYP pending IT. |
<> | 144:ef7eb2e8f9f7 | 290 | * @param __HANDLE__: specifies the CRYP handle. |
<> | 144:ef7eb2e8f9f7 | 291 | * @param __IT__: specifies the IT to clear. |
<> | 144:ef7eb2e8f9f7 | 292 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 293 | * @arg CRYP_CLEARFLAG_CCF : Computation Complete Clear Flag |
<> | 144:ef7eb2e8f9f7 | 294 | * @arg CRYP_CLEARFLAG_RDERR : Read Error Clear |
<> | 144:ef7eb2e8f9f7 | 295 | * @arg CRYP_CLEARFLAG_WRERR : Write Error Clear |
<> | 144:ef7eb2e8f9f7 | 296 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 297 | */ |
<> | 144:ef7eb2e8f9f7 | 298 | #define __HAL_CRYP_CLEAR_IT(__HANDLE__, __IT__) SET_BIT((__HANDLE__)->Instance->CR, (__IT__)) |
<> | 144:ef7eb2e8f9f7 | 299 | |
<> | 144:ef7eb2e8f9f7 | 300 | /** |
<> | 144:ef7eb2e8f9f7 | 301 | * @} |
<> | 144:ef7eb2e8f9f7 | 302 | */ |
<> | 144:ef7eb2e8f9f7 | 303 | |
<> | 144:ef7eb2e8f9f7 | 304 | /* Include CRYP HAL Extension module */ |
<> | 144:ef7eb2e8f9f7 | 305 | #include "stm32l0xx_hal_cryp_ex.h" |
<> | 144:ef7eb2e8f9f7 | 306 | |
<> | 144:ef7eb2e8f9f7 | 307 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 308 | |
<> | 144:ef7eb2e8f9f7 | 309 | /** @defgroup CRYP_Exported_Functions CRYP Exported Functions |
<> | 144:ef7eb2e8f9f7 | 310 | * @{ |
<> | 144:ef7eb2e8f9f7 | 311 | */ |
<> | 144:ef7eb2e8f9f7 | 312 | |
<> | 144:ef7eb2e8f9f7 | 313 | /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions |
<> | 144:ef7eb2e8f9f7 | 314 | * @{ |
<> | 144:ef7eb2e8f9f7 | 315 | */ |
<> | 144:ef7eb2e8f9f7 | 316 | |
<> | 144:ef7eb2e8f9f7 | 317 | /* Initialization/de-initialization functions *********************************/ |
<> | 144:ef7eb2e8f9f7 | 318 | HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 319 | HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 320 | |
<> | 144:ef7eb2e8f9f7 | 321 | /* MSP functions *************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 322 | void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 323 | void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 324 | |
<> | 144:ef7eb2e8f9f7 | 325 | /** |
<> | 144:ef7eb2e8f9f7 | 326 | * @} |
<> | 144:ef7eb2e8f9f7 | 327 | */ |
<> | 144:ef7eb2e8f9f7 | 328 | |
<> | 144:ef7eb2e8f9f7 | 329 | /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions |
<> | 144:ef7eb2e8f9f7 | 330 | * @{ |
<> | 144:ef7eb2e8f9f7 | 331 | */ |
<> | 144:ef7eb2e8f9f7 | 332 | |
<> | 144:ef7eb2e8f9f7 | 333 | /* AES encryption/decryption using polling ***********************************/ |
<> | 144:ef7eb2e8f9f7 | 334 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 335 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 336 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 337 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 338 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 339 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 340 | |
<> | 144:ef7eb2e8f9f7 | 341 | /* AES encryption/decryption using interrupt *********************************/ |
<> | 144:ef7eb2e8f9f7 | 342 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
<> | 144:ef7eb2e8f9f7 | 343 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
<> | 144:ef7eb2e8f9f7 | 344 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
<> | 144:ef7eb2e8f9f7 | 345 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
<> | 144:ef7eb2e8f9f7 | 346 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
<> | 144:ef7eb2e8f9f7 | 347 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
<> | 144:ef7eb2e8f9f7 | 348 | |
<> | 144:ef7eb2e8f9f7 | 349 | /* AES encryption/decryption using DMA ***************************************/ |
<> | 144:ef7eb2e8f9f7 | 350 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
<> | 144:ef7eb2e8f9f7 | 351 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
<> | 144:ef7eb2e8f9f7 | 352 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
<> | 144:ef7eb2e8f9f7 | 353 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
<> | 144:ef7eb2e8f9f7 | 354 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); |
<> | 144:ef7eb2e8f9f7 | 355 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); |
<> | 144:ef7eb2e8f9f7 | 356 | |
<> | 144:ef7eb2e8f9f7 | 357 | /** |
<> | 144:ef7eb2e8f9f7 | 358 | * @} |
<> | 144:ef7eb2e8f9f7 | 359 | */ |
<> | 144:ef7eb2e8f9f7 | 360 | |
<> | 144:ef7eb2e8f9f7 | 361 | /** @addtogroup CRYP_Exported_Functions_Group3 DMA callback functions |
<> | 144:ef7eb2e8f9f7 | 362 | * @{ |
<> | 144:ef7eb2e8f9f7 | 363 | */ |
<> | 144:ef7eb2e8f9f7 | 364 | |
<> | 144:ef7eb2e8f9f7 | 365 | /* CallBack functions ********************************************************/ |
<> | 144:ef7eb2e8f9f7 | 366 | void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 367 | void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 368 | void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 369 | |
<> | 144:ef7eb2e8f9f7 | 370 | /** |
<> | 144:ef7eb2e8f9f7 | 371 | * @} |
<> | 144:ef7eb2e8f9f7 | 372 | */ |
<> | 144:ef7eb2e8f9f7 | 373 | |
<> | 144:ef7eb2e8f9f7 | 374 | /** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler |
<> | 144:ef7eb2e8f9f7 | 375 | * @{ |
<> | 144:ef7eb2e8f9f7 | 376 | */ |
<> | 144:ef7eb2e8f9f7 | 377 | |
<> | 144:ef7eb2e8f9f7 | 378 | /* Processing functions ********************************************************/ |
<> | 144:ef7eb2e8f9f7 | 379 | void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 380 | |
<> | 144:ef7eb2e8f9f7 | 381 | /** |
<> | 144:ef7eb2e8f9f7 | 382 | * @} |
<> | 144:ef7eb2e8f9f7 | 383 | */ |
<> | 144:ef7eb2e8f9f7 | 384 | |
<> | 144:ef7eb2e8f9f7 | 385 | /** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 386 | * @{ |
<> | 144:ef7eb2e8f9f7 | 387 | */ |
<> | 144:ef7eb2e8f9f7 | 388 | |
<> | 144:ef7eb2e8f9f7 | 389 | /* Peripheral State functions **************************************************/ |
<> | 144:ef7eb2e8f9f7 | 390 | HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); |
<> | 144:ef7eb2e8f9f7 | 391 | |
<> | 144:ef7eb2e8f9f7 | 392 | /** |
<> | 144:ef7eb2e8f9f7 | 393 | * @} |
<> | 144:ef7eb2e8f9f7 | 394 | */ |
<> | 144:ef7eb2e8f9f7 | 395 | |
<> | 144:ef7eb2e8f9f7 | 396 | /** |
<> | 144:ef7eb2e8f9f7 | 397 | * @} |
<> | 144:ef7eb2e8f9f7 | 398 | */ |
<> | 144:ef7eb2e8f9f7 | 399 | |
<> | 144:ef7eb2e8f9f7 | 400 | /* Define the private group ***********************************/ |
<> | 144:ef7eb2e8f9f7 | 401 | /**************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 402 | /** @defgroup CRYP_Private CRYP Private |
<> | 144:ef7eb2e8f9f7 | 403 | * @{ |
<> | 144:ef7eb2e8f9f7 | 404 | */ |
<> | 144:ef7eb2e8f9f7 | 405 | /** |
<> | 144:ef7eb2e8f9f7 | 406 | * @} |
<> | 144:ef7eb2e8f9f7 | 407 | */ |
<> | 144:ef7eb2e8f9f7 | 408 | /**************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 409 | |
<> | 144:ef7eb2e8f9f7 | 410 | |
<> | 144:ef7eb2e8f9f7 | 411 | /** |
<> | 144:ef7eb2e8f9f7 | 412 | * @} |
<> | 144:ef7eb2e8f9f7 | 413 | */ |
<> | 144:ef7eb2e8f9f7 | 414 | |
<> | 144:ef7eb2e8f9f7 | 415 | /** |
<> | 144:ef7eb2e8f9f7 | 416 | * @} |
<> | 144:ef7eb2e8f9f7 | 417 | */ |
<> | 144:ef7eb2e8f9f7 | 418 | |
<> | 144:ef7eb2e8f9f7 | 419 | #endif /* STM32L021xx || STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
<> | 144:ef7eb2e8f9f7 | 420 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 421 | } |
<> | 144:ef7eb2e8f9f7 | 422 | #endif |
<> | 144:ef7eb2e8f9f7 | 423 | |
<> | 144:ef7eb2e8f9f7 | 424 | #endif /* __STM32L0xx_HAL_CRYP_H */ |
<> | 144:ef7eb2e8f9f7 | 425 | |
<> | 144:ef7eb2e8f9f7 | 426 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
<> | 144:ef7eb2e8f9f7 | 427 |