mbed official
mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32H7/serial_device.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /* mbed Microcontroller Library |
| AnnaBridge | 189:f392fc9709a3 | 2 | ******************************************************************************* |
| AnnaBridge | 189:f392fc9709a3 | 3 | * Copyright (c) 2017, STMicroelectronics |
| AnnaBridge | 189:f392fc9709a3 | 4 | * All rights reserved. |
| AnnaBridge | 189:f392fc9709a3 | 5 | * |
| AnnaBridge | 189:f392fc9709a3 | 6 | * Redistribution and use in source and binary forms, with or without |
| AnnaBridge | 189:f392fc9709a3 | 7 | * modification, are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 10 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 13 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 15 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 16 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 17 | * |
| AnnaBridge | 189:f392fc9709a3 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 28 | ******************************************************************************* |
| AnnaBridge | 189:f392fc9709a3 | 29 | */ |
| AnnaBridge | 189:f392fc9709a3 | 30 | |
| AnnaBridge | 189:f392fc9709a3 | 31 | #if DEVICE_SERIAL |
| AnnaBridge | 189:f392fc9709a3 | 32 | |
| AnnaBridge | 189:f392fc9709a3 | 33 | #include "serial_api_hal.h" |
| AnnaBridge | 189:f392fc9709a3 | 34 | |
| AnnaBridge | 189:f392fc9709a3 | 35 | #define UART_NUM (9) |
| AnnaBridge | 189:f392fc9709a3 | 36 | uint32_t serial_irq_ids[UART_NUM] = {0}; |
| AnnaBridge | 189:f392fc9709a3 | 37 | UART_HandleTypeDef uart_handlers[UART_NUM]; |
| AnnaBridge | 189:f392fc9709a3 | 38 | |
| AnnaBridge | 189:f392fc9709a3 | 39 | static uart_irq_handler irq_handler; |
| AnnaBridge | 189:f392fc9709a3 | 40 | |
| AnnaBridge | 189:f392fc9709a3 | 41 | // Defined in serial_api.c |
| AnnaBridge | 189:f392fc9709a3 | 42 | extern int8_t get_uart_index(UARTName uart_name); |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | /****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 45 | * INTERRUPTS HANDLING |
| AnnaBridge | 189:f392fc9709a3 | 46 | ******************************************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 47 | |
| AnnaBridge | 189:f392fc9709a3 | 48 | static void uart_irq(UARTName uart_name) |
| AnnaBridge | 189:f392fc9709a3 | 49 | { |
| AnnaBridge | 189:f392fc9709a3 | 50 | int8_t id = get_uart_index(uart_name); |
| AnnaBridge | 189:f392fc9709a3 | 51 | |
| AnnaBridge | 189:f392fc9709a3 | 52 | if (id >= 0) { |
| AnnaBridge | 189:f392fc9709a3 | 53 | UART_HandleTypeDef *huart = &uart_handlers[id]; |
| AnnaBridge | 189:f392fc9709a3 | 54 | if (serial_irq_ids[id] != 0) { |
| AnnaBridge | 189:f392fc9709a3 | 55 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 56 | if (__HAL_UART_GET_IT(huart, UART_IT_TXE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 57 | irq_handler(serial_irq_ids[id], TxIrq); |
| AnnaBridge | 189:f392fc9709a3 | 58 | } |
| AnnaBridge | 189:f392fc9709a3 | 59 | } |
| AnnaBridge | 189:f392fc9709a3 | 60 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 61 | if (__HAL_UART_GET_IT(huart, UART_IT_RXNE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 62 | irq_handler(serial_irq_ids[id], RxIrq); |
| AnnaBridge | 189:f392fc9709a3 | 63 | /* Flag has been cleared when reading the content */ |
| AnnaBridge | 189:f392fc9709a3 | 64 | } |
| AnnaBridge | 189:f392fc9709a3 | 65 | } |
| AnnaBridge | 189:f392fc9709a3 | 66 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 67 | if (__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 68 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF); |
| AnnaBridge | 189:f392fc9709a3 | 69 | } |
| AnnaBridge | 189:f392fc9709a3 | 70 | } |
| AnnaBridge | 189:f392fc9709a3 | 71 | } |
| AnnaBridge | 189:f392fc9709a3 | 72 | } |
| AnnaBridge | 189:f392fc9709a3 | 73 | } |
| AnnaBridge | 189:f392fc9709a3 | 74 | |
| AnnaBridge | 189:f392fc9709a3 | 75 | #if defined(USART1_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 76 | static void uart1_irq(void) |
| AnnaBridge | 189:f392fc9709a3 | 77 | { |
| AnnaBridge | 189:f392fc9709a3 | 78 | uart_irq(UART_1); |
| AnnaBridge | 189:f392fc9709a3 | 79 | } |
| AnnaBridge | 189:f392fc9709a3 | 80 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 81 | |
| AnnaBridge | 189:f392fc9709a3 | 82 | #if defined(USART2_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 83 | static void uart2_irq(void) |
| AnnaBridge | 189:f392fc9709a3 | 84 | { |
| AnnaBridge | 189:f392fc9709a3 | 85 | uart_irq(UART_2); |
| AnnaBridge | 189:f392fc9709a3 | 86 | } |
| AnnaBridge | 189:f392fc9709a3 | 87 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 88 | |
| AnnaBridge | 189:f392fc9709a3 | 89 | #if defined(USART3_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 90 | static void uart3_irq(void) |
| AnnaBridge | 189:f392fc9709a3 | 91 | { |
| AnnaBridge | 189:f392fc9709a3 | 92 | uart_irq(UART_3); |
| AnnaBridge | 189:f392fc9709a3 | 93 | } |
| AnnaBridge | 189:f392fc9709a3 | 94 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 95 | |
| AnnaBridge | 189:f392fc9709a3 | 96 | #if defined(UART4_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 97 | static void uart4_irq(void) |
| AnnaBridge | 189:f392fc9709a3 | 98 | { |
| AnnaBridge | 189:f392fc9709a3 | 99 | uart_irq(UART_4); |
| AnnaBridge | 189:f392fc9709a3 | 100 | } |
| AnnaBridge | 189:f392fc9709a3 | 101 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 102 | |
| AnnaBridge | 189:f392fc9709a3 | 103 | #if defined(UART5_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 104 | static void uart5_irq(void) |
| AnnaBridge | 189:f392fc9709a3 | 105 | { |
| AnnaBridge | 189:f392fc9709a3 | 106 | uart_irq(UART_5); |
| AnnaBridge | 189:f392fc9709a3 | 107 | } |
| AnnaBridge | 189:f392fc9709a3 | 108 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 109 | |
| AnnaBridge | 189:f392fc9709a3 | 110 | #if defined(USART6_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 111 | static void uart6_irq(void) |
| AnnaBridge | 189:f392fc9709a3 | 112 | { |
| AnnaBridge | 189:f392fc9709a3 | 113 | uart_irq(UART_6); |
| AnnaBridge | 189:f392fc9709a3 | 114 | } |
| AnnaBridge | 189:f392fc9709a3 | 115 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 116 | |
| AnnaBridge | 189:f392fc9709a3 | 117 | #if defined(UART7_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 118 | static void uart7_irq(void) |
| AnnaBridge | 189:f392fc9709a3 | 119 | { |
| AnnaBridge | 189:f392fc9709a3 | 120 | uart_irq(UART_7); |
| AnnaBridge | 189:f392fc9709a3 | 121 | } |
| AnnaBridge | 189:f392fc9709a3 | 122 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 123 | |
| AnnaBridge | 189:f392fc9709a3 | 124 | #if defined(UART8_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 125 | static void uart8_irq(void) |
| AnnaBridge | 189:f392fc9709a3 | 126 | { |
| AnnaBridge | 189:f392fc9709a3 | 127 | uart_irq(UART_8); |
| AnnaBridge | 189:f392fc9709a3 | 128 | } |
| AnnaBridge | 189:f392fc9709a3 | 129 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 130 | |
| AnnaBridge | 189:f392fc9709a3 | 131 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) |
| AnnaBridge | 189:f392fc9709a3 | 132 | { |
| AnnaBridge | 189:f392fc9709a3 | 133 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 134 | |
| AnnaBridge | 189:f392fc9709a3 | 135 | irq_handler = handler; |
| AnnaBridge | 189:f392fc9709a3 | 136 | serial_irq_ids[obj_s->index] = id; |
| AnnaBridge | 189:f392fc9709a3 | 137 | } |
| AnnaBridge | 189:f392fc9709a3 | 138 | |
| AnnaBridge | 189:f392fc9709a3 | 139 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) |
| AnnaBridge | 189:f392fc9709a3 | 140 | { |
| AnnaBridge | 189:f392fc9709a3 | 141 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 142 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 143 | IRQn_Type irq_n = (IRQn_Type)0; |
| AnnaBridge | 189:f392fc9709a3 | 144 | uint32_t vector = 0; |
| AnnaBridge | 189:f392fc9709a3 | 145 | |
| AnnaBridge | 189:f392fc9709a3 | 146 | switch (obj_s->uart) { |
| AnnaBridge | 189:f392fc9709a3 | 147 | #if defined(USART1_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 148 | case UART_1: |
| AnnaBridge | 189:f392fc9709a3 | 149 | irq_n = USART1_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 150 | vector = (uint32_t)&uart1_irq; |
| AnnaBridge | 189:f392fc9709a3 | 151 | break; |
| AnnaBridge | 189:f392fc9709a3 | 152 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 153 | #if defined(USART2_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 154 | case UART_2: |
| AnnaBridge | 189:f392fc9709a3 | 155 | irq_n = USART2_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 156 | vector = (uint32_t)&uart2_irq; |
| AnnaBridge | 189:f392fc9709a3 | 157 | break; |
| AnnaBridge | 189:f392fc9709a3 | 158 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 159 | #if defined(USART3_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 160 | case UART_3: |
| AnnaBridge | 189:f392fc9709a3 | 161 | irq_n = USART3_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 162 | vector = (uint32_t)&uart3_irq; |
| AnnaBridge | 189:f392fc9709a3 | 163 | break; |
| AnnaBridge | 189:f392fc9709a3 | 164 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 165 | #if defined(UART4_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 166 | case UART_4: |
| AnnaBridge | 189:f392fc9709a3 | 167 | irq_n = UART4_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 168 | vector = (uint32_t)&uart4_irq; |
| AnnaBridge | 189:f392fc9709a3 | 169 | break; |
| AnnaBridge | 189:f392fc9709a3 | 170 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 171 | #if defined(UART5_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 172 | case UART_5: |
| AnnaBridge | 189:f392fc9709a3 | 173 | irq_n = UART5_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 174 | vector = (uint32_t)&uart5_irq; |
| AnnaBridge | 189:f392fc9709a3 | 175 | break; |
| AnnaBridge | 189:f392fc9709a3 | 176 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 177 | #if defined(USART6_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 178 | case UART_6: |
| AnnaBridge | 189:f392fc9709a3 | 179 | irq_n = USART6_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 180 | vector = (uint32_t)&uart6_irq; |
| AnnaBridge | 189:f392fc9709a3 | 181 | break; |
| AnnaBridge | 189:f392fc9709a3 | 182 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 183 | #if defined(UART7_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 184 | case UART_7: |
| AnnaBridge | 189:f392fc9709a3 | 185 | irq_n = UART7_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 186 | vector = (uint32_t)&uart7_irq; |
| AnnaBridge | 189:f392fc9709a3 | 187 | break; |
| AnnaBridge | 189:f392fc9709a3 | 188 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 189 | #if defined(UART8_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 190 | case UART_8: |
| AnnaBridge | 189:f392fc9709a3 | 191 | irq_n = UART8_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 192 | vector = (uint32_t)&uart8_irq; |
| AnnaBridge | 189:f392fc9709a3 | 193 | break; |
| AnnaBridge | 189:f392fc9709a3 | 194 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 195 | } |
| AnnaBridge | 189:f392fc9709a3 | 196 | |
| AnnaBridge | 189:f392fc9709a3 | 197 | if (enable) { |
| AnnaBridge | 189:f392fc9709a3 | 198 | if (irq == RxIrq) { |
| AnnaBridge | 189:f392fc9709a3 | 199 | __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); |
| AnnaBridge | 189:f392fc9709a3 | 200 | } else { // TxIrq |
| AnnaBridge | 189:f392fc9709a3 | 201 | __HAL_UART_ENABLE_IT(huart, UART_IT_TXE); |
| AnnaBridge | 189:f392fc9709a3 | 202 | } |
| AnnaBridge | 189:f392fc9709a3 | 203 | NVIC_SetVector(irq_n, vector); |
| AnnaBridge | 189:f392fc9709a3 | 204 | NVIC_EnableIRQ(irq_n); |
| AnnaBridge | 189:f392fc9709a3 | 205 | |
| AnnaBridge | 189:f392fc9709a3 | 206 | } else { // disable |
| AnnaBridge | 189:f392fc9709a3 | 207 | int all_disabled = 0; |
| AnnaBridge | 189:f392fc9709a3 | 208 | if (irq == RxIrq) { |
| AnnaBridge | 189:f392fc9709a3 | 209 | __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); |
| AnnaBridge | 189:f392fc9709a3 | 210 | // Check if TxIrq is disabled too |
| AnnaBridge | 189:f392fc9709a3 | 211 | if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) { |
| AnnaBridge | 189:f392fc9709a3 | 212 | all_disabled = 1; |
| AnnaBridge | 189:f392fc9709a3 | 213 | } |
| AnnaBridge | 189:f392fc9709a3 | 214 | } else { // TxIrq |
| AnnaBridge | 189:f392fc9709a3 | 215 | __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); |
| AnnaBridge | 189:f392fc9709a3 | 216 | // Check if RxIrq is disabled too |
| AnnaBridge | 189:f392fc9709a3 | 217 | if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) { |
| AnnaBridge | 189:f392fc9709a3 | 218 | all_disabled = 1; |
| AnnaBridge | 189:f392fc9709a3 | 219 | } |
| AnnaBridge | 189:f392fc9709a3 | 220 | } |
| AnnaBridge | 189:f392fc9709a3 | 221 | |
| AnnaBridge | 189:f392fc9709a3 | 222 | if (all_disabled) { |
| AnnaBridge | 189:f392fc9709a3 | 223 | NVIC_DisableIRQ(irq_n); |
| AnnaBridge | 189:f392fc9709a3 | 224 | } |
| AnnaBridge | 189:f392fc9709a3 | 225 | } |
| AnnaBridge | 189:f392fc9709a3 | 226 | } |
| AnnaBridge | 189:f392fc9709a3 | 227 | |
| AnnaBridge | 189:f392fc9709a3 | 228 | /****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 229 | * READ/WRITE |
| AnnaBridge | 189:f392fc9709a3 | 230 | ******************************************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 231 | |
| AnnaBridge | 189:f392fc9709a3 | 232 | int serial_getc(serial_t *obj) |
| AnnaBridge | 189:f392fc9709a3 | 233 | { |
| AnnaBridge | 189:f392fc9709a3 | 234 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 235 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 236 | |
| AnnaBridge | 189:f392fc9709a3 | 237 | while (!serial_readable(obj)); |
| AnnaBridge | 189:f392fc9709a3 | 238 | return (int)(huart->Instance->RDR & 0x1FF); |
| AnnaBridge | 189:f392fc9709a3 | 239 | } |
| AnnaBridge | 189:f392fc9709a3 | 240 | |
| AnnaBridge | 189:f392fc9709a3 | 241 | void serial_putc(serial_t *obj, int c) |
| AnnaBridge | 189:f392fc9709a3 | 242 | { |
| AnnaBridge | 189:f392fc9709a3 | 243 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 244 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 245 | |
| AnnaBridge | 189:f392fc9709a3 | 246 | while (!serial_writable(obj)); |
| AnnaBridge | 189:f392fc9709a3 | 247 | huart->Instance->TDR = (uint32_t)(c & 0x1FF); |
| AnnaBridge | 189:f392fc9709a3 | 248 | } |
| AnnaBridge | 189:f392fc9709a3 | 249 | |
| AnnaBridge | 189:f392fc9709a3 | 250 | void serial_clear(serial_t *obj) |
| AnnaBridge | 189:f392fc9709a3 | 251 | { |
| AnnaBridge | 189:f392fc9709a3 | 252 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 253 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 254 | |
| AnnaBridge | 189:f392fc9709a3 | 255 | __HAL_UART_CLEAR_IT(huart, UART_FLAG_TXE); |
| AnnaBridge | 189:f392fc9709a3 | 256 | __HAL_UART_CLEAR_IT(huart, UART_FLAG_RXNE); |
| AnnaBridge | 189:f392fc9709a3 | 257 | } |
| AnnaBridge | 189:f392fc9709a3 | 258 | |
| AnnaBridge | 189:f392fc9709a3 | 259 | void serial_break_set(serial_t *obj) |
| AnnaBridge | 189:f392fc9709a3 | 260 | { |
| AnnaBridge | 189:f392fc9709a3 | 261 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 262 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 263 | |
| AnnaBridge | 189:f392fc9709a3 | 264 | HAL_LIN_SendBreak(huart); |
| AnnaBridge | 189:f392fc9709a3 | 265 | } |
| AnnaBridge | 189:f392fc9709a3 | 266 | |
| AnnaBridge | 189:f392fc9709a3 | 267 | #if DEVICE_SERIAL_ASYNCH |
| AnnaBridge | 189:f392fc9709a3 | 268 | |
| AnnaBridge | 189:f392fc9709a3 | 269 | /****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 270 | * LOCAL HELPER FUNCTIONS |
| AnnaBridge | 189:f392fc9709a3 | 271 | ******************************************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 272 | |
| AnnaBridge | 189:f392fc9709a3 | 273 | /** |
| AnnaBridge | 189:f392fc9709a3 | 274 | * Configure the TX buffer for an asynchronous write serial transaction |
| AnnaBridge | 189:f392fc9709a3 | 275 | * |
| AnnaBridge | 189:f392fc9709a3 | 276 | * @param obj The serial object. |
| AnnaBridge | 189:f392fc9709a3 | 277 | * @param tx The buffer for sending. |
| AnnaBridge | 189:f392fc9709a3 | 278 | * @param tx_length The number of words to transmit. |
| AnnaBridge | 189:f392fc9709a3 | 279 | */ |
| AnnaBridge | 189:f392fc9709a3 | 280 | static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width) |
| AnnaBridge | 189:f392fc9709a3 | 281 | { |
| AnnaBridge | 189:f392fc9709a3 | 282 | (void)width; |
| AnnaBridge | 189:f392fc9709a3 | 283 | |
| AnnaBridge | 189:f392fc9709a3 | 284 | // Exit if a transmit is already on-going |
| AnnaBridge | 189:f392fc9709a3 | 285 | if (serial_tx_active(obj)) { |
| AnnaBridge | 189:f392fc9709a3 | 286 | return; |
| AnnaBridge | 189:f392fc9709a3 | 287 | } |
| AnnaBridge | 189:f392fc9709a3 | 288 | |
| AnnaBridge | 189:f392fc9709a3 | 289 | obj->tx_buff.buffer = tx; |
| AnnaBridge | 189:f392fc9709a3 | 290 | obj->tx_buff.length = tx_length; |
| AnnaBridge | 189:f392fc9709a3 | 291 | obj->tx_buff.pos = 0; |
| AnnaBridge | 189:f392fc9709a3 | 292 | } |
| AnnaBridge | 189:f392fc9709a3 | 293 | |
| AnnaBridge | 189:f392fc9709a3 | 294 | /** |
| AnnaBridge | 189:f392fc9709a3 | 295 | * Configure the RX buffer for an asynchronous write serial transaction |
| AnnaBridge | 189:f392fc9709a3 | 296 | * |
| AnnaBridge | 189:f392fc9709a3 | 297 | * @param obj The serial object. |
| AnnaBridge | 189:f392fc9709a3 | 298 | * @param tx The buffer for sending. |
| AnnaBridge | 189:f392fc9709a3 | 299 | * @param tx_length The number of words to transmit. |
| AnnaBridge | 189:f392fc9709a3 | 300 | */ |
| AnnaBridge | 189:f392fc9709a3 | 301 | static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width) |
| AnnaBridge | 189:f392fc9709a3 | 302 | { |
| AnnaBridge | 189:f392fc9709a3 | 303 | (void)width; |
| AnnaBridge | 189:f392fc9709a3 | 304 | |
| AnnaBridge | 189:f392fc9709a3 | 305 | // Exit if a reception is already on-going |
| AnnaBridge | 189:f392fc9709a3 | 306 | if (serial_rx_active(obj)) { |
| AnnaBridge | 189:f392fc9709a3 | 307 | return; |
| AnnaBridge | 189:f392fc9709a3 | 308 | } |
| AnnaBridge | 189:f392fc9709a3 | 309 | |
| AnnaBridge | 189:f392fc9709a3 | 310 | obj->rx_buff.buffer = rx; |
| AnnaBridge | 189:f392fc9709a3 | 311 | obj->rx_buff.length = rx_length; |
| AnnaBridge | 189:f392fc9709a3 | 312 | obj->rx_buff.pos = 0; |
| AnnaBridge | 189:f392fc9709a3 | 313 | } |
| AnnaBridge | 189:f392fc9709a3 | 314 | |
| AnnaBridge | 189:f392fc9709a3 | 315 | /** |
| AnnaBridge | 189:f392fc9709a3 | 316 | * Configure events |
| AnnaBridge | 189:f392fc9709a3 | 317 | * |
| AnnaBridge | 189:f392fc9709a3 | 318 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 319 | * @param event The logical OR of the events to configure |
| AnnaBridge | 189:f392fc9709a3 | 320 | * @param enable Set to non-zero to enable events, or zero to disable them |
| AnnaBridge | 189:f392fc9709a3 | 321 | */ |
| AnnaBridge | 189:f392fc9709a3 | 322 | static void serial_enable_event(serial_t *obj, int event, uint8_t enable) |
| AnnaBridge | 189:f392fc9709a3 | 323 | { |
| AnnaBridge | 189:f392fc9709a3 | 324 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 325 | |
| AnnaBridge | 189:f392fc9709a3 | 326 | // Shouldn't have to enable interrupt here, just need to keep track of the requested events. |
| AnnaBridge | 189:f392fc9709a3 | 327 | if (enable) { |
| AnnaBridge | 189:f392fc9709a3 | 328 | obj_s->events |= event; |
| AnnaBridge | 189:f392fc9709a3 | 329 | } else { |
| AnnaBridge | 189:f392fc9709a3 | 330 | obj_s->events &= ~event; |
| AnnaBridge | 189:f392fc9709a3 | 331 | } |
| AnnaBridge | 189:f392fc9709a3 | 332 | } |
| AnnaBridge | 189:f392fc9709a3 | 333 | |
| AnnaBridge | 189:f392fc9709a3 | 334 | |
| AnnaBridge | 189:f392fc9709a3 | 335 | /** |
| AnnaBridge | 189:f392fc9709a3 | 336 | * Get index of serial object TX IRQ, relating it to the physical peripheral. |
| AnnaBridge | 189:f392fc9709a3 | 337 | * |
| AnnaBridge | 189:f392fc9709a3 | 338 | * @param uart_name i.e. UART_1, UART_2, ... |
| AnnaBridge | 189:f392fc9709a3 | 339 | * @return internal NVIC TX IRQ index of U(S)ART peripheral |
| AnnaBridge | 189:f392fc9709a3 | 340 | */ |
| AnnaBridge | 189:f392fc9709a3 | 341 | static IRQn_Type serial_get_irq_n(UARTName uart_name) |
| AnnaBridge | 189:f392fc9709a3 | 342 | { |
| AnnaBridge | 189:f392fc9709a3 | 343 | IRQn_Type irq_n; |
| AnnaBridge | 189:f392fc9709a3 | 344 | |
| AnnaBridge | 189:f392fc9709a3 | 345 | switch (uart_name) { |
| AnnaBridge | 189:f392fc9709a3 | 346 | #if defined(USART1_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 347 | case UART_1: |
| AnnaBridge | 189:f392fc9709a3 | 348 | irq_n = USART1_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 349 | break; |
| AnnaBridge | 189:f392fc9709a3 | 350 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 351 | #if defined(USART2_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 352 | case UART_2: |
| AnnaBridge | 189:f392fc9709a3 | 353 | irq_n = USART2_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 354 | break; |
| AnnaBridge | 189:f392fc9709a3 | 355 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 356 | #if defined(USART3_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 357 | case UART_3: |
| AnnaBridge | 189:f392fc9709a3 | 358 | irq_n = USART3_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 359 | break; |
| AnnaBridge | 189:f392fc9709a3 | 360 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 361 | #if defined(UART4_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 362 | case UART_4: |
| AnnaBridge | 189:f392fc9709a3 | 363 | irq_n = UART4_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 364 | break; |
| AnnaBridge | 189:f392fc9709a3 | 365 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 366 | #if defined(UART5_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 367 | case UART_5: |
| AnnaBridge | 189:f392fc9709a3 | 368 | irq_n = UART5_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 369 | break; |
| AnnaBridge | 189:f392fc9709a3 | 370 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 371 | #if defined(USART6_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 372 | case UART_6: |
| AnnaBridge | 189:f392fc9709a3 | 373 | irq_n = USART6_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 374 | break; |
| AnnaBridge | 189:f392fc9709a3 | 375 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 376 | #if defined(UART7_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 377 | case UART_7: |
| AnnaBridge | 189:f392fc9709a3 | 378 | irq_n = UART7_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 379 | break; |
| AnnaBridge | 189:f392fc9709a3 | 380 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 381 | #if defined(UART8_BASE) |
| AnnaBridge | 189:f392fc9709a3 | 382 | case UART_8: |
| AnnaBridge | 189:f392fc9709a3 | 383 | irq_n = UART8_IRQn; |
| AnnaBridge | 189:f392fc9709a3 | 384 | break; |
| AnnaBridge | 189:f392fc9709a3 | 385 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 386 | default: |
| AnnaBridge | 189:f392fc9709a3 | 387 | irq_n = (IRQn_Type)0; |
| AnnaBridge | 189:f392fc9709a3 | 388 | } |
| AnnaBridge | 189:f392fc9709a3 | 389 | |
| AnnaBridge | 189:f392fc9709a3 | 390 | return irq_n; |
| AnnaBridge | 189:f392fc9709a3 | 391 | } |
| AnnaBridge | 189:f392fc9709a3 | 392 | |
| AnnaBridge | 189:f392fc9709a3 | 393 | /****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 394 | * MBED API FUNCTIONS |
| AnnaBridge | 189:f392fc9709a3 | 395 | ******************************************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 396 | |
| AnnaBridge | 189:f392fc9709a3 | 397 | /** |
| AnnaBridge | 189:f392fc9709a3 | 398 | * Begin asynchronous TX transfer. The used buffer is specified in the serial |
| AnnaBridge | 189:f392fc9709a3 | 399 | * object, tx_buff |
| AnnaBridge | 189:f392fc9709a3 | 400 | * |
| AnnaBridge | 189:f392fc9709a3 | 401 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 402 | * @param tx The buffer for sending |
| AnnaBridge | 189:f392fc9709a3 | 403 | * @param tx_length The number of words to transmit |
| AnnaBridge | 189:f392fc9709a3 | 404 | * @param tx_width The bit width of buffer word |
| AnnaBridge | 189:f392fc9709a3 | 405 | * @param handler The serial handler |
| AnnaBridge | 189:f392fc9709a3 | 406 | * @param event The logical OR of events to be registered |
| AnnaBridge | 189:f392fc9709a3 | 407 | * @param hint A suggestion for how to use DMA with this transfer |
| AnnaBridge | 189:f392fc9709a3 | 408 | * @return Returns number of data transfered, or 0 otherwise |
| AnnaBridge | 189:f392fc9709a3 | 409 | */ |
| AnnaBridge | 189:f392fc9709a3 | 410 | int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint) |
| AnnaBridge | 189:f392fc9709a3 | 411 | { |
| AnnaBridge | 189:f392fc9709a3 | 412 | // TODO: DMA usage is currently ignored |
| AnnaBridge | 189:f392fc9709a3 | 413 | (void) hint; |
| AnnaBridge | 189:f392fc9709a3 | 414 | |
| AnnaBridge | 189:f392fc9709a3 | 415 | // Check buffer is ok |
| AnnaBridge | 189:f392fc9709a3 | 416 | MBED_ASSERT(tx != (void *)0); |
| AnnaBridge | 189:f392fc9709a3 | 417 | MBED_ASSERT(tx_width == 8); // support only 8b width |
| AnnaBridge | 189:f392fc9709a3 | 418 | |
| AnnaBridge | 189:f392fc9709a3 | 419 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 420 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 421 | |
| AnnaBridge | 189:f392fc9709a3 | 422 | if (tx_length == 0) { |
| AnnaBridge | 189:f392fc9709a3 | 423 | return 0; |
| AnnaBridge | 189:f392fc9709a3 | 424 | } |
| AnnaBridge | 189:f392fc9709a3 | 425 | |
| AnnaBridge | 189:f392fc9709a3 | 426 | // Set up buffer |
| AnnaBridge | 189:f392fc9709a3 | 427 | serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width); |
| AnnaBridge | 189:f392fc9709a3 | 428 | |
| AnnaBridge | 189:f392fc9709a3 | 429 | // Set up events |
| AnnaBridge | 189:f392fc9709a3 | 430 | serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events |
| AnnaBridge | 189:f392fc9709a3 | 431 | serial_enable_event(obj, event, 1); // Set only the wanted events |
| AnnaBridge | 189:f392fc9709a3 | 432 | |
| AnnaBridge | 189:f392fc9709a3 | 433 | // Enable interrupt |
| AnnaBridge | 189:f392fc9709a3 | 434 | IRQn_Type irq_n = serial_get_irq_n(obj_s->uart); |
| AnnaBridge | 189:f392fc9709a3 | 435 | NVIC_ClearPendingIRQ(irq_n); |
| AnnaBridge | 189:f392fc9709a3 | 436 | NVIC_DisableIRQ(irq_n); |
| AnnaBridge | 189:f392fc9709a3 | 437 | NVIC_SetPriority(irq_n, 1); |
| AnnaBridge | 189:f392fc9709a3 | 438 | NVIC_SetVector(irq_n, (uint32_t)handler); |
| AnnaBridge | 189:f392fc9709a3 | 439 | NVIC_EnableIRQ(irq_n); |
| AnnaBridge | 189:f392fc9709a3 | 440 | |
| AnnaBridge | 189:f392fc9709a3 | 441 | // the following function will enable UART_IT_TXE and error interrupts |
| AnnaBridge | 189:f392fc9709a3 | 442 | if (HAL_UART_Transmit_IT(huart, (uint8_t *)tx, tx_length) != HAL_OK) { |
| AnnaBridge | 189:f392fc9709a3 | 443 | return 0; |
| AnnaBridge | 189:f392fc9709a3 | 444 | } |
| AnnaBridge | 189:f392fc9709a3 | 445 | |
| AnnaBridge | 189:f392fc9709a3 | 446 | return tx_length; |
| AnnaBridge | 189:f392fc9709a3 | 447 | } |
| AnnaBridge | 189:f392fc9709a3 | 448 | |
| AnnaBridge | 189:f392fc9709a3 | 449 | /** |
| AnnaBridge | 189:f392fc9709a3 | 450 | * Begin asynchronous RX transfer (enable interrupt for data collecting) |
| AnnaBridge | 189:f392fc9709a3 | 451 | * The used buffer is specified in the serial object, rx_buff |
| AnnaBridge | 189:f392fc9709a3 | 452 | * |
| AnnaBridge | 189:f392fc9709a3 | 453 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 454 | * @param rx The buffer for sending |
| AnnaBridge | 189:f392fc9709a3 | 455 | * @param rx_length The number of words to transmit |
| AnnaBridge | 189:f392fc9709a3 | 456 | * @param rx_width The bit width of buffer word |
| AnnaBridge | 189:f392fc9709a3 | 457 | * @param handler The serial handler |
| AnnaBridge | 189:f392fc9709a3 | 458 | * @param event The logical OR of events to be registered |
| AnnaBridge | 189:f392fc9709a3 | 459 | * @param handler The serial handler |
| AnnaBridge | 189:f392fc9709a3 | 460 | * @param char_match A character in range 0-254 to be matched |
| AnnaBridge | 189:f392fc9709a3 | 461 | * @param hint A suggestion for how to use DMA with this transfer |
| AnnaBridge | 189:f392fc9709a3 | 462 | */ |
| AnnaBridge | 189:f392fc9709a3 | 463 | void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint) |
| AnnaBridge | 189:f392fc9709a3 | 464 | { |
| AnnaBridge | 189:f392fc9709a3 | 465 | // TODO: DMA usage is currently ignored |
| AnnaBridge | 189:f392fc9709a3 | 466 | (void) hint; |
| AnnaBridge | 189:f392fc9709a3 | 467 | |
| AnnaBridge | 189:f392fc9709a3 | 468 | /* Sanity check arguments */ |
| AnnaBridge | 189:f392fc9709a3 | 469 | MBED_ASSERT(obj); |
| AnnaBridge | 189:f392fc9709a3 | 470 | MBED_ASSERT(rx != (void *)0); |
| AnnaBridge | 189:f392fc9709a3 | 471 | MBED_ASSERT(rx_width == 8); // support only 8b width |
| AnnaBridge | 189:f392fc9709a3 | 472 | |
| AnnaBridge | 189:f392fc9709a3 | 473 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 474 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 475 | |
| AnnaBridge | 189:f392fc9709a3 | 476 | serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0); |
| AnnaBridge | 189:f392fc9709a3 | 477 | serial_enable_event(obj, event, 1); |
| AnnaBridge | 189:f392fc9709a3 | 478 | |
| AnnaBridge | 189:f392fc9709a3 | 479 | // set CharMatch |
| AnnaBridge | 189:f392fc9709a3 | 480 | obj->char_match = char_match; |
| AnnaBridge | 189:f392fc9709a3 | 481 | |
| AnnaBridge | 189:f392fc9709a3 | 482 | serial_rx_buffer_set(obj, rx, rx_length, rx_width); |
| AnnaBridge | 189:f392fc9709a3 | 483 | |
| AnnaBridge | 189:f392fc9709a3 | 484 | IRQn_Type irq_n = serial_get_irq_n(obj_s->uart); |
| AnnaBridge | 189:f392fc9709a3 | 485 | NVIC_ClearPendingIRQ(irq_n); |
| AnnaBridge | 189:f392fc9709a3 | 486 | NVIC_DisableIRQ(irq_n); |
| AnnaBridge | 189:f392fc9709a3 | 487 | NVIC_SetPriority(irq_n, 0); |
| AnnaBridge | 189:f392fc9709a3 | 488 | NVIC_SetVector(irq_n, (uint32_t)handler); |
| AnnaBridge | 189:f392fc9709a3 | 489 | NVIC_EnableIRQ(irq_n); |
| AnnaBridge | 189:f392fc9709a3 | 490 | |
| AnnaBridge | 189:f392fc9709a3 | 491 | // following HAL function will enable the RXNE interrupt + error interrupts |
| AnnaBridge | 189:f392fc9709a3 | 492 | HAL_UART_Receive_IT(huart, (uint8_t *)rx, rx_length); |
| AnnaBridge | 189:f392fc9709a3 | 493 | } |
| AnnaBridge | 189:f392fc9709a3 | 494 | |
| AnnaBridge | 189:f392fc9709a3 | 495 | /** |
| AnnaBridge | 189:f392fc9709a3 | 496 | * Attempts to determine if the serial peripheral is already in use for TX |
| AnnaBridge | 189:f392fc9709a3 | 497 | * |
| AnnaBridge | 189:f392fc9709a3 | 498 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 499 | * @return Non-zero if the TX transaction is ongoing, 0 otherwise |
| AnnaBridge | 189:f392fc9709a3 | 500 | */ |
| AnnaBridge | 189:f392fc9709a3 | 501 | uint8_t serial_tx_active(serial_t *obj) |
| AnnaBridge | 189:f392fc9709a3 | 502 | { |
| AnnaBridge | 189:f392fc9709a3 | 503 | MBED_ASSERT(obj); |
| AnnaBridge | 189:f392fc9709a3 | 504 | |
| AnnaBridge | 189:f392fc9709a3 | 505 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 506 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 507 | |
| AnnaBridge | 189:f392fc9709a3 | 508 | return (((HAL_UART_GetState(huart) & HAL_UART_STATE_BUSY_TX) == HAL_UART_STATE_BUSY_TX) ? 1 : 0); |
| AnnaBridge | 189:f392fc9709a3 | 509 | } |
| AnnaBridge | 189:f392fc9709a3 | 510 | |
| AnnaBridge | 189:f392fc9709a3 | 511 | /** |
| AnnaBridge | 189:f392fc9709a3 | 512 | * Attempts to determine if the serial peripheral is already in use for RX |
| AnnaBridge | 189:f392fc9709a3 | 513 | * |
| AnnaBridge | 189:f392fc9709a3 | 514 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 515 | * @return Non-zero if the RX transaction is ongoing, 0 otherwise |
| AnnaBridge | 189:f392fc9709a3 | 516 | */ |
| AnnaBridge | 189:f392fc9709a3 | 517 | uint8_t serial_rx_active(serial_t *obj) |
| AnnaBridge | 189:f392fc9709a3 | 518 | { |
| AnnaBridge | 189:f392fc9709a3 | 519 | MBED_ASSERT(obj); |
| AnnaBridge | 189:f392fc9709a3 | 520 | |
| AnnaBridge | 189:f392fc9709a3 | 521 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 522 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 523 | |
| AnnaBridge | 189:f392fc9709a3 | 524 | return (((HAL_UART_GetState(huart) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) ? 1 : 0); |
| AnnaBridge | 189:f392fc9709a3 | 525 | } |
| AnnaBridge | 189:f392fc9709a3 | 526 | |
| AnnaBridge | 189:f392fc9709a3 | 527 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) |
| AnnaBridge | 189:f392fc9709a3 | 528 | { |
| AnnaBridge | 189:f392fc9709a3 | 529 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 530 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_TCF); |
| AnnaBridge | 189:f392fc9709a3 | 531 | } |
| AnnaBridge | 189:f392fc9709a3 | 532 | } |
| AnnaBridge | 189:f392fc9709a3 | 533 | |
| AnnaBridge | 189:f392fc9709a3 | 534 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) |
| AnnaBridge | 189:f392fc9709a3 | 535 | { |
| AnnaBridge | 189:f392fc9709a3 | 536 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 537 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF); |
| AnnaBridge | 189:f392fc9709a3 | 538 | } |
| AnnaBridge | 189:f392fc9709a3 | 539 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 540 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF); |
| AnnaBridge | 189:f392fc9709a3 | 541 | } |
| AnnaBridge | 189:f392fc9709a3 | 542 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 543 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF); |
| AnnaBridge | 189:f392fc9709a3 | 544 | } |
| AnnaBridge | 189:f392fc9709a3 | 545 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 546 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF); |
| AnnaBridge | 189:f392fc9709a3 | 547 | } |
| AnnaBridge | 189:f392fc9709a3 | 548 | } |
| AnnaBridge | 189:f392fc9709a3 | 549 | |
| AnnaBridge | 189:f392fc9709a3 | 550 | /** |
| AnnaBridge | 189:f392fc9709a3 | 551 | * The asynchronous TX and RX handler. |
| AnnaBridge | 189:f392fc9709a3 | 552 | * |
| AnnaBridge | 189:f392fc9709a3 | 553 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 554 | * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise |
| AnnaBridge | 189:f392fc9709a3 | 555 | */ |
| AnnaBridge | 189:f392fc9709a3 | 556 | int serial_irq_handler_asynch(serial_t *obj) |
| AnnaBridge | 189:f392fc9709a3 | 557 | { |
| AnnaBridge | 189:f392fc9709a3 | 558 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 559 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 560 | |
| AnnaBridge | 189:f392fc9709a3 | 561 | volatile int return_event = 0; |
| AnnaBridge | 189:f392fc9709a3 | 562 | uint8_t *buf = (uint8_t *)(obj->rx_buff.buffer); |
| AnnaBridge | 189:f392fc9709a3 | 563 | uint8_t i = 0; |
| AnnaBridge | 189:f392fc9709a3 | 564 | |
| AnnaBridge | 189:f392fc9709a3 | 565 | // TX PART: |
| AnnaBridge | 189:f392fc9709a3 | 566 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 567 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 568 | // Return event SERIAL_EVENT_TX_COMPLETE if requested |
| AnnaBridge | 189:f392fc9709a3 | 569 | if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE) != 0) { |
| AnnaBridge | 189:f392fc9709a3 | 570 | return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events); |
| AnnaBridge | 189:f392fc9709a3 | 571 | } |
| AnnaBridge | 189:f392fc9709a3 | 572 | } |
| AnnaBridge | 189:f392fc9709a3 | 573 | } |
| AnnaBridge | 189:f392fc9709a3 | 574 | |
| AnnaBridge | 189:f392fc9709a3 | 575 | // Handle error events |
| AnnaBridge | 189:f392fc9709a3 | 576 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 577 | if (__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 578 | return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events); |
| AnnaBridge | 189:f392fc9709a3 | 579 | } |
| AnnaBridge | 189:f392fc9709a3 | 580 | } |
| AnnaBridge | 189:f392fc9709a3 | 581 | |
| AnnaBridge | 189:f392fc9709a3 | 582 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 583 | if (__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 584 | return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events); |
| AnnaBridge | 189:f392fc9709a3 | 585 | } |
| AnnaBridge | 189:f392fc9709a3 | 586 | } |
| AnnaBridge | 189:f392fc9709a3 | 587 | |
| AnnaBridge | 189:f392fc9709a3 | 588 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 589 | if (__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) { |
| AnnaBridge | 189:f392fc9709a3 | 590 | return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events); |
| AnnaBridge | 189:f392fc9709a3 | 591 | } |
| AnnaBridge | 189:f392fc9709a3 | 592 | } |
| AnnaBridge | 189:f392fc9709a3 | 593 | |
| AnnaBridge | 189:f392fc9709a3 | 594 | HAL_UART_IRQHandler(huart); |
| AnnaBridge | 189:f392fc9709a3 | 595 | |
| AnnaBridge | 189:f392fc9709a3 | 596 | // Abort if an error occurs |
| AnnaBridge | 189:f392fc9709a3 | 597 | if ((return_event & SERIAL_EVENT_RX_PARITY_ERROR) || |
| AnnaBridge | 189:f392fc9709a3 | 598 | (return_event & SERIAL_EVENT_RX_FRAMING_ERROR) || |
| AnnaBridge | 189:f392fc9709a3 | 599 | (return_event & SERIAL_EVENT_RX_OVERRUN_ERROR)) { |
| AnnaBridge | 189:f392fc9709a3 | 600 | return return_event; |
| AnnaBridge | 189:f392fc9709a3 | 601 | } |
| AnnaBridge | 189:f392fc9709a3 | 602 | |
| AnnaBridge | 189:f392fc9709a3 | 603 | //RX PART |
| AnnaBridge | 189:f392fc9709a3 | 604 | if (huart->RxXferSize != 0) { |
| AnnaBridge | 189:f392fc9709a3 | 605 | obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount; |
| AnnaBridge | 189:f392fc9709a3 | 606 | } |
| AnnaBridge | 189:f392fc9709a3 | 607 | if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) { |
| AnnaBridge | 189:f392fc9709a3 | 608 | return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events); |
| AnnaBridge | 189:f392fc9709a3 | 609 | } |
| AnnaBridge | 189:f392fc9709a3 | 610 | |
| AnnaBridge | 189:f392fc9709a3 | 611 | // Check if char_match is present |
| AnnaBridge | 189:f392fc9709a3 | 612 | if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) { |
| AnnaBridge | 189:f392fc9709a3 | 613 | if (buf != NULL) { |
| AnnaBridge | 189:f392fc9709a3 | 614 | for (i = 0; i < obj->rx_buff.pos; i++) { |
| AnnaBridge | 189:f392fc9709a3 | 615 | if (buf[i] == obj->char_match) { |
| AnnaBridge | 189:f392fc9709a3 | 616 | obj->rx_buff.pos = i; |
| AnnaBridge | 189:f392fc9709a3 | 617 | return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events); |
| AnnaBridge | 189:f392fc9709a3 | 618 | serial_rx_abort_asynch(obj); |
| AnnaBridge | 189:f392fc9709a3 | 619 | break; |
| AnnaBridge | 189:f392fc9709a3 | 620 | } |
| AnnaBridge | 189:f392fc9709a3 | 621 | } |
| AnnaBridge | 189:f392fc9709a3 | 622 | } |
| AnnaBridge | 189:f392fc9709a3 | 623 | } |
| AnnaBridge | 189:f392fc9709a3 | 624 | |
| AnnaBridge | 189:f392fc9709a3 | 625 | return return_event; |
| AnnaBridge | 189:f392fc9709a3 | 626 | } |
| AnnaBridge | 189:f392fc9709a3 | 627 | |
| AnnaBridge | 189:f392fc9709a3 | 628 | /** |
| AnnaBridge | 189:f392fc9709a3 | 629 | * Abort the ongoing TX transaction. It disables the enabled interupt for TX and |
| AnnaBridge | 189:f392fc9709a3 | 630 | * flush TX hardware buffer if TX FIFO is used |
| AnnaBridge | 189:f392fc9709a3 | 631 | * |
| AnnaBridge | 189:f392fc9709a3 | 632 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 633 | */ |
| AnnaBridge | 189:f392fc9709a3 | 634 | void serial_tx_abort_asynch(serial_t *obj) |
| AnnaBridge | 189:f392fc9709a3 | 635 | { |
| AnnaBridge | 189:f392fc9709a3 | 636 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 637 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 638 | |
| AnnaBridge | 189:f392fc9709a3 | 639 | __HAL_UART_DISABLE_IT(huart, UART_IT_TC); |
| AnnaBridge | 189:f392fc9709a3 | 640 | __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); |
| AnnaBridge | 189:f392fc9709a3 | 641 | |
| AnnaBridge | 189:f392fc9709a3 | 642 | // clear flags |
| AnnaBridge | 189:f392fc9709a3 | 643 | __HAL_UART_CLEAR_IT(huart, UART_FLAG_TC); |
| AnnaBridge | 189:f392fc9709a3 | 644 | |
| AnnaBridge | 189:f392fc9709a3 | 645 | // reset states |
| AnnaBridge | 189:f392fc9709a3 | 646 | huart->TxXferCount = 0; |
| AnnaBridge | 189:f392fc9709a3 | 647 | // update handle state |
| AnnaBridge | 189:f392fc9709a3 | 648 | if (huart->gState == HAL_UART_STATE_BUSY_TX_RX) { |
| AnnaBridge | 189:f392fc9709a3 | 649 | huart->gState = HAL_UART_STATE_BUSY_RX; |
| AnnaBridge | 189:f392fc9709a3 | 650 | } else { |
| AnnaBridge | 189:f392fc9709a3 | 651 | huart->gState = HAL_UART_STATE_READY; |
| AnnaBridge | 189:f392fc9709a3 | 652 | } |
| AnnaBridge | 189:f392fc9709a3 | 653 | } |
| AnnaBridge | 189:f392fc9709a3 | 654 | |
| AnnaBridge | 189:f392fc9709a3 | 655 | /** |
| AnnaBridge | 189:f392fc9709a3 | 656 | * Abort the ongoing RX transaction It disables the enabled interrupt for RX and |
| AnnaBridge | 189:f392fc9709a3 | 657 | * flush RX hardware buffer if RX FIFO is used |
| AnnaBridge | 189:f392fc9709a3 | 658 | * |
| AnnaBridge | 189:f392fc9709a3 | 659 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 660 | */ |
| AnnaBridge | 189:f392fc9709a3 | 661 | void serial_rx_abort_asynch(serial_t *obj) |
| AnnaBridge | 189:f392fc9709a3 | 662 | { |
| AnnaBridge | 189:f392fc9709a3 | 663 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 664 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| AnnaBridge | 189:f392fc9709a3 | 665 | |
| AnnaBridge | 189:f392fc9709a3 | 666 | // disable interrupts |
| AnnaBridge | 189:f392fc9709a3 | 667 | __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); |
| AnnaBridge | 189:f392fc9709a3 | 668 | __HAL_UART_DISABLE_IT(huart, UART_IT_PE); |
| AnnaBridge | 189:f392fc9709a3 | 669 | __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); |
| AnnaBridge | 189:f392fc9709a3 | 670 | |
| AnnaBridge | 189:f392fc9709a3 | 671 | // clear flags |
| AnnaBridge | 189:f392fc9709a3 | 672 | volatile uint32_t tmpval __attribute__((unused)) = huart->Instance->RDR; // Clear RXNE |
| AnnaBridge | 189:f392fc9709a3 | 673 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF); |
| AnnaBridge | 189:f392fc9709a3 | 674 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF); |
| AnnaBridge | 189:f392fc9709a3 | 675 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF); |
| AnnaBridge | 189:f392fc9709a3 | 676 | __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF); |
| AnnaBridge | 189:f392fc9709a3 | 677 | |
| AnnaBridge | 189:f392fc9709a3 | 678 | // reset states |
| AnnaBridge | 189:f392fc9709a3 | 679 | huart->RxXferCount = 0; |
| AnnaBridge | 189:f392fc9709a3 | 680 | // update handle state |
| AnnaBridge | 189:f392fc9709a3 | 681 | if (huart->RxState == HAL_UART_STATE_BUSY_TX_RX) { |
| AnnaBridge | 189:f392fc9709a3 | 682 | huart->RxState = HAL_UART_STATE_BUSY_TX; |
| AnnaBridge | 189:f392fc9709a3 | 683 | } else { |
| AnnaBridge | 189:f392fc9709a3 | 684 | huart->RxState = HAL_UART_STATE_READY; |
| AnnaBridge | 189:f392fc9709a3 | 685 | } |
| AnnaBridge | 189:f392fc9709a3 | 686 | } |
| AnnaBridge | 189:f392fc9709a3 | 687 | |
| AnnaBridge | 189:f392fc9709a3 | 688 | #endif /* DEVICE_SERIAL_ASYNCH */ |
| AnnaBridge | 189:f392fc9709a3 | 689 | |
| AnnaBridge | 189:f392fc9709a3 | 690 | #if DEVICE_SERIAL_FC |
| AnnaBridge | 189:f392fc9709a3 | 691 | |
| AnnaBridge | 189:f392fc9709a3 | 692 | /** |
| AnnaBridge | 189:f392fc9709a3 | 693 | * Set HW Control Flow |
| AnnaBridge | 189:f392fc9709a3 | 694 | * @param obj The serial object |
| AnnaBridge | 189:f392fc9709a3 | 695 | * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS) |
| AnnaBridge | 189:f392fc9709a3 | 696 | * @param rxflow Pin for the rxflow |
| AnnaBridge | 189:f392fc9709a3 | 697 | * @param txflow Pin for the txflow |
| AnnaBridge | 189:f392fc9709a3 | 698 | */ |
| AnnaBridge | 189:f392fc9709a3 | 699 | void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) |
| AnnaBridge | 189:f392fc9709a3 | 700 | { |
| AnnaBridge | 189:f392fc9709a3 | 701 | struct serial_s *obj_s = SERIAL_S(obj); |
| AnnaBridge | 189:f392fc9709a3 | 702 | |
| AnnaBridge | 189:f392fc9709a3 | 703 | // Checked used UART name (UART_1, UART_2, ...) |
| AnnaBridge | 189:f392fc9709a3 | 704 | UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS); |
| AnnaBridge | 189:f392fc9709a3 | 705 | UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS); |
| AnnaBridge | 189:f392fc9709a3 | 706 | if (((UARTName)pinmap_merge(uart_rts, obj_s->uart) == (UARTName)NC) || ((UARTName)pinmap_merge(uart_cts, obj_s->uart) == (UARTName)NC)) { |
| AnnaBridge | 189:f392fc9709a3 | 707 | MBED_ASSERT(0); |
| AnnaBridge | 189:f392fc9709a3 | 708 | return; |
| AnnaBridge | 189:f392fc9709a3 | 709 | } |
| AnnaBridge | 189:f392fc9709a3 | 710 | |
| AnnaBridge | 189:f392fc9709a3 | 711 | if (type == FlowControlNone) { |
| AnnaBridge | 189:f392fc9709a3 | 712 | // Disable hardware flow control |
| AnnaBridge | 189:f392fc9709a3 | 713 | obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; |
| AnnaBridge | 189:f392fc9709a3 | 714 | } |
| AnnaBridge | 189:f392fc9709a3 | 715 | if (type == FlowControlRTS) { |
| AnnaBridge | 189:f392fc9709a3 | 716 | // Enable RTS |
| AnnaBridge | 189:f392fc9709a3 | 717 | MBED_ASSERT(uart_rts != (UARTName)NC); |
| AnnaBridge | 189:f392fc9709a3 | 718 | obj_s->hw_flow_ctl = UART_HWCONTROL_RTS; |
| AnnaBridge | 189:f392fc9709a3 | 719 | obj_s->pin_rts = rxflow; |
| AnnaBridge | 189:f392fc9709a3 | 720 | // Enable the pin for RTS function |
| AnnaBridge | 189:f392fc9709a3 | 721 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
| AnnaBridge | 189:f392fc9709a3 | 722 | } |
| AnnaBridge | 189:f392fc9709a3 | 723 | if (type == FlowControlCTS) { |
| AnnaBridge | 189:f392fc9709a3 | 724 | // Enable CTS |
| AnnaBridge | 189:f392fc9709a3 | 725 | MBED_ASSERT(uart_cts != (UARTName)NC); |
| AnnaBridge | 189:f392fc9709a3 | 726 | obj_s->hw_flow_ctl = UART_HWCONTROL_CTS; |
| AnnaBridge | 189:f392fc9709a3 | 727 | obj_s->pin_cts = txflow; |
| AnnaBridge | 189:f392fc9709a3 | 728 | // Enable the pin for CTS function |
| AnnaBridge | 189:f392fc9709a3 | 729 | pinmap_pinout(txflow, PinMap_UART_CTS); |
| AnnaBridge | 189:f392fc9709a3 | 730 | } |
| AnnaBridge | 189:f392fc9709a3 | 731 | if (type == FlowControlRTSCTS) { |
| AnnaBridge | 189:f392fc9709a3 | 732 | // Enable CTS & RTS |
| AnnaBridge | 189:f392fc9709a3 | 733 | MBED_ASSERT(uart_rts != (UARTName)NC); |
| AnnaBridge | 189:f392fc9709a3 | 734 | MBED_ASSERT(uart_cts != (UARTName)NC); |
| AnnaBridge | 189:f392fc9709a3 | 735 | obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS; |
| AnnaBridge | 189:f392fc9709a3 | 736 | obj_s->pin_rts = rxflow; |
| AnnaBridge | 189:f392fc9709a3 | 737 | obj_s->pin_cts = txflow; |
| AnnaBridge | 189:f392fc9709a3 | 738 | // Enable the pin for CTS function |
| AnnaBridge | 189:f392fc9709a3 | 739 | pinmap_pinout(txflow, PinMap_UART_CTS); |
| AnnaBridge | 189:f392fc9709a3 | 740 | // Enable the pin for RTS function |
| AnnaBridge | 189:f392fc9709a3 | 741 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
| AnnaBridge | 189:f392fc9709a3 | 742 | } |
| AnnaBridge | 189:f392fc9709a3 | 743 | |
| AnnaBridge | 189:f392fc9709a3 | 744 | init_uart(obj); |
| AnnaBridge | 189:f392fc9709a3 | 745 | } |
| AnnaBridge | 189:f392fc9709a3 | 746 | |
| AnnaBridge | 189:f392fc9709a3 | 747 | #endif /* DEVICE_SERIAL_FC */ |
| AnnaBridge | 189:f392fc9709a3 | 748 | |
| AnnaBridge | 189:f392fc9709a3 | 749 | #endif /* DEVICE_SERIAL */ |
