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targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_ll_i2c.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	189:f392fc9709a3	1	/**
AnnaBridge	189:f392fc9709a3	2	******************************************************************************
AnnaBridge	189:f392fc9709a3	3	* @file stm32h7xx_ll_i2c.h
AnnaBridge	189:f392fc9709a3	4	* @author MCD Application Team
AnnaBridge	189:f392fc9709a3	5	* @brief Header file of I2C LL module.
AnnaBridge	189:f392fc9709a3	6	******************************************************************************
AnnaBridge	189:f392fc9709a3	7	* @attention
AnnaBridge	189:f392fc9709a3	8	*
AnnaBridge	189:f392fc9709a3	9	* <h2><center>© Copyright (c) 2017 STMicroelectronics.
AnnaBridge	189:f392fc9709a3	10	* All rights reserved.</center></h2>
AnnaBridge	189:f392fc9709a3	11	*
AnnaBridge	189:f392fc9709a3	12	* This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge	189:f392fc9709a3	13	* the "License"; You may not use this file except in compliance with the
AnnaBridge	189:f392fc9709a3	14	* License. You may obtain a copy of the License at:
AnnaBridge	189:f392fc9709a3	15	* opensource.org/licenses/BSD-3-Clause
AnnaBridge	189:f392fc9709a3	16	*
AnnaBridge	189:f392fc9709a3	17	******************************************************************************
AnnaBridge	189:f392fc9709a3	18	*/
AnnaBridge	189:f392fc9709a3	19
AnnaBridge	189:f392fc9709a3	20	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	189:f392fc9709a3	21	#ifndef STM32H7xx_LL_I2C_H
AnnaBridge	189:f392fc9709a3	22	#define STM32H7xx_LL_I2C_H
AnnaBridge	189:f392fc9709a3	23
AnnaBridge	189:f392fc9709a3	24	#ifdef __cplusplus
AnnaBridge	189:f392fc9709a3	25	extern "C" {
AnnaBridge	189:f392fc9709a3	26	#endif
AnnaBridge	189:f392fc9709a3	27
AnnaBridge	189:f392fc9709a3	28	/* Includes ------------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	29	#include "stm32h7xx.h"
AnnaBridge	189:f392fc9709a3	30
AnnaBridge	189:f392fc9709a3	31	/** @addtogroup STM32H7xx_LL_Driver
AnnaBridge	189:f392fc9709a3	32	* @{
AnnaBridge	189:f392fc9709a3	33	*/
AnnaBridge	189:f392fc9709a3	34
AnnaBridge	189:f392fc9709a3	35	#if defined (I2C1) \|\| defined (I2C2) \|\| defined (I2C3) \|\| defined (I2C4)
AnnaBridge	189:f392fc9709a3	36
AnnaBridge	189:f392fc9709a3	37	/** @defgroup I2C_LL I2C
AnnaBridge	189:f392fc9709a3	38	* @{
AnnaBridge	189:f392fc9709a3	39	*/
AnnaBridge	189:f392fc9709a3	40
AnnaBridge	189:f392fc9709a3	41	/* Private types -------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	42	/* Private variables ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	43
AnnaBridge	189:f392fc9709a3	44	/* Private constants ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	45	/** @defgroup I2C_LL_Private_Constants I2C Private Constants
AnnaBridge	189:f392fc9709a3	46	* @{
AnnaBridge	189:f392fc9709a3	47	*/
AnnaBridge	189:f392fc9709a3	48	/**
AnnaBridge	189:f392fc9709a3	49	* @}
AnnaBridge	189:f392fc9709a3	50	*/
AnnaBridge	189:f392fc9709a3	51
AnnaBridge	189:f392fc9709a3	52	/* Private macros ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	53	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	54	/** @defgroup I2C_LL_Private_Macros I2C Private Macros
AnnaBridge	189:f392fc9709a3	55	* @{
AnnaBridge	189:f392fc9709a3	56	*/
AnnaBridge	189:f392fc9709a3	57	/**
AnnaBridge	189:f392fc9709a3	58	* @}
AnnaBridge	189:f392fc9709a3	59	*/
AnnaBridge	189:f392fc9709a3	60	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	189:f392fc9709a3	61
AnnaBridge	189:f392fc9709a3	62	/* Exported types ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	63	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	64	/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
AnnaBridge	189:f392fc9709a3	65	* @{
AnnaBridge	189:f392fc9709a3	66	*/
AnnaBridge	189:f392fc9709a3	67	typedef struct
AnnaBridge	189:f392fc9709a3	68	{
AnnaBridge	189:f392fc9709a3	69	uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
AnnaBridge	189:f392fc9709a3	70	This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
AnnaBridge	189:f392fc9709a3	71
AnnaBridge	189:f392fc9709a3	72	This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
AnnaBridge	189:f392fc9709a3	73
AnnaBridge	189:f392fc9709a3	74	uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
AnnaBridge	189:f392fc9709a3	75	This parameter must be set by referring to the STM32CubeMX Tool and
AnnaBridge	189:f392fc9709a3	76	the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
AnnaBridge	189:f392fc9709a3	77
AnnaBridge	189:f392fc9709a3	78	This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
AnnaBridge	189:f392fc9709a3	79
AnnaBridge	189:f392fc9709a3	80	uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
AnnaBridge	189:f392fc9709a3	81	This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
AnnaBridge	189:f392fc9709a3	82
AnnaBridge	189:f392fc9709a3	83	This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
AnnaBridge	189:f392fc9709a3	84
AnnaBridge	189:f392fc9709a3	85	uint32_t DigitalFilter; /*!< Configures the digital noise filter.
AnnaBridge	189:f392fc9709a3	86	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
AnnaBridge	189:f392fc9709a3	87
AnnaBridge	189:f392fc9709a3	88	This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
AnnaBridge	189:f392fc9709a3	89
AnnaBridge	189:f392fc9709a3	90	uint32_t OwnAddress1; /*!< Specifies the device own address 1.
AnnaBridge	189:f392fc9709a3	91	This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
AnnaBridge	189:f392fc9709a3	92
AnnaBridge	189:f392fc9709a3	93	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	189:f392fc9709a3	94
AnnaBridge	189:f392fc9709a3	95	uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	189:f392fc9709a3	96	This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
AnnaBridge	189:f392fc9709a3	97
AnnaBridge	189:f392fc9709a3	98	This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
AnnaBridge	189:f392fc9709a3	99
AnnaBridge	189:f392fc9709a3	100	uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
AnnaBridge	189:f392fc9709a3	101	This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
AnnaBridge	189:f392fc9709a3	102
AnnaBridge	189:f392fc9709a3	103	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	189:f392fc9709a3	104	} LL_I2C_InitTypeDef;
AnnaBridge	189:f392fc9709a3	105	/**
AnnaBridge	189:f392fc9709a3	106	* @}
AnnaBridge	189:f392fc9709a3	107	*/
AnnaBridge	189:f392fc9709a3	108	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	189:f392fc9709a3	109
AnnaBridge	189:f392fc9709a3	110	/* Exported constants --------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	111	/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
AnnaBridge	189:f392fc9709a3	112	* @{
AnnaBridge	189:f392fc9709a3	113	*/
AnnaBridge	189:f392fc9709a3	114
AnnaBridge	189:f392fc9709a3	115	/** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge	189:f392fc9709a3	116	* @brief Flags defines which can be used with LL_I2C_WriteReg function
AnnaBridge	189:f392fc9709a3	117	* @{
AnnaBridge	189:f392fc9709a3	118	*/
AnnaBridge	189:f392fc9709a3	119	#define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /!< Address Matched flag /
AnnaBridge	189:f392fc9709a3	120	#define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /!< Not Acknowledge flag /
AnnaBridge	189:f392fc9709a3	121	#define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /!< Stop detection flag /
AnnaBridge	189:f392fc9709a3	122	#define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /!< Bus error flag /
AnnaBridge	189:f392fc9709a3	123	#define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /!< Arbitration Lost flag /
AnnaBridge	189:f392fc9709a3	124	#define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /!< Overrun/Underrun flag /
AnnaBridge	189:f392fc9709a3	125	#define LL_I2C_ICR_PECCF I2C_ICR_PECCF /!< PEC error flag /
AnnaBridge	189:f392fc9709a3	126	#define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /!< Timeout detection flag /
AnnaBridge	189:f392fc9709a3	127	#define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /!< Alert flag /
AnnaBridge	189:f392fc9709a3	128	/**
AnnaBridge	189:f392fc9709a3	129	* @}
AnnaBridge	189:f392fc9709a3	130	*/
AnnaBridge	189:f392fc9709a3	131
AnnaBridge	189:f392fc9709a3	132	/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	189:f392fc9709a3	133	* @brief Flags defines which can be used with LL_I2C_ReadReg function
AnnaBridge	189:f392fc9709a3	134	* @{
AnnaBridge	189:f392fc9709a3	135	*/
AnnaBridge	189:f392fc9709a3	136	#define LL_I2C_ISR_TXE I2C_ISR_TXE /!< Transmit data register empty /
AnnaBridge	189:f392fc9709a3	137	#define LL_I2C_ISR_TXIS I2C_ISR_TXIS /!< Transmit interrupt status /
AnnaBridge	189:f392fc9709a3	138	#define LL_I2C_ISR_RXNE I2C_ISR_RXNE /!< Receive data register not empty /
AnnaBridge	189:f392fc9709a3	139	#define LL_I2C_ISR_ADDR I2C_ISR_ADDR /!< Address matched (slave mode) /
AnnaBridge	189:f392fc9709a3	140	#define LL_I2C_ISR_NACKF I2C_ISR_NACKF /!< Not Acknowledge received flag /
AnnaBridge	189:f392fc9709a3	141	#define LL_I2C_ISR_STOPF I2C_ISR_STOPF /!< Stop detection flag /
AnnaBridge	189:f392fc9709a3	142	#define LL_I2C_ISR_TC I2C_ISR_TC /!< Transfer Complete (master mode) /
AnnaBridge	189:f392fc9709a3	143	#define LL_I2C_ISR_TCR I2C_ISR_TCR /!< Transfer Complete Reload /
AnnaBridge	189:f392fc9709a3	144	#define LL_I2C_ISR_BERR I2C_ISR_BERR /!< Bus error /
AnnaBridge	189:f392fc9709a3	145	#define LL_I2C_ISR_ARLO I2C_ISR_ARLO /!< Arbitration lost /
AnnaBridge	189:f392fc9709a3	146	#define LL_I2C_ISR_OVR I2C_ISR_OVR /!< Overrun/Underrun (slave mode) /
AnnaBridge	189:f392fc9709a3	147	#define LL_I2C_ISR_PECERR I2C_ISR_PECERR /!< PEC Error in reception (SMBus mode) /
AnnaBridge	189:f392fc9709a3	148	#define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /!< Timeout detection flag (SMBus mode) /
AnnaBridge	189:f392fc9709a3	149	#define LL_I2C_ISR_ALERT I2C_ISR_ALERT /!< SMBus alert (SMBus mode) /
AnnaBridge	189:f392fc9709a3	150	#define LL_I2C_ISR_BUSY I2C_ISR_BUSY /!< Bus busy /
AnnaBridge	189:f392fc9709a3	151	/**
AnnaBridge	189:f392fc9709a3	152	* @}
AnnaBridge	189:f392fc9709a3	153	*/
AnnaBridge	189:f392fc9709a3	154
AnnaBridge	189:f392fc9709a3	155	/** @defgroup I2C_LL_EC_IT IT Defines
AnnaBridge	189:f392fc9709a3	156	* @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
AnnaBridge	189:f392fc9709a3	157	* @{
AnnaBridge	189:f392fc9709a3	158	*/
AnnaBridge	189:f392fc9709a3	159	#define LL_I2C_CR1_TXIE I2C_CR1_TXIE /!< TX Interrupt enable /
AnnaBridge	189:f392fc9709a3	160	#define LL_I2C_CR1_RXIE I2C_CR1_RXIE /!< RX Interrupt enable /
AnnaBridge	189:f392fc9709a3	161	#define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /!< Address match Interrupt enable (slave only) /
AnnaBridge	189:f392fc9709a3	162	#define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /!< Not acknowledge received Interrupt enable /
AnnaBridge	189:f392fc9709a3	163	#define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /!< STOP detection Interrupt enable /
AnnaBridge	189:f392fc9709a3	164	#define LL_I2C_CR1_TCIE I2C_CR1_TCIE /!< Transfer Complete interrupt enable /
AnnaBridge	189:f392fc9709a3	165	#define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /!< Error interrupts enable /
AnnaBridge	189:f392fc9709a3	166	/**
AnnaBridge	189:f392fc9709a3	167	* @}
AnnaBridge	189:f392fc9709a3	168	*/
AnnaBridge	189:f392fc9709a3	169
AnnaBridge	189:f392fc9709a3	170	/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
AnnaBridge	189:f392fc9709a3	171	* @{
AnnaBridge	189:f392fc9709a3	172	*/
AnnaBridge	189:f392fc9709a3	173	#define LL_I2C_MODE_I2C 0x00000000U /!< I2C Master or Slave mode /
AnnaBridge	189:f392fc9709a3	174	#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /!< SMBus Host address acknowledge /
AnnaBridge	189:f392fc9709a3	175	#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /!< SMBus Device default mode (Default address not acknowledge) /
AnnaBridge	189:f392fc9709a3	176	#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /!< SMBus Device Default address acknowledge /
AnnaBridge	189:f392fc9709a3	177	/**
AnnaBridge	189:f392fc9709a3	178	* @}
AnnaBridge	189:f392fc9709a3	179	*/
AnnaBridge	189:f392fc9709a3	180
AnnaBridge	189:f392fc9709a3	181	/** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
AnnaBridge	189:f392fc9709a3	182	* @{
AnnaBridge	189:f392fc9709a3	183	*/
AnnaBridge	189:f392fc9709a3	184	#define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /!< Analog filter is enabled. /
AnnaBridge	189:f392fc9709a3	185	#define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /!< Analog filter is disabled. /
AnnaBridge	189:f392fc9709a3	186	/**
AnnaBridge	189:f392fc9709a3	187	* @}
AnnaBridge	189:f392fc9709a3	188	*/
AnnaBridge	189:f392fc9709a3	189
AnnaBridge	189:f392fc9709a3	190	/** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
AnnaBridge	189:f392fc9709a3	191	* @{
AnnaBridge	189:f392fc9709a3	192	*/
AnnaBridge	189:f392fc9709a3	193	#define LL_I2C_ADDRESSING_MODE_7BIT 0x00000000U /!< Master operates in 7-bit addressing mode. /
AnnaBridge	189:f392fc9709a3	194	#define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /!< Master operates in 10-bit addressing mode./
AnnaBridge	189:f392fc9709a3	195	/**
AnnaBridge	189:f392fc9709a3	196	* @}
AnnaBridge	189:f392fc9709a3	197	*/
AnnaBridge	189:f392fc9709a3	198
AnnaBridge	189:f392fc9709a3	199	/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
AnnaBridge	189:f392fc9709a3	200	* @{
AnnaBridge	189:f392fc9709a3	201	*/
AnnaBridge	189:f392fc9709a3	202	#define LL_I2C_OWNADDRESS1_7BIT 0x00000000U /!< Own address 1 is a 7-bit address. /
AnnaBridge	189:f392fc9709a3	203	#define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /!< Own address 1 is a 10-bit address./
AnnaBridge	189:f392fc9709a3	204	/**
AnnaBridge	189:f392fc9709a3	205	* @}
AnnaBridge	189:f392fc9709a3	206	*/
AnnaBridge	189:f392fc9709a3	207
AnnaBridge	189:f392fc9709a3	208	/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
AnnaBridge	189:f392fc9709a3	209	* @{
AnnaBridge	189:f392fc9709a3	210	*/
AnnaBridge	189:f392fc9709a3	211	#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /!< Own Address2 No mask. /
AnnaBridge	189:f392fc9709a3	212	#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /!< Only Address2 bits[7:2] are compared. /
AnnaBridge	189:f392fc9709a3	213	#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /!< Only Address2 bits[7:3] are compared. /
AnnaBridge	189:f392fc9709a3	214	#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /!< Only Address2 bits[7:4] are compared. /
AnnaBridge	189:f392fc9709a3	215	#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /!< Only Address2 bits[7:5] are compared. /
AnnaBridge	189:f392fc9709a3	216	#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /!< Only Address2 bits[7:6] are compared. /
AnnaBridge	189:f392fc9709a3	217	#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /!< Only Address2 bits[7] are compared. /
AnnaBridge	189:f392fc9709a3	218	#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /!< No comparison is done. All Address2 are acknowledged./
AnnaBridge	189:f392fc9709a3	219	/**
AnnaBridge	189:f392fc9709a3	220	* @}
AnnaBridge	189:f392fc9709a3	221	*/
AnnaBridge	189:f392fc9709a3	222
AnnaBridge	189:f392fc9709a3	223	/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
AnnaBridge	189:f392fc9709a3	224	* @{
AnnaBridge	189:f392fc9709a3	225	*/
AnnaBridge	189:f392fc9709a3	226	#define LL_I2C_ACK 0x00000000U /!< ACK is sent after current received byte. /
AnnaBridge	189:f392fc9709a3	227	#define LL_I2C_NACK I2C_CR2_NACK /!< NACK is sent after current received byte./
AnnaBridge	189:f392fc9709a3	228	/**
AnnaBridge	189:f392fc9709a3	229	* @}
AnnaBridge	189:f392fc9709a3	230	*/
AnnaBridge	189:f392fc9709a3	231
AnnaBridge	189:f392fc9709a3	232	/** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
AnnaBridge	189:f392fc9709a3	233	* @{
AnnaBridge	189:f392fc9709a3	234	*/
AnnaBridge	189:f392fc9709a3	235	#define LL_I2C_ADDRSLAVE_7BIT 0x00000000U /!< Slave Address in 7-bit. /
AnnaBridge	189:f392fc9709a3	236	#define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /!< Slave Address in 10-bit./
AnnaBridge	189:f392fc9709a3	237	/**
AnnaBridge	189:f392fc9709a3	238	* @}
AnnaBridge	189:f392fc9709a3	239	*/
AnnaBridge	189:f392fc9709a3	240
AnnaBridge	189:f392fc9709a3	241	/** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
AnnaBridge	189:f392fc9709a3	242	* @{
AnnaBridge	189:f392fc9709a3	243	*/
AnnaBridge	189:f392fc9709a3	244	#define LL_I2C_REQUEST_WRITE 0x00000000U /!< Master request a write transfer. /
AnnaBridge	189:f392fc9709a3	245	#define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /!< Master request a read transfer. /
AnnaBridge	189:f392fc9709a3	246	/**
AnnaBridge	189:f392fc9709a3	247	* @}
AnnaBridge	189:f392fc9709a3	248	*/
AnnaBridge	189:f392fc9709a3	249
AnnaBridge	189:f392fc9709a3	250	/** @defgroup I2C_LL_EC_MODE Transfer End Mode
AnnaBridge	189:f392fc9709a3	251	* @{
AnnaBridge	189:f392fc9709a3	252	*/
AnnaBridge	189:f392fc9709a3	253	#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /!< Enable I2C Reload mode. /
AnnaBridge	189:f392fc9709a3	254	#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /!< Enable I2C Automatic end mode with no HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	255	#define LL_I2C_MODE_SOFTEND 0x00000000U /!< Enable I2C Software end mode with no HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	256	#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	257	#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	258	#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	259	#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	260	#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	261	/**
AnnaBridge	189:f392fc9709a3	262	* @}
AnnaBridge	189:f392fc9709a3	263	*/
AnnaBridge	189:f392fc9709a3	264
AnnaBridge	189:f392fc9709a3	265	/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
AnnaBridge	189:f392fc9709a3	266	* @{
AnnaBridge	189:f392fc9709a3	267	*/
AnnaBridge	189:f392fc9709a3	268	#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /!< Don't Generate Stop and Start condition. /
AnnaBridge	189:f392fc9709a3	269	#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U \| I2C_CR2_STOP) /!< Generate Stop condition (Size should be set to 0). /
AnnaBridge	189:f392fc9709a3	270	#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Start for read request. /
AnnaBridge	189:f392fc9709a3	271	#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Start for write request. /
AnnaBridge	189:f392fc9709a3	272	#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Restart for read request, slave 7Bit address. /
AnnaBridge	189:f392fc9709a3	273	#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Restart for write request, slave 7Bit address. /
AnnaBridge	189:f392fc9709a3	274	#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN \| I2C_CR2_HEAD10R) /!< Generate Restart for read request, slave 10Bit address. /
AnnaBridge	189:f392fc9709a3	275	#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Restart for write request, slave 10Bit address./
AnnaBridge	189:f392fc9709a3	276	/**
AnnaBridge	189:f392fc9709a3	277	* @}
AnnaBridge	189:f392fc9709a3	278	*/
AnnaBridge	189:f392fc9709a3	279
AnnaBridge	189:f392fc9709a3	280	/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
AnnaBridge	189:f392fc9709a3	281	* @{
AnnaBridge	189:f392fc9709a3	282	*/
AnnaBridge	189:f392fc9709a3	283	#define LL_I2C_DIRECTION_WRITE 0x00000000U /!< Write transfer request by master, slave enters receiver mode. /
AnnaBridge	189:f392fc9709a3	284	#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /!< Read transfer request by master, slave enters transmitter mode./
AnnaBridge	189:f392fc9709a3	285	/**
AnnaBridge	189:f392fc9709a3	286	* @}
AnnaBridge	189:f392fc9709a3	287	*/
AnnaBridge	189:f392fc9709a3	288
AnnaBridge	189:f392fc9709a3	289	/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge	189:f392fc9709a3	290	* @{
AnnaBridge	189:f392fc9709a3	291	*/
AnnaBridge	189:f392fc9709a3	292	#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /!< Get address of data register used for transmission /
AnnaBridge	189:f392fc9709a3	293	#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /!< Get address of data register used for reception /
AnnaBridge	189:f392fc9709a3	294	/**
AnnaBridge	189:f392fc9709a3	295	* @}
AnnaBridge	189:f392fc9709a3	296	*/
AnnaBridge	189:f392fc9709a3	297
AnnaBridge	189:f392fc9709a3	298	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
AnnaBridge	189:f392fc9709a3	299	* @{
AnnaBridge	189:f392fc9709a3	300	*/
AnnaBridge	189:f392fc9709a3	301	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /!< TimeoutA is used to detect SCL low level timeout. /
AnnaBridge	189:f392fc9709a3	302	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /!< TimeoutA is used to detect both SCL and SDA high level timeout./
AnnaBridge	189:f392fc9709a3	303	/**
AnnaBridge	189:f392fc9709a3	304	* @}
AnnaBridge	189:f392fc9709a3	305	*/
AnnaBridge	189:f392fc9709a3	306
AnnaBridge	189:f392fc9709a3	307	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
AnnaBridge	189:f392fc9709a3	308	* @{
AnnaBridge	189:f392fc9709a3	309	*/
AnnaBridge	189:f392fc9709a3	310	#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /!< TimeoutA enable bit /
AnnaBridge	189:f392fc9709a3	311	#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /!< TimeoutB (extended clock) enable bit /
AnnaBridge	189:f392fc9709a3	312	#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN) /!< TimeoutA and TimeoutB (extended clock) enable bits /
AnnaBridge	189:f392fc9709a3	313	/**
AnnaBridge	189:f392fc9709a3	314	* @}
AnnaBridge	189:f392fc9709a3	315	*/
AnnaBridge	189:f392fc9709a3	316
AnnaBridge	189:f392fc9709a3	317	/**
AnnaBridge	189:f392fc9709a3	318	* @}
AnnaBridge	189:f392fc9709a3	319	*/
AnnaBridge	189:f392fc9709a3	320
AnnaBridge	189:f392fc9709a3	321	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	322	/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
AnnaBridge	189:f392fc9709a3	323	* @{
AnnaBridge	189:f392fc9709a3	324	*/
AnnaBridge	189:f392fc9709a3	325
AnnaBridge	189:f392fc9709a3	326	/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	189:f392fc9709a3	327	* @{
AnnaBridge	189:f392fc9709a3	328	*/
AnnaBridge	189:f392fc9709a3	329
AnnaBridge	189:f392fc9709a3	330	/**
AnnaBridge	189:f392fc9709a3	331	* @brief Write a value in I2C register
AnnaBridge	189:f392fc9709a3	332	* @param __INSTANCE__ I2C Instance
AnnaBridge	189:f392fc9709a3	333	* @param __REG__ Register to be written
AnnaBridge	189:f392fc9709a3	334	* @param __VALUE__ Value to be written in the register
AnnaBridge	189:f392fc9709a3	335	* @retval None
AnnaBridge	189:f392fc9709a3	336	*/
AnnaBridge	189:f392fc9709a3	337	#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	189:f392fc9709a3	338
AnnaBridge	189:f392fc9709a3	339	/**
AnnaBridge	189:f392fc9709a3	340	* @brief Read a value in I2C register
AnnaBridge	189:f392fc9709a3	341	* @param __INSTANCE__ I2C Instance
AnnaBridge	189:f392fc9709a3	342	* @param __REG__ Register to be read
AnnaBridge	189:f392fc9709a3	343	* @retval Register value
AnnaBridge	189:f392fc9709a3	344	*/
AnnaBridge	189:f392fc9709a3	345	#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	189:f392fc9709a3	346	/**
AnnaBridge	189:f392fc9709a3	347	* @}
AnnaBridge	189:f392fc9709a3	348	*/
AnnaBridge	189:f392fc9709a3	349
AnnaBridge	189:f392fc9709a3	350	/** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
AnnaBridge	189:f392fc9709a3	351	* @{
AnnaBridge	189:f392fc9709a3	352	*/
AnnaBridge	189:f392fc9709a3	353	/**
AnnaBridge	189:f392fc9709a3	354	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	189:f392fc9709a3	355	* @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
AnnaBridge	189:f392fc9709a3	356	* @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
AnnaBridge	189:f392fc9709a3	357	* @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
AnnaBridge	189:f392fc9709a3	358	* @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
AnnaBridge	189:f392fc9709a3	359	* @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
AnnaBridge	189:f392fc9709a3	360	* @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	189:f392fc9709a3	361	*/
AnnaBridge	189:f392fc9709a3	362	#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
AnnaBridge	189:f392fc9709a3	363	((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) \| \
AnnaBridge	189:f392fc9709a3	364	(((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) \| \
AnnaBridge	189:f392fc9709a3	365	(((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) \| \
AnnaBridge	189:f392fc9709a3	366	(((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) \| \
AnnaBridge	189:f392fc9709a3	367	(((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
AnnaBridge	189:f392fc9709a3	368	/**
AnnaBridge	189:f392fc9709a3	369	* @}
AnnaBridge	189:f392fc9709a3	370	*/
AnnaBridge	189:f392fc9709a3	371
AnnaBridge	189:f392fc9709a3	372	/**
AnnaBridge	189:f392fc9709a3	373	* @}
AnnaBridge	189:f392fc9709a3	374	*/
AnnaBridge	189:f392fc9709a3	375
AnnaBridge	189:f392fc9709a3	376	/* Exported functions --------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	377	/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
AnnaBridge	189:f392fc9709a3	378	* @{
AnnaBridge	189:f392fc9709a3	379	*/
AnnaBridge	189:f392fc9709a3	380
AnnaBridge	189:f392fc9709a3	381	/** @defgroup I2C_LL_EF_Configuration Configuration
AnnaBridge	189:f392fc9709a3	382	* @{
AnnaBridge	189:f392fc9709a3	383	*/
AnnaBridge	189:f392fc9709a3	384
AnnaBridge	189:f392fc9709a3	385	/**
AnnaBridge	189:f392fc9709a3	386	* @brief Enable I2C peripheral (PE = 1).
AnnaBridge	189:f392fc9709a3	387	* @rmtoll CR1 PE LL_I2C_Enable
AnnaBridge	189:f392fc9709a3	388	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	389	* @retval None
AnnaBridge	189:f392fc9709a3	390	*/
AnnaBridge	189:f392fc9709a3	391	__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	392	{
AnnaBridge	189:f392fc9709a3	393	SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	189:f392fc9709a3	394	}
AnnaBridge	189:f392fc9709a3	395
AnnaBridge	189:f392fc9709a3	396	/**
AnnaBridge	189:f392fc9709a3	397	* @brief Disable I2C peripheral (PE = 0).
AnnaBridge	189:f392fc9709a3	398	* @note When PE = 0, the I2C SCL and SDA lines are released.
AnnaBridge	189:f392fc9709a3	399	* Internal state machines and status bits are put back to their reset value.
AnnaBridge	189:f392fc9709a3	400	* When cleared, PE must be kept low for at least 3 APB clock cycles.
AnnaBridge	189:f392fc9709a3	401	* @rmtoll CR1 PE LL_I2C_Disable
AnnaBridge	189:f392fc9709a3	402	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	403	* @retval None
AnnaBridge	189:f392fc9709a3	404	*/
AnnaBridge	189:f392fc9709a3	405	__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	406	{
AnnaBridge	189:f392fc9709a3	407	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	189:f392fc9709a3	408	}
AnnaBridge	189:f392fc9709a3	409
AnnaBridge	189:f392fc9709a3	410	/**
AnnaBridge	189:f392fc9709a3	411	* @brief Check if the I2C peripheral is enabled or disabled.
AnnaBridge	189:f392fc9709a3	412	* @rmtoll CR1 PE LL_I2C_IsEnabled
AnnaBridge	189:f392fc9709a3	413	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	414	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	415	*/
AnnaBridge	189:f392fc9709a3	416	__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	417	{
AnnaBridge	189:f392fc9709a3	418	return ((READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	419	}
AnnaBridge	189:f392fc9709a3	420
AnnaBridge	189:f392fc9709a3	421	/**
AnnaBridge	189:f392fc9709a3	422	* @brief Configure Noise Filters (Analog and Digital).
AnnaBridge	189:f392fc9709a3	423	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	189:f392fc9709a3	424	* The filters can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	425	* @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n
AnnaBridge	189:f392fc9709a3	426	* CR1 DNF LL_I2C_ConfigFilters
AnnaBridge	189:f392fc9709a3	427	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	428	* @param AnalogFilter This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	429	* @arg @ref LL_I2C_ANALOGFILTER_ENABLE
AnnaBridge	189:f392fc9709a3	430	* @arg @ref LL_I2C_ANALOGFILTER_DISABLE
AnnaBridge	189:f392fc9709a3	431	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	189:f392fc9709a3	432	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	189:f392fc9709a3	433	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	189:f392fc9709a3	434	* @retval None
AnnaBridge	189:f392fc9709a3	435	*/
AnnaBridge	189:f392fc9709a3	436	__STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
AnnaBridge	189:f392fc9709a3	437	{
AnnaBridge	189:f392fc9709a3	438	MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF \| I2C_CR1_DNF, AnalogFilter \| (DigitalFilter << I2C_CR1_DNF_Pos));
AnnaBridge	189:f392fc9709a3	439	}
AnnaBridge	189:f392fc9709a3	440
AnnaBridge	189:f392fc9709a3	441	/**
AnnaBridge	189:f392fc9709a3	442	* @brief Configure Digital Noise Filter.
AnnaBridge	189:f392fc9709a3	443	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	189:f392fc9709a3	444	* This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	445	* @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
AnnaBridge	189:f392fc9709a3	446	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	447	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	189:f392fc9709a3	448	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	189:f392fc9709a3	449	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	189:f392fc9709a3	450	* @retval None
AnnaBridge	189:f392fc9709a3	451	*/
AnnaBridge	189:f392fc9709a3	452	__STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
AnnaBridge	189:f392fc9709a3	453	{
AnnaBridge	189:f392fc9709a3	454	MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
AnnaBridge	189:f392fc9709a3	455	}
AnnaBridge	189:f392fc9709a3	456
AnnaBridge	189:f392fc9709a3	457	/**
AnnaBridge	189:f392fc9709a3	458	* @brief Get the current Digital Noise Filter configuration.
AnnaBridge	189:f392fc9709a3	459	* @rmtoll CR1 DNF LL_I2C_GetDigitalFilter
AnnaBridge	189:f392fc9709a3	460	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	461	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	189:f392fc9709a3	462	*/
AnnaBridge	189:f392fc9709a3	463	__STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	464	{
AnnaBridge	189:f392fc9709a3	465	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
AnnaBridge	189:f392fc9709a3	466	}
AnnaBridge	189:f392fc9709a3	467
AnnaBridge	189:f392fc9709a3	468	/**
AnnaBridge	189:f392fc9709a3	469	* @brief Enable Analog Noise Filter.
AnnaBridge	189:f392fc9709a3	470	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	471	* @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter
AnnaBridge	189:f392fc9709a3	472	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	473	* @retval None
AnnaBridge	189:f392fc9709a3	474	*/
AnnaBridge	189:f392fc9709a3	475	__STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	476	{
AnnaBridge	189:f392fc9709a3	477	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	189:f392fc9709a3	478	}
AnnaBridge	189:f392fc9709a3	479
AnnaBridge	189:f392fc9709a3	480	/**
AnnaBridge	189:f392fc9709a3	481	* @brief Disable Analog Noise Filter.
AnnaBridge	189:f392fc9709a3	482	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	483	* @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter
AnnaBridge	189:f392fc9709a3	484	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	485	* @retval None
AnnaBridge	189:f392fc9709a3	486	*/
AnnaBridge	189:f392fc9709a3	487	__STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	488	{
AnnaBridge	189:f392fc9709a3	489	SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	189:f392fc9709a3	490	}
AnnaBridge	189:f392fc9709a3	491
AnnaBridge	189:f392fc9709a3	492	/**
AnnaBridge	189:f392fc9709a3	493	* @brief Check if Analog Noise Filter is enabled or disabled.
AnnaBridge	189:f392fc9709a3	494	* @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter
AnnaBridge	189:f392fc9709a3	495	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	496	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	497	*/
AnnaBridge	189:f392fc9709a3	498	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	499	{
AnnaBridge	189:f392fc9709a3	500	return ((READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	501	}
AnnaBridge	189:f392fc9709a3	502
AnnaBridge	189:f392fc9709a3	503	/**
AnnaBridge	189:f392fc9709a3	504	* @brief Enable DMA transmission requests.
AnnaBridge	189:f392fc9709a3	505	* @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX
AnnaBridge	189:f392fc9709a3	506	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	507	* @retval None
AnnaBridge	189:f392fc9709a3	508	*/
AnnaBridge	189:f392fc9709a3	509	__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	510	{
AnnaBridge	189:f392fc9709a3	511	SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	189:f392fc9709a3	512	}
AnnaBridge	189:f392fc9709a3	513
AnnaBridge	189:f392fc9709a3	514	/**
AnnaBridge	189:f392fc9709a3	515	* @brief Disable DMA transmission requests.
AnnaBridge	189:f392fc9709a3	516	* @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX
AnnaBridge	189:f392fc9709a3	517	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	518	* @retval None
AnnaBridge	189:f392fc9709a3	519	*/
AnnaBridge	189:f392fc9709a3	520	__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	521	{
AnnaBridge	189:f392fc9709a3	522	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	189:f392fc9709a3	523	}
AnnaBridge	189:f392fc9709a3	524
AnnaBridge	189:f392fc9709a3	525	/**
AnnaBridge	189:f392fc9709a3	526	* @brief Check if DMA transmission requests are enabled or disabled.
AnnaBridge	189:f392fc9709a3	527	* @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX
AnnaBridge	189:f392fc9709a3	528	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	529	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	530	*/
AnnaBridge	189:f392fc9709a3	531	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	532	{
AnnaBridge	189:f392fc9709a3	533	return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	534	}
AnnaBridge	189:f392fc9709a3	535
AnnaBridge	189:f392fc9709a3	536	/**
AnnaBridge	189:f392fc9709a3	537	* @brief Enable DMA reception requests.
AnnaBridge	189:f392fc9709a3	538	* @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX
AnnaBridge	189:f392fc9709a3	539	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	540	* @retval None
AnnaBridge	189:f392fc9709a3	541	*/
AnnaBridge	189:f392fc9709a3	542	__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	543	{
AnnaBridge	189:f392fc9709a3	544	SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	189:f392fc9709a3	545	}
AnnaBridge	189:f392fc9709a3	546
AnnaBridge	189:f392fc9709a3	547	/**
AnnaBridge	189:f392fc9709a3	548	* @brief Disable DMA reception requests.
AnnaBridge	189:f392fc9709a3	549	* @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX
AnnaBridge	189:f392fc9709a3	550	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	551	* @retval None
AnnaBridge	189:f392fc9709a3	552	*/
AnnaBridge	189:f392fc9709a3	553	__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	554	{
AnnaBridge	189:f392fc9709a3	555	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	189:f392fc9709a3	556	}
AnnaBridge	189:f392fc9709a3	557
AnnaBridge	189:f392fc9709a3	558	/**
AnnaBridge	189:f392fc9709a3	559	* @brief Check if DMA reception requests are enabled or disabled.
AnnaBridge	189:f392fc9709a3	560	* @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX
AnnaBridge	189:f392fc9709a3	561	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	562	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	563	*/
AnnaBridge	189:f392fc9709a3	564	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	565	{
AnnaBridge	189:f392fc9709a3	566	return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	567	}
AnnaBridge	189:f392fc9709a3	568
AnnaBridge	189:f392fc9709a3	569	/**
AnnaBridge	189:f392fc9709a3	570	* @brief Get the data register address used for DMA transfer
AnnaBridge	189:f392fc9709a3	571	* @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n
AnnaBridge	189:f392fc9709a3	572	* RXDR RXDATA LL_I2C_DMA_GetRegAddr
AnnaBridge	189:f392fc9709a3	573	* @param I2Cx I2C Instance
AnnaBridge	189:f392fc9709a3	574	* @param Direction This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	575	* @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
AnnaBridge	189:f392fc9709a3	576	* @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
AnnaBridge	189:f392fc9709a3	577	* @retval Address of data register
AnnaBridge	189:f392fc9709a3	578	*/
AnnaBridge	189:f392fc9709a3	579	__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
AnnaBridge	189:f392fc9709a3	580	{
AnnaBridge	189:f392fc9709a3	581	register uint32_t data_reg_addr;
AnnaBridge	189:f392fc9709a3	582
AnnaBridge	189:f392fc9709a3	583	if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
AnnaBridge	189:f392fc9709a3	584	{
AnnaBridge	189:f392fc9709a3	585	/* return address of TXDR register */
AnnaBridge	189:f392fc9709a3	586	data_reg_addr = (uint32_t) & (I2Cx->TXDR);
AnnaBridge	189:f392fc9709a3	587	}
AnnaBridge	189:f392fc9709a3	588	else
AnnaBridge	189:f392fc9709a3	589	{
AnnaBridge	189:f392fc9709a3	590	/* return address of RXDR register */
AnnaBridge	189:f392fc9709a3	591	data_reg_addr = (uint32_t) & (I2Cx->RXDR);
AnnaBridge	189:f392fc9709a3	592	}
AnnaBridge	189:f392fc9709a3	593
AnnaBridge	189:f392fc9709a3	594	return data_reg_addr;
AnnaBridge	189:f392fc9709a3	595	}
AnnaBridge	189:f392fc9709a3	596
AnnaBridge	189:f392fc9709a3	597	/**
AnnaBridge	189:f392fc9709a3	598	* @brief Enable Clock stretching.
AnnaBridge	189:f392fc9709a3	599	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	600	* @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
AnnaBridge	189:f392fc9709a3	601	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	602	* @retval None
AnnaBridge	189:f392fc9709a3	603	*/
AnnaBridge	189:f392fc9709a3	604	__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	605	{
AnnaBridge	189:f392fc9709a3	606	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	189:f392fc9709a3	607	}
AnnaBridge	189:f392fc9709a3	608
AnnaBridge	189:f392fc9709a3	609	/**
AnnaBridge	189:f392fc9709a3	610	* @brief Disable Clock stretching.
AnnaBridge	189:f392fc9709a3	611	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	612	* @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
AnnaBridge	189:f392fc9709a3	613	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	614	* @retval None
AnnaBridge	189:f392fc9709a3	615	*/
AnnaBridge	189:f392fc9709a3	616	__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	617	{
AnnaBridge	189:f392fc9709a3	618	SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	189:f392fc9709a3	619	}
AnnaBridge	189:f392fc9709a3	620
AnnaBridge	189:f392fc9709a3	621	/**
AnnaBridge	189:f392fc9709a3	622	* @brief Check if Clock stretching is enabled or disabled.
AnnaBridge	189:f392fc9709a3	623	* @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
AnnaBridge	189:f392fc9709a3	624	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	625	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	626	*/
AnnaBridge	189:f392fc9709a3	627	__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	628	{
AnnaBridge	189:f392fc9709a3	629	return ((READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	630	}
AnnaBridge	189:f392fc9709a3	631
AnnaBridge	189:f392fc9709a3	632	/**
AnnaBridge	189:f392fc9709a3	633	* @brief Enable hardware byte control in slave mode.
AnnaBridge	189:f392fc9709a3	634	* @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl
AnnaBridge	189:f392fc9709a3	635	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	636	* @retval None
AnnaBridge	189:f392fc9709a3	637	*/
AnnaBridge	189:f392fc9709a3	638	__STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	639	{
AnnaBridge	189:f392fc9709a3	640	SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	189:f392fc9709a3	641	}
AnnaBridge	189:f392fc9709a3	642
AnnaBridge	189:f392fc9709a3	643	/**
AnnaBridge	189:f392fc9709a3	644	* @brief Disable hardware byte control in slave mode.
AnnaBridge	189:f392fc9709a3	645	* @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl
AnnaBridge	189:f392fc9709a3	646	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	647	* @retval None
AnnaBridge	189:f392fc9709a3	648	*/
AnnaBridge	189:f392fc9709a3	649	__STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	650	{
AnnaBridge	189:f392fc9709a3	651	CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	189:f392fc9709a3	652	}
AnnaBridge	189:f392fc9709a3	653
AnnaBridge	189:f392fc9709a3	654	/**
AnnaBridge	189:f392fc9709a3	655	* @brief Check if hardware byte control in slave mode is enabled or disabled.
AnnaBridge	189:f392fc9709a3	656	* @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl
AnnaBridge	189:f392fc9709a3	657	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	658	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	659	*/
AnnaBridge	189:f392fc9709a3	660	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	661	{
AnnaBridge	189:f392fc9709a3	662	return ((READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	663	}
AnnaBridge	189:f392fc9709a3	664
AnnaBridge	189:f392fc9709a3	665	/**
AnnaBridge	189:f392fc9709a3	666	* @brief Enable Wakeup from STOP.
AnnaBridge	189:f392fc9709a3	667	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	668	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	669	* @note This bit can only be programmed when Digital Filter is disabled.
AnnaBridge	189:f392fc9709a3	670	* @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
AnnaBridge	189:f392fc9709a3	671	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	672	* @retval None
AnnaBridge	189:f392fc9709a3	673	*/
AnnaBridge	189:f392fc9709a3	674	__STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	675	{
AnnaBridge	189:f392fc9709a3	676	SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	189:f392fc9709a3	677	}
AnnaBridge	189:f392fc9709a3	678
AnnaBridge	189:f392fc9709a3	679	/**
AnnaBridge	189:f392fc9709a3	680	* @brief Disable Wakeup from STOP.
AnnaBridge	189:f392fc9709a3	681	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	682	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	683	* @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
AnnaBridge	189:f392fc9709a3	684	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	685	* @retval None
AnnaBridge	189:f392fc9709a3	686	*/
AnnaBridge	189:f392fc9709a3	687	__STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	688	{
AnnaBridge	189:f392fc9709a3	689	CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	189:f392fc9709a3	690	}
AnnaBridge	189:f392fc9709a3	691
AnnaBridge	189:f392fc9709a3	692	/**
AnnaBridge	189:f392fc9709a3	693	* @brief Check if Wakeup from STOP is enabled or disabled.
AnnaBridge	189:f392fc9709a3	694	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	695	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	696	* @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
AnnaBridge	189:f392fc9709a3	697	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	698	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	699	*/
AnnaBridge	189:f392fc9709a3	700	__STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	701	{
AnnaBridge	189:f392fc9709a3	702	return ((READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	703	}
AnnaBridge	189:f392fc9709a3	704
AnnaBridge	189:f392fc9709a3	705	/**
AnnaBridge	189:f392fc9709a3	706	* @brief Enable General Call.
AnnaBridge	189:f392fc9709a3	707	* @note When enabled the Address 0x00 is ACKed.
AnnaBridge	189:f392fc9709a3	708	* @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall
AnnaBridge	189:f392fc9709a3	709	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	710	* @retval None
AnnaBridge	189:f392fc9709a3	711	*/
AnnaBridge	189:f392fc9709a3	712	__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	713	{
AnnaBridge	189:f392fc9709a3	714	SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	189:f392fc9709a3	715	}
AnnaBridge	189:f392fc9709a3	716
AnnaBridge	189:f392fc9709a3	717	/**
AnnaBridge	189:f392fc9709a3	718	* @brief Disable General Call.
AnnaBridge	189:f392fc9709a3	719	* @note When disabled the Address 0x00 is NACKed.
AnnaBridge	189:f392fc9709a3	720	* @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall
AnnaBridge	189:f392fc9709a3	721	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	722	* @retval None
AnnaBridge	189:f392fc9709a3	723	*/
AnnaBridge	189:f392fc9709a3	724	__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	725	{
AnnaBridge	189:f392fc9709a3	726	CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	189:f392fc9709a3	727	}
AnnaBridge	189:f392fc9709a3	728
AnnaBridge	189:f392fc9709a3	729	/**
AnnaBridge	189:f392fc9709a3	730	* @brief Check if General Call is enabled or disabled.
AnnaBridge	189:f392fc9709a3	731	* @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall
AnnaBridge	189:f392fc9709a3	732	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	733	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	734	*/
AnnaBridge	189:f392fc9709a3	735	__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	736	{
AnnaBridge	189:f392fc9709a3	737	return ((READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	738	}
AnnaBridge	189:f392fc9709a3	739
AnnaBridge	189:f392fc9709a3	740	/**
AnnaBridge	189:f392fc9709a3	741	* @brief Configure the Master to operate in 7-bit or 10-bit addressing mode.
AnnaBridge	189:f392fc9709a3	742	* @note Changing this bit is not allowed, when the START bit is set.
AnnaBridge	189:f392fc9709a3	743	* @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode
AnnaBridge	189:f392fc9709a3	744	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	745	* @param AddressingMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	746	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	189:f392fc9709a3	747	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	189:f392fc9709a3	748	* @retval None
AnnaBridge	189:f392fc9709a3	749	*/
AnnaBridge	189:f392fc9709a3	750	__STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
AnnaBridge	189:f392fc9709a3	751	{
AnnaBridge	189:f392fc9709a3	752	MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
AnnaBridge	189:f392fc9709a3	753	}
AnnaBridge	189:f392fc9709a3	754
AnnaBridge	189:f392fc9709a3	755	/**
AnnaBridge	189:f392fc9709a3	756	* @brief Get the Master addressing mode.
AnnaBridge	189:f392fc9709a3	757	* @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode
AnnaBridge	189:f392fc9709a3	758	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	759	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	760	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	189:f392fc9709a3	761	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	189:f392fc9709a3	762	*/
AnnaBridge	189:f392fc9709a3	763	__STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	764	{
AnnaBridge	189:f392fc9709a3	765	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
AnnaBridge	189:f392fc9709a3	766	}
AnnaBridge	189:f392fc9709a3	767
AnnaBridge	189:f392fc9709a3	768	/**
AnnaBridge	189:f392fc9709a3	769	* @brief Set the Own Address1.
AnnaBridge	189:f392fc9709a3	770	* @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n
AnnaBridge	189:f392fc9709a3	771	* OAR1 OA1MODE LL_I2C_SetOwnAddress1
AnnaBridge	189:f392fc9709a3	772	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	773	* @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
AnnaBridge	189:f392fc9709a3	774	* @param OwnAddrSize This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	775	* @arg @ref LL_I2C_OWNADDRESS1_7BIT
AnnaBridge	189:f392fc9709a3	776	* @arg @ref LL_I2C_OWNADDRESS1_10BIT
AnnaBridge	189:f392fc9709a3	777	* @retval None
AnnaBridge	189:f392fc9709a3	778	*/
AnnaBridge	189:f392fc9709a3	779	__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
AnnaBridge	189:f392fc9709a3	780	{
AnnaBridge	189:f392fc9709a3	781	MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 \| I2C_OAR1_OA1MODE, OwnAddress1 \| OwnAddrSize);
AnnaBridge	189:f392fc9709a3	782	}
AnnaBridge	189:f392fc9709a3	783
AnnaBridge	189:f392fc9709a3	784	/**
AnnaBridge	189:f392fc9709a3	785	* @brief Enable acknowledge on Own Address1 match address.
AnnaBridge	189:f392fc9709a3	786	* @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1
AnnaBridge	189:f392fc9709a3	787	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	788	* @retval None
AnnaBridge	189:f392fc9709a3	789	*/
AnnaBridge	189:f392fc9709a3	790	__STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	791	{
AnnaBridge	189:f392fc9709a3	792	SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	189:f392fc9709a3	793	}
AnnaBridge	189:f392fc9709a3	794
AnnaBridge	189:f392fc9709a3	795	/**
AnnaBridge	189:f392fc9709a3	796	* @brief Disable acknowledge on Own Address1 match address.
AnnaBridge	189:f392fc9709a3	797	* @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1
AnnaBridge	189:f392fc9709a3	798	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	799	* @retval None
AnnaBridge	189:f392fc9709a3	800	*/
AnnaBridge	189:f392fc9709a3	801	__STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	802	{
AnnaBridge	189:f392fc9709a3	803	CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	189:f392fc9709a3	804	}
AnnaBridge	189:f392fc9709a3	805
AnnaBridge	189:f392fc9709a3	806	/**
AnnaBridge	189:f392fc9709a3	807	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	189:f392fc9709a3	808	* @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1
AnnaBridge	189:f392fc9709a3	809	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	810	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	811	*/
AnnaBridge	189:f392fc9709a3	812	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	813	{
AnnaBridge	189:f392fc9709a3	814	return ((READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	815	}
AnnaBridge	189:f392fc9709a3	816
AnnaBridge	189:f392fc9709a3	817	/**
AnnaBridge	189:f392fc9709a3	818	* @brief Set the 7bits Own Address2.
AnnaBridge	189:f392fc9709a3	819	* @note This action has no effect if own address2 is enabled.
AnnaBridge	189:f392fc9709a3	820	* @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n
AnnaBridge	189:f392fc9709a3	821	* OAR2 OA2MSK LL_I2C_SetOwnAddress2
AnnaBridge	189:f392fc9709a3	822	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	823	* @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
AnnaBridge	189:f392fc9709a3	824	* @param OwnAddrMask This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	825	* @arg @ref LL_I2C_OWNADDRESS2_NOMASK
AnnaBridge	189:f392fc9709a3	826	* @arg @ref LL_I2C_OWNADDRESS2_MASK01
AnnaBridge	189:f392fc9709a3	827	* @arg @ref LL_I2C_OWNADDRESS2_MASK02
AnnaBridge	189:f392fc9709a3	828	* @arg @ref LL_I2C_OWNADDRESS2_MASK03
AnnaBridge	189:f392fc9709a3	829	* @arg @ref LL_I2C_OWNADDRESS2_MASK04
AnnaBridge	189:f392fc9709a3	830	* @arg @ref LL_I2C_OWNADDRESS2_MASK05
AnnaBridge	189:f392fc9709a3	831	* @arg @ref LL_I2C_OWNADDRESS2_MASK06
AnnaBridge	189:f392fc9709a3	832	* @arg @ref LL_I2C_OWNADDRESS2_MASK07
AnnaBridge	189:f392fc9709a3	833	* @retval None
AnnaBridge	189:f392fc9709a3	834	*/
AnnaBridge	189:f392fc9709a3	835	__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
AnnaBridge	189:f392fc9709a3	836	{
AnnaBridge	189:f392fc9709a3	837	MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 \| I2C_OAR2_OA2MSK, OwnAddress2 \| OwnAddrMask);
AnnaBridge	189:f392fc9709a3	838	}
AnnaBridge	189:f392fc9709a3	839
AnnaBridge	189:f392fc9709a3	840	/**
AnnaBridge	189:f392fc9709a3	841	* @brief Enable acknowledge on Own Address2 match address.
AnnaBridge	189:f392fc9709a3	842	* @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2
AnnaBridge	189:f392fc9709a3	843	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	844	* @retval None
AnnaBridge	189:f392fc9709a3	845	*/
AnnaBridge	189:f392fc9709a3	846	__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	847	{
AnnaBridge	189:f392fc9709a3	848	SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	189:f392fc9709a3	849	}
AnnaBridge	189:f392fc9709a3	850
AnnaBridge	189:f392fc9709a3	851	/**
AnnaBridge	189:f392fc9709a3	852	* @brief Disable acknowledge on Own Address2 match address.
AnnaBridge	189:f392fc9709a3	853	* @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2
AnnaBridge	189:f392fc9709a3	854	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	855	* @retval None
AnnaBridge	189:f392fc9709a3	856	*/
AnnaBridge	189:f392fc9709a3	857	__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	858	{
AnnaBridge	189:f392fc9709a3	859	CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	189:f392fc9709a3	860	}
AnnaBridge	189:f392fc9709a3	861
AnnaBridge	189:f392fc9709a3	862	/**
AnnaBridge	189:f392fc9709a3	863	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	189:f392fc9709a3	864	* @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2
AnnaBridge	189:f392fc9709a3	865	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	866	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	867	*/
AnnaBridge	189:f392fc9709a3	868	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	869	{
AnnaBridge	189:f392fc9709a3	870	return ((READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	871	}
AnnaBridge	189:f392fc9709a3	872
AnnaBridge	189:f392fc9709a3	873	/**
AnnaBridge	189:f392fc9709a3	874	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	189:f392fc9709a3	875	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	876	* @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming
AnnaBridge	189:f392fc9709a3	877	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	878	* @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
AnnaBridge	189:f392fc9709a3	879	* @note This parameter is computed with the STM32CubeMX Tool.
AnnaBridge	189:f392fc9709a3	880	* @retval None
AnnaBridge	189:f392fc9709a3	881	*/
AnnaBridge	189:f392fc9709a3	882	__STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
AnnaBridge	189:f392fc9709a3	883	{
AnnaBridge	189:f392fc9709a3	884	WRITE_REG(I2Cx->TIMINGR, Timing);
AnnaBridge	189:f392fc9709a3	885	}
AnnaBridge	189:f392fc9709a3	886
AnnaBridge	189:f392fc9709a3	887	/**
AnnaBridge	189:f392fc9709a3	888	* @brief Get the Timing Prescaler setting.
AnnaBridge	189:f392fc9709a3	889	* @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler
AnnaBridge	189:f392fc9709a3	890	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	891	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	189:f392fc9709a3	892	*/
AnnaBridge	189:f392fc9709a3	893	__STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	894	{
AnnaBridge	189:f392fc9709a3	895	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
AnnaBridge	189:f392fc9709a3	896	}
AnnaBridge	189:f392fc9709a3	897
AnnaBridge	189:f392fc9709a3	898	/**
AnnaBridge	189:f392fc9709a3	899	* @brief Get the SCL low period setting.
AnnaBridge	189:f392fc9709a3	900	* @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod
AnnaBridge	189:f392fc9709a3	901	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	902	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	903	*/
AnnaBridge	189:f392fc9709a3	904	__STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	905	{
AnnaBridge	189:f392fc9709a3	906	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
AnnaBridge	189:f392fc9709a3	907	}
AnnaBridge	189:f392fc9709a3	908
AnnaBridge	189:f392fc9709a3	909	/**
AnnaBridge	189:f392fc9709a3	910	* @brief Get the SCL high period setting.
AnnaBridge	189:f392fc9709a3	911	* @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod
AnnaBridge	189:f392fc9709a3	912	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	913	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	914	*/
AnnaBridge	189:f392fc9709a3	915	__STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	916	{
AnnaBridge	189:f392fc9709a3	917	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
AnnaBridge	189:f392fc9709a3	918	}
AnnaBridge	189:f392fc9709a3	919
AnnaBridge	189:f392fc9709a3	920	/**
AnnaBridge	189:f392fc9709a3	921	* @brief Get the SDA hold time.
AnnaBridge	189:f392fc9709a3	922	* @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime
AnnaBridge	189:f392fc9709a3	923	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	924	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	189:f392fc9709a3	925	*/
AnnaBridge	189:f392fc9709a3	926	__STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	927	{
AnnaBridge	189:f392fc9709a3	928	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
AnnaBridge	189:f392fc9709a3	929	}
AnnaBridge	189:f392fc9709a3	930
AnnaBridge	189:f392fc9709a3	931	/**
AnnaBridge	189:f392fc9709a3	932	* @brief Get the SDA setup time.
AnnaBridge	189:f392fc9709a3	933	* @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime
AnnaBridge	189:f392fc9709a3	934	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	935	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	189:f392fc9709a3	936	*/
AnnaBridge	189:f392fc9709a3	937	__STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	938	{
AnnaBridge	189:f392fc9709a3	939	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
AnnaBridge	189:f392fc9709a3	940	}
AnnaBridge	189:f392fc9709a3	941
AnnaBridge	189:f392fc9709a3	942	/**
AnnaBridge	189:f392fc9709a3	943	* @brief Configure peripheral mode.
AnnaBridge	189:f392fc9709a3	944	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	945	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	946	* @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
AnnaBridge	189:f392fc9709a3	947	* CR1 SMBDEN LL_I2C_SetMode
AnnaBridge	189:f392fc9709a3	948	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	949	* @param PeripheralMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	950	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	189:f392fc9709a3	951	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	189:f392fc9709a3	952	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	189:f392fc9709a3	953	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	189:f392fc9709a3	954	* @retval None
AnnaBridge	189:f392fc9709a3	955	*/
AnnaBridge	189:f392fc9709a3	956	__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
AnnaBridge	189:f392fc9709a3	957	{
AnnaBridge	189:f392fc9709a3	958	MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN, PeripheralMode);
AnnaBridge	189:f392fc9709a3	959	}
AnnaBridge	189:f392fc9709a3	960
AnnaBridge	189:f392fc9709a3	961	/**
AnnaBridge	189:f392fc9709a3	962	* @brief Get peripheral mode.
AnnaBridge	189:f392fc9709a3	963	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	964	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	965	* @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
AnnaBridge	189:f392fc9709a3	966	* CR1 SMBDEN LL_I2C_GetMode
AnnaBridge	189:f392fc9709a3	967	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	968	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	969	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	189:f392fc9709a3	970	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	189:f392fc9709a3	971	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	189:f392fc9709a3	972	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	189:f392fc9709a3	973	*/
AnnaBridge	189:f392fc9709a3	974	__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	975	{
AnnaBridge	189:f392fc9709a3	976	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN));
AnnaBridge	189:f392fc9709a3	977	}
AnnaBridge	189:f392fc9709a3	978
AnnaBridge	189:f392fc9709a3	979	/**
AnnaBridge	189:f392fc9709a3	980	* @brief Enable SMBus alert (Host or Device mode)
AnnaBridge	189:f392fc9709a3	981	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	982	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	983	* @note SMBus Device mode:
AnnaBridge	189:f392fc9709a3	984	* - SMBus Alert pin is drived low and
AnnaBridge	189:f392fc9709a3	985	* Alert Response Address Header acknowledge is enabled.
AnnaBridge	189:f392fc9709a3	986	* SMBus Host mode:
AnnaBridge	189:f392fc9709a3	987	* - SMBus Alert pin management is supported.
AnnaBridge	189:f392fc9709a3	988	* @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert
AnnaBridge	189:f392fc9709a3	989	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	990	* @retval None
AnnaBridge	189:f392fc9709a3	991	*/
AnnaBridge	189:f392fc9709a3	992	__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	993	{
AnnaBridge	189:f392fc9709a3	994	SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	189:f392fc9709a3	995	}
AnnaBridge	189:f392fc9709a3	996
AnnaBridge	189:f392fc9709a3	997	/**
AnnaBridge	189:f392fc9709a3	998	* @brief Disable SMBus alert (Host or Device mode)
AnnaBridge	189:f392fc9709a3	999	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1000	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1001	* @note SMBus Device mode:
AnnaBridge	189:f392fc9709a3	1002	* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
AnnaBridge	189:f392fc9709a3	1003	* Alert Response Address Header acknowledge is disabled.
AnnaBridge	189:f392fc9709a3	1004	* SMBus Host mode:
AnnaBridge	189:f392fc9709a3	1005	* - SMBus Alert pin management is not supported.
AnnaBridge	189:f392fc9709a3	1006	* @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert
AnnaBridge	189:f392fc9709a3	1007	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1008	* @retval None
AnnaBridge	189:f392fc9709a3	1009	*/
AnnaBridge	189:f392fc9709a3	1010	__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1011	{
AnnaBridge	189:f392fc9709a3	1012	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	189:f392fc9709a3	1013	}
AnnaBridge	189:f392fc9709a3	1014
AnnaBridge	189:f392fc9709a3	1015	/**
AnnaBridge	189:f392fc9709a3	1016	* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1017	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1018	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1019	* @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
AnnaBridge	189:f392fc9709a3	1020	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1021	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1022	*/
AnnaBridge	189:f392fc9709a3	1023	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1024	{
AnnaBridge	189:f392fc9709a3	1025	return ((READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1026	}
AnnaBridge	189:f392fc9709a3	1027
AnnaBridge	189:f392fc9709a3	1028	/**
AnnaBridge	189:f392fc9709a3	1029	* @brief Enable SMBus Packet Error Calculation (PEC).
AnnaBridge	189:f392fc9709a3	1030	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1031	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1032	* @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
AnnaBridge	189:f392fc9709a3	1033	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1034	* @retval None
AnnaBridge	189:f392fc9709a3	1035	*/
AnnaBridge	189:f392fc9709a3	1036	__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1037	{
AnnaBridge	189:f392fc9709a3	1038	SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	189:f392fc9709a3	1039	}
AnnaBridge	189:f392fc9709a3	1040
AnnaBridge	189:f392fc9709a3	1041	/**
AnnaBridge	189:f392fc9709a3	1042	* @brief Disable SMBus Packet Error Calculation (PEC).
AnnaBridge	189:f392fc9709a3	1043	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1044	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1045	* @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
AnnaBridge	189:f392fc9709a3	1046	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1047	* @retval None
AnnaBridge	189:f392fc9709a3	1048	*/
AnnaBridge	189:f392fc9709a3	1049	__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1050	{
AnnaBridge	189:f392fc9709a3	1051	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	189:f392fc9709a3	1052	}
AnnaBridge	189:f392fc9709a3	1053
AnnaBridge	189:f392fc9709a3	1054	/**
AnnaBridge	189:f392fc9709a3	1055	* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1056	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1057	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1058	* @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
AnnaBridge	189:f392fc9709a3	1059	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1060	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1061	*/
AnnaBridge	189:f392fc9709a3	1062	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1063	{
AnnaBridge	189:f392fc9709a3	1064	return ((READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1065	}
AnnaBridge	189:f392fc9709a3	1066
AnnaBridge	189:f392fc9709a3	1067	/**
AnnaBridge	189:f392fc9709a3	1068	* @brief Configure the SMBus Clock Timeout.
AnnaBridge	189:f392fc9709a3	1069	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1070	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1071	* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
AnnaBridge	189:f392fc9709a3	1072	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1073	* TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1074	* TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout
AnnaBridge	189:f392fc9709a3	1075	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1076	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	189:f392fc9709a3	1077	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1078	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	189:f392fc9709a3	1079	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	189:f392fc9709a3	1080	* @param TimeoutB
AnnaBridge	189:f392fc9709a3	1081	* @retval None
AnnaBridge	189:f392fc9709a3	1082	*/
AnnaBridge	189:f392fc9709a3	1083	__STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
AnnaBridge	189:f392fc9709a3	1084	uint32_t TimeoutB)
AnnaBridge	189:f392fc9709a3	1085	{
AnnaBridge	189:f392fc9709a3	1086	MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA \| I2C_TIMEOUTR_TIDLE \| I2C_TIMEOUTR_TIMEOUTB,
AnnaBridge	189:f392fc9709a3	1087	TimeoutA \| TimeoutAMode \| (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
AnnaBridge	189:f392fc9709a3	1088	}
AnnaBridge	189:f392fc9709a3	1089
AnnaBridge	189:f392fc9709a3	1090	/**
AnnaBridge	189:f392fc9709a3	1091	* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
AnnaBridge	189:f392fc9709a3	1092	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1093	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1094	* @note These bits can only be programmed when TimeoutA is disabled.
AnnaBridge	189:f392fc9709a3	1095	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
AnnaBridge	189:f392fc9709a3	1096	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1097	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	189:f392fc9709a3	1098	* @retval None
AnnaBridge	189:f392fc9709a3	1099	*/
AnnaBridge	189:f392fc9709a3	1100	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
AnnaBridge	189:f392fc9709a3	1101	{
AnnaBridge	189:f392fc9709a3	1102	WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
AnnaBridge	189:f392fc9709a3	1103	}
AnnaBridge	189:f392fc9709a3	1104
AnnaBridge	189:f392fc9709a3	1105	/**
AnnaBridge	189:f392fc9709a3	1106	* @brief Get the SMBus Clock TimeoutA setting.
AnnaBridge	189:f392fc9709a3	1107	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1108	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1109	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
AnnaBridge	189:f392fc9709a3	1110	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1111	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1112	*/
AnnaBridge	189:f392fc9709a3	1113	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1114	{
AnnaBridge	189:f392fc9709a3	1115	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
AnnaBridge	189:f392fc9709a3	1116	}
AnnaBridge	189:f392fc9709a3	1117
AnnaBridge	189:f392fc9709a3	1118	/**
AnnaBridge	189:f392fc9709a3	1119	* @brief Set the SMBus Clock TimeoutA mode.
AnnaBridge	189:f392fc9709a3	1120	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1121	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1122	* @note This bit can only be programmed when TimeoutA is disabled.
AnnaBridge	189:f392fc9709a3	1123	* @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
AnnaBridge	189:f392fc9709a3	1124	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1125	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1126	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	189:f392fc9709a3	1127	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	189:f392fc9709a3	1128	* @retval None
AnnaBridge	189:f392fc9709a3	1129	*/
AnnaBridge	189:f392fc9709a3	1130	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
AnnaBridge	189:f392fc9709a3	1131	{
AnnaBridge	189:f392fc9709a3	1132	WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
AnnaBridge	189:f392fc9709a3	1133	}
AnnaBridge	189:f392fc9709a3	1134
AnnaBridge	189:f392fc9709a3	1135	/**
AnnaBridge	189:f392fc9709a3	1136	* @brief Get the SMBus Clock TimeoutA mode.
AnnaBridge	189:f392fc9709a3	1137	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1138	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1139	* @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
AnnaBridge	189:f392fc9709a3	1140	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1141	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1142	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	189:f392fc9709a3	1143	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	189:f392fc9709a3	1144	*/
AnnaBridge	189:f392fc9709a3	1145	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1146	{
AnnaBridge	189:f392fc9709a3	1147	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
AnnaBridge	189:f392fc9709a3	1148	}
AnnaBridge	189:f392fc9709a3	1149
AnnaBridge	189:f392fc9709a3	1150	/**
AnnaBridge	189:f392fc9709a3	1151	* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
AnnaBridge	189:f392fc9709a3	1152	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1153	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1154	* @note These bits can only be programmed when TimeoutB is disabled.
AnnaBridge	189:f392fc9709a3	1155	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
AnnaBridge	189:f392fc9709a3	1156	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1157	* @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	189:f392fc9709a3	1158	* @retval None
AnnaBridge	189:f392fc9709a3	1159	*/
AnnaBridge	189:f392fc9709a3	1160	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
AnnaBridge	189:f392fc9709a3	1161	{
AnnaBridge	189:f392fc9709a3	1162	WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	189:f392fc9709a3	1163	}
AnnaBridge	189:f392fc9709a3	1164
AnnaBridge	189:f392fc9709a3	1165	/**
AnnaBridge	189:f392fc9709a3	1166	* @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
AnnaBridge	189:f392fc9709a3	1167	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1168	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1169	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
AnnaBridge	189:f392fc9709a3	1170	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1171	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1172	*/
AnnaBridge	189:f392fc9709a3	1173	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1174	{
AnnaBridge	189:f392fc9709a3	1175	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	189:f392fc9709a3	1176	}
AnnaBridge	189:f392fc9709a3	1177
AnnaBridge	189:f392fc9709a3	1178	/**
AnnaBridge	189:f392fc9709a3	1179	* @brief Enable the SMBus Clock Timeout.
AnnaBridge	189:f392fc9709a3	1180	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1181	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1182	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1183	* TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
AnnaBridge	189:f392fc9709a3	1184	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1185	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1186	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	189:f392fc9709a3	1187	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	189:f392fc9709a3	1188	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	189:f392fc9709a3	1189	* @retval None
AnnaBridge	189:f392fc9709a3	1190	*/
AnnaBridge	189:f392fc9709a3	1191	__STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	189:f392fc9709a3	1192	{
AnnaBridge	189:f392fc9709a3	1193	SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	189:f392fc9709a3	1194	}
AnnaBridge	189:f392fc9709a3	1195
AnnaBridge	189:f392fc9709a3	1196	/**
AnnaBridge	189:f392fc9709a3	1197	* @brief Disable the SMBus Clock Timeout.
AnnaBridge	189:f392fc9709a3	1198	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1199	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1200	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1201	* TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
AnnaBridge	189:f392fc9709a3	1202	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1203	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1204	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	189:f392fc9709a3	1205	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	189:f392fc9709a3	1206	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	189:f392fc9709a3	1207	* @retval None
AnnaBridge	189:f392fc9709a3	1208	*/
AnnaBridge	189:f392fc9709a3	1209	__STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	189:f392fc9709a3	1210	{
AnnaBridge	189:f392fc9709a3	1211	CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	189:f392fc9709a3	1212	}
AnnaBridge	189:f392fc9709a3	1213
AnnaBridge	189:f392fc9709a3	1214	/**
AnnaBridge	189:f392fc9709a3	1215	* @brief Check if the SMBus Clock Timeout is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1216	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1217	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1218	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1219	* TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
AnnaBridge	189:f392fc9709a3	1220	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1221	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1222	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	189:f392fc9709a3	1223	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	189:f392fc9709a3	1224	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	189:f392fc9709a3	1225	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1226	*/
AnnaBridge	189:f392fc9709a3	1227	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	189:f392fc9709a3	1228	{
AnnaBridge	189:f392fc9709a3	1229	return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1230	}
AnnaBridge	189:f392fc9709a3	1231
AnnaBridge	189:f392fc9709a3	1232	/**
AnnaBridge	189:f392fc9709a3	1233	* @}
AnnaBridge	189:f392fc9709a3	1234	*/
AnnaBridge	189:f392fc9709a3	1235
AnnaBridge	189:f392fc9709a3	1236	/** @defgroup I2C_LL_EF_IT_Management IT_Management
AnnaBridge	189:f392fc9709a3	1237	* @{
AnnaBridge	189:f392fc9709a3	1238	*/
AnnaBridge	189:f392fc9709a3	1239
AnnaBridge	189:f392fc9709a3	1240	/**
AnnaBridge	189:f392fc9709a3	1241	* @brief Enable TXIS interrupt.
AnnaBridge	189:f392fc9709a3	1242	* @rmtoll CR1 TXIE LL_I2C_EnableIT_TX
AnnaBridge	189:f392fc9709a3	1243	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1244	* @retval None
AnnaBridge	189:f392fc9709a3	1245	*/
AnnaBridge	189:f392fc9709a3	1246	__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1247	{
AnnaBridge	189:f392fc9709a3	1248	SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	189:f392fc9709a3	1249	}
AnnaBridge	189:f392fc9709a3	1250
AnnaBridge	189:f392fc9709a3	1251	/**
AnnaBridge	189:f392fc9709a3	1252	* @brief Disable TXIS interrupt.
AnnaBridge	189:f392fc9709a3	1253	* @rmtoll CR1 TXIE LL_I2C_DisableIT_TX
AnnaBridge	189:f392fc9709a3	1254	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1255	* @retval None
AnnaBridge	189:f392fc9709a3	1256	*/
AnnaBridge	189:f392fc9709a3	1257	__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1258	{
AnnaBridge	189:f392fc9709a3	1259	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	189:f392fc9709a3	1260	}
AnnaBridge	189:f392fc9709a3	1261
AnnaBridge	189:f392fc9709a3	1262	/**
AnnaBridge	189:f392fc9709a3	1263	* @brief Check if the TXIS Interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1264	* @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX
AnnaBridge	189:f392fc9709a3	1265	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1266	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1267	*/
AnnaBridge	189:f392fc9709a3	1268	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1269	{
AnnaBridge	189:f392fc9709a3	1270	return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1271	}
AnnaBridge	189:f392fc9709a3	1272
AnnaBridge	189:f392fc9709a3	1273	/**
AnnaBridge	189:f392fc9709a3	1274	* @brief Enable RXNE interrupt.
AnnaBridge	189:f392fc9709a3	1275	* @rmtoll CR1 RXIE LL_I2C_EnableIT_RX
AnnaBridge	189:f392fc9709a3	1276	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1277	* @retval None
AnnaBridge	189:f392fc9709a3	1278	*/
AnnaBridge	189:f392fc9709a3	1279	__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1280	{
AnnaBridge	189:f392fc9709a3	1281	SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	189:f392fc9709a3	1282	}
AnnaBridge	189:f392fc9709a3	1283
AnnaBridge	189:f392fc9709a3	1284	/**
AnnaBridge	189:f392fc9709a3	1285	* @brief Disable RXNE interrupt.
AnnaBridge	189:f392fc9709a3	1286	* @rmtoll CR1 RXIE LL_I2C_DisableIT_RX
AnnaBridge	189:f392fc9709a3	1287	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1288	* @retval None
AnnaBridge	189:f392fc9709a3	1289	*/
AnnaBridge	189:f392fc9709a3	1290	__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1291	{
AnnaBridge	189:f392fc9709a3	1292	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	189:f392fc9709a3	1293	}
AnnaBridge	189:f392fc9709a3	1294
AnnaBridge	189:f392fc9709a3	1295	/**
AnnaBridge	189:f392fc9709a3	1296	* @brief Check if the RXNE Interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1297	* @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX
AnnaBridge	189:f392fc9709a3	1298	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1299	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1300	*/
AnnaBridge	189:f392fc9709a3	1301	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1302	{
AnnaBridge	189:f392fc9709a3	1303	return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1304	}
AnnaBridge	189:f392fc9709a3	1305
AnnaBridge	189:f392fc9709a3	1306	/**
AnnaBridge	189:f392fc9709a3	1307	* @brief Enable Address match interrupt (slave mode only).
AnnaBridge	189:f392fc9709a3	1308	* @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR
AnnaBridge	189:f392fc9709a3	1309	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1310	* @retval None
AnnaBridge	189:f392fc9709a3	1311	*/
AnnaBridge	189:f392fc9709a3	1312	__STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1313	{
AnnaBridge	189:f392fc9709a3	1314	SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	189:f392fc9709a3	1315	}
AnnaBridge	189:f392fc9709a3	1316
AnnaBridge	189:f392fc9709a3	1317	/**
AnnaBridge	189:f392fc9709a3	1318	* @brief Disable Address match interrupt (slave mode only).
AnnaBridge	189:f392fc9709a3	1319	* @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR
AnnaBridge	189:f392fc9709a3	1320	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1321	* @retval None
AnnaBridge	189:f392fc9709a3	1322	*/
AnnaBridge	189:f392fc9709a3	1323	__STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1324	{
AnnaBridge	189:f392fc9709a3	1325	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	189:f392fc9709a3	1326	}
AnnaBridge	189:f392fc9709a3	1327
AnnaBridge	189:f392fc9709a3	1328	/**
AnnaBridge	189:f392fc9709a3	1329	* @brief Check if Address match interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1330	* @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR
AnnaBridge	189:f392fc9709a3	1331	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1332	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1333	*/
AnnaBridge	189:f392fc9709a3	1334	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1335	{
AnnaBridge	189:f392fc9709a3	1336	return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1337	}
AnnaBridge	189:f392fc9709a3	1338
AnnaBridge	189:f392fc9709a3	1339	/**
AnnaBridge	189:f392fc9709a3	1340	* @brief Enable Not acknowledge received interrupt.
AnnaBridge	189:f392fc9709a3	1341	* @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK
AnnaBridge	189:f392fc9709a3	1342	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1343	* @retval None
AnnaBridge	189:f392fc9709a3	1344	*/
AnnaBridge	189:f392fc9709a3	1345	__STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1346	{
AnnaBridge	189:f392fc9709a3	1347	SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	189:f392fc9709a3	1348	}
AnnaBridge	189:f392fc9709a3	1349
AnnaBridge	189:f392fc9709a3	1350	/**
AnnaBridge	189:f392fc9709a3	1351	* @brief Disable Not acknowledge received interrupt.
AnnaBridge	189:f392fc9709a3	1352	* @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK
AnnaBridge	189:f392fc9709a3	1353	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1354	* @retval None
AnnaBridge	189:f392fc9709a3	1355	*/
AnnaBridge	189:f392fc9709a3	1356	__STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1357	{
AnnaBridge	189:f392fc9709a3	1358	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	189:f392fc9709a3	1359	}
AnnaBridge	189:f392fc9709a3	1360
AnnaBridge	189:f392fc9709a3	1361	/**
AnnaBridge	189:f392fc9709a3	1362	* @brief Check if Not acknowledge received interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1363	* @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK
AnnaBridge	189:f392fc9709a3	1364	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1365	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1366	*/
AnnaBridge	189:f392fc9709a3	1367	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1368	{
AnnaBridge	189:f392fc9709a3	1369	return ((READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1370	}
AnnaBridge	189:f392fc9709a3	1371
AnnaBridge	189:f392fc9709a3	1372	/**
AnnaBridge	189:f392fc9709a3	1373	* @brief Enable STOP detection interrupt.
AnnaBridge	189:f392fc9709a3	1374	* @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP
AnnaBridge	189:f392fc9709a3	1375	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1376	* @retval None
AnnaBridge	189:f392fc9709a3	1377	*/
AnnaBridge	189:f392fc9709a3	1378	__STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1379	{
AnnaBridge	189:f392fc9709a3	1380	SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	189:f392fc9709a3	1381	}
AnnaBridge	189:f392fc9709a3	1382
AnnaBridge	189:f392fc9709a3	1383	/**
AnnaBridge	189:f392fc9709a3	1384	* @brief Disable STOP detection interrupt.
AnnaBridge	189:f392fc9709a3	1385	* @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP
AnnaBridge	189:f392fc9709a3	1386	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1387	* @retval None
AnnaBridge	189:f392fc9709a3	1388	*/
AnnaBridge	189:f392fc9709a3	1389	__STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1390	{
AnnaBridge	189:f392fc9709a3	1391	CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	189:f392fc9709a3	1392	}
AnnaBridge	189:f392fc9709a3	1393
AnnaBridge	189:f392fc9709a3	1394	/**
AnnaBridge	189:f392fc9709a3	1395	* @brief Check if STOP detection interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1396	* @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP
AnnaBridge	189:f392fc9709a3	1397	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1398	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1399	*/
AnnaBridge	189:f392fc9709a3	1400	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1401	{
AnnaBridge	189:f392fc9709a3	1402	return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1403	}
AnnaBridge	189:f392fc9709a3	1404
AnnaBridge	189:f392fc9709a3	1405	/**
AnnaBridge	189:f392fc9709a3	1406	* @brief Enable Transfer Complete interrupt.
AnnaBridge	189:f392fc9709a3	1407	* @note Any of these events will generate interrupt :
AnnaBridge	189:f392fc9709a3	1408	* Transfer Complete (TC)
AnnaBridge	189:f392fc9709a3	1409	* Transfer Complete Reload (TCR)
AnnaBridge	189:f392fc9709a3	1410	* @rmtoll CR1 TCIE LL_I2C_EnableIT_TC
AnnaBridge	189:f392fc9709a3	1411	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1412	* @retval None
AnnaBridge	189:f392fc9709a3	1413	*/
AnnaBridge	189:f392fc9709a3	1414	__STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1415	{
AnnaBridge	189:f392fc9709a3	1416	SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	189:f392fc9709a3	1417	}
AnnaBridge	189:f392fc9709a3	1418
AnnaBridge	189:f392fc9709a3	1419	/**
AnnaBridge	189:f392fc9709a3	1420	* @brief Disable Transfer Complete interrupt.
AnnaBridge	189:f392fc9709a3	1421	* @note Any of these events will generate interrupt :
AnnaBridge	189:f392fc9709a3	1422	* Transfer Complete (TC)
AnnaBridge	189:f392fc9709a3	1423	* Transfer Complete Reload (TCR)
AnnaBridge	189:f392fc9709a3	1424	* @rmtoll CR1 TCIE LL_I2C_DisableIT_TC
AnnaBridge	189:f392fc9709a3	1425	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1426	* @retval None
AnnaBridge	189:f392fc9709a3	1427	*/
AnnaBridge	189:f392fc9709a3	1428	__STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1429	{
AnnaBridge	189:f392fc9709a3	1430	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	189:f392fc9709a3	1431	}
AnnaBridge	189:f392fc9709a3	1432
AnnaBridge	189:f392fc9709a3	1433	/**
AnnaBridge	189:f392fc9709a3	1434	* @brief Check if Transfer Complete interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1435	* @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC
AnnaBridge	189:f392fc9709a3	1436	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1437	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1438	*/
AnnaBridge	189:f392fc9709a3	1439	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1440	{
AnnaBridge	189:f392fc9709a3	1441	return ((READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1442	}
AnnaBridge	189:f392fc9709a3	1443
AnnaBridge	189:f392fc9709a3	1444	/**
AnnaBridge	189:f392fc9709a3	1445	* @brief Enable Error interrupts.
AnnaBridge	189:f392fc9709a3	1446	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1447	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1448	* @note Any of these errors will generate interrupt :
AnnaBridge	189:f392fc9709a3	1449	* Arbitration Loss (ARLO)
AnnaBridge	189:f392fc9709a3	1450	* Bus Error detection (BERR)
AnnaBridge	189:f392fc9709a3	1451	* Overrun/Underrun (OVR)
AnnaBridge	189:f392fc9709a3	1452	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	189:f392fc9709a3	1453	* SMBus PEC error detection (PECERR)
AnnaBridge	189:f392fc9709a3	1454	* SMBus Alert pin event detection (ALERT)
AnnaBridge	189:f392fc9709a3	1455	* @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR
AnnaBridge	189:f392fc9709a3	1456	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1457	* @retval None
AnnaBridge	189:f392fc9709a3	1458	*/
AnnaBridge	189:f392fc9709a3	1459	__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1460	{
AnnaBridge	189:f392fc9709a3	1461	SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	189:f392fc9709a3	1462	}
AnnaBridge	189:f392fc9709a3	1463
AnnaBridge	189:f392fc9709a3	1464	/**
AnnaBridge	189:f392fc9709a3	1465	* @brief Disable Error interrupts.
AnnaBridge	189:f392fc9709a3	1466	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1467	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1468	* @note Any of these errors will generate interrupt :
AnnaBridge	189:f392fc9709a3	1469	* Arbitration Loss (ARLO)
AnnaBridge	189:f392fc9709a3	1470	* Bus Error detection (BERR)
AnnaBridge	189:f392fc9709a3	1471	* Overrun/Underrun (OVR)
AnnaBridge	189:f392fc9709a3	1472	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	189:f392fc9709a3	1473	* SMBus PEC error detection (PECERR)
AnnaBridge	189:f392fc9709a3	1474	* SMBus Alert pin event detection (ALERT)
AnnaBridge	189:f392fc9709a3	1475	* @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR
AnnaBridge	189:f392fc9709a3	1476	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1477	* @retval None
AnnaBridge	189:f392fc9709a3	1478	*/
AnnaBridge	189:f392fc9709a3	1479	__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1480	{
AnnaBridge	189:f392fc9709a3	1481	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	189:f392fc9709a3	1482	}
AnnaBridge	189:f392fc9709a3	1483
AnnaBridge	189:f392fc9709a3	1484	/**
AnnaBridge	189:f392fc9709a3	1485	* @brief Check if Error interrupts are enabled or disabled.
AnnaBridge	189:f392fc9709a3	1486	* @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR
AnnaBridge	189:f392fc9709a3	1487	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1488	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1489	*/
AnnaBridge	189:f392fc9709a3	1490	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1491	{
AnnaBridge	189:f392fc9709a3	1492	return ((READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1493	}
AnnaBridge	189:f392fc9709a3	1494
AnnaBridge	189:f392fc9709a3	1495	/**
AnnaBridge	189:f392fc9709a3	1496	* @}
AnnaBridge	189:f392fc9709a3	1497	*/
AnnaBridge	189:f392fc9709a3	1498
AnnaBridge	189:f392fc9709a3	1499	/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
AnnaBridge	189:f392fc9709a3	1500	* @{
AnnaBridge	189:f392fc9709a3	1501	*/
AnnaBridge	189:f392fc9709a3	1502
AnnaBridge	189:f392fc9709a3	1503	/**
AnnaBridge	189:f392fc9709a3	1504	* @brief Indicate the status of Transmit data register empty flag.
AnnaBridge	189:f392fc9709a3	1505	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	189:f392fc9709a3	1506	* SET: When Transmit data register is empty.
AnnaBridge	189:f392fc9709a3	1507	* @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
AnnaBridge	189:f392fc9709a3	1508	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1509	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1510	*/
AnnaBridge	189:f392fc9709a3	1511	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1512	{
AnnaBridge	189:f392fc9709a3	1513	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1514	}
AnnaBridge	189:f392fc9709a3	1515
AnnaBridge	189:f392fc9709a3	1516	/**
AnnaBridge	189:f392fc9709a3	1517	* @brief Indicate the status of Transmit interrupt flag.
AnnaBridge	189:f392fc9709a3	1518	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	189:f392fc9709a3	1519	* SET: When Transmit data register is empty.
AnnaBridge	189:f392fc9709a3	1520	* @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS
AnnaBridge	189:f392fc9709a3	1521	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1522	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1523	*/
AnnaBridge	189:f392fc9709a3	1524	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1525	{
AnnaBridge	189:f392fc9709a3	1526	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1527	}
AnnaBridge	189:f392fc9709a3	1528
AnnaBridge	189:f392fc9709a3	1529	/**
AnnaBridge	189:f392fc9709a3	1530	* @brief Indicate the status of Receive data register not empty flag.
AnnaBridge	189:f392fc9709a3	1531	* @note RESET: When Receive data register is read.
AnnaBridge	189:f392fc9709a3	1532	* SET: When the received data is copied in Receive data register.
AnnaBridge	189:f392fc9709a3	1533	* @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
AnnaBridge	189:f392fc9709a3	1534	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1535	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1536	*/
AnnaBridge	189:f392fc9709a3	1537	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1538	{
AnnaBridge	189:f392fc9709a3	1539	return ((READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1540	}
AnnaBridge	189:f392fc9709a3	1541
AnnaBridge	189:f392fc9709a3	1542	/**
AnnaBridge	189:f392fc9709a3	1543	* @brief Indicate the status of Address matched flag (slave mode).
AnnaBridge	189:f392fc9709a3	1544	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1545	* SET: When the received slave address matched with one of the enabled slave address.
AnnaBridge	189:f392fc9709a3	1546	* @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR
AnnaBridge	189:f392fc9709a3	1547	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1548	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1549	*/
AnnaBridge	189:f392fc9709a3	1550	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1551	{
AnnaBridge	189:f392fc9709a3	1552	return ((READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1553	}
AnnaBridge	189:f392fc9709a3	1554
AnnaBridge	189:f392fc9709a3	1555	/**
AnnaBridge	189:f392fc9709a3	1556	* @brief Indicate the status of Not Acknowledge received flag.
AnnaBridge	189:f392fc9709a3	1557	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1558	* SET: When a NACK is received after a byte transmission.
AnnaBridge	189:f392fc9709a3	1559	* @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
AnnaBridge	189:f392fc9709a3	1560	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1561	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1562	*/
AnnaBridge	189:f392fc9709a3	1563	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1564	{
AnnaBridge	189:f392fc9709a3	1565	return ((READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1566	}
AnnaBridge	189:f392fc9709a3	1567
AnnaBridge	189:f392fc9709a3	1568	/**
AnnaBridge	189:f392fc9709a3	1569	* @brief Indicate the status of Stop detection flag.
AnnaBridge	189:f392fc9709a3	1570	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1571	* SET: When a Stop condition is detected.
AnnaBridge	189:f392fc9709a3	1572	* @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
AnnaBridge	189:f392fc9709a3	1573	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1574	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1575	*/
AnnaBridge	189:f392fc9709a3	1576	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1577	{
AnnaBridge	189:f392fc9709a3	1578	return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1579	}
AnnaBridge	189:f392fc9709a3	1580
AnnaBridge	189:f392fc9709a3	1581	/**
AnnaBridge	189:f392fc9709a3	1582	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	189:f392fc9709a3	1583	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1584	* SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
AnnaBridge	189:f392fc9709a3	1585	* @rmtoll ISR TC LL_I2C_IsActiveFlag_TC
AnnaBridge	189:f392fc9709a3	1586	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1587	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1588	*/
AnnaBridge	189:f392fc9709a3	1589	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1590	{
AnnaBridge	189:f392fc9709a3	1591	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1592	}
AnnaBridge	189:f392fc9709a3	1593
AnnaBridge	189:f392fc9709a3	1594	/**
AnnaBridge	189:f392fc9709a3	1595	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	189:f392fc9709a3	1596	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1597	* SET: When RELOAD=1 and NBYTES date have been transferred.
AnnaBridge	189:f392fc9709a3	1598	* @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR
AnnaBridge	189:f392fc9709a3	1599	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1600	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1601	*/
AnnaBridge	189:f392fc9709a3	1602	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1603	{
AnnaBridge	189:f392fc9709a3	1604	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1605	}
AnnaBridge	189:f392fc9709a3	1606
AnnaBridge	189:f392fc9709a3	1607	/**
AnnaBridge	189:f392fc9709a3	1608	* @brief Indicate the status of Bus error flag.
AnnaBridge	189:f392fc9709a3	1609	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1610	* SET: When a misplaced Start or Stop condition is detected.
AnnaBridge	189:f392fc9709a3	1611	* @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR
AnnaBridge	189:f392fc9709a3	1612	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1613	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1614	*/
AnnaBridge	189:f392fc9709a3	1615	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1616	{
AnnaBridge	189:f392fc9709a3	1617	return ((READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1618	}
AnnaBridge	189:f392fc9709a3	1619
AnnaBridge	189:f392fc9709a3	1620	/**
AnnaBridge	189:f392fc9709a3	1621	* @brief Indicate the status of Arbitration lost flag.
AnnaBridge	189:f392fc9709a3	1622	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1623	* SET: When arbitration lost.
AnnaBridge	189:f392fc9709a3	1624	* @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO
AnnaBridge	189:f392fc9709a3	1625	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1626	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1627	*/
AnnaBridge	189:f392fc9709a3	1628	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1629	{
AnnaBridge	189:f392fc9709a3	1630	return ((READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1631	}
AnnaBridge	189:f392fc9709a3	1632
AnnaBridge	189:f392fc9709a3	1633	/**
AnnaBridge	189:f392fc9709a3	1634	* @brief Indicate the status of Overrun/Underrun flag (slave mode).
AnnaBridge	189:f392fc9709a3	1635	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1636	* SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
AnnaBridge	189:f392fc9709a3	1637	* @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR
AnnaBridge	189:f392fc9709a3	1638	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1639	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1640	*/
AnnaBridge	189:f392fc9709a3	1641	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1642	{
AnnaBridge	189:f392fc9709a3	1643	return ((READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1644	}
AnnaBridge	189:f392fc9709a3	1645
AnnaBridge	189:f392fc9709a3	1646	/**
AnnaBridge	189:f392fc9709a3	1647	* @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge	189:f392fc9709a3	1648	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1649	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1650	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1651	* SET: When the received PEC does not match with the PEC register content.
AnnaBridge	189:f392fc9709a3	1652	* @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge	189:f392fc9709a3	1653	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1654	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1655	*/
AnnaBridge	189:f392fc9709a3	1656	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1657	{
AnnaBridge	189:f392fc9709a3	1658	return ((READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1659	}
AnnaBridge	189:f392fc9709a3	1660
AnnaBridge	189:f392fc9709a3	1661	/**
AnnaBridge	189:f392fc9709a3	1662	* @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge	189:f392fc9709a3	1663	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1664	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1665	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1666	* SET: When a timeout or extended clock timeout occurs.
AnnaBridge	189:f392fc9709a3	1667	* @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge	189:f392fc9709a3	1668	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1669	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1670	*/
AnnaBridge	189:f392fc9709a3	1671	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1672	{
AnnaBridge	189:f392fc9709a3	1673	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1674	}
AnnaBridge	189:f392fc9709a3	1675
AnnaBridge	189:f392fc9709a3	1676	/**
AnnaBridge	189:f392fc9709a3	1677	* @brief Indicate the status of SMBus alert flag.
AnnaBridge	189:f392fc9709a3	1678	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1679	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1680	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1681	* SET: When SMBus host configuration, SMBus alert enabled and
AnnaBridge	189:f392fc9709a3	1682	* a falling edge event occurs on SMBA pin.
AnnaBridge	189:f392fc9709a3	1683	* @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge	189:f392fc9709a3	1684	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1685	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1686	*/
AnnaBridge	189:f392fc9709a3	1687	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1688	{
AnnaBridge	189:f392fc9709a3	1689	return ((READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1690	}
AnnaBridge	189:f392fc9709a3	1691
AnnaBridge	189:f392fc9709a3	1692	/**
AnnaBridge	189:f392fc9709a3	1693	* @brief Indicate the status of Bus Busy flag.
AnnaBridge	189:f392fc9709a3	1694	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1695	* SET: When a Start condition is detected.
AnnaBridge	189:f392fc9709a3	1696	* @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY
AnnaBridge	189:f392fc9709a3	1697	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1698	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1699	*/
AnnaBridge	189:f392fc9709a3	1700	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1701	{
AnnaBridge	189:f392fc9709a3	1702	return ((READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1703	}
AnnaBridge	189:f392fc9709a3	1704
AnnaBridge	189:f392fc9709a3	1705	/**
AnnaBridge	189:f392fc9709a3	1706	* @brief Clear Address Matched flag.
AnnaBridge	189:f392fc9709a3	1707	* @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR
AnnaBridge	189:f392fc9709a3	1708	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1709	* @retval None
AnnaBridge	189:f392fc9709a3	1710	*/
AnnaBridge	189:f392fc9709a3	1711	__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1712	{
AnnaBridge	189:f392fc9709a3	1713	SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
AnnaBridge	189:f392fc9709a3	1714	}
AnnaBridge	189:f392fc9709a3	1715
AnnaBridge	189:f392fc9709a3	1716	/**
AnnaBridge	189:f392fc9709a3	1717	* @brief Clear Not Acknowledge flag.
AnnaBridge	189:f392fc9709a3	1718	* @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK
AnnaBridge	189:f392fc9709a3	1719	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1720	* @retval None
AnnaBridge	189:f392fc9709a3	1721	*/
AnnaBridge	189:f392fc9709a3	1722	__STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1723	{
AnnaBridge	189:f392fc9709a3	1724	SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
AnnaBridge	189:f392fc9709a3	1725	}
AnnaBridge	189:f392fc9709a3	1726
AnnaBridge	189:f392fc9709a3	1727	/**
AnnaBridge	189:f392fc9709a3	1728	* @brief Clear Stop detection flag.
AnnaBridge	189:f392fc9709a3	1729	* @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
AnnaBridge	189:f392fc9709a3	1730	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1731	* @retval None
AnnaBridge	189:f392fc9709a3	1732	*/
AnnaBridge	189:f392fc9709a3	1733	__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1734	{
AnnaBridge	189:f392fc9709a3	1735	SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
AnnaBridge	189:f392fc9709a3	1736	}
AnnaBridge	189:f392fc9709a3	1737
AnnaBridge	189:f392fc9709a3	1738	/**
AnnaBridge	189:f392fc9709a3	1739	* @brief Clear Transmit data register empty flag (TXE).
AnnaBridge	189:f392fc9709a3	1740	* @note This bit can be clear by software in order to flush the transmit data register (TXDR).
AnnaBridge	189:f392fc9709a3	1741	* @rmtoll ISR TXE LL_I2C_ClearFlag_TXE
AnnaBridge	189:f392fc9709a3	1742	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1743	* @retval None
AnnaBridge	189:f392fc9709a3	1744	*/
AnnaBridge	189:f392fc9709a3	1745	__STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1746	{
AnnaBridge	189:f392fc9709a3	1747	WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
AnnaBridge	189:f392fc9709a3	1748	}
AnnaBridge	189:f392fc9709a3	1749
AnnaBridge	189:f392fc9709a3	1750	/**
AnnaBridge	189:f392fc9709a3	1751	* @brief Clear Bus error flag.
AnnaBridge	189:f392fc9709a3	1752	* @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR
AnnaBridge	189:f392fc9709a3	1753	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1754	* @retval None
AnnaBridge	189:f392fc9709a3	1755	*/
AnnaBridge	189:f392fc9709a3	1756	__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1757	{
AnnaBridge	189:f392fc9709a3	1758	SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
AnnaBridge	189:f392fc9709a3	1759	}
AnnaBridge	189:f392fc9709a3	1760
AnnaBridge	189:f392fc9709a3	1761	/**
AnnaBridge	189:f392fc9709a3	1762	* @brief Clear Arbitration lost flag.
AnnaBridge	189:f392fc9709a3	1763	* @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO
AnnaBridge	189:f392fc9709a3	1764	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1765	* @retval None
AnnaBridge	189:f392fc9709a3	1766	*/
AnnaBridge	189:f392fc9709a3	1767	__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1768	{
AnnaBridge	189:f392fc9709a3	1769	SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
AnnaBridge	189:f392fc9709a3	1770	}
AnnaBridge	189:f392fc9709a3	1771
AnnaBridge	189:f392fc9709a3	1772	/**
AnnaBridge	189:f392fc9709a3	1773	* @brief Clear Overrun/Underrun flag.
AnnaBridge	189:f392fc9709a3	1774	* @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR
AnnaBridge	189:f392fc9709a3	1775	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1776	* @retval None
AnnaBridge	189:f392fc9709a3	1777	*/
AnnaBridge	189:f392fc9709a3	1778	__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1779	{
AnnaBridge	189:f392fc9709a3	1780	SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
AnnaBridge	189:f392fc9709a3	1781	}
AnnaBridge	189:f392fc9709a3	1782
AnnaBridge	189:f392fc9709a3	1783	/**
AnnaBridge	189:f392fc9709a3	1784	* @brief Clear SMBus PEC error flag.
AnnaBridge	189:f392fc9709a3	1785	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1786	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1787	* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
AnnaBridge	189:f392fc9709a3	1788	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1789	* @retval None
AnnaBridge	189:f392fc9709a3	1790	*/
AnnaBridge	189:f392fc9709a3	1791	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1792	{
AnnaBridge	189:f392fc9709a3	1793	SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
AnnaBridge	189:f392fc9709a3	1794	}
AnnaBridge	189:f392fc9709a3	1795
AnnaBridge	189:f392fc9709a3	1796	/**
AnnaBridge	189:f392fc9709a3	1797	* @brief Clear SMBus Timeout detection flag.
AnnaBridge	189:f392fc9709a3	1798	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1799	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1800	* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
AnnaBridge	189:f392fc9709a3	1801	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1802	* @retval None
AnnaBridge	189:f392fc9709a3	1803	*/
AnnaBridge	189:f392fc9709a3	1804	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1805	{
AnnaBridge	189:f392fc9709a3	1806	SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
AnnaBridge	189:f392fc9709a3	1807	}
AnnaBridge	189:f392fc9709a3	1808
AnnaBridge	189:f392fc9709a3	1809	/**
AnnaBridge	189:f392fc9709a3	1810	* @brief Clear SMBus Alert flag.
AnnaBridge	189:f392fc9709a3	1811	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1812	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1813	* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
AnnaBridge	189:f392fc9709a3	1814	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1815	* @retval None
AnnaBridge	189:f392fc9709a3	1816	*/
AnnaBridge	189:f392fc9709a3	1817	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1818	{
AnnaBridge	189:f392fc9709a3	1819	SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
AnnaBridge	189:f392fc9709a3	1820	}
AnnaBridge	189:f392fc9709a3	1821
AnnaBridge	189:f392fc9709a3	1822	/**
AnnaBridge	189:f392fc9709a3	1823	* @}
AnnaBridge	189:f392fc9709a3	1824	*/
AnnaBridge	189:f392fc9709a3	1825
AnnaBridge	189:f392fc9709a3	1826	/** @defgroup I2C_LL_EF_Data_Management Data_Management
AnnaBridge	189:f392fc9709a3	1827	* @{
AnnaBridge	189:f392fc9709a3	1828	*/
AnnaBridge	189:f392fc9709a3	1829
AnnaBridge	189:f392fc9709a3	1830	/**
AnnaBridge	189:f392fc9709a3	1831	* @brief Enable automatic STOP condition generation (master mode).
AnnaBridge	189:f392fc9709a3	1832	* @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
AnnaBridge	189:f392fc9709a3	1833	* This bit has no effect in slave mode or when RELOAD bit is set.
AnnaBridge	189:f392fc9709a3	1834	* @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode
AnnaBridge	189:f392fc9709a3	1835	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1836	* @retval None
AnnaBridge	189:f392fc9709a3	1837	*/
AnnaBridge	189:f392fc9709a3	1838	__STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1839	{
AnnaBridge	189:f392fc9709a3	1840	SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	189:f392fc9709a3	1841	}
AnnaBridge	189:f392fc9709a3	1842
AnnaBridge	189:f392fc9709a3	1843	/**
AnnaBridge	189:f392fc9709a3	1844	* @brief Disable automatic STOP condition generation (master mode).
AnnaBridge	189:f392fc9709a3	1845	* @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
AnnaBridge	189:f392fc9709a3	1846	* @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode
AnnaBridge	189:f392fc9709a3	1847	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1848	* @retval None
AnnaBridge	189:f392fc9709a3	1849	*/
AnnaBridge	189:f392fc9709a3	1850	__STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1851	{
AnnaBridge	189:f392fc9709a3	1852	CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	189:f392fc9709a3	1853	}
AnnaBridge	189:f392fc9709a3	1854
AnnaBridge	189:f392fc9709a3	1855	/**
AnnaBridge	189:f392fc9709a3	1856	* @brief Check if automatic STOP condition is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1857	* @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode
AnnaBridge	189:f392fc9709a3	1858	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1859	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1860	*/
AnnaBridge	189:f392fc9709a3	1861	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1862	{
AnnaBridge	189:f392fc9709a3	1863	return ((READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1864	}
AnnaBridge	189:f392fc9709a3	1865
AnnaBridge	189:f392fc9709a3	1866	/**
AnnaBridge	189:f392fc9709a3	1867	* @brief Enable reload mode (master mode).
AnnaBridge	189:f392fc9709a3	1868	* @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
AnnaBridge	189:f392fc9709a3	1869	* @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode
AnnaBridge	189:f392fc9709a3	1870	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1871	* @retval None
AnnaBridge	189:f392fc9709a3	1872	*/
AnnaBridge	189:f392fc9709a3	1873	__STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1874	{
AnnaBridge	189:f392fc9709a3	1875	SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	189:f392fc9709a3	1876	}
AnnaBridge	189:f392fc9709a3	1877
AnnaBridge	189:f392fc9709a3	1878	/**
AnnaBridge	189:f392fc9709a3	1879	* @brief Disable reload mode (master mode).
AnnaBridge	189:f392fc9709a3	1880	* @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
AnnaBridge	189:f392fc9709a3	1881	* @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode
AnnaBridge	189:f392fc9709a3	1882	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1883	* @retval None
AnnaBridge	189:f392fc9709a3	1884	*/
AnnaBridge	189:f392fc9709a3	1885	__STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1886	{
AnnaBridge	189:f392fc9709a3	1887	CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	189:f392fc9709a3	1888	}
AnnaBridge	189:f392fc9709a3	1889
AnnaBridge	189:f392fc9709a3	1890	/**
AnnaBridge	189:f392fc9709a3	1891	* @brief Check if reload mode is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1892	* @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode
AnnaBridge	189:f392fc9709a3	1893	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1894	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1895	*/
AnnaBridge	189:f392fc9709a3	1896	__STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1897	{
AnnaBridge	189:f392fc9709a3	1898	return ((READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1899	}
AnnaBridge	189:f392fc9709a3	1900
AnnaBridge	189:f392fc9709a3	1901	/**
AnnaBridge	189:f392fc9709a3	1902	* @brief Configure the number of bytes for transfer.
AnnaBridge	189:f392fc9709a3	1903	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	189:f392fc9709a3	1904	* @rmtoll CR2 NBYTES LL_I2C_SetTransferSize
AnnaBridge	189:f392fc9709a3	1905	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1906	* @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
AnnaBridge	189:f392fc9709a3	1907	* @retval None
AnnaBridge	189:f392fc9709a3	1908	*/
AnnaBridge	189:f392fc9709a3	1909	__STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
AnnaBridge	189:f392fc9709a3	1910	{
AnnaBridge	189:f392fc9709a3	1911	MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
AnnaBridge	189:f392fc9709a3	1912	}
AnnaBridge	189:f392fc9709a3	1913
AnnaBridge	189:f392fc9709a3	1914	/**
AnnaBridge	189:f392fc9709a3	1915	* @brief Get the number of bytes configured for transfer.
AnnaBridge	189:f392fc9709a3	1916	* @rmtoll CR2 NBYTES LL_I2C_GetTransferSize
AnnaBridge	189:f392fc9709a3	1917	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1918	* @retval Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	1919	*/
AnnaBridge	189:f392fc9709a3	1920	__STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1921	{
AnnaBridge	189:f392fc9709a3	1922	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
AnnaBridge	189:f392fc9709a3	1923	}
AnnaBridge	189:f392fc9709a3	1924
AnnaBridge	189:f392fc9709a3	1925	/**
AnnaBridge	189:f392fc9709a3	1926	* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	189:f392fc9709a3	1927	* @note Usage in Slave mode only.
AnnaBridge	189:f392fc9709a3	1928	* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
AnnaBridge	189:f392fc9709a3	1929	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1930	* @param TypeAcknowledge This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1931	* @arg @ref LL_I2C_ACK
AnnaBridge	189:f392fc9709a3	1932	* @arg @ref LL_I2C_NACK
AnnaBridge	189:f392fc9709a3	1933	* @retval None
AnnaBridge	189:f392fc9709a3	1934	*/
AnnaBridge	189:f392fc9709a3	1935	__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
AnnaBridge	189:f392fc9709a3	1936	{
AnnaBridge	189:f392fc9709a3	1937	MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
AnnaBridge	189:f392fc9709a3	1938	}
AnnaBridge	189:f392fc9709a3	1939
AnnaBridge	189:f392fc9709a3	1940	/**
AnnaBridge	189:f392fc9709a3	1941	* @brief Generate a START or RESTART condition
AnnaBridge	189:f392fc9709a3	1942	* @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
AnnaBridge	189:f392fc9709a3	1943	* This action has no effect when RELOAD is set.
AnnaBridge	189:f392fc9709a3	1944	* @rmtoll CR2 START LL_I2C_GenerateStartCondition
AnnaBridge	189:f392fc9709a3	1945	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1946	* @retval None
AnnaBridge	189:f392fc9709a3	1947	*/
AnnaBridge	189:f392fc9709a3	1948	__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1949	{
AnnaBridge	189:f392fc9709a3	1950	SET_BIT(I2Cx->CR2, I2C_CR2_START);
AnnaBridge	189:f392fc9709a3	1951	}
AnnaBridge	189:f392fc9709a3	1952
AnnaBridge	189:f392fc9709a3	1953	/**
AnnaBridge	189:f392fc9709a3	1954	* @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge	189:f392fc9709a3	1955	* @rmtoll CR2 STOP LL_I2C_GenerateStopCondition
AnnaBridge	189:f392fc9709a3	1956	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1957	* @retval None
AnnaBridge	189:f392fc9709a3	1958	*/
AnnaBridge	189:f392fc9709a3	1959	__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1960	{
AnnaBridge	189:f392fc9709a3	1961	SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
AnnaBridge	189:f392fc9709a3	1962	}
AnnaBridge	189:f392fc9709a3	1963
AnnaBridge	189:f392fc9709a3	1964	/**
AnnaBridge	189:f392fc9709a3	1965	* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	189:f392fc9709a3	1966	* @note The master sends the complete 10bit slave address read sequence :
AnnaBridge	189:f392fc9709a3	1967	* Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
AnnaBridge	189:f392fc9709a3	1968	* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
AnnaBridge	189:f392fc9709a3	1969	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1970	* @retval None
AnnaBridge	189:f392fc9709a3	1971	*/
AnnaBridge	189:f392fc9709a3	1972	__STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1973	{
AnnaBridge	189:f392fc9709a3	1974	CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	189:f392fc9709a3	1975	}
AnnaBridge	189:f392fc9709a3	1976
AnnaBridge	189:f392fc9709a3	1977	/**
AnnaBridge	189:f392fc9709a3	1978	* @brief Disable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	189:f392fc9709a3	1979	* @note The master only sends the first 7 bits of 10bit address in Read direction.
AnnaBridge	189:f392fc9709a3	1980	* @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead
AnnaBridge	189:f392fc9709a3	1981	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1982	* @retval None
AnnaBridge	189:f392fc9709a3	1983	*/
AnnaBridge	189:f392fc9709a3	1984	__STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1985	{
AnnaBridge	189:f392fc9709a3	1986	SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	189:f392fc9709a3	1987	}
AnnaBridge	189:f392fc9709a3	1988
AnnaBridge	189:f392fc9709a3	1989	/**
AnnaBridge	189:f392fc9709a3	1990	* @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1991	* @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead
AnnaBridge	189:f392fc9709a3	1992	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1993	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1994	*/
AnnaBridge	189:f392fc9709a3	1995	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1996	{
AnnaBridge	189:f392fc9709a3	1997	return ((READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	1998	}
AnnaBridge	189:f392fc9709a3	1999
AnnaBridge	189:f392fc9709a3	2000	/**
AnnaBridge	189:f392fc9709a3	2001	* @brief Configure the transfer direction (master mode).
AnnaBridge	189:f392fc9709a3	2002	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	189:f392fc9709a3	2003	* @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest
AnnaBridge	189:f392fc9709a3	2004	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2005	* @param TransferRequest This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2006	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	189:f392fc9709a3	2007	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	189:f392fc9709a3	2008	* @retval None
AnnaBridge	189:f392fc9709a3	2009	*/
AnnaBridge	189:f392fc9709a3	2010	__STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
AnnaBridge	189:f392fc9709a3	2011	{
AnnaBridge	189:f392fc9709a3	2012	MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
AnnaBridge	189:f392fc9709a3	2013	}
AnnaBridge	189:f392fc9709a3	2014
AnnaBridge	189:f392fc9709a3	2015	/**
AnnaBridge	189:f392fc9709a3	2016	* @brief Get the transfer direction requested (master mode).
AnnaBridge	189:f392fc9709a3	2017	* @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest
AnnaBridge	189:f392fc9709a3	2018	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2019	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2020	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	189:f392fc9709a3	2021	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	189:f392fc9709a3	2022	*/
AnnaBridge	189:f392fc9709a3	2023	__STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2024	{
AnnaBridge	189:f392fc9709a3	2025	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
AnnaBridge	189:f392fc9709a3	2026	}
AnnaBridge	189:f392fc9709a3	2027
AnnaBridge	189:f392fc9709a3	2028	/**
AnnaBridge	189:f392fc9709a3	2029	* @brief Configure the slave address for transfer (master mode).
AnnaBridge	189:f392fc9709a3	2030	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	189:f392fc9709a3	2031	* @rmtoll CR2 SADD LL_I2C_SetSlaveAddr
AnnaBridge	189:f392fc9709a3	2032	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2033	* @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
AnnaBridge	189:f392fc9709a3	2034	* @retval None
AnnaBridge	189:f392fc9709a3	2035	*/
AnnaBridge	189:f392fc9709a3	2036	__STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
AnnaBridge	189:f392fc9709a3	2037	{
AnnaBridge	189:f392fc9709a3	2038	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
AnnaBridge	189:f392fc9709a3	2039	}
AnnaBridge	189:f392fc9709a3	2040
AnnaBridge	189:f392fc9709a3	2041	/**
AnnaBridge	189:f392fc9709a3	2042	* @brief Get the slave address programmed for transfer.
AnnaBridge	189:f392fc9709a3	2043	* @rmtoll CR2 SADD LL_I2C_GetSlaveAddr
AnnaBridge	189:f392fc9709a3	2044	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2045	* @retval Value between Min_Data=0x0 and Max_Data=0x3F
AnnaBridge	189:f392fc9709a3	2046	*/
AnnaBridge	189:f392fc9709a3	2047	__STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2048	{
AnnaBridge	189:f392fc9709a3	2049	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
AnnaBridge	189:f392fc9709a3	2050	}
AnnaBridge	189:f392fc9709a3	2051
AnnaBridge	189:f392fc9709a3	2052	/**
AnnaBridge	189:f392fc9709a3	2053	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
AnnaBridge	189:f392fc9709a3	2054	* @rmtoll CR2 SADD LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2055	* CR2 ADD10 LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2056	* CR2 RD_WRN LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2057	* CR2 START LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2058	* CR2 STOP LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2059	* CR2 RELOAD LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2060	* CR2 NBYTES LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2061	* CR2 AUTOEND LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2062	* CR2 HEAD10R LL_I2C_HandleTransfer
AnnaBridge	189:f392fc9709a3	2063	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2064	* @param SlaveAddr Specifies the slave address to be programmed.
AnnaBridge	189:f392fc9709a3	2065	* @param SlaveAddrSize This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2066	* @arg @ref LL_I2C_ADDRSLAVE_7BIT
AnnaBridge	189:f392fc9709a3	2067	* @arg @ref LL_I2C_ADDRSLAVE_10BIT
AnnaBridge	189:f392fc9709a3	2068	* @param TransferSize Specifies the number of bytes to be programmed.
AnnaBridge	189:f392fc9709a3	2069	* This parameter must be a value between Min_Data=0 and Max_Data=255.
AnnaBridge	189:f392fc9709a3	2070	* @param EndMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2071	* @arg @ref LL_I2C_MODE_RELOAD
AnnaBridge	189:f392fc9709a3	2072	* @arg @ref LL_I2C_MODE_AUTOEND
AnnaBridge	189:f392fc9709a3	2073	* @arg @ref LL_I2C_MODE_SOFTEND
AnnaBridge	189:f392fc9709a3	2074	* @arg @ref LL_I2C_MODE_SMBUS_RELOAD
AnnaBridge	189:f392fc9709a3	2075	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
AnnaBridge	189:f392fc9709a3	2076	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
AnnaBridge	189:f392fc9709a3	2077	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
AnnaBridge	189:f392fc9709a3	2078	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
AnnaBridge	189:f392fc9709a3	2079	* @param Request This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2080	* @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
AnnaBridge	189:f392fc9709a3	2081	* @arg @ref LL_I2C_GENERATE_STOP
AnnaBridge	189:f392fc9709a3	2082	* @arg @ref LL_I2C_GENERATE_START_READ
AnnaBridge	189:f392fc9709a3	2083	* @arg @ref LL_I2C_GENERATE_START_WRITE
AnnaBridge	189:f392fc9709a3	2084	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
AnnaBridge	189:f392fc9709a3	2085	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
AnnaBridge	189:f392fc9709a3	2086	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
AnnaBridge	189:f392fc9709a3	2087	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
AnnaBridge	189:f392fc9709a3	2088	* @retval None
AnnaBridge	189:f392fc9709a3	2089	*/
AnnaBridge	189:f392fc9709a3	2090	__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
AnnaBridge	189:f392fc9709a3	2091	uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
AnnaBridge	189:f392fc9709a3	2092	{
AnnaBridge	189:f392fc9709a3	2093	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD \| I2C_CR2_ADD10 \| (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) \| I2C_CR2_START \| I2C_CR2_STOP \| I2C_CR2_RELOAD \|
AnnaBridge	189:f392fc9709a3	2094	I2C_CR2_NBYTES \| I2C_CR2_AUTOEND \| I2C_CR2_HEAD10R,
AnnaBridge	189:f392fc9709a3	2095	SlaveAddr \| SlaveAddrSize \| (TransferSize << I2C_CR2_NBYTES_Pos) \| EndMode \| Request);
AnnaBridge	189:f392fc9709a3	2096	}
AnnaBridge	189:f392fc9709a3	2097
AnnaBridge	189:f392fc9709a3	2098	/**
AnnaBridge	189:f392fc9709a3	2099	* @brief Indicate the value of transfer direction (slave mode).
AnnaBridge	189:f392fc9709a3	2100	* @note RESET: Write transfer, Slave enters in receiver mode.
AnnaBridge	189:f392fc9709a3	2101	* SET: Read transfer, Slave enters in transmitter mode.
AnnaBridge	189:f392fc9709a3	2102	* @rmtoll ISR DIR LL_I2C_GetTransferDirection
AnnaBridge	189:f392fc9709a3	2103	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2104	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2105	* @arg @ref LL_I2C_DIRECTION_WRITE
AnnaBridge	189:f392fc9709a3	2106	* @arg @ref LL_I2C_DIRECTION_READ
AnnaBridge	189:f392fc9709a3	2107	*/
AnnaBridge	189:f392fc9709a3	2108	__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2109	{
AnnaBridge	189:f392fc9709a3	2110	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
AnnaBridge	189:f392fc9709a3	2111	}
AnnaBridge	189:f392fc9709a3	2112
AnnaBridge	189:f392fc9709a3	2113	/**
AnnaBridge	189:f392fc9709a3	2114	* @brief Return the slave matched address.
AnnaBridge	189:f392fc9709a3	2115	* @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode
AnnaBridge	189:f392fc9709a3	2116	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2117	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	189:f392fc9709a3	2118	*/
AnnaBridge	189:f392fc9709a3	2119	__STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2120	{
AnnaBridge	189:f392fc9709a3	2121	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
AnnaBridge	189:f392fc9709a3	2122	}
AnnaBridge	189:f392fc9709a3	2123
AnnaBridge	189:f392fc9709a3	2124	/**
AnnaBridge	189:f392fc9709a3	2125	* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge	189:f392fc9709a3	2126	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	2127	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	2128	* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
AnnaBridge	189:f392fc9709a3	2129	* This bit has no effect when RELOAD bit is set.
AnnaBridge	189:f392fc9709a3	2130	* This bit has no effect in device mode when SBC bit is not set.
AnnaBridge	189:f392fc9709a3	2131	* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
AnnaBridge	189:f392fc9709a3	2132	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2133	* @retval None
AnnaBridge	189:f392fc9709a3	2134	*/
AnnaBridge	189:f392fc9709a3	2135	__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2136	{
AnnaBridge	189:f392fc9709a3	2137	SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
AnnaBridge	189:f392fc9709a3	2138	}
AnnaBridge	189:f392fc9709a3	2139
AnnaBridge	189:f392fc9709a3	2140	/**
AnnaBridge	189:f392fc9709a3	2141	* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
AnnaBridge	189:f392fc9709a3	2142	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	2143	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	2144	* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
AnnaBridge	189:f392fc9709a3	2145	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2146	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	2147	*/
AnnaBridge	189:f392fc9709a3	2148	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2149	{
AnnaBridge	189:f392fc9709a3	2150	return ((READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE)) ? 1UL : 0UL);
AnnaBridge	189:f392fc9709a3	2151	}
AnnaBridge	189:f392fc9709a3	2152
AnnaBridge	189:f392fc9709a3	2153	/**
AnnaBridge	189:f392fc9709a3	2154	* @brief Get the SMBus Packet Error byte calculated.
AnnaBridge	189:f392fc9709a3	2155	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	2156	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	2157	* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
AnnaBridge	189:f392fc9709a3	2158	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2159	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	2160	*/
AnnaBridge	189:f392fc9709a3	2161	__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2162	{
AnnaBridge	189:f392fc9709a3	2163	return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
AnnaBridge	189:f392fc9709a3	2164	}
AnnaBridge	189:f392fc9709a3	2165
AnnaBridge	189:f392fc9709a3	2166	/**
AnnaBridge	189:f392fc9709a3	2167	* @brief Read Receive Data register.
AnnaBridge	189:f392fc9709a3	2168	* @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
AnnaBridge	189:f392fc9709a3	2169	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2170	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	2171	*/
AnnaBridge	189:f392fc9709a3	2172	__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2173	{
AnnaBridge	189:f392fc9709a3	2174	return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
AnnaBridge	189:f392fc9709a3	2175	}
AnnaBridge	189:f392fc9709a3	2176
AnnaBridge	189:f392fc9709a3	2177	/**
AnnaBridge	189:f392fc9709a3	2178	* @brief Write in Transmit Data Register .
AnnaBridge	189:f392fc9709a3	2179	* @rmtoll TXDR TXDATA LL_I2C_TransmitData8
AnnaBridge	189:f392fc9709a3	2180	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2181	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	2182	* @retval None
AnnaBridge	189:f392fc9709a3	2183	*/
AnnaBridge	189:f392fc9709a3	2184	__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
AnnaBridge	189:f392fc9709a3	2185	{
AnnaBridge	189:f392fc9709a3	2186	WRITE_REG(I2Cx->TXDR, Data);
AnnaBridge	189:f392fc9709a3	2187	}
AnnaBridge	189:f392fc9709a3	2188
AnnaBridge	189:f392fc9709a3	2189	/**
AnnaBridge	189:f392fc9709a3	2190	* @}
AnnaBridge	189:f392fc9709a3	2191	*/
AnnaBridge	189:f392fc9709a3	2192
AnnaBridge	189:f392fc9709a3	2193	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	2194	/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	189:f392fc9709a3	2195	* @{
AnnaBridge	189:f392fc9709a3	2196	*/
AnnaBridge	189:f392fc9709a3	2197
AnnaBridge	189:f392fc9709a3	2198	ErrorStatus LL_I2C_Init(I2C_TypeDef I2Cx, LL_I2C_InitTypeDef I2C_InitStruct);
AnnaBridge	189:f392fc9709a3	2199	ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx);
AnnaBridge	189:f392fc9709a3	2200	void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge	189:f392fc9709a3	2201
AnnaBridge	189:f392fc9709a3	2202
AnnaBridge	189:f392fc9709a3	2203	/**
AnnaBridge	189:f392fc9709a3	2204	* @}
AnnaBridge	189:f392fc9709a3	2205	*/
AnnaBridge	189:f392fc9709a3	2206	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	189:f392fc9709a3	2207
AnnaBridge	189:f392fc9709a3	2208	/**
AnnaBridge	189:f392fc9709a3	2209	* @}
AnnaBridge	189:f392fc9709a3	2210	*/
AnnaBridge	189:f392fc9709a3	2211
AnnaBridge	189:f392fc9709a3	2212	/**
AnnaBridge	189:f392fc9709a3	2213	* @}
AnnaBridge	189:f392fc9709a3	2214	*/
AnnaBridge	189:f392fc9709a3	2215
AnnaBridge	189:f392fc9709a3	2216	#endif /* I2C1 \|\| I2C2 \|\| I2C3 \|\| I2C4 */
AnnaBridge	189:f392fc9709a3	2217
AnnaBridge	189:f392fc9709a3	2218	/**
AnnaBridge	189:f392fc9709a3	2219	* @}
AnnaBridge	189:f392fc9709a3	2220	*/
AnnaBridge	189:f392fc9709a3	2221
AnnaBridge	189:f392fc9709a3	2222	#ifdef __cplusplus
AnnaBridge	189:f392fc9709a3	2223	}
AnnaBridge	189:f392fc9709a3	2224	#endif
AnnaBridge	189:f392fc9709a3	2225
AnnaBridge	189:f392fc9709a3	2226	#endif /* STM32H7xx_LL_I2C_H */
AnnaBridge	189:f392fc9709a3	2227
AnnaBridge	189:f392fc9709a3	2228	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/