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targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_usart_ex.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32h7xx_hal_usart_ex.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file of USART HAL Extended module.
AnnaBridge 189:f392fc9709a3 6 ******************************************************************************
AnnaBridge 189:f392fc9709a3 7 * @attention
AnnaBridge 189:f392fc9709a3 8 *
AnnaBridge 189:f392fc9709a3 9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
AnnaBridge 189:f392fc9709a3 10 * All rights reserved.</center></h2>
AnnaBridge 189:f392fc9709a3 11 *
AnnaBridge 189:f392fc9709a3 12 * This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge 189:f392fc9709a3 13 * the "License"; You may not use this file except in compliance with the
AnnaBridge 189:f392fc9709a3 14 * License. You may obtain a copy of the License at:
AnnaBridge 189:f392fc9709a3 15 * opensource.org/licenses/BSD-3-Clause
AnnaBridge 189:f392fc9709a3 16 *
AnnaBridge 189:f392fc9709a3 17 ******************************************************************************
AnnaBridge 189:f392fc9709a3 18 */
AnnaBridge 189:f392fc9709a3 19
AnnaBridge 189:f392fc9709a3 20 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 21 #ifndef STM32H7xx_HAL_USART_EX_H
AnnaBridge 189:f392fc9709a3 22 #define STM32H7xx_HAL_USART_EX_H
AnnaBridge 189:f392fc9709a3 23
AnnaBridge 189:f392fc9709a3 24 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 25 extern "C" {
AnnaBridge 189:f392fc9709a3 26 #endif
AnnaBridge 189:f392fc9709a3 27
AnnaBridge 189:f392fc9709a3 28 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 29 #include "stm32h7xx_hal_def.h"
AnnaBridge 189:f392fc9709a3 30
AnnaBridge 189:f392fc9709a3 31 /** @addtogroup STM32H7xx_HAL_Driver
AnnaBridge 189:f392fc9709a3 32 * @{
AnnaBridge 189:f392fc9709a3 33 */
AnnaBridge 189:f392fc9709a3 34
AnnaBridge 189:f392fc9709a3 35 /** @addtogroup USARTEx
AnnaBridge 189:f392fc9709a3 36 * @{
AnnaBridge 189:f392fc9709a3 37 */
AnnaBridge 189:f392fc9709a3 38
AnnaBridge 189:f392fc9709a3 39 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 40 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 41 /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants
AnnaBridge 189:f392fc9709a3 42 * @{
AnnaBridge 189:f392fc9709a3 43 */
AnnaBridge 189:f392fc9709a3 44
AnnaBridge 189:f392fc9709a3 45 /** @defgroup USARTEx_Word_Length USARTEx Word Length
AnnaBridge 189:f392fc9709a3 46 * @{
AnnaBridge 189:f392fc9709a3 47 */
AnnaBridge 189:f392fc9709a3 48 #define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */
AnnaBridge 189:f392fc9709a3 49 #define USART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long USART frame */
AnnaBridge 189:f392fc9709a3 50 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */
AnnaBridge 189:f392fc9709a3 51 /**
AnnaBridge 189:f392fc9709a3 52 * @}
AnnaBridge 189:f392fc9709a3 53 */
AnnaBridge 189:f392fc9709a3 54
AnnaBridge 189:f392fc9709a3 55 /** @defgroup USARTEx_Slave_Select_management USARTEx Slave Select Management
AnnaBridge 189:f392fc9709a3 56 * @{
AnnaBridge 189:f392fc9709a3 57 */
AnnaBridge 189:f392fc9709a3 58 #define USART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */
AnnaBridge 189:f392fc9709a3 59 #define USART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */
AnnaBridge 189:f392fc9709a3 60 /**
AnnaBridge 189:f392fc9709a3 61 * @}
AnnaBridge 189:f392fc9709a3 62 */
AnnaBridge 189:f392fc9709a3 63
AnnaBridge 189:f392fc9709a3 64
AnnaBridge 189:f392fc9709a3 65 /** @defgroup USARTEx_Slave_Mode USARTEx Synchronous Slave mode enable
AnnaBridge 189:f392fc9709a3 66 * @brief USART SLAVE mode
AnnaBridge 189:f392fc9709a3 67 * @{
AnnaBridge 189:f392fc9709a3 68 */
AnnaBridge 189:f392fc9709a3 69 #define USART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */
AnnaBridge 189:f392fc9709a3 70 #define USART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */
AnnaBridge 189:f392fc9709a3 71 /**
AnnaBridge 189:f392fc9709a3 72 * @}
AnnaBridge 189:f392fc9709a3 73 */
AnnaBridge 189:f392fc9709a3 74
AnnaBridge 189:f392fc9709a3 75 /** @defgroup USARTEx_FIFO_mode USARTEx FIFO mode
AnnaBridge 189:f392fc9709a3 76 * @brief USART FIFO mode
AnnaBridge 189:f392fc9709a3 77 * @{
AnnaBridge 189:f392fc9709a3 78 */
AnnaBridge 189:f392fc9709a3 79 #define USART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
AnnaBridge 189:f392fc9709a3 80 #define USART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
AnnaBridge 189:f392fc9709a3 81 /**
AnnaBridge 189:f392fc9709a3 82 * @}
AnnaBridge 189:f392fc9709a3 83 */
AnnaBridge 189:f392fc9709a3 84
AnnaBridge 189:f392fc9709a3 85 /** @defgroup USARTEx_TXFIFO_threshold_level USARTEx TXFIFO threshold level
AnnaBridge 189:f392fc9709a3 86 * @brief USART TXFIFO level
AnnaBridge 189:f392fc9709a3 87 * @{
AnnaBridge 189:f392fc9709a3 88 */
AnnaBridge 189:f392fc9709a3 89 #define USART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */
AnnaBridge 189:f392fc9709a3 90 #define USART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */
AnnaBridge 189:f392fc9709a3 91 #define USART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */
AnnaBridge 189:f392fc9709a3 92 #define USART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */
AnnaBridge 189:f392fc9709a3 93 #define USART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */
AnnaBridge 189:f392fc9709a3 94 #define USART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */
AnnaBridge 189:f392fc9709a3 95 /**
AnnaBridge 189:f392fc9709a3 96 * @}
AnnaBridge 189:f392fc9709a3 97 */
AnnaBridge 189:f392fc9709a3 98
AnnaBridge 189:f392fc9709a3 99 /** @defgroup USARTEx_RXFIFO_threshold_level USARTEx RXFIFO threshold level
AnnaBridge 189:f392fc9709a3 100 * @brief USART RXFIFO level
AnnaBridge 189:f392fc9709a3 101 * @{
AnnaBridge 189:f392fc9709a3 102 */
AnnaBridge 189:f392fc9709a3 103 #define USART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */
AnnaBridge 189:f392fc9709a3 104 #define USART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */
AnnaBridge 189:f392fc9709a3 105 #define USART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */
AnnaBridge 189:f392fc9709a3 106 #define USART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */
AnnaBridge 189:f392fc9709a3 107 #define USART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */
AnnaBridge 189:f392fc9709a3 108 #define USART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */
AnnaBridge 189:f392fc9709a3 109 /**
AnnaBridge 189:f392fc9709a3 110 * @}
AnnaBridge 189:f392fc9709a3 111 */
AnnaBridge 189:f392fc9709a3 112
AnnaBridge 189:f392fc9709a3 113 /**
AnnaBridge 189:f392fc9709a3 114 * @}
AnnaBridge 189:f392fc9709a3 115 */
AnnaBridge 189:f392fc9709a3 116
AnnaBridge 189:f392fc9709a3 117 /* Private macros ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 118 /** @defgroup USARTEx_Private_Macros USARTEx Private Macros
AnnaBridge 189:f392fc9709a3 119 * @{
AnnaBridge 189:f392fc9709a3 120 */
AnnaBridge 189:f392fc9709a3 121
AnnaBridge 189:f392fc9709a3 122 /** @brief Compute the USART mask to apply to retrieve the received data
AnnaBridge 189:f392fc9709a3 123 * according to the word length and to the parity bits activation.
AnnaBridge 189:f392fc9709a3 124 * @note If PCE = 1, the parity bit is not included in the data extracted
AnnaBridge 189:f392fc9709a3 125 * by the reception API().
AnnaBridge 189:f392fc9709a3 126 * This masking operation is not carried out in the case of
AnnaBridge 189:f392fc9709a3 127 * DMA transfers.
AnnaBridge 189:f392fc9709a3 128 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 129 * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field.
AnnaBridge 189:f392fc9709a3 130 */
AnnaBridge 189:f392fc9709a3 131 #define USART_MASK_COMPUTATION(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 132 do { \
AnnaBridge 189:f392fc9709a3 133 if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
AnnaBridge 189:f392fc9709a3 134 { \
AnnaBridge 189:f392fc9709a3 135 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
AnnaBridge 189:f392fc9709a3 136 { \
AnnaBridge 189:f392fc9709a3 137 (__HANDLE__)->Mask = 0x01FFU; \
AnnaBridge 189:f392fc9709a3 138 } \
AnnaBridge 189:f392fc9709a3 139 else \
AnnaBridge 189:f392fc9709a3 140 { \
AnnaBridge 189:f392fc9709a3 141 (__HANDLE__)->Mask = 0x00FFU; \
AnnaBridge 189:f392fc9709a3 142 } \
AnnaBridge 189:f392fc9709a3 143 } \
AnnaBridge 189:f392fc9709a3 144 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
AnnaBridge 189:f392fc9709a3 145 { \
AnnaBridge 189:f392fc9709a3 146 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
AnnaBridge 189:f392fc9709a3 147 { \
AnnaBridge 189:f392fc9709a3 148 (__HANDLE__)->Mask = 0x00FFU; \
AnnaBridge 189:f392fc9709a3 149 } \
AnnaBridge 189:f392fc9709a3 150 else \
AnnaBridge 189:f392fc9709a3 151 { \
AnnaBridge 189:f392fc9709a3 152 (__HANDLE__)->Mask = 0x007FU; \
AnnaBridge 189:f392fc9709a3 153 } \
AnnaBridge 189:f392fc9709a3 154 } \
AnnaBridge 189:f392fc9709a3 155 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \
AnnaBridge 189:f392fc9709a3 156 { \
AnnaBridge 189:f392fc9709a3 157 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
AnnaBridge 189:f392fc9709a3 158 { \
AnnaBridge 189:f392fc9709a3 159 (__HANDLE__)->Mask = 0x007FU; \
AnnaBridge 189:f392fc9709a3 160 } \
AnnaBridge 189:f392fc9709a3 161 else \
AnnaBridge 189:f392fc9709a3 162 { \
AnnaBridge 189:f392fc9709a3 163 (__HANDLE__)->Mask = 0x003FU; \
AnnaBridge 189:f392fc9709a3 164 } \
AnnaBridge 189:f392fc9709a3 165 } \
AnnaBridge 189:f392fc9709a3 166 else \
AnnaBridge 189:f392fc9709a3 167 { \
AnnaBridge 189:f392fc9709a3 168 (__HANDLE__)->Mask = 0x0000U; \
AnnaBridge 189:f392fc9709a3 169 } \
AnnaBridge 189:f392fc9709a3 170 } while(0U)
AnnaBridge 189:f392fc9709a3 171
AnnaBridge 189:f392fc9709a3 172
AnnaBridge 189:f392fc9709a3 173 /**
AnnaBridge 189:f392fc9709a3 174 * @brief Ensure that USART frame length is valid.
AnnaBridge 189:f392fc9709a3 175 * @param __LENGTH__ USART frame length.
AnnaBridge 189:f392fc9709a3 176 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
AnnaBridge 189:f392fc9709a3 177 */
AnnaBridge 189:f392fc9709a3 178 #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \
AnnaBridge 189:f392fc9709a3 179 ((__LENGTH__) == USART_WORDLENGTH_8B) || \
AnnaBridge 189:f392fc9709a3 180 ((__LENGTH__) == USART_WORDLENGTH_9B))
AnnaBridge 189:f392fc9709a3 181
AnnaBridge 189:f392fc9709a3 182 /**
AnnaBridge 189:f392fc9709a3 183 * @brief Ensure that USART Negative Slave Select (NSS) pin management is valid.
AnnaBridge 189:f392fc9709a3 184 * @param __NSS__ USART Negative Slave Select pin management.
AnnaBridge 189:f392fc9709a3 185 * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid)
AnnaBridge 189:f392fc9709a3 186 */
AnnaBridge 189:f392fc9709a3 187 #define IS_USART_NSS(__NSS__) (((__NSS__) == USART_NSS_HARD) || \
AnnaBridge 189:f392fc9709a3 188 ((__NSS__) == USART_NSS_SOFT))
AnnaBridge 189:f392fc9709a3 189
AnnaBridge 189:f392fc9709a3 190 /**
AnnaBridge 189:f392fc9709a3 191 * @brief Ensure that USART Slave Mode is valid.
AnnaBridge 189:f392fc9709a3 192 * @param __STATE__ USART Slave Mode.
AnnaBridge 189:f392fc9709a3 193 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
AnnaBridge 189:f392fc9709a3 194 */
AnnaBridge 189:f392fc9709a3 195 #define IS_USART_SLAVEMODE(__STATE__) (((__STATE__) == USART_SLAVEMODE_DISABLE ) || \
AnnaBridge 189:f392fc9709a3 196 ((__STATE__) == USART_SLAVEMODE_ENABLE))
AnnaBridge 189:f392fc9709a3 197
AnnaBridge 189:f392fc9709a3 198 /**
AnnaBridge 189:f392fc9709a3 199 * @brief Ensure that USART FIFO mode is valid.
AnnaBridge 189:f392fc9709a3 200 * @param __STATE__ USART FIFO mode.
AnnaBridge 189:f392fc9709a3 201 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
AnnaBridge 189:f392fc9709a3 202 */
AnnaBridge 189:f392fc9709a3 203 #define IS_USART_FIFO_MODE_STATE(__STATE__) (((__STATE__) == USART_FIFOMODE_DISABLE ) || \
AnnaBridge 189:f392fc9709a3 204 ((__STATE__) == USART_FIFOMODE_ENABLE))
AnnaBridge 189:f392fc9709a3 205
AnnaBridge 189:f392fc9709a3 206 /**
AnnaBridge 189:f392fc9709a3 207 * @brief Ensure that USART TXFIFO threshold level is valid.
AnnaBridge 189:f392fc9709a3 208 * @param __THRESHOLD__ USART TXFIFO threshold level.
AnnaBridge 189:f392fc9709a3 209 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
AnnaBridge 189:f392fc9709a3 210 */
AnnaBridge 189:f392fc9709a3 211 #define IS_USART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_8) || \
AnnaBridge 189:f392fc9709a3 212 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_4) || \
AnnaBridge 189:f392fc9709a3 213 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_2) || \
AnnaBridge 189:f392fc9709a3 214 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_3_4) || \
AnnaBridge 189:f392fc9709a3 215 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_7_8) || \
AnnaBridge 189:f392fc9709a3 216 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_8_8))
AnnaBridge 189:f392fc9709a3 217
AnnaBridge 189:f392fc9709a3 218 /**
AnnaBridge 189:f392fc9709a3 219 * @brief Ensure that USART RXFIFO threshold level is valid.
AnnaBridge 189:f392fc9709a3 220 * @param __THRESHOLD__ USART RXFIFO threshold level.
AnnaBridge 189:f392fc9709a3 221 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
AnnaBridge 189:f392fc9709a3 222 */
AnnaBridge 189:f392fc9709a3 223 #define IS_USART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_8) || \
AnnaBridge 189:f392fc9709a3 224 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_4) || \
AnnaBridge 189:f392fc9709a3 225 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_2) || \
AnnaBridge 189:f392fc9709a3 226 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_3_4) || \
AnnaBridge 189:f392fc9709a3 227 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_7_8) || \
AnnaBridge 189:f392fc9709a3 228 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_8_8))
AnnaBridge 189:f392fc9709a3 229 /**
AnnaBridge 189:f392fc9709a3 230 * @}
AnnaBridge 189:f392fc9709a3 231 */
AnnaBridge 189:f392fc9709a3 232
AnnaBridge 189:f392fc9709a3 233 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 234 /** @addtogroup USARTEx_Exported_Functions
AnnaBridge 189:f392fc9709a3 235 * @{
AnnaBridge 189:f392fc9709a3 236 */
AnnaBridge 189:f392fc9709a3 237
AnnaBridge 189:f392fc9709a3 238 /** @addtogroup USARTEx_Exported_Functions_Group1
AnnaBridge 189:f392fc9709a3 239 * @{
AnnaBridge 189:f392fc9709a3 240 */
AnnaBridge 189:f392fc9709a3 241
AnnaBridge 189:f392fc9709a3 242 /* IO operation functions *****************************************************/
AnnaBridge 189:f392fc9709a3 243 void HAL_USARTEx_RxFifoFullCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 244 void HAL_USARTEx_TxFifoEmptyCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 245
AnnaBridge 189:f392fc9709a3 246 /**
AnnaBridge 189:f392fc9709a3 247 * @}
AnnaBridge 189:f392fc9709a3 248 */
AnnaBridge 189:f392fc9709a3 249
AnnaBridge 189:f392fc9709a3 250 /** @addtogroup USARTEx_Exported_Functions_Group2
AnnaBridge 189:f392fc9709a3 251 * @{
AnnaBridge 189:f392fc9709a3 252 */
AnnaBridge 189:f392fc9709a3 253
AnnaBridge 189:f392fc9709a3 254 /* Peripheral Control functions ***********************************************/
AnnaBridge 189:f392fc9709a3 255 HAL_StatusTypeDef HAL_USARTEx_EnableSlaveMode(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 256 HAL_StatusTypeDef HAL_USARTEx_DisableSlaveMode(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 257 HAL_StatusTypeDef HAL_USARTEx_ConfigNSS(USART_HandleTypeDef *husart, uint32_t NSSConfig);
AnnaBridge 189:f392fc9709a3 258 HAL_StatusTypeDef HAL_USARTEx_EnableFifoMode(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 259 HAL_StatusTypeDef HAL_USARTEx_DisableFifoMode(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 260 HAL_StatusTypeDef HAL_USARTEx_SetTxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold);
AnnaBridge 189:f392fc9709a3 261 HAL_StatusTypeDef HAL_USARTEx_SetRxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold);
AnnaBridge 189:f392fc9709a3 262
AnnaBridge 189:f392fc9709a3 263 /**
AnnaBridge 189:f392fc9709a3 264 * @}
AnnaBridge 189:f392fc9709a3 265 */
AnnaBridge 189:f392fc9709a3 266
AnnaBridge 189:f392fc9709a3 267 /**
AnnaBridge 189:f392fc9709a3 268 * @}
AnnaBridge 189:f392fc9709a3 269 */
AnnaBridge 189:f392fc9709a3 270
AnnaBridge 189:f392fc9709a3 271 /**
AnnaBridge 189:f392fc9709a3 272 * @}
AnnaBridge 189:f392fc9709a3 273 */
AnnaBridge 189:f392fc9709a3 274
AnnaBridge 189:f392fc9709a3 275 /**
AnnaBridge 189:f392fc9709a3 276 * @}
AnnaBridge 189:f392fc9709a3 277 */
AnnaBridge 189:f392fc9709a3 278
AnnaBridge 189:f392fc9709a3 279 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 280 }
AnnaBridge 189:f392fc9709a3 281 #endif
AnnaBridge 189:f392fc9709a3 282
AnnaBridge 189:f392fc9709a3 283 #endif /* STM32H7xx_HAL_USART_EX_H */
AnnaBridge 189:f392fc9709a3 284
AnnaBridge 189:f392fc9709a3 285 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/