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targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_flash_ex.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	189:f392fc9709a3	1	/**
AnnaBridge	189:f392fc9709a3	2	******************************************************************************
AnnaBridge	189:f392fc9709a3	3	* @file stm32h7xx_hal_flash_ex.c
AnnaBridge	189:f392fc9709a3	4	* @author MCD Application Team
AnnaBridge	189:f392fc9709a3	5	* @brief Extended FLASH HAL module driver.
AnnaBridge	189:f392fc9709a3	6	* This file provides firmware functions to manage the following
AnnaBridge	189:f392fc9709a3	7	* functionalities of the FLASH extension peripheral:
AnnaBridge	189:f392fc9709a3	8	* + Extended programming operations functions
AnnaBridge	189:f392fc9709a3	9	*
AnnaBridge	189:f392fc9709a3	10	@verbatim
AnnaBridge	189:f392fc9709a3	11	==============================================================================
AnnaBridge	189:f392fc9709a3	12	##### Flash Extension features #####
AnnaBridge	189:f392fc9709a3	13	==============================================================================
AnnaBridge	189:f392fc9709a3	14
AnnaBridge	189:f392fc9709a3	15	[..] Comparing to other previous devices, the FLASH interface for STM32H7xx
AnnaBridge	189:f392fc9709a3	16	devices contains the following additional features
AnnaBridge	189:f392fc9709a3	17
AnnaBridge	189:f392fc9709a3	18	(+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
AnnaBridge	189:f392fc9709a3	19	capability (RWW)
AnnaBridge	189:f392fc9709a3	20	(+) Dual bank memory organization
AnnaBridge	189:f392fc9709a3	21	(+) PCROP protection for all banks
AnnaBridge	189:f392fc9709a3	22	(+) Global readout protection (RDP)
AnnaBridge	189:f392fc9709a3	23	(+) Write protection
AnnaBridge	189:f392fc9709a3	24	(+) Secure access only protection
AnnaBridge	189:f392fc9709a3	25	(+) Bank / register swapping
AnnaBridge	189:f392fc9709a3	26	(+) Cyclic Redundancy Check (CRC)
AnnaBridge	189:f392fc9709a3	27
AnnaBridge	189:f392fc9709a3	28	##### How to use this driver #####
AnnaBridge	189:f392fc9709a3	29	==============================================================================
AnnaBridge	189:f392fc9709a3	30	[..] This driver provides functions to configure and program the FLASH memory
AnnaBridge	189:f392fc9709a3	31	of all STM32H7xx devices. It includes
AnnaBridge	189:f392fc9709a3	32	(#) FLASH Memory Erase functions:
AnnaBridge	189:f392fc9709a3	33	(++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
AnnaBridge	189:f392fc9709a3	34	HAL_FLASH_Lock() functions
AnnaBridge	189:f392fc9709a3	35	(++) Erase function: Sector erase, bank erase and dual-bank mass erase
AnnaBridge	189:f392fc9709a3	36	(++) There are two modes of erase :
AnnaBridge	189:f392fc9709a3	37	(+++) Polling Mode using HAL_FLASHEx_Erase()
AnnaBridge	189:f392fc9709a3	38	(+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
AnnaBridge	189:f392fc9709a3	39
AnnaBridge	189:f392fc9709a3	40	(#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to:
AnnaBridge	189:f392fc9709a3	41	(++) Set/Reset the write protection per bank
AnnaBridge	189:f392fc9709a3	42	(++) Set the Read protection Level
AnnaBridge	189:f392fc9709a3	43	(++) Set the BOR level
AnnaBridge	189:f392fc9709a3	44	(++) Program the user Option Bytes
AnnaBridge	189:f392fc9709a3	45	(++) PCROP protection configuration and control per bank
AnnaBridge	189:f392fc9709a3	46	(++) Secure area configuration and control per bank
AnnaBridge	189:f392fc9709a3	47	(++) Core Boot address configuration
AnnaBridge	189:f392fc9709a3	48
AnnaBridge	189:f392fc9709a3	49	(#) FLASH Memory Lock and unlock per Bank: HAL_FLASHEx_Lock_Bank1(), HAL_FLASHEx_Unlock_Bank1(),
AnnaBridge	189:f392fc9709a3	50	HAL_FLASHEx_Lock_Bank2() and HAL_FLASHEx_Unlock_Bank2() functions
AnnaBridge	189:f392fc9709a3	51
AnnaBridge	189:f392fc9709a3	52	(#) FLASH CRC computation function: Use HAL_FLASHEx_ComputeCRC() to:
AnnaBridge	189:f392fc9709a3	53	(++) Enable CRC feature
AnnaBridge	189:f392fc9709a3	54	(++) Program the desired burst size
AnnaBridge	189:f392fc9709a3	55	(++) Define the user Flash Area on which the CRC has be computed
AnnaBridge	189:f392fc9709a3	56	(++) Perform the CRC computation
AnnaBridge	189:f392fc9709a3	57	(++) Disable CRC feature
AnnaBridge	189:f392fc9709a3	58
AnnaBridge	189:f392fc9709a3	59	@endverbatim
AnnaBridge	189:f392fc9709a3	60	******************************************************************************
AnnaBridge	189:f392fc9709a3	61	* @attention
AnnaBridge	189:f392fc9709a3	62	*
AnnaBridge	189:f392fc9709a3	63	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics.
AnnaBridge	189:f392fc9709a3	64	* All rights reserved.</center></h2>
AnnaBridge	189:f392fc9709a3	65	*
AnnaBridge	189:f392fc9709a3	66	* This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge	189:f392fc9709a3	67	* the "License"; You may not use this file except in compliance with the
AnnaBridge	189:f392fc9709a3	68	* License. You may obtain a copy of the License at:
AnnaBridge	189:f392fc9709a3	69	* opensource.org/licenses/BSD-3-Clause
AnnaBridge	189:f392fc9709a3	70	*
AnnaBridge	189:f392fc9709a3	71	******************************************************************************
AnnaBridge	189:f392fc9709a3	72	*/
AnnaBridge	189:f392fc9709a3	73
AnnaBridge	189:f392fc9709a3	74	/* Includes ------------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	75	#include "stm32h7xx_hal.h"
AnnaBridge	189:f392fc9709a3	76
AnnaBridge	189:f392fc9709a3	77	/** @addtogroup STM32H7xx_HAL_Driver
AnnaBridge	189:f392fc9709a3	78	* @{
AnnaBridge	189:f392fc9709a3	79	*/
AnnaBridge	189:f392fc9709a3	80
AnnaBridge	189:f392fc9709a3	81	/** @defgroup FLASHEx FLASHEx
AnnaBridge	189:f392fc9709a3	82	* @brief FLASH HAL Extension module driver
AnnaBridge	189:f392fc9709a3	83	* @{
AnnaBridge	189:f392fc9709a3	84	*/
AnnaBridge	189:f392fc9709a3	85
AnnaBridge	189:f392fc9709a3	86	#ifdef HAL_FLASH_MODULE_ENABLED
AnnaBridge	189:f392fc9709a3	87
AnnaBridge	189:f392fc9709a3	88	/* Private typedef -----------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	89	/* Private define ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	90	/** @addtogroup FLASHEx_Private_Constants
AnnaBridge	189:f392fc9709a3	91	* @{
AnnaBridge	189:f392fc9709a3	92	*/
AnnaBridge	189:f392fc9709a3	93	#define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
AnnaBridge	189:f392fc9709a3	94
AnnaBridge	189:f392fc9709a3	95	/**
AnnaBridge	189:f392fc9709a3	96	* @}
AnnaBridge	189:f392fc9709a3	97	*/
AnnaBridge	189:f392fc9709a3	98	/* Private macro -------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	99	/* Private variables ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	100	/* Private function prototypes -----------------------------------------------*/
AnnaBridge	189:f392fc9709a3	101	/** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
AnnaBridge	189:f392fc9709a3	102	* @{
AnnaBridge	189:f392fc9709a3	103	*/
AnnaBridge	189:f392fc9709a3	104	static void FLASH_MassErase(uint32_t VoltageRange, uint32_t Banks);
AnnaBridge	189:f392fc9709a3	105	static void FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
AnnaBridge	189:f392fc9709a3	106	static void FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Bank);
AnnaBridge	189:f392fc9709a3	107	static void FLASH_OB_GetWRP(uint32_t WRPState, uint32_t WRPSector, uint32_t Bank);
AnnaBridge	189:f392fc9709a3	108	static void FLASH_OB_RDPConfig(uint32_t RDPLevel);
AnnaBridge	189:f392fc9709a3	109	static uint32_t FLASH_OB_GetRDP(void);
AnnaBridge	189:f392fc9709a3	110	static void FLASH_OB_PCROPConfig(uint32_t PCROConfigRDP, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr, uint32_t Banks);
AnnaBridge	189:f392fc9709a3	111	static void FLASH_OB_GetPCROP(uint32_t PCROPConfig, uint32_t PCROPStartAddr,uint32_t *PCROPEndAddr, uint32_t Bank);
AnnaBridge	189:f392fc9709a3	112	static void FLASH_OB_BOR_LevelConfig(uint32_t Level);
AnnaBridge	189:f392fc9709a3	113	static uint32_t FLASH_OB_GetBOR(void);
AnnaBridge	189:f392fc9709a3	114	static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig);
AnnaBridge	189:f392fc9709a3	115	static uint32_t FLASH_OB_GetUser(void);
AnnaBridge	189:f392fc9709a3	116	static void FLASH_OB_BootAddConfig(uint32_t BootOption, uint32_t BootAddress0, uint32_t BootAddress1);
AnnaBridge	189:f392fc9709a3	117	static void FLASH_OB_GetBootAdd(uint32_t BootAddress0, uint32_t BootAddress1);
AnnaBridge	189:f392fc9709a3	118	static void FLASH_OB_SecureAreaConfig(uint32_t SecureAreaConfig, uint32_t SecureAreaStartAddr, uint32_t SecureAreaEndAddr, uint32_t Banks);
AnnaBridge	189:f392fc9709a3	119	static void FLASH_OB_GetSecureArea(uint32_t SecureAreaConfig, uint32_t SecureAreaStartAddr, uint32_t *SecureAreaEndAddr, uint32_t Bank);
AnnaBridge	189:f392fc9709a3	120	static void FLASH_CRC_AddSector(uint32_t Sector, uint32_t Bank);
AnnaBridge	189:f392fc9709a3	121	static void FLASH_CRC_SelectAddress(uint32_t CRCStartAddr, uint32_t CRCEndAddr, uint32_t Bank);
AnnaBridge	189:f392fc9709a3	122
AnnaBridge	189:f392fc9709a3	123	/**
AnnaBridge	189:f392fc9709a3	124	* @}
AnnaBridge	189:f392fc9709a3	125	*/
AnnaBridge	189:f392fc9709a3	126
AnnaBridge	189:f392fc9709a3	127	/* Exported functions ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	128	/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
AnnaBridge	189:f392fc9709a3	129	* @{
AnnaBridge	189:f392fc9709a3	130	*/
AnnaBridge	189:f392fc9709a3	131
AnnaBridge	189:f392fc9709a3	132	/** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
AnnaBridge	189:f392fc9709a3	133	* @brief Extended IO operation functions
AnnaBridge	189:f392fc9709a3	134	*
AnnaBridge	189:f392fc9709a3	135	@verbatim
AnnaBridge	189:f392fc9709a3	136	===============================================================================
AnnaBridge	189:f392fc9709a3	137	##### Extended programming operation functions #####
AnnaBridge	189:f392fc9709a3	138	===============================================================================
AnnaBridge	189:f392fc9709a3	139	[..]
AnnaBridge	189:f392fc9709a3	140	This subsection provides a set of functions allowing to manage the Extension FLASH
AnnaBridge	189:f392fc9709a3	141	programming operations Operations.
AnnaBridge	189:f392fc9709a3	142
AnnaBridge	189:f392fc9709a3	143	@endverbatim
AnnaBridge	189:f392fc9709a3	144	* @{
AnnaBridge	189:f392fc9709a3	145	*/
AnnaBridge	189:f392fc9709a3	146	/**
AnnaBridge	189:f392fc9709a3	147	* @brief Perform a mass erase or erase the specified FLASH memory sectors
AnnaBridge	189:f392fc9709a3	148	* @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
AnnaBridge	189:f392fc9709a3	149	* contains the configuration information for the erasing.
AnnaBridge	189:f392fc9709a3	150	*
AnnaBridge	189:f392fc9709a3	151	* @param[out] SectorError pointer to variable that contains the configuration
AnnaBridge	189:f392fc9709a3	152	* information on faulty sector in case of error (0xFFFFFFFF means that all
AnnaBridge	189:f392fc9709a3	153	* the sectors have been correctly erased)
AnnaBridge	189:f392fc9709a3	154	*
AnnaBridge	189:f392fc9709a3	155	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	156	*/
AnnaBridge	189:f392fc9709a3	157	HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef pEraseInit, uint32_t SectorError)
AnnaBridge	189:f392fc9709a3	158	{
AnnaBridge	189:f392fc9709a3	159	HAL_StatusTypeDef status = HAL_OK;
AnnaBridge	189:f392fc9709a3	160	uint32_t sector_index;
AnnaBridge	189:f392fc9709a3	161
AnnaBridge	189:f392fc9709a3	162	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	163	assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
AnnaBridge	189:f392fc9709a3	164	assert_param(IS_FLASH_BANK(pEraseInit->Banks));
AnnaBridge	189:f392fc9709a3	165
AnnaBridge	189:f392fc9709a3	166	/* Process Locked */
AnnaBridge	189:f392fc9709a3	167	__HAL_LOCK(&pFlash);
AnnaBridge	189:f392fc9709a3	168
AnnaBridge	189:f392fc9709a3	169	/* Reset error code */
AnnaBridge	189:f392fc9709a3	170	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
AnnaBridge	189:f392fc9709a3	171
AnnaBridge	189:f392fc9709a3	172	/* Wait for last operation to be completed on Bank1 */
AnnaBridge	189:f392fc9709a3	173	if((pEraseInit->Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	174	{
AnnaBridge	189:f392fc9709a3	175	if(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_1) != HAL_OK)
AnnaBridge	189:f392fc9709a3	176	{
AnnaBridge	189:f392fc9709a3	177	status = HAL_ERROR;
AnnaBridge	189:f392fc9709a3	178	}
AnnaBridge	189:f392fc9709a3	179	}
AnnaBridge	189:f392fc9709a3	180
AnnaBridge	189:f392fc9709a3	181	/* Wait for last operation to be completed on Bank2 */
AnnaBridge	189:f392fc9709a3	182	if((pEraseInit->Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	183	{
AnnaBridge	189:f392fc9709a3	184	if(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_2) != HAL_OK)
AnnaBridge	189:f392fc9709a3	185	{
AnnaBridge	189:f392fc9709a3	186	status = HAL_ERROR;
AnnaBridge	189:f392fc9709a3	187	}
AnnaBridge	189:f392fc9709a3	188	}
AnnaBridge	189:f392fc9709a3	189
AnnaBridge	189:f392fc9709a3	190	if(status == HAL_OK)
AnnaBridge	189:f392fc9709a3	191	{
AnnaBridge	189:f392fc9709a3	192	if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
AnnaBridge	189:f392fc9709a3	193	{
AnnaBridge	189:f392fc9709a3	194	/* Mass erase to be done */
AnnaBridge	189:f392fc9709a3	195	FLASH_MassErase(pEraseInit->VoltageRange, pEraseInit->Banks);
AnnaBridge	189:f392fc9709a3	196
AnnaBridge	189:f392fc9709a3	197	/* Wait for last operation to be completed */
AnnaBridge	189:f392fc9709a3	198	if((pEraseInit->Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	199	{
AnnaBridge	189:f392fc9709a3	200	if(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_1) != HAL_OK)
AnnaBridge	189:f392fc9709a3	201	{
AnnaBridge	189:f392fc9709a3	202	status = HAL_ERROR;
AnnaBridge	189:f392fc9709a3	203	}
AnnaBridge	189:f392fc9709a3	204	/* if the erase operation is completed, disable the Bank1 BER Bit */
AnnaBridge	189:f392fc9709a3	205	FLASH->CR1 &= (~FLASH_CR_BER);
AnnaBridge	189:f392fc9709a3	206	}
AnnaBridge	189:f392fc9709a3	207	if((pEraseInit->Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	208	{
AnnaBridge	189:f392fc9709a3	209	if(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_2) != HAL_OK)
AnnaBridge	189:f392fc9709a3	210	{
AnnaBridge	189:f392fc9709a3	211	status = HAL_ERROR;
AnnaBridge	189:f392fc9709a3	212	}
AnnaBridge	189:f392fc9709a3	213	/* if the erase operation is completed, disable the Bank2 BER Bit */
AnnaBridge	189:f392fc9709a3	214	FLASH->CR2 &= (~FLASH_CR_BER);
AnnaBridge	189:f392fc9709a3	215	}
AnnaBridge	189:f392fc9709a3	216	}
AnnaBridge	189:f392fc9709a3	217	else
AnnaBridge	189:f392fc9709a3	218	{
AnnaBridge	189:f392fc9709a3	219	/Initialization of SectorError variable/
AnnaBridge	189:f392fc9709a3	220	*SectorError = 0xFFFFFFFFU;
AnnaBridge	189:f392fc9709a3	221
AnnaBridge	189:f392fc9709a3	222	/* Erase by sector by sector to be done*/
AnnaBridge	189:f392fc9709a3	223	for(sector_index = pEraseInit->Sector; sector_index < (pEraseInit->NbSectors + pEraseInit->Sector); sector_index++)
AnnaBridge	189:f392fc9709a3	224	{
AnnaBridge	189:f392fc9709a3	225	FLASH_Erase_Sector(sector_index, pEraseInit->Banks, pEraseInit->VoltageRange);
AnnaBridge	189:f392fc9709a3	226
AnnaBridge	189:f392fc9709a3	227	if((pEraseInit->Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	228	{
AnnaBridge	189:f392fc9709a3	229	/* Wait for last operation to be completed */
AnnaBridge	189:f392fc9709a3	230	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_1);
AnnaBridge	189:f392fc9709a3	231
AnnaBridge	189:f392fc9709a3	232	/* If the erase operation is completed, disable the SER Bit */
AnnaBridge	189:f392fc9709a3	233	FLASH->CR1 &= (~(FLASH_CR_SER \| FLASH_CR_SNB));
AnnaBridge	189:f392fc9709a3	234	}
AnnaBridge	189:f392fc9709a3	235	if((pEraseInit->Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	236	{
AnnaBridge	189:f392fc9709a3	237	/* Wait for last operation to be completed */
AnnaBridge	189:f392fc9709a3	238	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_2);
AnnaBridge	189:f392fc9709a3	239
AnnaBridge	189:f392fc9709a3	240	/* If the erase operation is completed, disable the SER Bit */
AnnaBridge	189:f392fc9709a3	241	FLASH->CR2 &= (~(FLASH_CR_SER \| FLASH_CR_SNB));
AnnaBridge	189:f392fc9709a3	242	}
AnnaBridge	189:f392fc9709a3	243
AnnaBridge	189:f392fc9709a3	244	if(status != HAL_OK)
AnnaBridge	189:f392fc9709a3	245	{
AnnaBridge	189:f392fc9709a3	246	/* In case of error, stop erase procedure and return the faulty sector */
AnnaBridge	189:f392fc9709a3	247	*SectorError = sector_index;
AnnaBridge	189:f392fc9709a3	248	break;
AnnaBridge	189:f392fc9709a3	249	}
AnnaBridge	189:f392fc9709a3	250	}
AnnaBridge	189:f392fc9709a3	251	}
AnnaBridge	189:f392fc9709a3	252	}
AnnaBridge	189:f392fc9709a3	253
AnnaBridge	189:f392fc9709a3	254	/* Process Unlocked */
AnnaBridge	189:f392fc9709a3	255	__HAL_UNLOCK(&pFlash);
AnnaBridge	189:f392fc9709a3	256
AnnaBridge	189:f392fc9709a3	257	return status;
AnnaBridge	189:f392fc9709a3	258	}
AnnaBridge	189:f392fc9709a3	259
AnnaBridge	189:f392fc9709a3	260	/**
AnnaBridge	189:f392fc9709a3	261	* @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
AnnaBridge	189:f392fc9709a3	262	* @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
AnnaBridge	189:f392fc9709a3	263	* contains the configuration information for the erasing.
AnnaBridge	189:f392fc9709a3	264	*
AnnaBridge	189:f392fc9709a3	265	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	266	*/
AnnaBridge	189:f392fc9709a3	267	HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
AnnaBridge	189:f392fc9709a3	268	{
AnnaBridge	189:f392fc9709a3	269	HAL_StatusTypeDef status = HAL_OK;
AnnaBridge	189:f392fc9709a3	270
AnnaBridge	189:f392fc9709a3	271	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	272	assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
AnnaBridge	189:f392fc9709a3	273	assert_param(IS_FLASH_BANK(pEraseInit->Banks));
AnnaBridge	189:f392fc9709a3	274
AnnaBridge	189:f392fc9709a3	275	/* Process Locked */
AnnaBridge	189:f392fc9709a3	276	__HAL_LOCK(&pFlash);
AnnaBridge	189:f392fc9709a3	277
AnnaBridge	189:f392fc9709a3	278	/* Reset error code */
AnnaBridge	189:f392fc9709a3	279	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
AnnaBridge	189:f392fc9709a3	280
AnnaBridge	189:f392fc9709a3	281	/* Wait for last operation to be completed */
AnnaBridge	189:f392fc9709a3	282	if((pEraseInit->Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	283	{
AnnaBridge	189:f392fc9709a3	284	if(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_1) != HAL_OK)
AnnaBridge	189:f392fc9709a3	285	{
AnnaBridge	189:f392fc9709a3	286	status = HAL_ERROR;
AnnaBridge	189:f392fc9709a3	287	}
AnnaBridge	189:f392fc9709a3	288	}
AnnaBridge	189:f392fc9709a3	289
AnnaBridge	189:f392fc9709a3	290	if((pEraseInit->Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	291	{
AnnaBridge	189:f392fc9709a3	292	if(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_2) != HAL_OK)
AnnaBridge	189:f392fc9709a3	293	{
AnnaBridge	189:f392fc9709a3	294	status = HAL_ERROR;
AnnaBridge	189:f392fc9709a3	295	}
AnnaBridge	189:f392fc9709a3	296	}
AnnaBridge	189:f392fc9709a3	297
AnnaBridge	189:f392fc9709a3	298	if (status != HAL_OK)
AnnaBridge	189:f392fc9709a3	299	{
AnnaBridge	189:f392fc9709a3	300	/* Process Unlocked */
AnnaBridge	189:f392fc9709a3	301	__HAL_UNLOCK(&pFlash);
AnnaBridge	189:f392fc9709a3	302	}
AnnaBridge	189:f392fc9709a3	303	else
AnnaBridge	189:f392fc9709a3	304	{
AnnaBridge	189:f392fc9709a3	305	if((pEraseInit->Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	306	{
AnnaBridge	189:f392fc9709a3	307	/* Enable End of Operation and Error interrupts for Bank 1 */
AnnaBridge	189:f392fc9709a3	308	__HAL_FLASH_ENABLE_IT_BANK1(FLASH_IT_EOP_BANK1 \| FLASH_IT_WRPERR_BANK1 \| FLASH_IT_PGSERR_BANK1 \| \
AnnaBridge	189:f392fc9709a3	309	FLASH_IT_STRBERR_BANK1 \| FLASH_IT_INCERR_BANK1 \| FLASH_IT_OPERR_BANK1);
AnnaBridge	189:f392fc9709a3	310	}
AnnaBridge	189:f392fc9709a3	311	if((pEraseInit->Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	312	{
AnnaBridge	189:f392fc9709a3	313	/* Enable End of Operation and Error interrupts for Bank 2 */
AnnaBridge	189:f392fc9709a3	314	__HAL_FLASH_ENABLE_IT_BANK2(FLASH_IT_EOP_BANK2 \| FLASH_IT_WRPERR_BANK2 \| FLASH_IT_PGSERR_BANK2 \| \
AnnaBridge	189:f392fc9709a3	315	FLASH_IT_STRBERR_BANK2 \| FLASH_IT_INCERR_BANK2 \| FLASH_IT_OPERR_BANK2);
AnnaBridge	189:f392fc9709a3	316	}
AnnaBridge	189:f392fc9709a3	317
AnnaBridge	189:f392fc9709a3	318	if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
AnnaBridge	189:f392fc9709a3	319	{
AnnaBridge	189:f392fc9709a3	320	/Mass erase to be done/
AnnaBridge	189:f392fc9709a3	321	if(pEraseInit->Banks == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	322	{
AnnaBridge	189:f392fc9709a3	323	pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE_BANK1;
AnnaBridge	189:f392fc9709a3	324	}
AnnaBridge	189:f392fc9709a3	325	else if(pEraseInit->Banks == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	326	{
AnnaBridge	189:f392fc9709a3	327	pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE_BANK2;
AnnaBridge	189:f392fc9709a3	328	}
AnnaBridge	189:f392fc9709a3	329	else
AnnaBridge	189:f392fc9709a3	330	{
AnnaBridge	189:f392fc9709a3	331	pFlash.ProcedureOnGoing = FLASH_PROC_ALLBANK_MASSERASE;
AnnaBridge	189:f392fc9709a3	332	}
AnnaBridge	189:f392fc9709a3	333
AnnaBridge	189:f392fc9709a3	334	FLASH_MassErase(pEraseInit->VoltageRange, pEraseInit->Banks);
AnnaBridge	189:f392fc9709a3	335	}
AnnaBridge	189:f392fc9709a3	336	else
AnnaBridge	189:f392fc9709a3	337	{
AnnaBridge	189:f392fc9709a3	338	/* Erase by sector to be done */
AnnaBridge	189:f392fc9709a3	339	if(pEraseInit->Banks == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	340	{
AnnaBridge	189:f392fc9709a3	341	pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE_BANK1;
AnnaBridge	189:f392fc9709a3	342	}
AnnaBridge	189:f392fc9709a3	343	else
AnnaBridge	189:f392fc9709a3	344	{
AnnaBridge	189:f392fc9709a3	345	pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE_BANK2;
AnnaBridge	189:f392fc9709a3	346	}
AnnaBridge	189:f392fc9709a3	347
AnnaBridge	189:f392fc9709a3	348	pFlash.NbSectorsToErase = pEraseInit->NbSectors;
AnnaBridge	189:f392fc9709a3	349	pFlash.Sector = pEraseInit->Sector;
AnnaBridge	189:f392fc9709a3	350	pFlash.VoltageForErase = pEraseInit->VoltageRange;
AnnaBridge	189:f392fc9709a3	351
AnnaBridge	189:f392fc9709a3	352	/* Erase first sector and wait for IT */
AnnaBridge	189:f392fc9709a3	353	FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->Banks, pEraseInit->VoltageRange);
AnnaBridge	189:f392fc9709a3	354	}
AnnaBridge	189:f392fc9709a3	355	}
AnnaBridge	189:f392fc9709a3	356
AnnaBridge	189:f392fc9709a3	357	return status;
AnnaBridge	189:f392fc9709a3	358	}
AnnaBridge	189:f392fc9709a3	359
AnnaBridge	189:f392fc9709a3	360	/**
AnnaBridge	189:f392fc9709a3	361	* @brief Program option bytes
AnnaBridge	189:f392fc9709a3	362	* @param pOBInit pointer to an FLASH_OBInitStruct structure that
AnnaBridge	189:f392fc9709a3	363	* contains the configuration information for the programming.
AnnaBridge	189:f392fc9709a3	364	*
AnnaBridge	189:f392fc9709a3	365	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	366	*/
AnnaBridge	189:f392fc9709a3	367	HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
AnnaBridge	189:f392fc9709a3	368	{
AnnaBridge	189:f392fc9709a3	369	HAL_StatusTypeDef status;
AnnaBridge	189:f392fc9709a3	370
AnnaBridge	189:f392fc9709a3	371	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	372	assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
AnnaBridge	189:f392fc9709a3	373
AnnaBridge	189:f392fc9709a3	374	/* Process Locked */
AnnaBridge	189:f392fc9709a3	375	__HAL_LOCK(&pFlash);
AnnaBridge	189:f392fc9709a3	376
AnnaBridge	189:f392fc9709a3	377	/* Reset Error Code */
AnnaBridge	189:f392fc9709a3	378	pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
AnnaBridge	189:f392fc9709a3	379
AnnaBridge	189:f392fc9709a3	380	/* Wait for last operation to be completed */
AnnaBridge	189:f392fc9709a3	381	if(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_1) != HAL_OK)
AnnaBridge	189:f392fc9709a3	382	{
AnnaBridge	189:f392fc9709a3	383	status = HAL_ERROR;
AnnaBridge	189:f392fc9709a3	384	}
AnnaBridge	189:f392fc9709a3	385	else if(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_2) != HAL_OK)
AnnaBridge	189:f392fc9709a3	386	{
AnnaBridge	189:f392fc9709a3	387	status = HAL_ERROR;
AnnaBridge	189:f392fc9709a3	388	}
AnnaBridge	189:f392fc9709a3	389	else
AnnaBridge	189:f392fc9709a3	390	{
AnnaBridge	189:f392fc9709a3	391	status = HAL_OK;
AnnaBridge	189:f392fc9709a3	392	}
AnnaBridge	189:f392fc9709a3	393
AnnaBridge	189:f392fc9709a3	394	if(status == HAL_OK)
AnnaBridge	189:f392fc9709a3	395	{
AnnaBridge	189:f392fc9709a3	396	/Write protection configuration/
AnnaBridge	189:f392fc9709a3	397	if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
AnnaBridge	189:f392fc9709a3	398	{
AnnaBridge	189:f392fc9709a3	399	assert_param(IS_WRPSTATE(pOBInit->WRPState));
AnnaBridge	189:f392fc9709a3	400
AnnaBridge	189:f392fc9709a3	401	if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
AnnaBridge	189:f392fc9709a3	402	{
AnnaBridge	189:f392fc9709a3	403	/Enable of Write protection on the selected Sector/
AnnaBridge	189:f392fc9709a3	404	FLASH_OB_EnableWRP(pOBInit->WRPSector,pOBInit->Banks);
AnnaBridge	189:f392fc9709a3	405	}
AnnaBridge	189:f392fc9709a3	406	else
AnnaBridge	189:f392fc9709a3	407	{
AnnaBridge	189:f392fc9709a3	408	/Disable of Write protection on the selected Sector/
AnnaBridge	189:f392fc9709a3	409	FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
AnnaBridge	189:f392fc9709a3	410	}
AnnaBridge	189:f392fc9709a3	411	}
AnnaBridge	189:f392fc9709a3	412
AnnaBridge	189:f392fc9709a3	413	/* Read protection configuration */
AnnaBridge	189:f392fc9709a3	414	if((pOBInit->OptionType & OPTIONBYTE_RDP) != 0U)
AnnaBridge	189:f392fc9709a3	415	{
AnnaBridge	189:f392fc9709a3	416	/* Configure the Read protection level */
AnnaBridge	189:f392fc9709a3	417	FLASH_OB_RDPConfig(pOBInit->RDPLevel);
AnnaBridge	189:f392fc9709a3	418	}
AnnaBridge	189:f392fc9709a3	419
AnnaBridge	189:f392fc9709a3	420	/* User Configuration */
AnnaBridge	189:f392fc9709a3	421	if((pOBInit->OptionType & OPTIONBYTE_USER) != 0U)
AnnaBridge	189:f392fc9709a3	422	{
AnnaBridge	189:f392fc9709a3	423	/* Configure the user option bytes */
AnnaBridge	189:f392fc9709a3	424	FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig);
AnnaBridge	189:f392fc9709a3	425	}
AnnaBridge	189:f392fc9709a3	426
AnnaBridge	189:f392fc9709a3	427	/* PCROP Configuration */
AnnaBridge	189:f392fc9709a3	428	if((pOBInit->OptionType & OPTIONBYTE_PCROP) != 0U)
AnnaBridge	189:f392fc9709a3	429	{
AnnaBridge	189:f392fc9709a3	430	assert_param(IS_FLASH_BANK(pOBInit->Banks));
AnnaBridge	189:f392fc9709a3	431
AnnaBridge	189:f392fc9709a3	432	/Configure the Proprietary code readout protection /
AnnaBridge	189:f392fc9709a3	433	FLASH_OB_PCROPConfig(pOBInit->PCROPConfig, pOBInit->PCROPStartAddr, pOBInit->PCROPEndAddr, pOBInit->Banks);
AnnaBridge	189:f392fc9709a3	434	}
AnnaBridge	189:f392fc9709a3	435
AnnaBridge	189:f392fc9709a3	436	/* BOR Level configuration */
AnnaBridge	189:f392fc9709a3	437	if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
AnnaBridge	189:f392fc9709a3	438	{
AnnaBridge	189:f392fc9709a3	439	FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
AnnaBridge	189:f392fc9709a3	440	}
AnnaBridge	189:f392fc9709a3	441
AnnaBridge	189:f392fc9709a3	442	/Boot Address configuration/
AnnaBridge	189:f392fc9709a3	443	if((pOBInit->OptionType & OPTIONBYTE_BOOTADD) == OPTIONBYTE_BOOTADD)
AnnaBridge	189:f392fc9709a3	444	{
AnnaBridge	189:f392fc9709a3	445	FLASH_OB_BootAddConfig(pOBInit->BootConfig, pOBInit->BootAddr0, pOBInit->BootAddr1);
AnnaBridge	189:f392fc9709a3	446	}
AnnaBridge	189:f392fc9709a3	447
AnnaBridge	189:f392fc9709a3	448	/Bank1 secure area configuration/
AnnaBridge	189:f392fc9709a3	449	if((pOBInit->OptionType & OPTIONBYTE_SECURE_AREA) == OPTIONBYTE_SECURE_AREA)
AnnaBridge	189:f392fc9709a3	450	{
AnnaBridge	189:f392fc9709a3	451	FLASH_OB_SecureAreaConfig(pOBInit->SecureAreaConfig, pOBInit->SecureAreaStartAddr, pOBInit->SecureAreaEndAddr,pOBInit->Banks);
AnnaBridge	189:f392fc9709a3	452	}
AnnaBridge	189:f392fc9709a3	453	}
AnnaBridge	189:f392fc9709a3	454
AnnaBridge	189:f392fc9709a3	455	/* Process Unlocked */
AnnaBridge	189:f392fc9709a3	456	__HAL_UNLOCK(&pFlash);
AnnaBridge	189:f392fc9709a3	457
AnnaBridge	189:f392fc9709a3	458	return status;
AnnaBridge	189:f392fc9709a3	459	}
AnnaBridge	189:f392fc9709a3	460
AnnaBridge	189:f392fc9709a3	461	/**
AnnaBridge	189:f392fc9709a3	462	* @brief Get the Option byte configuration
AnnaBridge	189:f392fc9709a3	463	* @param pOBInit pointer to an FLASH_OBInitStruct structure that
AnnaBridge	189:f392fc9709a3	464	* contains the configuration information for the programming.
AnnaBridge	189:f392fc9709a3	465	* @note The parameter Banks of the pOBInit structure must be set exclusively to FLASH_BANK_1 or FLASH_BANK_2,
AnnaBridge	189:f392fc9709a3	466	* as this parameter is use to get the given Bank WRP, PCROP and secured area configuration.
AnnaBridge	189:f392fc9709a3	467	*
AnnaBridge	189:f392fc9709a3	468	* @retval None
AnnaBridge	189:f392fc9709a3	469	*/
AnnaBridge	189:f392fc9709a3	470	void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
AnnaBridge	189:f392fc9709a3	471	{
AnnaBridge	189:f392fc9709a3	472	pOBInit->OptionType = (OPTIONBYTE_USER \| OPTIONBYTE_RDP \| OPTIONBYTE_BOR);
AnnaBridge	189:f392fc9709a3	473
AnnaBridge	189:f392fc9709a3	474	/* Get Read protection level */
AnnaBridge	189:f392fc9709a3	475	pOBInit->RDPLevel = FLASH_OB_GetRDP();
AnnaBridge	189:f392fc9709a3	476
AnnaBridge	189:f392fc9709a3	477	/* Get the user option bytes */
AnnaBridge	189:f392fc9709a3	478	pOBInit->USERConfig = FLASH_OB_GetUser();
AnnaBridge	189:f392fc9709a3	479
AnnaBridge	189:f392fc9709a3	480	/Get BOR Level/
AnnaBridge	189:f392fc9709a3	481	pOBInit->BORLevel = FLASH_OB_GetBOR();
AnnaBridge	189:f392fc9709a3	482
AnnaBridge	189:f392fc9709a3	483	if ((pOBInit->Banks == FLASH_BANK_1) \|\| (pOBInit->Banks == FLASH_BANK_2))
AnnaBridge	189:f392fc9709a3	484	{
AnnaBridge	189:f392fc9709a3	485	pOBInit->OptionType \|= (OPTIONBYTE_WRP \| OPTIONBYTE_PCROP \| OPTIONBYTE_SECURE_AREA);
AnnaBridge	189:f392fc9709a3	486
AnnaBridge	189:f392fc9709a3	487	/* Get write protection on the selected area */
AnnaBridge	189:f392fc9709a3	488	FLASH_OB_GetWRP(&(pOBInit->WRPState), &(pOBInit->WRPSector), pOBInit->Banks);
AnnaBridge	189:f392fc9709a3	489
AnnaBridge	189:f392fc9709a3	490	/* Get the Proprietary code readout protection */
AnnaBridge	189:f392fc9709a3	491	FLASH_OB_GetPCROP(&(pOBInit->PCROPConfig), &(pOBInit->PCROPStartAddr), &(pOBInit->PCROPEndAddr), pOBInit->Banks);
AnnaBridge	189:f392fc9709a3	492
AnnaBridge	189:f392fc9709a3	493	/Get Bank Secure area/
AnnaBridge	189:f392fc9709a3	494	FLASH_OB_GetSecureArea(&(pOBInit->SecureAreaConfig), &(pOBInit->SecureAreaStartAddr), &(pOBInit->SecureAreaEndAddr), pOBInit->Banks);
AnnaBridge	189:f392fc9709a3	495	}
AnnaBridge	189:f392fc9709a3	496
AnnaBridge	189:f392fc9709a3	497	/Get Boot Address/
AnnaBridge	189:f392fc9709a3	498	FLASH_OB_GetBootAdd(&(pOBInit->BootAddr0), &(pOBInit->BootAddr1));
AnnaBridge	189:f392fc9709a3	499
AnnaBridge	189:f392fc9709a3	500	pOBInit->OptionType \|= OPTIONBYTE_BOOTADD;
AnnaBridge	189:f392fc9709a3	501	}
AnnaBridge	189:f392fc9709a3	502
AnnaBridge	189:f392fc9709a3	503	/**
AnnaBridge	189:f392fc9709a3	504	* @brief Unlock the FLASH Bank1 control registers access
AnnaBridge	189:f392fc9709a3	505	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	506	*/
AnnaBridge	189:f392fc9709a3	507	HAL_StatusTypeDef HAL_FLASHEx_Unlock_Bank1(void)
AnnaBridge	189:f392fc9709a3	508	{
AnnaBridge	189:f392fc9709a3	509	if(READ_BIT(FLASH->CR1, FLASH_CR_LOCK) != 0U)
AnnaBridge	189:f392fc9709a3	510	{
AnnaBridge	189:f392fc9709a3	511	/* Authorize the FLASH Bank1 Registers access */
AnnaBridge	189:f392fc9709a3	512	WRITE_REG(FLASH->KEYR1, FLASH_KEY1);
AnnaBridge	189:f392fc9709a3	513	WRITE_REG(FLASH->KEYR1, FLASH_KEY2);
AnnaBridge	189:f392fc9709a3	514
AnnaBridge	189:f392fc9709a3	515	/* Verify Flash Bank1 is unlocked */
AnnaBridge	189:f392fc9709a3	516	if (READ_BIT(FLASH->CR1, FLASH_CR_LOCK) != 0U)
AnnaBridge	189:f392fc9709a3	517	{
AnnaBridge	189:f392fc9709a3	518	return HAL_ERROR;
AnnaBridge	189:f392fc9709a3	519	}
AnnaBridge	189:f392fc9709a3	520	}
AnnaBridge	189:f392fc9709a3	521
AnnaBridge	189:f392fc9709a3	522	return HAL_OK;
AnnaBridge	189:f392fc9709a3	523	}
AnnaBridge	189:f392fc9709a3	524
AnnaBridge	189:f392fc9709a3	525	/**
AnnaBridge	189:f392fc9709a3	526	* @brief Locks the FLASH Bank1 control registers access
AnnaBridge	189:f392fc9709a3	527	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	528	*/
AnnaBridge	189:f392fc9709a3	529	HAL_StatusTypeDef HAL_FLASHEx_Lock_Bank1(void)
AnnaBridge	189:f392fc9709a3	530	{
AnnaBridge	189:f392fc9709a3	531	/* Set the LOCK Bit to lock the FLASH Bank1 Registers access */
AnnaBridge	189:f392fc9709a3	532	SET_BIT(FLASH->CR1, FLASH_CR_LOCK);
AnnaBridge	189:f392fc9709a3	533	return HAL_OK;
AnnaBridge	189:f392fc9709a3	534	}
AnnaBridge	189:f392fc9709a3	535
AnnaBridge	189:f392fc9709a3	536	/**
AnnaBridge	189:f392fc9709a3	537	* @brief Unlock the FLASH Bank2 control registers access
AnnaBridge	189:f392fc9709a3	538	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	539	*/
AnnaBridge	189:f392fc9709a3	540	HAL_StatusTypeDef HAL_FLASHEx_Unlock_Bank2(void)
AnnaBridge	189:f392fc9709a3	541	{
AnnaBridge	189:f392fc9709a3	542	if(READ_BIT(FLASH->CR2, FLASH_CR_LOCK) != 0U)
AnnaBridge	189:f392fc9709a3	543	{
AnnaBridge	189:f392fc9709a3	544	/* Authorize the FLASH Bank2 Registers access */
AnnaBridge	189:f392fc9709a3	545	WRITE_REG(FLASH->KEYR2, FLASH_KEY1);
AnnaBridge	189:f392fc9709a3	546	WRITE_REG(FLASH->KEYR2, FLASH_KEY2);
AnnaBridge	189:f392fc9709a3	547
AnnaBridge	189:f392fc9709a3	548	/* Verify Flash Bank1 is unlocked */
AnnaBridge	189:f392fc9709a3	549	if (READ_BIT(FLASH->CR2, FLASH_CR_LOCK) != 0U)
AnnaBridge	189:f392fc9709a3	550	{
AnnaBridge	189:f392fc9709a3	551	return HAL_ERROR;
AnnaBridge	189:f392fc9709a3	552	}
AnnaBridge	189:f392fc9709a3	553	}
AnnaBridge	189:f392fc9709a3	554
AnnaBridge	189:f392fc9709a3	555	return HAL_OK;
AnnaBridge	189:f392fc9709a3	556	}
AnnaBridge	189:f392fc9709a3	557
AnnaBridge	189:f392fc9709a3	558	/**
AnnaBridge	189:f392fc9709a3	559	* @brief Locks the FLASH Bank2 control registers access
AnnaBridge	189:f392fc9709a3	560	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	561	*/
AnnaBridge	189:f392fc9709a3	562	HAL_StatusTypeDef HAL_FLASHEx_Lock_Bank2(void)
AnnaBridge	189:f392fc9709a3	563	{
AnnaBridge	189:f392fc9709a3	564	/* Set the LOCK Bit to lock the FLASH Bank2 Registers access */
AnnaBridge	189:f392fc9709a3	565	SET_BIT(FLASH->CR2, FLASH_CR_LOCK);
AnnaBridge	189:f392fc9709a3	566	return HAL_OK;
AnnaBridge	189:f392fc9709a3	567	}
AnnaBridge	189:f392fc9709a3	568
AnnaBridge	189:f392fc9709a3	569	/*
AnnaBridge	189:f392fc9709a3	570	* @brief Perform a CRC computation on the specified FLASH memory area
AnnaBridge	189:f392fc9709a3	571	* @param pCRCInit pointer to an FLASH_CRCInitTypeDef structure that
AnnaBridge	189:f392fc9709a3	572	* contains the configuration information for the CRC computation.
AnnaBridge	189:f392fc9709a3	573	* @note CRC computation uses CRC-32 (Ethernet) polynomial 0x4C11DB7
AnnaBridge	189:f392fc9709a3	574	* @note The application should avoid running a CRC on PCROP or secure-only
AnnaBridge	189:f392fc9709a3	575	* user Flash memory area since it may alter the expected CRC value.
AnnaBridge	189:f392fc9709a3	576	* A special error flag (CRC read error: CRCRDERR) can be used to
AnnaBridge	189:f392fc9709a3	577	* detect such a case.
AnnaBridge	189:f392fc9709a3	578	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	579	*/
AnnaBridge	189:f392fc9709a3	580	HAL_StatusTypeDef HAL_FLASHEx_ComputeCRC(FLASH_CRCInitTypeDef pCRCInit, uint32_t CRC_Result)
AnnaBridge	189:f392fc9709a3	581	{
AnnaBridge	189:f392fc9709a3	582	HAL_StatusTypeDef status;
AnnaBridge	189:f392fc9709a3	583	uint32_t sector_index;
AnnaBridge	189:f392fc9709a3	584
AnnaBridge	189:f392fc9709a3	585	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	586	assert_param(IS_FLASH_BANK_EXCLUSIVE(pCRCInit->Bank));
AnnaBridge	189:f392fc9709a3	587	assert_param(IS_FLASH_TYPECRC(pCRCInit->TypeCRC));
AnnaBridge	189:f392fc9709a3	588
AnnaBridge	189:f392fc9709a3	589	/* Wait for OB change operation to be completed */
AnnaBridge	189:f392fc9709a3	590	status = FLASH_OB_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
AnnaBridge	189:f392fc9709a3	591
AnnaBridge	189:f392fc9709a3	592	if (status == HAL_OK)
AnnaBridge	189:f392fc9709a3	593	{
AnnaBridge	189:f392fc9709a3	594	if (pCRCInit->Bank == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	595	{
AnnaBridge	189:f392fc9709a3	596	/* Enable CRC feature */
AnnaBridge	189:f392fc9709a3	597	FLASH->CR1 \|= FLASH_CR_CRC_EN;
AnnaBridge	189:f392fc9709a3	598
AnnaBridge	189:f392fc9709a3	599	/* Clear CRC flags in Status Register: CRC end of calculation and CRC read error */
AnnaBridge	189:f392fc9709a3	600	FLASH->CCR1 \|= (FLASH_CCR_CLR_CRCEND \| FLASH_CCR_CLR_CRCRDERR);
AnnaBridge	189:f392fc9709a3	601
AnnaBridge	189:f392fc9709a3	602	/* Clear current CRC result, program burst size and define memory area on which CRC has to be computed */
AnnaBridge	189:f392fc9709a3	603	FLASH->CRCCR1 \|= FLASH_CRCCR_CLEAN_CRC \| pCRCInit->BurstSize \| pCRCInit->TypeCRC;
AnnaBridge	189:f392fc9709a3	604
AnnaBridge	189:f392fc9709a3	605	if (pCRCInit->TypeCRC == FLASH_CRC_SECTORS)
AnnaBridge	189:f392fc9709a3	606	{
AnnaBridge	189:f392fc9709a3	607	/* Clear sectors list */
AnnaBridge	189:f392fc9709a3	608	FLASH->CRCCR1 \|= FLASH_CRCCR_CLEAN_SECT;
AnnaBridge	189:f392fc9709a3	609
AnnaBridge	189:f392fc9709a3	610	/* Select CRC sectors */
AnnaBridge	189:f392fc9709a3	611	for(sector_index = pCRCInit->Sector; sector_index < (pCRCInit->NbSectors + pCRCInit->Sector); sector_index++)
AnnaBridge	189:f392fc9709a3	612	{
AnnaBridge	189:f392fc9709a3	613	FLASH_CRC_AddSector(sector_index, FLASH_BANK_1);
AnnaBridge	189:f392fc9709a3	614	}
AnnaBridge	189:f392fc9709a3	615	}
AnnaBridge	189:f392fc9709a3	616	else if (pCRCInit->TypeCRC == FLASH_CRC_BANK)
AnnaBridge	189:f392fc9709a3	617	{
AnnaBridge	189:f392fc9709a3	618	/* Enable Bank 1 CRC select bit */
AnnaBridge	189:f392fc9709a3	619	FLASH->CRCCR1 \|= FLASH_CRCCR_ALL_BANK;
AnnaBridge	189:f392fc9709a3	620	}
AnnaBridge	189:f392fc9709a3	621	else
AnnaBridge	189:f392fc9709a3	622	{
AnnaBridge	189:f392fc9709a3	623	/* Select CRC start and end addresses */
AnnaBridge	189:f392fc9709a3	624	FLASH_CRC_SelectAddress(pCRCInit->CRCStartAddr, pCRCInit->CRCEndAddr, FLASH_BANK_1);
AnnaBridge	189:f392fc9709a3	625	}
AnnaBridge	189:f392fc9709a3	626
AnnaBridge	189:f392fc9709a3	627	/* Start the CRC calculation */
AnnaBridge	189:f392fc9709a3	628	FLASH->CRCCR1 \|= FLASH_CRCCR_START_CRC;
AnnaBridge	189:f392fc9709a3	629
AnnaBridge	189:f392fc9709a3	630	/* Wait on CRC busy flag */
AnnaBridge	189:f392fc9709a3	631	status = FLASH_CRC_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_1);
AnnaBridge	189:f392fc9709a3	632
AnnaBridge	189:f392fc9709a3	633	/* Return CRC result */
AnnaBridge	189:f392fc9709a3	634	(*CRC_Result) = FLASH->CRCDATA;
AnnaBridge	189:f392fc9709a3	635
AnnaBridge	189:f392fc9709a3	636	/* Disable CRC feature */
AnnaBridge	189:f392fc9709a3	637	FLASH->CR1 &= (~FLASH_CR_CRC_EN);
AnnaBridge	189:f392fc9709a3	638
AnnaBridge	189:f392fc9709a3	639	/* Clear CRC flags */
AnnaBridge	189:f392fc9709a3	640	__HAL_FLASH_CLEAR_FLAG_BANK1(FLASH_FLAG_CRCEND_BANK1 \| FLASH_FLAG_CRCRDERR_BANK1);
AnnaBridge	189:f392fc9709a3	641	}
AnnaBridge	189:f392fc9709a3	642	else
AnnaBridge	189:f392fc9709a3	643	{
AnnaBridge	189:f392fc9709a3	644	/* Enable CRC feature */
AnnaBridge	189:f392fc9709a3	645	FLASH->CR2 \|= FLASH_CR_CRC_EN;
AnnaBridge	189:f392fc9709a3	646
AnnaBridge	189:f392fc9709a3	647	/* Clear CRC flags in Status Register: CRC end of calculation and CRC read error */
AnnaBridge	189:f392fc9709a3	648	FLASH->CCR2 \|= (FLASH_CCR_CLR_CRCEND \| FLASH_CCR_CLR_CRCRDERR);
AnnaBridge	189:f392fc9709a3	649
AnnaBridge	189:f392fc9709a3	650	/* Clear current CRC result, program burst size and define memory area on which CRC has to be computed */
AnnaBridge	189:f392fc9709a3	651	FLASH->CRCCR2 \|= FLASH_CRCCR_CLEAN_CRC \| pCRCInit->BurstSize \| pCRCInit->TypeCRC;
AnnaBridge	189:f392fc9709a3	652
AnnaBridge	189:f392fc9709a3	653	if (pCRCInit->TypeCRC == FLASH_CRC_SECTORS)
AnnaBridge	189:f392fc9709a3	654	{
AnnaBridge	189:f392fc9709a3	655	/* Clear sectors list */
AnnaBridge	189:f392fc9709a3	656	FLASH->CRCCR2 \|= FLASH_CRCCR_CLEAN_SECT;
AnnaBridge	189:f392fc9709a3	657
AnnaBridge	189:f392fc9709a3	658	/* Add CRC sectors */
AnnaBridge	189:f392fc9709a3	659	for(sector_index = pCRCInit->Sector; sector_index < (pCRCInit->NbSectors + pCRCInit->Sector); sector_index++)
AnnaBridge	189:f392fc9709a3	660	{
AnnaBridge	189:f392fc9709a3	661	FLASH_CRC_AddSector(sector_index, FLASH_BANK_2);
AnnaBridge	189:f392fc9709a3	662	}
AnnaBridge	189:f392fc9709a3	663	}
AnnaBridge	189:f392fc9709a3	664	else if (pCRCInit->TypeCRC == FLASH_CRC_BANK)
AnnaBridge	189:f392fc9709a3	665	{
AnnaBridge	189:f392fc9709a3	666	/* Enable Bank 2 CRC select bit */
AnnaBridge	189:f392fc9709a3	667	FLASH->CRCCR2 \|= FLASH_CRCCR_ALL_BANK;
AnnaBridge	189:f392fc9709a3	668	}
AnnaBridge	189:f392fc9709a3	669	else
AnnaBridge	189:f392fc9709a3	670	{
AnnaBridge	189:f392fc9709a3	671	/* Select CRC start and end addresses */
AnnaBridge	189:f392fc9709a3	672	FLASH_CRC_SelectAddress(pCRCInit->CRCStartAddr, pCRCInit->CRCEndAddr, FLASH_BANK_2);
AnnaBridge	189:f392fc9709a3	673	}
AnnaBridge	189:f392fc9709a3	674
AnnaBridge	189:f392fc9709a3	675	/* Start the CRC calculation */
AnnaBridge	189:f392fc9709a3	676	FLASH->CRCCR2 \|= FLASH_CRCCR_START_CRC;
AnnaBridge	189:f392fc9709a3	677
AnnaBridge	189:f392fc9709a3	678	/* Wait on CRC busy flag */
AnnaBridge	189:f392fc9709a3	679	status = FLASH_CRC_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE, FLASH_BANK_2);
AnnaBridge	189:f392fc9709a3	680
AnnaBridge	189:f392fc9709a3	681	/* Return CRC result */
AnnaBridge	189:f392fc9709a3	682	(*CRC_Result) = FLASH->CRCDATA;
AnnaBridge	189:f392fc9709a3	683
AnnaBridge	189:f392fc9709a3	684	/* Disable CRC feature */
AnnaBridge	189:f392fc9709a3	685	FLASH->CR2 &= (~FLASH_CR_CRC_EN);
AnnaBridge	189:f392fc9709a3	686
AnnaBridge	189:f392fc9709a3	687	/* Clear CRC flags */
AnnaBridge	189:f392fc9709a3	688	__HAL_FLASH_CLEAR_FLAG_BANK2(FLASH_FLAG_CRCEND_BANK2 \| FLASH_FLAG_CRCRDERR_BANK2);
AnnaBridge	189:f392fc9709a3	689	}
AnnaBridge	189:f392fc9709a3	690	}
AnnaBridge	189:f392fc9709a3	691
AnnaBridge	189:f392fc9709a3	692	return status;
AnnaBridge	189:f392fc9709a3	693	}
AnnaBridge	189:f392fc9709a3	694
AnnaBridge	189:f392fc9709a3	695	/**
AnnaBridge	189:f392fc9709a3	696	* @}
AnnaBridge	189:f392fc9709a3	697	*/
AnnaBridge	189:f392fc9709a3	698
AnnaBridge	189:f392fc9709a3	699	/**
AnnaBridge	189:f392fc9709a3	700	* @}
AnnaBridge	189:f392fc9709a3	701	*/
AnnaBridge	189:f392fc9709a3	702
AnnaBridge	189:f392fc9709a3	703	/* Private functions ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	704
AnnaBridge	189:f392fc9709a3	705	/** @addtogroup FLASHEx_Private_Functions
AnnaBridge	189:f392fc9709a3	706	* @{
AnnaBridge	189:f392fc9709a3	707	*/
AnnaBridge	189:f392fc9709a3	708
AnnaBridge	189:f392fc9709a3	709	/**
AnnaBridge	189:f392fc9709a3	710	* @brief Mass erase of FLASH memory
AnnaBridge	189:f392fc9709a3	711	* @param VoltageRange The device program/erase parallelism.
AnnaBridge	189:f392fc9709a3	712	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	713	* @arg FLASH_VOLTAGE_RANGE_1 : Flash program/erase by 8 bits
AnnaBridge	189:f392fc9709a3	714	* @arg FLASH_VOLTAGE_RANGE_2 : Flash program/erase by 16 bits
AnnaBridge	189:f392fc9709a3	715	* @arg FLASH_VOLTAGE_RANGE_3 : Flash program/erase by 32 bits
AnnaBridge	189:f392fc9709a3	716	* @arg FLASH_VOLTAGE_RANGE_4 : Flash program/erase by 64 bits
AnnaBridge	189:f392fc9709a3	717	*
AnnaBridge	189:f392fc9709a3	718	* @param Banks Banks to be erased
AnnaBridge	189:f392fc9709a3	719	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	720	* @arg FLASH_BANK_1: Bank1 to be erased
AnnaBridge	189:f392fc9709a3	721	* @arg FLASH_BANK_2: Bank2 to be erased
AnnaBridge	189:f392fc9709a3	722	* @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
AnnaBridge	189:f392fc9709a3	723	*
AnnaBridge	189:f392fc9709a3	724	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	725	*/
AnnaBridge	189:f392fc9709a3	726	static void FLASH_MassErase(uint32_t VoltageRange, uint32_t Banks)
AnnaBridge	189:f392fc9709a3	727	{
AnnaBridge	189:f392fc9709a3	728	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	729	assert_param(IS_VOLTAGERANGE(VoltageRange));
AnnaBridge	189:f392fc9709a3	730	assert_param(IS_FLASH_BANK(Banks));
AnnaBridge	189:f392fc9709a3	731
AnnaBridge	189:f392fc9709a3	732	/* Flash Mass Erase */
AnnaBridge	189:f392fc9709a3	733	if((Banks & FLASH_BANK_BOTH) == FLASH_BANK_BOTH)
AnnaBridge	189:f392fc9709a3	734	{
AnnaBridge	189:f392fc9709a3	735	/* Reset Program/erase VoltageRange for Bank1 and Bank2 */
AnnaBridge	189:f392fc9709a3	736	FLASH->CR1 &= (~FLASH_CR_PSIZE);
AnnaBridge	189:f392fc9709a3	737	FLASH->CR2 &= (~FLASH_CR_PSIZE);
AnnaBridge	189:f392fc9709a3	738
AnnaBridge	189:f392fc9709a3	739	/* Set voltage range */
AnnaBridge	189:f392fc9709a3	740	FLASH->CR1 \|= VoltageRange;
AnnaBridge	189:f392fc9709a3	741	FLASH->CR2 \|= VoltageRange;
AnnaBridge	189:f392fc9709a3	742
AnnaBridge	189:f392fc9709a3	743	/* Set Mass Erase Bit */
AnnaBridge	189:f392fc9709a3	744	FLASH->OPTCR \|= FLASH_OPTCR_MER;
AnnaBridge	189:f392fc9709a3	745	}
AnnaBridge	189:f392fc9709a3	746	else
AnnaBridge	189:f392fc9709a3	747	{
AnnaBridge	189:f392fc9709a3	748	/* Proceed to erase Flash Bank */
AnnaBridge	189:f392fc9709a3	749	if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	750	{
AnnaBridge	189:f392fc9709a3	751	/* Reset Program/erase VoltageRange for Bank1 */
AnnaBridge	189:f392fc9709a3	752	FLASH->CR1 &= (~FLASH_CR_PSIZE);
AnnaBridge	189:f392fc9709a3	753
AnnaBridge	189:f392fc9709a3	754	/* Bank1 will be erased, and set voltage range */
AnnaBridge	189:f392fc9709a3	755	FLASH->CR1 \|= FLASH_CR_BER \| VoltageRange;
AnnaBridge	189:f392fc9709a3	756	FLASH->CR1 \|= FLASH_CR_START;
AnnaBridge	189:f392fc9709a3	757	}
AnnaBridge	189:f392fc9709a3	758	if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	759	{
AnnaBridge	189:f392fc9709a3	760	/* Reset Program/erase VoltageRange for Bank2 */
AnnaBridge	189:f392fc9709a3	761	FLASH->CR2 &= (~FLASH_CR_PSIZE);
AnnaBridge	189:f392fc9709a3	762
AnnaBridge	189:f392fc9709a3	763	/* Bank2 will be erased, and set voltage range */
AnnaBridge	189:f392fc9709a3	764	FLASH->CR2 \|= FLASH_CR_BER \| VoltageRange;
AnnaBridge	189:f392fc9709a3	765	FLASH->CR2 \|= FLASH_CR_START;
AnnaBridge	189:f392fc9709a3	766	}
AnnaBridge	189:f392fc9709a3	767	}
AnnaBridge	189:f392fc9709a3	768	}
AnnaBridge	189:f392fc9709a3	769
AnnaBridge	189:f392fc9709a3	770	/**
AnnaBridge	189:f392fc9709a3	771	* @brief Erase the specified FLASH memory sector
AnnaBridge	189:f392fc9709a3	772	* @param Sector FLASH sector to erase
AnnaBridge	189:f392fc9709a3	773	* This parameter can be a value of @ref FLASH_Sectors
AnnaBridge	189:f392fc9709a3	774	* @param Banks Banks to be erased
AnnaBridge	189:f392fc9709a3	775	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	776	* @arg FLASH_BANK_1: Bank1 to be erased
AnnaBridge	189:f392fc9709a3	777	* @arg FLASH_BANK_2: Bank2 to be erased
AnnaBridge	189:f392fc9709a3	778	* @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
AnnaBridge	189:f392fc9709a3	779	* @param VoltageRange The device program/erase parallelism.
AnnaBridge	189:f392fc9709a3	780	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	781	* @arg FLASH_VOLTAGE_RANGE_1 : Flash program/erase by 8 bits
AnnaBridge	189:f392fc9709a3	782	* @arg FLASH_VOLTAGE_RANGE_2 : Flash program/erase by 16 bits
AnnaBridge	189:f392fc9709a3	783	* @arg FLASH_VOLTAGE_RANGE_3 : Flash program/erase by 32 bits
AnnaBridge	189:f392fc9709a3	784	* @arg FLASH_VOLTAGE_RANGE_4 : Flash program/erase by 64 bits
AnnaBridge	189:f392fc9709a3	785	*
AnnaBridge	189:f392fc9709a3	786	* @retval None
AnnaBridge	189:f392fc9709a3	787	*/
AnnaBridge	189:f392fc9709a3	788	void FLASH_Erase_Sector(uint32_t Sector, uint32_t Banks, uint32_t VoltageRange)
AnnaBridge	189:f392fc9709a3	789	{
AnnaBridge	189:f392fc9709a3	790	assert_param(IS_FLASH_SECTOR(Sector));
AnnaBridge	189:f392fc9709a3	791	assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks));
AnnaBridge	189:f392fc9709a3	792	assert_param(IS_VOLTAGERANGE(VoltageRange));
AnnaBridge	189:f392fc9709a3	793
AnnaBridge	189:f392fc9709a3	794	if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	795	{
AnnaBridge	189:f392fc9709a3	796	/* reset Program/erase VoltageRange for Bank1 */
AnnaBridge	189:f392fc9709a3	797	FLASH->CR1 &= ~(FLASH_CR_PSIZE \| FLASH_CR_SNB);
AnnaBridge	189:f392fc9709a3	798
AnnaBridge	189:f392fc9709a3	799	FLASH->CR1 \|= (FLASH_CR_SER \| VoltageRange \| (Sector << FLASH_CR_SNB_Pos));
AnnaBridge	189:f392fc9709a3	800
AnnaBridge	189:f392fc9709a3	801	FLASH->CR1 \|= FLASH_CR_START;
AnnaBridge	189:f392fc9709a3	802	}
AnnaBridge	189:f392fc9709a3	803
AnnaBridge	189:f392fc9709a3	804	if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	805	{
AnnaBridge	189:f392fc9709a3	806	/* reset Program/erase VoltageRange for Bank2 */
AnnaBridge	189:f392fc9709a3	807	FLASH->CR2 &= ~(FLASH_CR_PSIZE \| FLASH_CR_SNB);
AnnaBridge	189:f392fc9709a3	808
AnnaBridge	189:f392fc9709a3	809	FLASH->CR2 \|= (FLASH_CR_SER \| VoltageRange \| (Sector << FLASH_CR_SNB_Pos));
AnnaBridge	189:f392fc9709a3	810
AnnaBridge	189:f392fc9709a3	811	FLASH->CR2 \|= FLASH_CR_START;
AnnaBridge	189:f392fc9709a3	812	}
AnnaBridge	189:f392fc9709a3	813	}
AnnaBridge	189:f392fc9709a3	814
AnnaBridge	189:f392fc9709a3	815	/**
AnnaBridge	189:f392fc9709a3	816	* @brief Enable the write protection of the desired bank1 or bank 2 sectors
AnnaBridge	189:f392fc9709a3	817	* @param WRPSector specifies the sector(s) to be write protected.
AnnaBridge	189:f392fc9709a3	818	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	819	* @arg WRPSector: A combination of OB_WRP_SECTOR_0 to OB_WRP_SECTOR_7 or OB_WRP_SECTOR_All
AnnaBridge	189:f392fc9709a3	820	*
AnnaBridge	189:f392fc9709a3	821	* @param Banks the specific bank to apply WRP sectors
AnnaBridge	189:f392fc9709a3	822	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	823	* @arg FLASH_BANK_1: enable WRP on specified bank1 sectors
AnnaBridge	189:f392fc9709a3	824	* @arg FLASH_BANK_2: enable WRP on specified bank2 sectors
AnnaBridge	189:f392fc9709a3	825	* @arg FLASH_BANK_BOTH: enable WRP on both bank1 and bank2 specified sectors
AnnaBridge	189:f392fc9709a3	826	*
AnnaBridge	189:f392fc9709a3	827	* @retval HAL FLASH State
AnnaBridge	189:f392fc9709a3	828	*/
AnnaBridge	189:f392fc9709a3	829	static void FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
AnnaBridge	189:f392fc9709a3	830	{
AnnaBridge	189:f392fc9709a3	831	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	832	assert_param(IS_OB_WRP_SECTOR(WRPSector));
AnnaBridge	189:f392fc9709a3	833	assert_param(IS_FLASH_BANK(Banks));
AnnaBridge	189:f392fc9709a3	834
AnnaBridge	189:f392fc9709a3	835	if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	836	{
AnnaBridge	189:f392fc9709a3	837	/* Enable Write Protection for bank 1 */
AnnaBridge	189:f392fc9709a3	838	FLASH->WPSN_PRG1 &= (~(WRPSector & FLASH_WPSN_WRPSN));
AnnaBridge	189:f392fc9709a3	839	}
AnnaBridge	189:f392fc9709a3	840
AnnaBridge	189:f392fc9709a3	841	if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	842	{
AnnaBridge	189:f392fc9709a3	843	/* Enable Write Protection for bank 2 */
AnnaBridge	189:f392fc9709a3	844	FLASH->WPSN_PRG2 &= (~(WRPSector & FLASH_WPSN_WRPSN));
AnnaBridge	189:f392fc9709a3	845	}
AnnaBridge	189:f392fc9709a3	846	}
AnnaBridge	189:f392fc9709a3	847
AnnaBridge	189:f392fc9709a3	848	/**
AnnaBridge	189:f392fc9709a3	849	* @brief Disable the write protection of the desired bank1 or bank 2 sectors
AnnaBridge	189:f392fc9709a3	850	* @param WRPSector specifies the sector(s) to disable write protection.
AnnaBridge	189:f392fc9709a3	851	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	852	* @arg WRPSector: A combination of FLASH_OB_WRP_SECTOR_0 to FLASH_OB_WRP_SECTOR_7 or FLASH_OB_WRP_SECTOR_All
AnnaBridge	189:f392fc9709a3	853	*
AnnaBridge	189:f392fc9709a3	854	* @param Banks the specific bank to apply WRP sectors
AnnaBridge	189:f392fc9709a3	855	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	856	* @arg FLASH_BANK_1: disable WRP on specified bank1 sectors
AnnaBridge	189:f392fc9709a3	857	* @arg FLASH_BANK_2: disable WRP on specified bank2 sectors
AnnaBridge	189:f392fc9709a3	858	* @arg FLASH_BANK_BOTH: disable WRP on both bank1 and bank2 specified sectors
AnnaBridge	189:f392fc9709a3	859	*
AnnaBridge	189:f392fc9709a3	860	* @retval HAL FLASH State
AnnaBridge	189:f392fc9709a3	861	*/
AnnaBridge	189:f392fc9709a3	862	static void FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
AnnaBridge	189:f392fc9709a3	863	{
AnnaBridge	189:f392fc9709a3	864	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	865	assert_param(IS_OB_WRP_SECTOR(WRPSector));
AnnaBridge	189:f392fc9709a3	866	assert_param(IS_FLASH_BANK(Banks));
AnnaBridge	189:f392fc9709a3	867
AnnaBridge	189:f392fc9709a3	868	if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	869	{
AnnaBridge	189:f392fc9709a3	870	/* Disable Write Protection for bank 1 */
AnnaBridge	189:f392fc9709a3	871	FLASH->WPSN_PRG1 \|= (WRPSector & FLASH_WPSN_WRPSN);
AnnaBridge	189:f392fc9709a3	872	}
AnnaBridge	189:f392fc9709a3	873
AnnaBridge	189:f392fc9709a3	874	if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	875	{
AnnaBridge	189:f392fc9709a3	876	/* Disable Write Protection for bank 2 */
AnnaBridge	189:f392fc9709a3	877	FLASH->WPSN_PRG2 \|= (WRPSector & FLASH_WPSN_WRPSN);
AnnaBridge	189:f392fc9709a3	878	}
AnnaBridge	189:f392fc9709a3	879	}
AnnaBridge	189:f392fc9709a3	880
AnnaBridge	189:f392fc9709a3	881	/**
AnnaBridge	189:f392fc9709a3	882	* @brief Get the write protection of the given bank 1 or bank 2 sectors
AnnaBridge	189:f392fc9709a3	883	* @param WRPState gives the write protection state on the given bank.
AnnaBridge	189:f392fc9709a3	884	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	885	* @arg WRPState: OB_WRPSTATE_DISABLE or OB_WRPSTATE_ENABLE
AnnaBridge	189:f392fc9709a3	886
AnnaBridge	189:f392fc9709a3	887	* @param WRPSector gives the write protected sector(s) on the given bank .
AnnaBridge	189:f392fc9709a3	888	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	889	* @arg WRPSector: A combination of FLASH_OB_WRP_SECTOR_0 to FLASH_OB_WRP_SECTOR_7 or FLASH_OB_WRP_SECTOR_All
AnnaBridge	189:f392fc9709a3	890	*
AnnaBridge	189:f392fc9709a3	891	* @param Bank the specific bank to apply WRP sectors
AnnaBridge	189:f392fc9709a3	892	* This parameter can be exclusively one of the following values:
AnnaBridge	189:f392fc9709a3	893	* @arg FLASH_BANK_1: Get bank1 WRP sectors
AnnaBridge	189:f392fc9709a3	894	* @arg FLASH_BANK_2: Get bank2 WRP sectors
AnnaBridge	189:f392fc9709a3	895	* @arg FLASH_BANK_BOTH: note allowed in this functions
AnnaBridge	189:f392fc9709a3	896	*
AnnaBridge	189:f392fc9709a3	897	* @retval HAL FLASH State
AnnaBridge	189:f392fc9709a3	898	*/
AnnaBridge	189:f392fc9709a3	899	static void FLASH_OB_GetWRP(uint32_t WRPState, uint32_t WRPSector, uint32_t Bank)
AnnaBridge	189:f392fc9709a3	900	{
AnnaBridge	189:f392fc9709a3	901	uint32_t regvalue = 0U;
AnnaBridge	189:f392fc9709a3	902
AnnaBridge	189:f392fc9709a3	903	if((Bank & FLASH_BANK_BOTH) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	904	{
AnnaBridge	189:f392fc9709a3	905	regvalue = FLASH->WPSN_CUR1;
AnnaBridge	189:f392fc9709a3	906	}
AnnaBridge	189:f392fc9709a3	907
AnnaBridge	189:f392fc9709a3	908	if((Bank & FLASH_BANK_BOTH) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	909	{
AnnaBridge	189:f392fc9709a3	910	regvalue = FLASH->WPSN_CUR2;
AnnaBridge	189:f392fc9709a3	911	}
AnnaBridge	189:f392fc9709a3	912
AnnaBridge	189:f392fc9709a3	913	(*WRPSector) = (~regvalue) & FLASH_WPSN_WRPSN;
AnnaBridge	189:f392fc9709a3	914
AnnaBridge	189:f392fc9709a3	915	if(*WRPSector == 0U)
AnnaBridge	189:f392fc9709a3	916	{
AnnaBridge	189:f392fc9709a3	917	(*WRPState) = OB_WRPSTATE_DISABLE;
AnnaBridge	189:f392fc9709a3	918	}
AnnaBridge	189:f392fc9709a3	919	else
AnnaBridge	189:f392fc9709a3	920	{
AnnaBridge	189:f392fc9709a3	921	(*WRPState) = OB_WRPSTATE_ENABLE;
AnnaBridge	189:f392fc9709a3	922	}
AnnaBridge	189:f392fc9709a3	923	}
AnnaBridge	189:f392fc9709a3	924
AnnaBridge	189:f392fc9709a3	925	/**
AnnaBridge	189:f392fc9709a3	926	* @brief Set the read protection level.
AnnaBridge	189:f392fc9709a3	927	*
AnnaBridge	189:f392fc9709a3	928	* @note To configure the RDP level, the option lock bit OPTLOCK must be
AnnaBridge	189:f392fc9709a3	929	* cleared with the call of the HAL_FLASH_OB_Unlock() function.
AnnaBridge	189:f392fc9709a3	930	* @note To validate the RDP level, the option bytes must be reloaded
AnnaBridge	189:f392fc9709a3	931	* through the call of the HAL_FLASH_OB_Launch() function.
AnnaBridge	189:f392fc9709a3	932	* @note !!! Warning : When enabling OB_RDP level 2 it's no more possible
AnnaBridge	189:f392fc9709a3	933	* to go back to level 1 or 0 !!!
AnnaBridge	189:f392fc9709a3	934	*
AnnaBridge	189:f392fc9709a3	935	* @param RDPLevel specifies the read protection level.
AnnaBridge	189:f392fc9709a3	936	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	937	* @arg OB_RDP_LEVEL_0: No protection
AnnaBridge	189:f392fc9709a3	938	* @arg OB_RDP_LEVEL_1: Read protection of the memory
AnnaBridge	189:f392fc9709a3	939	* @arg OB_RDP_LEVEL_2: Full chip protection
AnnaBridge	189:f392fc9709a3	940	*
AnnaBridge	189:f392fc9709a3	941	* @retval HAL status
AnnaBridge	189:f392fc9709a3	942	*/
AnnaBridge	189:f392fc9709a3	943	static void FLASH_OB_RDPConfig(uint32_t RDPLevel)
AnnaBridge	189:f392fc9709a3	944	{
AnnaBridge	189:f392fc9709a3	945	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	946	assert_param(IS_OB_RDP_LEVEL(RDPLevel));
AnnaBridge	189:f392fc9709a3	947
AnnaBridge	189:f392fc9709a3	948	/* Configure the RDP level in the option bytes register */
AnnaBridge	189:f392fc9709a3	949	MODIFY_REG(FLASH->OPTSR_PRG, FLASH_OPTSR_RDP, RDPLevel);
AnnaBridge	189:f392fc9709a3	950	}
AnnaBridge	189:f392fc9709a3	951
AnnaBridge	189:f392fc9709a3	952	/**
AnnaBridge	189:f392fc9709a3	953	* @brief Get the read protection level.
AnnaBridge	189:f392fc9709a3	954	* @retval RDPLevel specifies the read protection level.
AnnaBridge	189:f392fc9709a3	955	* This return value can be one of the following values:
AnnaBridge	189:f392fc9709a3	956	* @arg OB_RDP_LEVEL_0: No protection
AnnaBridge	189:f392fc9709a3	957	* @arg OB_RDP_LEVEL_1: Read protection of the memory
AnnaBridge	189:f392fc9709a3	958	* @arg OB_RDP_LEVEL_2: Full chip protection
AnnaBridge	189:f392fc9709a3	959	*/
AnnaBridge	189:f392fc9709a3	960	static uint32_t FLASH_OB_GetRDP(void)
AnnaBridge	189:f392fc9709a3	961	{
AnnaBridge	189:f392fc9709a3	962	return (FLASH->OPTSR_CUR & FLASH_OPTSR_RDP);
AnnaBridge	189:f392fc9709a3	963	}
AnnaBridge	189:f392fc9709a3	964
AnnaBridge	189:f392fc9709a3	965	/**
AnnaBridge	189:f392fc9709a3	966	* @brief Program the FLASH User Option Byte.
AnnaBridge	189:f392fc9709a3	967	*
AnnaBridge	189:f392fc9709a3	968	* @note To configure the user option bytes, the option lock bit OPTLOCK must
AnnaBridge	189:f392fc9709a3	969	* be cleared with the call of the HAL_FLASH_OB_Unlock() function.
AnnaBridge	189:f392fc9709a3	970	*
AnnaBridge	189:f392fc9709a3	971	* @note To validate the user option bytes, the option bytes must be reloaded
AnnaBridge	189:f392fc9709a3	972	* through the call of the HAL_FLASH_OB_Launch() function.
AnnaBridge	189:f392fc9709a3	973	*
AnnaBridge	189:f392fc9709a3	974	* @param UserType The FLASH User Option Bytes to be modified :
AnnaBridge	189:f392fc9709a3	975	* a combination of @arg FLASHEx_OB_USER_Type
AnnaBridge	189:f392fc9709a3	976	*
AnnaBridge	189:f392fc9709a3	977	* @param UserConfig The FLASH User Option Bytes values:
AnnaBridge	189:f392fc9709a3	978	* IWDG_SW(Bit4), nRST_STOP_D1(Bit 6), nRST_STDY_D1(Bit 7),
AnnaBridge	189:f392fc9709a3	979	* FZ_IWDG_STOP(Bit 17), FZ_IWDG_SDBY(Bit 18), ST_RAM_SIZE(Bit[19:20]),
AnnaBridge	189:f392fc9709a3	980	* SECURITY(Bit 21), IO_HSLV (Bit 29) and SWAP_BANK_OPT(Bit 31).
AnnaBridge	189:f392fc9709a3	981	*
AnnaBridge	189:f392fc9709a3	982	* @retval HAL status
AnnaBridge	189:f392fc9709a3	983	*/
AnnaBridge	189:f392fc9709a3	984
AnnaBridge	189:f392fc9709a3	985	static void FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig)
AnnaBridge	189:f392fc9709a3	986	{
AnnaBridge	189:f392fc9709a3	987	uint32_t optr_reg_val = 0;
AnnaBridge	189:f392fc9709a3	988	uint32_t optr_reg_mask = 0;
AnnaBridge	189:f392fc9709a3	989
AnnaBridge	189:f392fc9709a3	990	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	991	assert_param(IS_OB_USER_TYPE(UserType));
AnnaBridge	189:f392fc9709a3	992
AnnaBridge	189:f392fc9709a3	993	if((UserType & OB_USER_IWDG1_SW) != 0U)
AnnaBridge	189:f392fc9709a3	994	{
AnnaBridge	189:f392fc9709a3	995	/* IWDG_HW option byte should be modified */
AnnaBridge	189:f392fc9709a3	996	assert_param(IS_OB_IWDG1_SOURCE(UserConfig & FLASH_OPTSR_IWDG1_SW));
AnnaBridge	189:f392fc9709a3	997
AnnaBridge	189:f392fc9709a3	998	/* Set value and mask for IWDG_HW option byte */
AnnaBridge	189:f392fc9709a3	999	optr_reg_val \|= (UserConfig & FLASH_OPTSR_IWDG1_SW);
AnnaBridge	189:f392fc9709a3	1000	optr_reg_mask \|= FLASH_OPTSR_IWDG1_SW;
AnnaBridge	189:f392fc9709a3	1001	}
AnnaBridge	189:f392fc9709a3	1002
AnnaBridge	189:f392fc9709a3	1003	if((UserType & OB_USER_NRST_STOP_D1) != 0U)
AnnaBridge	189:f392fc9709a3	1004	{
AnnaBridge	189:f392fc9709a3	1005	/* NRST_STOP option byte should be modified */
AnnaBridge	189:f392fc9709a3	1006	assert_param(IS_OB_STOP_D1_RESET(UserConfig & FLASH_OPTSR_NRST_STOP_D1));
AnnaBridge	189:f392fc9709a3	1007
AnnaBridge	189:f392fc9709a3	1008	/* Set value and mask for NRST_STOP option byte */
AnnaBridge	189:f392fc9709a3	1009	optr_reg_val \|= (UserConfig & FLASH_OPTSR_NRST_STOP_D1);
AnnaBridge	189:f392fc9709a3	1010	optr_reg_mask \|= FLASH_OPTSR_NRST_STOP_D1;
AnnaBridge	189:f392fc9709a3	1011	}
AnnaBridge	189:f392fc9709a3	1012
AnnaBridge	189:f392fc9709a3	1013	if((UserType & OB_USER_NRST_STDBY_D1) != 0U)
AnnaBridge	189:f392fc9709a3	1014	{
AnnaBridge	189:f392fc9709a3	1015	/* NRST_STDBY option byte should be modified */
AnnaBridge	189:f392fc9709a3	1016	assert_param(IS_OB_STDBY_D1_RESET(UserConfig & FLASH_OPTSR_NRST_STBY_D1));
AnnaBridge	189:f392fc9709a3	1017
AnnaBridge	189:f392fc9709a3	1018	/* Set value and mask for NRST_STDBY option byte */
AnnaBridge	189:f392fc9709a3	1019	optr_reg_val \|= (UserConfig & FLASH_OPTSR_NRST_STBY_D1);
AnnaBridge	189:f392fc9709a3	1020	optr_reg_mask \|= FLASH_OPTSR_NRST_STBY_D1;
AnnaBridge	189:f392fc9709a3	1021	}
AnnaBridge	189:f392fc9709a3	1022
AnnaBridge	189:f392fc9709a3	1023	if((UserType & OB_USER_IWDG_STOP) != 0U)
AnnaBridge	189:f392fc9709a3	1024	{
AnnaBridge	189:f392fc9709a3	1025	/* IWDG_STOP option byte should be modified */
AnnaBridge	189:f392fc9709a3	1026	assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTSR_FZ_IWDG_STOP));
AnnaBridge	189:f392fc9709a3	1027
AnnaBridge	189:f392fc9709a3	1028	/* Set value and mask for IWDG_STOP option byte */
AnnaBridge	189:f392fc9709a3	1029	optr_reg_val \|= (UserConfig & FLASH_OPTSR_FZ_IWDG_STOP);
AnnaBridge	189:f392fc9709a3	1030	optr_reg_mask \|= FLASH_OPTSR_FZ_IWDG_STOP;
AnnaBridge	189:f392fc9709a3	1031	}
AnnaBridge	189:f392fc9709a3	1032
AnnaBridge	189:f392fc9709a3	1033	if((UserType & OB_USER_IWDG_STDBY) != 0U)
AnnaBridge	189:f392fc9709a3	1034	{
AnnaBridge	189:f392fc9709a3	1035	/* IWDG_STDBY option byte should be modified */
AnnaBridge	189:f392fc9709a3	1036	assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTSR_FZ_IWDG_SDBY));
AnnaBridge	189:f392fc9709a3	1037
AnnaBridge	189:f392fc9709a3	1038	/* Set value and mask for IWDG_STDBY option byte */
AnnaBridge	189:f392fc9709a3	1039	optr_reg_val \|= (UserConfig & FLASH_OPTSR_FZ_IWDG_SDBY);
AnnaBridge	189:f392fc9709a3	1040	optr_reg_mask \|= FLASH_OPTSR_FZ_IWDG_SDBY;
AnnaBridge	189:f392fc9709a3	1041	}
AnnaBridge	189:f392fc9709a3	1042
AnnaBridge	189:f392fc9709a3	1043	if((UserType & OB_USER_ST_RAM_SIZE) != 0U)
AnnaBridge	189:f392fc9709a3	1044	{
AnnaBridge	189:f392fc9709a3	1045	/* ST_RAM_SIZE option byte should be modified */
AnnaBridge	189:f392fc9709a3	1046	assert_param(IS_OB_USER_ST_RAM_SIZE(UserConfig & FLASH_OPTSR_ST_RAM_SIZE));
AnnaBridge	189:f392fc9709a3	1047
AnnaBridge	189:f392fc9709a3	1048	/* Set value and mask for ST_RAM_SIZE option byte */
AnnaBridge	189:f392fc9709a3	1049	optr_reg_val \|= (UserConfig & FLASH_OPTSR_ST_RAM_SIZE);
AnnaBridge	189:f392fc9709a3	1050	optr_reg_mask \|= FLASH_OPTSR_ST_RAM_SIZE;
AnnaBridge	189:f392fc9709a3	1051	}
AnnaBridge	189:f392fc9709a3	1052
AnnaBridge	189:f392fc9709a3	1053	if((UserType & OB_USER_SECURITY) != 0U)
AnnaBridge	189:f392fc9709a3	1054	{
AnnaBridge	189:f392fc9709a3	1055	/* SECURITY option byte should be modified */
AnnaBridge	189:f392fc9709a3	1056	assert_param(IS_OB_USER_SECURITY(UserConfig & FLASH_OPTSR_SECURITY));
AnnaBridge	189:f392fc9709a3	1057
AnnaBridge	189:f392fc9709a3	1058	/* Set value and mask for SECURITY option byte */
AnnaBridge	189:f392fc9709a3	1059	optr_reg_val \|= (UserConfig & FLASH_OPTSR_SECURITY);
AnnaBridge	189:f392fc9709a3	1060	optr_reg_mask \|= FLASH_OPTSR_SECURITY;
AnnaBridge	189:f392fc9709a3	1061	}
AnnaBridge	189:f392fc9709a3	1062
AnnaBridge	189:f392fc9709a3	1063
AnnaBridge	189:f392fc9709a3	1064	if((UserType & OB_USER_SWAP_BANK) != 0U)
AnnaBridge	189:f392fc9709a3	1065	{
AnnaBridge	189:f392fc9709a3	1066	/* SWAP_BANK_OPT option byte should be modified */
AnnaBridge	189:f392fc9709a3	1067	assert_param(IS_OB_USER_SWAP_BANK(UserConfig & FLASH_OPTSR_SWAP_BANK_OPT));
AnnaBridge	189:f392fc9709a3	1068
AnnaBridge	189:f392fc9709a3	1069	/* Set value and mask for SWAP_BANK_OPT option byte */
AnnaBridge	189:f392fc9709a3	1070	optr_reg_val \|= (UserConfig & FLASH_OPTSR_SWAP_BANK_OPT);
AnnaBridge	189:f392fc9709a3	1071	optr_reg_mask \|= FLASH_OPTSR_SWAP_BANK_OPT;
AnnaBridge	189:f392fc9709a3	1072	}
AnnaBridge	189:f392fc9709a3	1073
AnnaBridge	189:f392fc9709a3	1074	if((UserType & OB_USER_IOHSLV) != 0U)
AnnaBridge	189:f392fc9709a3	1075	{
AnnaBridge	189:f392fc9709a3	1076	/* IOHSLV_OPT option byte should be modified */
AnnaBridge	189:f392fc9709a3	1077	assert_param(IS_OB_USER_IOHSLV(UserConfig & FLASH_OPTSR_IO_HSLV));
AnnaBridge	189:f392fc9709a3	1078
AnnaBridge	189:f392fc9709a3	1079	/* Set value and mask for IOHSLV_OPT option byte */
AnnaBridge	189:f392fc9709a3	1080	optr_reg_val \|= (UserConfig & FLASH_OPTSR_IO_HSLV);
AnnaBridge	189:f392fc9709a3	1081	optr_reg_mask \|= FLASH_OPTSR_IO_HSLV;
AnnaBridge	189:f392fc9709a3	1082	}
AnnaBridge	189:f392fc9709a3	1083
AnnaBridge	189:f392fc9709a3	1084	/* Configure the option bytes register */
AnnaBridge	189:f392fc9709a3	1085	MODIFY_REG(FLASH->OPTSR_PRG, optr_reg_mask, optr_reg_val);
AnnaBridge	189:f392fc9709a3	1086	}
AnnaBridge	189:f392fc9709a3	1087
AnnaBridge	189:f392fc9709a3	1088	/**
AnnaBridge	189:f392fc9709a3	1089	* @brief Return the FLASH User Option Byte value.
AnnaBridge	189:f392fc9709a3	1090	* @retval The FLASH User Option Bytes values
AnnaBridge	189:f392fc9709a3	1091	* IWDG_SW(Bit4), nRST_STOP_D1(Bit 6), nRST_STDY_D1(Bit 7),
AnnaBridge	189:f392fc9709a3	1092	* FZ_IWDG_STOP(Bit 17), FZ_IWDG_SDBY(Bit 18), ST_RAM_SIZE(Bit[19:20]),
AnnaBridge	189:f392fc9709a3	1093	* SECURITY(Bit 21), IO_HSLV (Bit 29) and SWAP_BANK_OPT(Bit 31).
AnnaBridge	189:f392fc9709a3	1094	*/
AnnaBridge	189:f392fc9709a3	1095	static uint32_t FLASH_OB_GetUser(void)
AnnaBridge	189:f392fc9709a3	1096	{
AnnaBridge	189:f392fc9709a3	1097	uint32_t userConfig = READ_REG(FLASH->OPTSR_CUR);
AnnaBridge	189:f392fc9709a3	1098	userConfig &= (~(FLASH_OPTSR_BOR_LEV \| FLASH_OPTSR_RDP));
AnnaBridge	189:f392fc9709a3	1099
AnnaBridge	189:f392fc9709a3	1100	return userConfig;
AnnaBridge	189:f392fc9709a3	1101	}
AnnaBridge	189:f392fc9709a3	1102
AnnaBridge	189:f392fc9709a3	1103	/**
AnnaBridge	189:f392fc9709a3	1104	* @brief Configure the Proprietary code readout protection of the desired addresses
AnnaBridge	189:f392fc9709a3	1105	*
AnnaBridge	189:f392fc9709a3	1106	* @note To configure the PCROP options, the option lock bit OPTLOCK must be
AnnaBridge	189:f392fc9709a3	1107	* cleared with the call of the HAL_FLASH_OB_Unlock() function.
AnnaBridge	189:f392fc9709a3	1108	* @note To validate the PCROP options, the option bytes must be reloaded
AnnaBridge	189:f392fc9709a3	1109	* through the call of the HAL_FLASH_OB_Launch() function.
AnnaBridge	189:f392fc9709a3	1110	*
AnnaBridge	189:f392fc9709a3	1111	* @param PCROPConfig specifies if the PCROP area for the given Bank shall be erased or not
AnnaBridge	189:f392fc9709a3	1112	* when RDP level decreased from Level 1 to Level 0, or after a bank erase with protection removal
AnnaBridge	189:f392fc9709a3	1113	* This parameter must be a value of @arg FLASHEx_OB_PCROP_RDP enumeration
AnnaBridge	189:f392fc9709a3	1114	*
AnnaBridge	189:f392fc9709a3	1115	* @param PCROPStartAddr specifies the start address of the Proprietary code readout protection
AnnaBridge	189:f392fc9709a3	1116	* This parameter can be an address between begin and end of the bank
AnnaBridge	189:f392fc9709a3	1117	*
AnnaBridge	189:f392fc9709a3	1118	* @param PCROPEndAddr specifies the end address of the Proprietary code readout protection
AnnaBridge	189:f392fc9709a3	1119	* This parameter can be an address between PCROPStartAddr and end of the bank
AnnaBridge	189:f392fc9709a3	1120	*
AnnaBridge	189:f392fc9709a3	1121	* @param Banks the specific bank to apply PCROP protection
AnnaBridge	189:f392fc9709a3	1122	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1123	* @arg FLASH_BANK_1: PCROP on specified bank1 area
AnnaBridge	189:f392fc9709a3	1124	* @arg FLASH_BANK_2: PCROP on specified bank2 area
AnnaBridge	189:f392fc9709a3	1125	* @arg FLASH_BANK_BOTH: PCROP on specified bank1 and bank2 area (same config will be applied on both banks)
AnnaBridge	189:f392fc9709a3	1126	*
AnnaBridge	189:f392fc9709a3	1127	* @retval None
AnnaBridge	189:f392fc9709a3	1128	*/
AnnaBridge	189:f392fc9709a3	1129	static void FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr, uint32_t Banks)
AnnaBridge	189:f392fc9709a3	1130	{
AnnaBridge	189:f392fc9709a3	1131	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	1132	assert_param(IS_FLASH_BANK(Banks));
AnnaBridge	189:f392fc9709a3	1133	assert_param(IS_OB_PCROP_RDP(PCROPConfig));
AnnaBridge	189:f392fc9709a3	1134
AnnaBridge	189:f392fc9709a3	1135	if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	1136	{
AnnaBridge	189:f392fc9709a3	1137	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(PCROPStartAddr));
AnnaBridge	189:f392fc9709a3	1138	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(PCROPEndAddr));
AnnaBridge	189:f392fc9709a3	1139
AnnaBridge	189:f392fc9709a3	1140	/* Configure the Proprietary code readout protection */
AnnaBridge	189:f392fc9709a3	1141	FLASH->PRAR_PRG1 = ((PCROPStartAddr - FLASH_BANK1_BASE) >> 8) \| \
AnnaBridge	189:f392fc9709a3	1142	(((PCROPEndAddr - FLASH_BANK1_BASE) >> 8) << FLASH_PRAR_PROT_AREA_END_Pos) \| \
AnnaBridge	189:f392fc9709a3	1143	PCROPConfig;
AnnaBridge	189:f392fc9709a3	1144	}
AnnaBridge	189:f392fc9709a3	1145
AnnaBridge	189:f392fc9709a3	1146	if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	1147	{
AnnaBridge	189:f392fc9709a3	1148	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(PCROPStartAddr));
AnnaBridge	189:f392fc9709a3	1149	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(PCROPEndAddr));
AnnaBridge	189:f392fc9709a3	1150
AnnaBridge	189:f392fc9709a3	1151	/* Configure the Proprietary code readout protection */
AnnaBridge	189:f392fc9709a3	1152	FLASH->PRAR_PRG2 = ((PCROPStartAddr - FLASH_BANK2_BASE) >> 8) \| \
AnnaBridge	189:f392fc9709a3	1153	(((PCROPEndAddr - FLASH_BANK2_BASE) >> 8) << FLASH_PRAR_PROT_AREA_END_Pos) \| \
AnnaBridge	189:f392fc9709a3	1154	PCROPConfig;
AnnaBridge	189:f392fc9709a3	1155	}
AnnaBridge	189:f392fc9709a3	1156	}
AnnaBridge	189:f392fc9709a3	1157
AnnaBridge	189:f392fc9709a3	1158	/**
AnnaBridge	189:f392fc9709a3	1159	* @brief Get the Proprietary code readout protection configuration on a given Bank
AnnaBridge	189:f392fc9709a3	1160	*
AnnaBridge	189:f392fc9709a3	1161	* @param PCROPConfig indicates if the PCROP area for the given Bank shall be erased or not
AnnaBridge	189:f392fc9709a3	1162	* when RDP level decreased from Level 1 to Level 0 or after a bank erase with protection removal
AnnaBridge	189:f392fc9709a3	1163	*
AnnaBridge	189:f392fc9709a3	1164	* @param PCROPStartAddr gives the start address of the Proprietary code readout protection of the bank
AnnaBridge	189:f392fc9709a3	1165	*
AnnaBridge	189:f392fc9709a3	1166	* @param PCROPEndAddr gives the end address of the Proprietary code readout protection of the bank
AnnaBridge	189:f392fc9709a3	1167	*
AnnaBridge	189:f392fc9709a3	1168	* @param Bank the specific bank to apply PCROP protection
AnnaBridge	189:f392fc9709a3	1169	* This parameter can be exclusively one of the following values:
AnnaBridge	189:f392fc9709a3	1170	* @arg FLASH_BANK_1: PCROP on specified bank1 area
AnnaBridge	189:f392fc9709a3	1171	* @arg FLASH_BANK_2: PCROP on specified bank2 area
AnnaBridge	189:f392fc9709a3	1172	* @arg FLASH_BANK_BOTH: is not allowed here
AnnaBridge	189:f392fc9709a3	1173	*
AnnaBridge	189:f392fc9709a3	1174	* @retval None
AnnaBridge	189:f392fc9709a3	1175	*/
AnnaBridge	189:f392fc9709a3	1176	static void FLASH_OB_GetPCROP(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t *PCROPEndAddr, uint32_t Bank)
AnnaBridge	189:f392fc9709a3	1177	{
AnnaBridge	189:f392fc9709a3	1178	uint32_t regvalue = 0;
AnnaBridge	189:f392fc9709a3	1179	uint32_t bankBase = 0;
AnnaBridge	189:f392fc9709a3	1180
AnnaBridge	189:f392fc9709a3	1181	if((Bank & FLASH_BANK_BOTH) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	1182	{
AnnaBridge	189:f392fc9709a3	1183	regvalue = FLASH->PRAR_CUR1;
AnnaBridge	189:f392fc9709a3	1184	bankBase = FLASH_BANK1_BASE;
AnnaBridge	189:f392fc9709a3	1185	}
AnnaBridge	189:f392fc9709a3	1186
AnnaBridge	189:f392fc9709a3	1187	if((Bank & FLASH_BANK_BOTH) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	1188	{
AnnaBridge	189:f392fc9709a3	1189	regvalue = FLASH->PRAR_CUR2;
AnnaBridge	189:f392fc9709a3	1190	bankBase = FLASH_BANK2_BASE;
AnnaBridge	189:f392fc9709a3	1191	}
AnnaBridge	189:f392fc9709a3	1192
AnnaBridge	189:f392fc9709a3	1193	(*PCROPConfig) = (regvalue & FLASH_PRAR_DMEP);
AnnaBridge	189:f392fc9709a3	1194
AnnaBridge	189:f392fc9709a3	1195	(*PCROPStartAddr) = ((regvalue & FLASH_PRAR_PROT_AREA_START) << 8) + bankBase;
AnnaBridge	189:f392fc9709a3	1196	(*PCROPEndAddr) = (regvalue & FLASH_PRAR_PROT_AREA_END) >> FLASH_PRAR_PROT_AREA_END_Pos;
AnnaBridge	189:f392fc9709a3	1197	(PCROPEndAddr) = ((PCROPEndAddr) << 8) + bankBase;
AnnaBridge	189:f392fc9709a3	1198	}
AnnaBridge	189:f392fc9709a3	1199
AnnaBridge	189:f392fc9709a3	1200	/**
AnnaBridge	189:f392fc9709a3	1201	* @brief Set the BOR Level.
AnnaBridge	189:f392fc9709a3	1202	* @param Level specifies the Option Bytes BOR Reset Level.
AnnaBridge	189:f392fc9709a3	1203	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1204	* @arg OB_BOR_LEVEL0: Reset level threshold is set to 1.6V
AnnaBridge	189:f392fc9709a3	1205	* @arg OB_BOR_LEVEL1: Reset level threshold is set to 2.1V
AnnaBridge	189:f392fc9709a3	1206	* @arg OB_BOR_LEVEL2: Reset level threshold is set to 2.4V
AnnaBridge	189:f392fc9709a3	1207	* @arg OB_BOR_LEVEL3: Reset level threshold is set to 2.7V
AnnaBridge	189:f392fc9709a3	1208	* @retval None
AnnaBridge	189:f392fc9709a3	1209	*/
AnnaBridge	189:f392fc9709a3	1210	static void FLASH_OB_BOR_LevelConfig(uint32_t Level)
AnnaBridge	189:f392fc9709a3	1211	{
AnnaBridge	189:f392fc9709a3	1212	assert_param(IS_OB_BOR_LEVEL(Level));
AnnaBridge	189:f392fc9709a3	1213
AnnaBridge	189:f392fc9709a3	1214	/* Configure BOR_LEV option byte */
AnnaBridge	189:f392fc9709a3	1215	MODIFY_REG(FLASH->OPTSR_PRG, FLASH_OPTSR_BOR_LEV, Level);
AnnaBridge	189:f392fc9709a3	1216	}
AnnaBridge	189:f392fc9709a3	1217
AnnaBridge	189:f392fc9709a3	1218	/**
AnnaBridge	189:f392fc9709a3	1219	* @brief Get the BOR Level.
AnnaBridge	189:f392fc9709a3	1220	* @retval The Option Bytes BOR Reset Level.
AnnaBridge	189:f392fc9709a3	1221	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1222	* @arg OB_BOR_LEVEL0: Reset level threshold is set to 1.6V
AnnaBridge	189:f392fc9709a3	1223	* @arg OB_BOR_LEVEL1: Reset level threshold is set to 2.1V
AnnaBridge	189:f392fc9709a3	1224	* @arg OB_BOR_LEVEL2: Reset level threshold is set to 2.4V
AnnaBridge	189:f392fc9709a3	1225	* @arg OB_BOR_LEVEL3: Reset level threshold is set to 2.7V
AnnaBridge	189:f392fc9709a3	1226	*/
AnnaBridge	189:f392fc9709a3	1227	static uint32_t FLASH_OB_GetBOR(void)
AnnaBridge	189:f392fc9709a3	1228	{
AnnaBridge	189:f392fc9709a3	1229	return (FLASH->OPTSR_CUR & FLASH_OPTSR_BOR_LEV);
AnnaBridge	189:f392fc9709a3	1230	}
AnnaBridge	189:f392fc9709a3	1231
AnnaBridge	189:f392fc9709a3	1232	/**
AnnaBridge	189:f392fc9709a3	1233	* @brief Set Boot address
AnnaBridge	189:f392fc9709a3	1234	* @param BootOption Boot address option byte to be programmed,
AnnaBridge	189:f392fc9709a3	1235	* This parameter must be a value of @ref FLASHEx_OB_BOOT_OPTION
AnnaBridge	189:f392fc9709a3	1236	(OB_BOOT_ADD0, OB_BOOT_ADD1 or OB_BOOT_ADD_BOTH)
AnnaBridge	189:f392fc9709a3	1237	*
AnnaBridge	189:f392fc9709a3	1238	* @param BootAddress0 Specifies the Boot Address 0
AnnaBridge	189:f392fc9709a3	1239	* @param BootAddress1 Specifies the Boot Address 1
AnnaBridge	189:f392fc9709a3	1240	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	1241	*/
AnnaBridge	189:f392fc9709a3	1242	static void FLASH_OB_BootAddConfig(uint32_t BootOption, uint32_t BootAddress0, uint32_t BootAddress1)
AnnaBridge	189:f392fc9709a3	1243	{
AnnaBridge	189:f392fc9709a3	1244	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	1245	assert_param(IS_OB_BOOT_ADD_OPTION(BootOption));
AnnaBridge	189:f392fc9709a3	1246
AnnaBridge	189:f392fc9709a3	1247	if((BootOption & OB_BOOT_ADD0) == OB_BOOT_ADD0)
AnnaBridge	189:f392fc9709a3	1248	{
AnnaBridge	189:f392fc9709a3	1249	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	1250	assert_param(IS_BOOT_ADDRESS(BootAddress0));
AnnaBridge	189:f392fc9709a3	1251
AnnaBridge	189:f392fc9709a3	1252	/* Configure CM7 BOOT ADD0 */
AnnaBridge	189:f392fc9709a3	1253	MODIFY_REG(FLASH->BOOT_PRG, FLASH_BOOT_ADD0, (BootAddress0 >> 16));
AnnaBridge	189:f392fc9709a3	1254	}
AnnaBridge	189:f392fc9709a3	1255
AnnaBridge	189:f392fc9709a3	1256	if((BootOption & OB_BOOT_ADD1) == OB_BOOT_ADD1)
AnnaBridge	189:f392fc9709a3	1257	{
AnnaBridge	189:f392fc9709a3	1258	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	1259	assert_param(IS_BOOT_ADDRESS(BootAddress1));
AnnaBridge	189:f392fc9709a3	1260
AnnaBridge	189:f392fc9709a3	1261	/* Configure CM7 BOOT ADD1 */
AnnaBridge	189:f392fc9709a3	1262	MODIFY_REG(FLASH->BOOT_PRG, FLASH_BOOT_ADD1, BootAddress1);
AnnaBridge	189:f392fc9709a3	1263	}
AnnaBridge	189:f392fc9709a3	1264	}
AnnaBridge	189:f392fc9709a3	1265
AnnaBridge	189:f392fc9709a3	1266	/**
AnnaBridge	189:f392fc9709a3	1267	* @brief Get Boot address
AnnaBridge	189:f392fc9709a3	1268	* @param BootAddress0 Specifies the Boot Address 0.
AnnaBridge	189:f392fc9709a3	1269	* @param BootAddress1 Specifies the Boot Address 1.
AnnaBridge	189:f392fc9709a3	1270	* @retval HAL Status
AnnaBridge	189:f392fc9709a3	1271	*/
AnnaBridge	189:f392fc9709a3	1272	static void FLASH_OB_GetBootAdd(uint32_t BootAddress0, uint32_t BootAddress1)
AnnaBridge	189:f392fc9709a3	1273	{
AnnaBridge	189:f392fc9709a3	1274	uint32_t regvalue;
AnnaBridge	189:f392fc9709a3	1275
AnnaBridge	189:f392fc9709a3	1276	regvalue = FLASH->BOOT_CUR;
AnnaBridge	189:f392fc9709a3	1277
AnnaBridge	189:f392fc9709a3	1278	(*BootAddress0) = (regvalue & FLASH_BOOT_ADD0) << 16;
AnnaBridge	189:f392fc9709a3	1279	(*BootAddress1) = (regvalue & FLASH_BOOT_ADD1);
AnnaBridge	189:f392fc9709a3	1280	}
AnnaBridge	189:f392fc9709a3	1281
AnnaBridge	189:f392fc9709a3	1282	/**
AnnaBridge	189:f392fc9709a3	1283	* @brief Set secure area configuration
AnnaBridge	189:f392fc9709a3	1284	* @param SecureAreaConfig specify if the secure area will be deleted or not
AnnaBridge	189:f392fc9709a3	1285	* when RDP level decreased from Level 1 to Level 0 or during a mass erase.
AnnaBridge	189:f392fc9709a3	1286	*
AnnaBridge	189:f392fc9709a3	1287	* @param SecureAreaStartAddr Specifies the secure area start address
AnnaBridge	189:f392fc9709a3	1288	* @param SecureAreaEndAddr Specifies the secure area end address
AnnaBridge	189:f392fc9709a3	1289	* @param Banks the specific bank to apply Security protection
AnnaBridge	189:f392fc9709a3	1290	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1291	* @arg FLASH_BANK_1: Secure area on specified bank1 area
AnnaBridge	189:f392fc9709a3	1292	* @arg FLASH_BANK_2: Secure area on specified bank2 area
AnnaBridge	189:f392fc9709a3	1293	* @arg FLASH_BANK_BOTH: Secure area on specified bank1 and bank2 area (same config will be applied on both banks)
AnnaBridge	189:f392fc9709a3	1294	* @retval None
AnnaBridge	189:f392fc9709a3	1295	*/
AnnaBridge	189:f392fc9709a3	1296	static void FLASH_OB_SecureAreaConfig(uint32_t SecureAreaConfig, uint32_t SecureAreaStartAddr, uint32_t SecureAreaEndAddr, uint32_t Banks)
AnnaBridge	189:f392fc9709a3	1297	{
AnnaBridge	189:f392fc9709a3	1298	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	1299	assert_param(IS_FLASH_BANK(Banks));
AnnaBridge	189:f392fc9709a3	1300	assert_param(IS_OB_SECURE_RDP(SecureAreaConfig));
AnnaBridge	189:f392fc9709a3	1301
AnnaBridge	189:f392fc9709a3	1302	if((Banks & FLASH_BANK_1) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	1303	{
AnnaBridge	189:f392fc9709a3	1304	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	1305	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(SecureAreaStartAddr));
AnnaBridge	189:f392fc9709a3	1306	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(SecureAreaEndAddr));
AnnaBridge	189:f392fc9709a3	1307
AnnaBridge	189:f392fc9709a3	1308	/* Configure the secure area */
AnnaBridge	189:f392fc9709a3	1309	FLASH->SCAR_PRG1 = ((SecureAreaStartAddr - FLASH_BANK1_BASE) >> 8) \| \
AnnaBridge	189:f392fc9709a3	1310	(((SecureAreaEndAddr - FLASH_BANK1_BASE) >> 8) << FLASH_SCAR_SEC_AREA_END_Pos) \| \
AnnaBridge	189:f392fc9709a3	1311	(SecureAreaConfig & FLASH_SCAR_DMES);
AnnaBridge	189:f392fc9709a3	1312	}
AnnaBridge	189:f392fc9709a3	1313
AnnaBridge	189:f392fc9709a3	1314	if((Banks & FLASH_BANK_2) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	1315	{
AnnaBridge	189:f392fc9709a3	1316	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	1317	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(SecureAreaStartAddr));
AnnaBridge	189:f392fc9709a3	1318	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(SecureAreaEndAddr));
AnnaBridge	189:f392fc9709a3	1319
AnnaBridge	189:f392fc9709a3	1320	/* Configure the secure area */
AnnaBridge	189:f392fc9709a3	1321	FLASH->SCAR_PRG2 = ((SecureAreaStartAddr - FLASH_BANK2_BASE) >> 8) \| \
AnnaBridge	189:f392fc9709a3	1322	(((SecureAreaEndAddr - FLASH_BANK2_BASE) >> 8) << FLASH_SCAR_SEC_AREA_END_Pos) \| \
AnnaBridge	189:f392fc9709a3	1323	(SecureAreaConfig & FLASH_SCAR_DMES);
AnnaBridge	189:f392fc9709a3	1324	}
AnnaBridge	189:f392fc9709a3	1325	}
AnnaBridge	189:f392fc9709a3	1326
AnnaBridge	189:f392fc9709a3	1327	/**
AnnaBridge	189:f392fc9709a3	1328	* @brief Get secure area configuration
AnnaBridge	189:f392fc9709a3	1329	* @param SecureAreaConfig indicates if the secure area will be deleted or not
AnnaBridge	189:f392fc9709a3	1330	* when RDP level decreased from Level 1 to Level 0 or during a mass erase.
AnnaBridge	189:f392fc9709a3	1331	* @param SecureAreaStartAddr gives the secure area start address
AnnaBridge	189:f392fc9709a3	1332	* @param SecureAreaEndAddr gives the secure area end address
AnnaBridge	189:f392fc9709a3	1333	* @param Bank Specifies the Bank
AnnaBridge	189:f392fc9709a3	1334	* @retval None
AnnaBridge	189:f392fc9709a3	1335	*/
AnnaBridge	189:f392fc9709a3	1336	static void FLASH_OB_GetSecureArea(uint32_t SecureAreaConfig, uint32_t SecureAreaStartAddr, uint32_t *SecureAreaEndAddr, uint32_t Bank)
AnnaBridge	189:f392fc9709a3	1337	{
AnnaBridge	189:f392fc9709a3	1338	uint32_t regvalue = 0;
AnnaBridge	189:f392fc9709a3	1339	uint32_t bankBase = 0;
AnnaBridge	189:f392fc9709a3	1340
AnnaBridge	189:f392fc9709a3	1341	/* Check Bank parameter value */
AnnaBridge	189:f392fc9709a3	1342	if((Bank & FLASH_BANK_BOTH) == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	1343	{
AnnaBridge	189:f392fc9709a3	1344	regvalue = FLASH->SCAR_CUR1;
AnnaBridge	189:f392fc9709a3	1345	bankBase = FLASH_BANK1_BASE;
AnnaBridge	189:f392fc9709a3	1346	}
AnnaBridge	189:f392fc9709a3	1347
AnnaBridge	189:f392fc9709a3	1348	if((Bank & FLASH_BANK_BOTH) == FLASH_BANK_2)
AnnaBridge	189:f392fc9709a3	1349	{
AnnaBridge	189:f392fc9709a3	1350	regvalue = FLASH->SCAR_CUR2;
AnnaBridge	189:f392fc9709a3	1351	bankBase = FLASH_BANK2_BASE;
AnnaBridge	189:f392fc9709a3	1352	}
AnnaBridge	189:f392fc9709a3	1353
AnnaBridge	189:f392fc9709a3	1354	/* Get the secure area settings */
AnnaBridge	189:f392fc9709a3	1355	(*SecureAreaConfig) = (regvalue & FLASH_SCAR_DMES);
AnnaBridge	189:f392fc9709a3	1356	(*SecureAreaStartAddr) = ((regvalue & FLASH_SCAR_SEC_AREA_START) << 8) + bankBase;
AnnaBridge	189:f392fc9709a3	1357	(*SecureAreaEndAddr) = (regvalue & FLASH_SCAR_SEC_AREA_END) >> FLASH_SCAR_SEC_AREA_END_Pos;
AnnaBridge	189:f392fc9709a3	1358	(SecureAreaEndAddr) = ((SecureAreaEndAddr) << 8) + bankBase;
AnnaBridge	189:f392fc9709a3	1359	}
AnnaBridge	189:f392fc9709a3	1360
AnnaBridge	189:f392fc9709a3	1361	/**
AnnaBridge	189:f392fc9709a3	1362	* @brief Add a CRC sector to the list of sectors on which the CRC will be calculated
AnnaBridge	189:f392fc9709a3	1363	* @param Sector Specifies the CRC sector number
AnnaBridge	189:f392fc9709a3	1364	* @param Bank Specifies the Bank
AnnaBridge	189:f392fc9709a3	1365	* @retval None
AnnaBridge	189:f392fc9709a3	1366	*/
AnnaBridge	189:f392fc9709a3	1367	static void FLASH_CRC_AddSector(uint32_t Sector, uint32_t Bank)
AnnaBridge	189:f392fc9709a3	1368	{
AnnaBridge	189:f392fc9709a3	1369	/* Check the parameters */
AnnaBridge	189:f392fc9709a3	1370	assert_param(IS_FLASH_SECTOR(Sector));
AnnaBridge	189:f392fc9709a3	1371
AnnaBridge	189:f392fc9709a3	1372	if (Bank == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	1373	{
AnnaBridge	189:f392fc9709a3	1374	/* Clear CRC sector */
AnnaBridge	189:f392fc9709a3	1375	FLASH->CRCCR1 &= (~FLASH_CRCCR_CRC_SECT);
AnnaBridge	189:f392fc9709a3	1376
AnnaBridge	189:f392fc9709a3	1377	/* Select CRC Sector and activate ADD_SECT bit */
AnnaBridge	189:f392fc9709a3	1378	FLASH->CRCCR1 \|= Sector \| FLASH_CRCCR_ADD_SECT;
AnnaBridge	189:f392fc9709a3	1379	}
AnnaBridge	189:f392fc9709a3	1380	else
AnnaBridge	189:f392fc9709a3	1381	{
AnnaBridge	189:f392fc9709a3	1382	/* Clear CRC sector */
AnnaBridge	189:f392fc9709a3	1383	FLASH->CRCCR2 &= (~FLASH_CRCCR_CRC_SECT);
AnnaBridge	189:f392fc9709a3	1384
AnnaBridge	189:f392fc9709a3	1385	/* Select CRC Sector and activate ADD_SECT bit */
AnnaBridge	189:f392fc9709a3	1386	FLASH->CRCCR2 \|= Sector \| FLASH_CRCCR_ADD_SECT;
AnnaBridge	189:f392fc9709a3	1387	}
AnnaBridge	189:f392fc9709a3	1388	}
AnnaBridge	189:f392fc9709a3	1389
AnnaBridge	189:f392fc9709a3	1390	/**
AnnaBridge	189:f392fc9709a3	1391	* @brief Select CRC start and end memory addresses on which the CRC will be calculated
AnnaBridge	189:f392fc9709a3	1392	* @param CRCStartAddr Specifies the CRC start address
AnnaBridge	189:f392fc9709a3	1393	* @param CRCEndAddr Specifies the CRC end address
AnnaBridge	189:f392fc9709a3	1394	* @param Bank Specifies the Bank
AnnaBridge	189:f392fc9709a3	1395	* @retval None
AnnaBridge	189:f392fc9709a3	1396	*/
AnnaBridge	189:f392fc9709a3	1397	static void FLASH_CRC_SelectAddress(uint32_t CRCStartAddr, uint32_t CRCEndAddr, uint32_t Bank)
AnnaBridge	189:f392fc9709a3	1398	{
AnnaBridge	189:f392fc9709a3	1399	if (Bank == FLASH_BANK_1)
AnnaBridge	189:f392fc9709a3	1400	{
AnnaBridge	189:f392fc9709a3	1401	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(CRCStartAddr));
AnnaBridge	189:f392fc9709a3	1402	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK1(CRCEndAddr));
AnnaBridge	189:f392fc9709a3	1403
AnnaBridge	189:f392fc9709a3	1404	/* Write CRC Start and End addresses */
AnnaBridge	189:f392fc9709a3	1405	FLASH->CRCSADD1 = CRCStartAddr;
AnnaBridge	189:f392fc9709a3	1406	FLASH->CRCEADD1 = CRCEndAddr;
AnnaBridge	189:f392fc9709a3	1407	}
AnnaBridge	189:f392fc9709a3	1408	else
AnnaBridge	189:f392fc9709a3	1409	{
AnnaBridge	189:f392fc9709a3	1410	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(CRCStartAddr));
AnnaBridge	189:f392fc9709a3	1411	assert_param(IS_FLASH_PROGRAM_ADDRESS_BANK2(CRCEndAddr));
AnnaBridge	189:f392fc9709a3	1412
AnnaBridge	189:f392fc9709a3	1413	/* Write CRC Start and End addresses */
AnnaBridge	189:f392fc9709a3	1414	FLASH->CRCSADD2 = CRCStartAddr;
AnnaBridge	189:f392fc9709a3	1415	FLASH->CRCEADD2 = CRCEndAddr;
AnnaBridge	189:f392fc9709a3	1416	}
AnnaBridge	189:f392fc9709a3	1417	}
AnnaBridge	189:f392fc9709a3	1418	/**
AnnaBridge	189:f392fc9709a3	1419	* @}
AnnaBridge	189:f392fc9709a3	1420	*/
AnnaBridge	189:f392fc9709a3	1421
AnnaBridge	189:f392fc9709a3	1422	#endif /* HAL_FLASH_MODULE_ENABLED */
AnnaBridge	189:f392fc9709a3	1423
AnnaBridge	189:f392fc9709a3	1424	/**
AnnaBridge	189:f392fc9709a3	1425	* @}
AnnaBridge	189:f392fc9709a3	1426	*/
AnnaBridge	189:f392fc9709a3	1427
AnnaBridge	189:f392fc9709a3	1428	/**
AnnaBridge	189:f392fc9709a3	1429	* @}
AnnaBridge	189:f392fc9709a3	1430	*/
AnnaBridge	189:f392fc9709a3	1431
AnnaBridge	189:f392fc9709a3	1432	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/