mbed-dev - mbed library sources. Supersedes mbed-src.

Users » mbed_official » Code » mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_lptim.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 182:a56a73fd2a6f

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	167:e84263d55307	1	/**
AnnaBridge	167:e84263d55307	2	******************************************************************************
AnnaBridge	167:e84263d55307	3	* @file stm32f4xx_ll_lptim.h
AnnaBridge	167:e84263d55307	4	* @author MCD Application Team
AnnaBridge	167:e84263d55307	5	* @brief Header file of LPTIM LL module.
AnnaBridge	167:e84263d55307	6	******************************************************************************
AnnaBridge	167:e84263d55307	7	* @attention
AnnaBridge	167:e84263d55307	8	*
AnnaBridge	167:e84263d55307	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	167:e84263d55307	10	*
AnnaBridge	167:e84263d55307	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	167:e84263d55307	12	* are permitted provided that the following conditions are met:
AnnaBridge	167:e84263d55307	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	167:e84263d55307	14	* this list of conditions and the following disclaimer.
AnnaBridge	167:e84263d55307	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	167:e84263d55307	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	167:e84263d55307	17	* and/or other materials provided with the distribution.
AnnaBridge	167:e84263d55307	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	167:e84263d55307	19	* may be used to endorse or promote products derived from this software
AnnaBridge	167:e84263d55307	20	* without specific prior written permission.
AnnaBridge	167:e84263d55307	21	*
AnnaBridge	167:e84263d55307	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	167:e84263d55307	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	167:e84263d55307	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	167:e84263d55307	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	167:e84263d55307	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	167:e84263d55307	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	167:e84263d55307	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	167:e84263d55307	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	167:e84263d55307	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	167:e84263d55307	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	167:e84263d55307	32	*
AnnaBridge	167:e84263d55307	33	******************************************************************************
AnnaBridge	167:e84263d55307	34	*/
AnnaBridge	167:e84263d55307	35
AnnaBridge	167:e84263d55307	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	167:e84263d55307	37	#ifndef __STM32F4xx_LL_LPTIM_H
AnnaBridge	167:e84263d55307	38	#define __STM32F4xx_LL_LPTIM_H
AnnaBridge	167:e84263d55307	39
AnnaBridge	167:e84263d55307	40	#ifdef __cplusplus
AnnaBridge	167:e84263d55307	41	extern "C" {
AnnaBridge	167:e84263d55307	42	#endif
AnnaBridge	167:e84263d55307	43
AnnaBridge	167:e84263d55307	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	167:e84263d55307	45	#include "stm32f4xx.h"
AnnaBridge	167:e84263d55307	46
AnnaBridge	167:e84263d55307	47	/** @addtogroup STM32F4xx_LL_Driver
AnnaBridge	167:e84263d55307	48	* @{
AnnaBridge	167:e84263d55307	49	*/
AnnaBridge	167:e84263d55307	50	#if defined (LPTIM1)
AnnaBridge	167:e84263d55307	51
AnnaBridge	167:e84263d55307	52	/** @defgroup LPTIM_LL LPTIM
AnnaBridge	167:e84263d55307	53	* @{
AnnaBridge	167:e84263d55307	54	*/
AnnaBridge	167:e84263d55307	55
AnnaBridge	167:e84263d55307	56	/* Private types -------------------------------------------------------------*/
AnnaBridge	167:e84263d55307	57	/* Private variables ---------------------------------------------------------*/
AnnaBridge	167:e84263d55307	58
AnnaBridge	167:e84263d55307	59	/* Private constants ---------------------------------------------------------*/
AnnaBridge	167:e84263d55307	60
AnnaBridge	167:e84263d55307	61	/* Private macros ------------------------------------------------------------*/
AnnaBridge	167:e84263d55307	62	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	167:e84263d55307	63	/** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
AnnaBridge	167:e84263d55307	64	* @{
AnnaBridge	167:e84263d55307	65	*/
AnnaBridge	167:e84263d55307	66	/**
AnnaBridge	167:e84263d55307	67	* @}
AnnaBridge	167:e84263d55307	68	*/
AnnaBridge	167:e84263d55307	69	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	167:e84263d55307	70
AnnaBridge	167:e84263d55307	71	/* Exported types ------------------------------------------------------------*/
AnnaBridge	167:e84263d55307	72	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	167:e84263d55307	73	/** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
AnnaBridge	167:e84263d55307	74	* @{
AnnaBridge	167:e84263d55307	75	*/
AnnaBridge	167:e84263d55307	76
AnnaBridge	167:e84263d55307	77	/**
AnnaBridge	167:e84263d55307	78	* @brief LPTIM Init structure definition
AnnaBridge	167:e84263d55307	79	*/
AnnaBridge	167:e84263d55307	80	typedef struct
AnnaBridge	167:e84263d55307	81	{
AnnaBridge	167:e84263d55307	82	uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
AnnaBridge	167:e84263d55307	83	This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
AnnaBridge	167:e84263d55307	84
AnnaBridge	167:e84263d55307	85	This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
AnnaBridge	167:e84263d55307	86
AnnaBridge	167:e84263d55307	87	uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
AnnaBridge	167:e84263d55307	88	This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
AnnaBridge	167:e84263d55307	89
AnnaBridge	167:e84263d55307	90	This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
AnnaBridge	167:e84263d55307	91
AnnaBridge	167:e84263d55307	92	uint32_t Waveform; /*!< Specifies the waveform shape.
AnnaBridge	167:e84263d55307	93	This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
AnnaBridge	167:e84263d55307	94
AnnaBridge	167:e84263d55307	95	This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
AnnaBridge	167:e84263d55307	96
AnnaBridge	167:e84263d55307	97	uint32_t Polarity; /*!< Specifies waveform polarity.
AnnaBridge	167:e84263d55307	98	This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
AnnaBridge	167:e84263d55307	99
AnnaBridge	167:e84263d55307	100	This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
AnnaBridge	167:e84263d55307	101	} LL_LPTIM_InitTypeDef;
AnnaBridge	167:e84263d55307	102
AnnaBridge	167:e84263d55307	103	/**
AnnaBridge	167:e84263d55307	104	* @}
AnnaBridge	167:e84263d55307	105	*/
AnnaBridge	167:e84263d55307	106	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	167:e84263d55307	107
AnnaBridge	167:e84263d55307	108	/* Exported constants --------------------------------------------------------*/
AnnaBridge	167:e84263d55307	109	/** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
AnnaBridge	167:e84263d55307	110	* @{
AnnaBridge	167:e84263d55307	111	*/
AnnaBridge	167:e84263d55307	112
AnnaBridge	167:e84263d55307	113	/** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	167:e84263d55307	114	* @brief Flags defines which can be used with LL_LPTIM_ReadReg function
AnnaBridge	167:e84263d55307	115	* @{
AnnaBridge	167:e84263d55307	116	*/
AnnaBridge	167:e84263d55307	117	#define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /!< Compare match /
AnnaBridge	167:e84263d55307	118	#define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /!< Autoreload match /
AnnaBridge	167:e84263d55307	119	#define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /!< External trigger edge event /
AnnaBridge	167:e84263d55307	120	#define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /!< Compare register update OK /
AnnaBridge	167:e84263d55307	121	#define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /!< Autoreload register update OK /
AnnaBridge	167:e84263d55307	122	#define LL_LPTIM_ISR_UP LPTIM_ISR_UP /!< Counter direction change down to up /
AnnaBridge	167:e84263d55307	123	#define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /!< Counter direction change up to down /
AnnaBridge	167:e84263d55307	124	/**
AnnaBridge	167:e84263d55307	125	* @}
AnnaBridge	167:e84263d55307	126	*/
AnnaBridge	167:e84263d55307	127
AnnaBridge	167:e84263d55307	128	/** @defgroup LPTIM_LL_EC_IT IT Defines
AnnaBridge	167:e84263d55307	129	* @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
AnnaBridge	167:e84263d55307	130	* @{
AnnaBridge	167:e84263d55307	131	*/
AnnaBridge	167:e84263d55307	132	#define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /!< Compare match Interrupt Enable /
AnnaBridge	167:e84263d55307	133	#define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /!< Autoreload match Interrupt Enable /
AnnaBridge	167:e84263d55307	134	#define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /!< External trigger valid edge Interrupt Enable /
AnnaBridge	167:e84263d55307	135	#define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /!< Compare register update OK Interrupt Enable /
AnnaBridge	167:e84263d55307	136	#define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /!< Autoreload register update OK Interrupt Enable /
AnnaBridge	167:e84263d55307	137	#define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /!< Direction change to UP Interrupt Enable /
AnnaBridge	167:e84263d55307	138	#define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /!< Direction change to down Interrupt Enable /
AnnaBridge	167:e84263d55307	139	/**
AnnaBridge	167:e84263d55307	140	* @}
AnnaBridge	167:e84263d55307	141	*/
AnnaBridge	167:e84263d55307	142
AnnaBridge	167:e84263d55307	143	/** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
AnnaBridge	167:e84263d55307	144	* @{
AnnaBridge	167:e84263d55307	145	*/
AnnaBridge	167:e84263d55307	146	#define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /!<LP Timer starts in continuous mode/
AnnaBridge	167:e84263d55307	147	#define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /!<LP Tilmer starts in single mode/
AnnaBridge	167:e84263d55307	148	/**
AnnaBridge	167:e84263d55307	149	* @}
AnnaBridge	167:e84263d55307	150	*/
AnnaBridge	167:e84263d55307	151
AnnaBridge	167:e84263d55307	152	/** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
AnnaBridge	167:e84263d55307	153	* @{
AnnaBridge	167:e84263d55307	154	*/
AnnaBridge	167:e84263d55307	155	#define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /!<Preload is disabled: registers are updated after each APB bus write access/
AnnaBridge	167:e84263d55307	156	#define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /!<preload is enabled: registers are updated at the end of the current LPTIM period/
AnnaBridge	167:e84263d55307	157	/**
AnnaBridge	167:e84263d55307	158	* @}
AnnaBridge	167:e84263d55307	159	*/
AnnaBridge	167:e84263d55307	160
AnnaBridge	167:e84263d55307	161	/** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
AnnaBridge	167:e84263d55307	162	* @{
AnnaBridge	167:e84263d55307	163	*/
AnnaBridge	167:e84263d55307	164	#define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /!<The counter is incremented following each internal clock pulse/
AnnaBridge	167:e84263d55307	165	#define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /!<The counter is incremented following each valid clock pulse on the LPTIM external Input1/
AnnaBridge	167:e84263d55307	166	/**
AnnaBridge	167:e84263d55307	167	* @}
AnnaBridge	167:e84263d55307	168	*/
AnnaBridge	167:e84263d55307	169
AnnaBridge	167:e84263d55307	170	/** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
AnnaBridge	167:e84263d55307	171	* @{
AnnaBridge	167:e84263d55307	172	*/
AnnaBridge	167:e84263d55307	173	#define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE/
AnnaBridge	167:e84263d55307	174	#define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /!<LPTIM generates a Set Once waveform/
AnnaBridge	167:e84263d55307	175	/**
AnnaBridge	167:e84263d55307	176	* @}
AnnaBridge	167:e84263d55307	177	*/
AnnaBridge	167:e84263d55307	178
AnnaBridge	167:e84263d55307	179	/** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
AnnaBridge	167:e84263d55307	180	* @{
AnnaBridge	167:e84263d55307	181	*/
AnnaBridge	167:e84263d55307	182	#define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers/
AnnaBridge	167:e84263d55307	183	#define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers/
AnnaBridge	167:e84263d55307	184	/**
AnnaBridge	167:e84263d55307	185	* @}
AnnaBridge	167:e84263d55307	186	*/
AnnaBridge	167:e84263d55307	187
AnnaBridge	167:e84263d55307	188	/** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
AnnaBridge	167:e84263d55307	189	* @{
AnnaBridge	167:e84263d55307	190	*/
AnnaBridge	167:e84263d55307	191	#define LL_LPTIM_PRESCALER_DIV1 0x00000000U /!<Prescaler division factor is set to 1/
AnnaBridge	167:e84263d55307	192	#define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /!<Prescaler division factor is set to 2/
AnnaBridge	167:e84263d55307	193	#define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /!<Prescaler division factor is set to 4/
AnnaBridge	167:e84263d55307	194	#define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 \| LPTIM_CFGR_PRESC_0) /!<Prescaler division factor is set to 8/
AnnaBridge	167:e84263d55307	195	#define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /!<Prescaler division factor is set to 16/
AnnaBridge	167:e84263d55307	196	#define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 \| LPTIM_CFGR_PRESC_0) /!<Prescaler division factor is set to 32/
AnnaBridge	167:e84263d55307	197	#define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 \| LPTIM_CFGR_PRESC_1) /!<Prescaler division factor is set to 64/
AnnaBridge	167:e84263d55307	198	#define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /!<Prescaler division factor is set to 128/
AnnaBridge	167:e84263d55307	199	/**
AnnaBridge	167:e84263d55307	200	* @}
AnnaBridge	167:e84263d55307	201	*/
AnnaBridge	167:e84263d55307	202
AnnaBridge	167:e84263d55307	203	/** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
AnnaBridge	167:e84263d55307	204	* @{
AnnaBridge	167:e84263d55307	205	*/
AnnaBridge	167:e84263d55307	206	#define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /!<External input trigger is connected to TIMx_ETR input/
AnnaBridge	167:e84263d55307	207	#define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /!<External input trigger is connected to RTC Alarm A/
AnnaBridge	167:e84263d55307	208	#define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /!<External input trigger is connected to RTC Alarm B/
AnnaBridge	167:e84263d55307	209	#define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 \| LPTIM_CFGR_TRIGSEL_0) /!<External input trigger is connected to RTC Tamper 1/
AnnaBridge	167:e84263d55307	210	#define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2 /!<External input trigger is connected to TIM1/
AnnaBridge	167:e84263d55307	211	#define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 \| LPTIM_CFGR_TRIGSEL_0) /!<External input trigger is connected to TIM5/
AnnaBridge	167:e84263d55307	212	/**
AnnaBridge	167:e84263d55307	213	* @}
AnnaBridge	167:e84263d55307	214	*/
AnnaBridge	167:e84263d55307	215
AnnaBridge	167:e84263d55307	216	/** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
AnnaBridge	167:e84263d55307	217	* @{
AnnaBridge	167:e84263d55307	218	*/
AnnaBridge	167:e84263d55307	219	#define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /!<Any trigger active level change is considered as a valid trigger/
AnnaBridge	167:e84263d55307	220	#define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger/
AnnaBridge	167:e84263d55307	221	#define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger/
AnnaBridge	167:e84263d55307	222	#define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger/
AnnaBridge	167:e84263d55307	223	/**
AnnaBridge	167:e84263d55307	224	* @}
AnnaBridge	167:e84263d55307	225	*/
AnnaBridge	167:e84263d55307	226
AnnaBridge	167:e84263d55307	227	/** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
AnnaBridge	167:e84263d55307	228	* @{
AnnaBridge	167:e84263d55307	229	*/
AnnaBridge	167:e84263d55307	230	#define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /!<LPTIM counter starts when a rising edge is detected/
AnnaBridge	167:e84263d55307	231	#define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /!<LPTIM counter starts when a falling edge is detected/
AnnaBridge	167:e84263d55307	232	#define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /!<LPTIM counter starts when a rising or a falling edge is detected/
AnnaBridge	167:e84263d55307	233	/**
AnnaBridge	167:e84263d55307	234	* @}
AnnaBridge	167:e84263d55307	235	*/
AnnaBridge	167:e84263d55307	236
AnnaBridge	167:e84263d55307	237	/** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
AnnaBridge	167:e84263d55307	238	* @{
AnnaBridge	167:e84263d55307	239	*/
AnnaBridge	167:e84263d55307	240	#define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)/
AnnaBridge	167:e84263d55307	241	#define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /!<LPTIM is clocked by an external clock source through the LPTIM external Input1/
AnnaBridge	167:e84263d55307	242	/**
AnnaBridge	167:e84263d55307	243	* @}
AnnaBridge	167:e84263d55307	244	*/
AnnaBridge	167:e84263d55307	245
AnnaBridge	167:e84263d55307	246	/** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
AnnaBridge	167:e84263d55307	247	* @{
AnnaBridge	167:e84263d55307	248	*/
AnnaBridge	167:e84263d55307	249	#define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /!<Any external clock signal level change is considered as a valid transition/
AnnaBridge	167:e84263d55307	250	#define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition/
AnnaBridge	167:e84263d55307	251	#define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition/
AnnaBridge	167:e84263d55307	252	#define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition/
AnnaBridge	167:e84263d55307	253	/**
AnnaBridge	167:e84263d55307	254	* @}
AnnaBridge	167:e84263d55307	255	*/
AnnaBridge	167:e84263d55307	256
AnnaBridge	167:e84263d55307	257	/** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
AnnaBridge	167:e84263d55307	258	* @{
AnnaBridge	167:e84263d55307	259	*/
AnnaBridge	167:e84263d55307	260	#define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /!< The rising edge is the active edge used for counting/
AnnaBridge	167:e84263d55307	261	#define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /!< The falling edge is the active edge used for counting/
AnnaBridge	167:e84263d55307	262	#define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /!< Both edges are active edges/
AnnaBridge	167:e84263d55307	263	/**
AnnaBridge	167:e84263d55307	264	* @}
AnnaBridge	167:e84263d55307	265	*/
AnnaBridge	167:e84263d55307	266
AnnaBridge	167:e84263d55307	267	/** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
AnnaBridge	167:e84263d55307	268	* @{
AnnaBridge	167:e84263d55307	269	*/
AnnaBridge	167:e84263d55307	270	#define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /!< The rising edge is the active edge used for counting/
AnnaBridge	167:e84263d55307	271	#define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /!< The falling edge is the active edge used for counting/
AnnaBridge	167:e84263d55307	272	#define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /!< Both edges are active edges/
AnnaBridge	167:e84263d55307	273	/**
AnnaBridge	167:e84263d55307	274	* @}
AnnaBridge	167:e84263d55307	275	*/
AnnaBridge	167:e84263d55307	276
AnnaBridge	167:e84263d55307	277
AnnaBridge	167:e84263d55307	278	/**
AnnaBridge	167:e84263d55307	279	* @}
AnnaBridge	167:e84263d55307	280	*/
AnnaBridge	167:e84263d55307	281
AnnaBridge	167:e84263d55307	282	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	167:e84263d55307	283	/** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
AnnaBridge	167:e84263d55307	284	* @{
AnnaBridge	167:e84263d55307	285	*/
AnnaBridge	167:e84263d55307	286
AnnaBridge	167:e84263d55307	287	/** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	167:e84263d55307	288	* @{
AnnaBridge	167:e84263d55307	289	*/
AnnaBridge	167:e84263d55307	290
AnnaBridge	167:e84263d55307	291	/**
AnnaBridge	167:e84263d55307	292	* @brief Write a value in LPTIM register
AnnaBridge	167:e84263d55307	293	* @param __INSTANCE__ LPTIM Instance
AnnaBridge	167:e84263d55307	294	* @param __REG__ Register to be written
AnnaBridge	167:e84263d55307	295	* @param __VALUE__ Value to be written in the register
AnnaBridge	167:e84263d55307	296	* @retval None
AnnaBridge	167:e84263d55307	297	*/
AnnaBridge	167:e84263d55307	298	#define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	167:e84263d55307	299
AnnaBridge	167:e84263d55307	300	/**
AnnaBridge	167:e84263d55307	301	* @brief Read a value in LPTIM register
AnnaBridge	167:e84263d55307	302	* @param __INSTANCE__ LPTIM Instance
AnnaBridge	167:e84263d55307	303	* @param __REG__ Register to be read
AnnaBridge	167:e84263d55307	304	* @retval Register value
AnnaBridge	167:e84263d55307	305	*/
AnnaBridge	167:e84263d55307	306	#define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	167:e84263d55307	307	/**
AnnaBridge	167:e84263d55307	308	* @}
AnnaBridge	167:e84263d55307	309	*/
AnnaBridge	167:e84263d55307	310
AnnaBridge	167:e84263d55307	311	/**
AnnaBridge	167:e84263d55307	312	* @}
AnnaBridge	167:e84263d55307	313	*/
AnnaBridge	167:e84263d55307	314
AnnaBridge	167:e84263d55307	315
AnnaBridge	167:e84263d55307	316	/* Exported functions --------------------------------------------------------*/
AnnaBridge	167:e84263d55307	317	/** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
AnnaBridge	167:e84263d55307	318	* @{
AnnaBridge	167:e84263d55307	319	*/
AnnaBridge	167:e84263d55307	320
AnnaBridge	167:e84263d55307	321	/** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
AnnaBridge	167:e84263d55307	322	* @{
AnnaBridge	167:e84263d55307	323	*/
AnnaBridge	167:e84263d55307	324
AnnaBridge	167:e84263d55307	325	/**
AnnaBridge	167:e84263d55307	326	* @brief Enable the LPTIM instance
AnnaBridge	167:e84263d55307	327	* @note After setting the ENABLE bit, a delay of two counter clock is needed
AnnaBridge	167:e84263d55307	328	* before the LPTIM instance is actually enabled.
AnnaBridge	167:e84263d55307	329	* @rmtoll CR ENABLE LL_LPTIM_Enable
AnnaBridge	167:e84263d55307	330	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	331	* @retval None
AnnaBridge	167:e84263d55307	332	*/
AnnaBridge	167:e84263d55307	333	__STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	334	{
AnnaBridge	167:e84263d55307	335	SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
AnnaBridge	167:e84263d55307	336	}
AnnaBridge	167:e84263d55307	337
AnnaBridge	167:e84263d55307	338	/**
AnnaBridge	167:e84263d55307	339	* @brief Disable the LPTIM instance
AnnaBridge	167:e84263d55307	340	* @rmtoll CR ENABLE LL_LPTIM_Disable
AnnaBridge	167:e84263d55307	341	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	342	* @retval None
AnnaBridge	167:e84263d55307	343	*/
AnnaBridge	167:e84263d55307	344	__STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	345	{
AnnaBridge	167:e84263d55307	346	CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
AnnaBridge	167:e84263d55307	347	}
AnnaBridge	167:e84263d55307	348
AnnaBridge	167:e84263d55307	349	/**
AnnaBridge	167:e84263d55307	350	* @brief Indicates whether the LPTIM instance is enabled.
AnnaBridge	167:e84263d55307	351	* @rmtoll CR ENABLE LL_LPTIM_IsEnabled
AnnaBridge	167:e84263d55307	352	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	353	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	354	*/
AnnaBridge	167:e84263d55307	355	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	356	{
AnnaBridge	167:e84263d55307	357	return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
AnnaBridge	167:e84263d55307	358	}
AnnaBridge	167:e84263d55307	359
AnnaBridge	167:e84263d55307	360	/**
AnnaBridge	167:e84263d55307	361	* @brief Starts the LPTIM counter in the desired mode.
AnnaBridge	167:e84263d55307	362	* @note LPTIM instance must be enabled before starting the counter.
AnnaBridge	167:e84263d55307	363	* @note It is possible to change on the fly from One Shot mode to
AnnaBridge	167:e84263d55307	364	* Continuous mode.
AnnaBridge	167:e84263d55307	365	* @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
AnnaBridge	167:e84263d55307	366	* CR SNGSTRT LL_LPTIM_StartCounter
AnnaBridge	167:e84263d55307	367	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	368	* @param OperatingMode This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	369	* @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
AnnaBridge	167:e84263d55307	370	* @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
AnnaBridge	167:e84263d55307	371	* @retval None
AnnaBridge	167:e84263d55307	372	*/
AnnaBridge	167:e84263d55307	373	__STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
AnnaBridge	167:e84263d55307	374	{
AnnaBridge	167:e84263d55307	375	MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT \| LPTIM_CR_SNGSTRT, OperatingMode);
AnnaBridge	167:e84263d55307	376	}
AnnaBridge	167:e84263d55307	377
AnnaBridge	167:e84263d55307	378
AnnaBridge	167:e84263d55307	379	/**
AnnaBridge	167:e84263d55307	380	* @brief Set the LPTIM registers update mode (enable/disable register preload)
AnnaBridge	167:e84263d55307	381	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	382	* @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
AnnaBridge	167:e84263d55307	383	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	384	* @param UpdateMode This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	385	* @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
AnnaBridge	167:e84263d55307	386	* @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
AnnaBridge	167:e84263d55307	387	* @retval None
AnnaBridge	167:e84263d55307	388	*/
AnnaBridge	167:e84263d55307	389	__STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
AnnaBridge	167:e84263d55307	390	{
AnnaBridge	167:e84263d55307	391	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
AnnaBridge	167:e84263d55307	392	}
AnnaBridge	167:e84263d55307	393
AnnaBridge	167:e84263d55307	394	/**
AnnaBridge	167:e84263d55307	395	* @brief Get the LPTIM registers update mode
AnnaBridge	167:e84263d55307	396	* @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
AnnaBridge	167:e84263d55307	397	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	398	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	399	* @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
AnnaBridge	167:e84263d55307	400	* @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
AnnaBridge	167:e84263d55307	401	*/
AnnaBridge	167:e84263d55307	402	__STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	403	{
AnnaBridge	167:e84263d55307	404	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
AnnaBridge	167:e84263d55307	405	}
AnnaBridge	167:e84263d55307	406
AnnaBridge	167:e84263d55307	407	/**
AnnaBridge	167:e84263d55307	408	* @brief Set the auto reload value
AnnaBridge	167:e84263d55307	409	* @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
AnnaBridge	167:e84263d55307	410	* @note After a write to the LPTIMx_ARR register a new write operation to the
AnnaBridge	167:e84263d55307	411	* same register can only be performed when the previous write operation
AnnaBridge	167:e84263d55307	412	* is completed. Any successive write before the ARROK flag be set, will
AnnaBridge	167:e84263d55307	413	* lead to unpredictable results.
AnnaBridge	167:e84263d55307	414	* @note autoreload value be strictly greater than the compare value.
AnnaBridge	167:e84263d55307	415	* @rmtoll ARR ARR LL_LPTIM_SetAutoReload
AnnaBridge	167:e84263d55307	416	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	417	* @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge	167:e84263d55307	418	* @retval None
AnnaBridge	167:e84263d55307	419	*/
AnnaBridge	167:e84263d55307	420	__STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
AnnaBridge	167:e84263d55307	421	{
AnnaBridge	167:e84263d55307	422	MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
AnnaBridge	167:e84263d55307	423	}
AnnaBridge	167:e84263d55307	424
AnnaBridge	167:e84263d55307	425	/**
AnnaBridge	167:e84263d55307	426	* @brief Get actual auto reload value
AnnaBridge	167:e84263d55307	427	* @rmtoll ARR ARR LL_LPTIM_GetAutoReload
AnnaBridge	167:e84263d55307	428	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	429	* @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge	167:e84263d55307	430	*/
AnnaBridge	167:e84263d55307	431	__STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	432	{
AnnaBridge	167:e84263d55307	433	return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
AnnaBridge	167:e84263d55307	434	}
AnnaBridge	167:e84263d55307	435
AnnaBridge	167:e84263d55307	436	/**
AnnaBridge	167:e84263d55307	437	* @brief Set the compare value
AnnaBridge	167:e84263d55307	438	* @note After a write to the LPTIMx_CMP register a new write operation to the
AnnaBridge	167:e84263d55307	439	* same register can only be performed when the previous write operation
AnnaBridge	167:e84263d55307	440	* is completed. Any successive write before the CMPOK flag be set, will
AnnaBridge	167:e84263d55307	441	* lead to unpredictable results.
AnnaBridge	167:e84263d55307	442	* @rmtoll CMP CMP LL_LPTIM_SetCompare
AnnaBridge	167:e84263d55307	443	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	444	* @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge	167:e84263d55307	445	* @retval None
AnnaBridge	167:e84263d55307	446	*/
AnnaBridge	167:e84263d55307	447	__STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
AnnaBridge	167:e84263d55307	448	{
AnnaBridge	167:e84263d55307	449	MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
AnnaBridge	167:e84263d55307	450	}
AnnaBridge	167:e84263d55307	451
AnnaBridge	167:e84263d55307	452	/**
AnnaBridge	167:e84263d55307	453	* @brief Get actual compare value
AnnaBridge	167:e84263d55307	454	* @rmtoll CMP CMP LL_LPTIM_GetCompare
AnnaBridge	167:e84263d55307	455	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	456	* @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge	167:e84263d55307	457	*/
AnnaBridge	167:e84263d55307	458	__STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	459	{
AnnaBridge	167:e84263d55307	460	return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
AnnaBridge	167:e84263d55307	461	}
AnnaBridge	167:e84263d55307	462
AnnaBridge	167:e84263d55307	463	/**
AnnaBridge	167:e84263d55307	464	* @brief Get actual counter value
AnnaBridge	167:e84263d55307	465	* @note When the LPTIM instance is running with an asynchronous clock, reading
AnnaBridge	167:e84263d55307	466	* the LPTIMx_CNT register may return unreliable values. So in this case
AnnaBridge	167:e84263d55307	467	* it is necessary to perform two consecutive read accesses and verify
AnnaBridge	167:e84263d55307	468	* that the two returned values are identical.
AnnaBridge	167:e84263d55307	469	* @rmtoll CNT CNT LL_LPTIM_GetCounter
AnnaBridge	167:e84263d55307	470	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	471	* @retval Counter value
AnnaBridge	167:e84263d55307	472	*/
AnnaBridge	167:e84263d55307	473	__STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	474	{
AnnaBridge	167:e84263d55307	475	return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
AnnaBridge	167:e84263d55307	476	}
AnnaBridge	167:e84263d55307	477
AnnaBridge	167:e84263d55307	478	/**
AnnaBridge	167:e84263d55307	479	* @brief Set the counter mode (selection of the LPTIM counter clock source).
AnnaBridge	167:e84263d55307	480	* @note The counter mode can be set only when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	481	* @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
AnnaBridge	167:e84263d55307	482	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	483	* @param CounterMode This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	484	* @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
AnnaBridge	167:e84263d55307	485	* @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
AnnaBridge	167:e84263d55307	486	* @retval None
AnnaBridge	167:e84263d55307	487	*/
AnnaBridge	167:e84263d55307	488	__STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
AnnaBridge	167:e84263d55307	489	{
AnnaBridge	167:e84263d55307	490	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
AnnaBridge	167:e84263d55307	491	}
AnnaBridge	167:e84263d55307	492
AnnaBridge	167:e84263d55307	493	/**
AnnaBridge	167:e84263d55307	494	* @brief Get the counter mode
AnnaBridge	167:e84263d55307	495	* @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
AnnaBridge	167:e84263d55307	496	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	497	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	498	* @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
AnnaBridge	167:e84263d55307	499	* @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
AnnaBridge	167:e84263d55307	500	*/
AnnaBridge	167:e84263d55307	501	__STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	502	{
AnnaBridge	167:e84263d55307	503	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
AnnaBridge	167:e84263d55307	504	}
AnnaBridge	167:e84263d55307	505
AnnaBridge	167:e84263d55307	506	/**
AnnaBridge	167:e84263d55307	507	* @brief Configure the LPTIM instance output (LPTIMx_OUT)
AnnaBridge	167:e84263d55307	508	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	509	* @note Regarding the LPTIM output polarity the change takes effect
AnnaBridge	167:e84263d55307	510	* immediately, so the output default value will change immediately after
AnnaBridge	167:e84263d55307	511	* the polarity is re-configured, even before the timer is enabled.
AnnaBridge	167:e84263d55307	512	* @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
AnnaBridge	167:e84263d55307	513	* CFGR WAVPOL LL_LPTIM_ConfigOutput
AnnaBridge	167:e84263d55307	514	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	515	* @param Waveform This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	516	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge	167:e84263d55307	517	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge	167:e84263d55307	518	* @param Polarity This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	519	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge	167:e84263d55307	520	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge	167:e84263d55307	521	* @retval None
AnnaBridge	167:e84263d55307	522	*/
AnnaBridge	167:e84263d55307	523	__STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
AnnaBridge	167:e84263d55307	524	{
AnnaBridge	167:e84263d55307	525	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE \| LPTIM_CFGR_WAVPOL, Waveform \| Polarity);
AnnaBridge	167:e84263d55307	526	}
AnnaBridge	167:e84263d55307	527
AnnaBridge	167:e84263d55307	528	/**
AnnaBridge	167:e84263d55307	529	* @brief Set waveform shape
AnnaBridge	167:e84263d55307	530	* @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
AnnaBridge	167:e84263d55307	531	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	532	* @param Waveform This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	533	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge	167:e84263d55307	534	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge	167:e84263d55307	535	* @retval None
AnnaBridge	167:e84263d55307	536	*/
AnnaBridge	167:e84263d55307	537	__STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
AnnaBridge	167:e84263d55307	538	{
AnnaBridge	167:e84263d55307	539	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
AnnaBridge	167:e84263d55307	540	}
AnnaBridge	167:e84263d55307	541
AnnaBridge	167:e84263d55307	542	/**
AnnaBridge	167:e84263d55307	543	* @brief Get actual waveform shape
AnnaBridge	167:e84263d55307	544	* @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
AnnaBridge	167:e84263d55307	545	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	546	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	547	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge	167:e84263d55307	548	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge	167:e84263d55307	549	*/
AnnaBridge	167:e84263d55307	550	__STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	551	{
AnnaBridge	167:e84263d55307	552	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
AnnaBridge	167:e84263d55307	553	}
AnnaBridge	167:e84263d55307	554
AnnaBridge	167:e84263d55307	555	/**
AnnaBridge	167:e84263d55307	556	* @brief Set output polarity
AnnaBridge	167:e84263d55307	557	* @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
AnnaBridge	167:e84263d55307	558	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	559	* @param Polarity This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	560	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge	167:e84263d55307	561	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge	167:e84263d55307	562	* @retval None
AnnaBridge	167:e84263d55307	563	*/
AnnaBridge	167:e84263d55307	564	__STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
AnnaBridge	167:e84263d55307	565	{
AnnaBridge	167:e84263d55307	566	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
AnnaBridge	167:e84263d55307	567	}
AnnaBridge	167:e84263d55307	568
AnnaBridge	167:e84263d55307	569	/**
AnnaBridge	167:e84263d55307	570	* @brief Get actual output polarity
AnnaBridge	167:e84263d55307	571	* @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
AnnaBridge	167:e84263d55307	572	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	573	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	574	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge	167:e84263d55307	575	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge	167:e84263d55307	576	*/
AnnaBridge	167:e84263d55307	577	__STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	578	{
AnnaBridge	167:e84263d55307	579	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
AnnaBridge	167:e84263d55307	580	}
AnnaBridge	167:e84263d55307	581
AnnaBridge	167:e84263d55307	582	/**
AnnaBridge	167:e84263d55307	583	* @brief Set actual prescaler division ratio.
AnnaBridge	167:e84263d55307	584	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	585	* @note When the LPTIM is configured to be clocked by an internal clock source
AnnaBridge	167:e84263d55307	586	* and the LPTIM counter is configured to be updated by active edges
AnnaBridge	167:e84263d55307	587	* detected on the LPTIM external Input1, the internal clock provided to
AnnaBridge	167:e84263d55307	588	* the LPTIM must be not be prescaled.
AnnaBridge	167:e84263d55307	589	* @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
AnnaBridge	167:e84263d55307	590	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	591	* @param Prescaler This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	592	* @arg @ref LL_LPTIM_PRESCALER_DIV1
AnnaBridge	167:e84263d55307	593	* @arg @ref LL_LPTIM_PRESCALER_DIV2
AnnaBridge	167:e84263d55307	594	* @arg @ref LL_LPTIM_PRESCALER_DIV4
AnnaBridge	167:e84263d55307	595	* @arg @ref LL_LPTIM_PRESCALER_DIV8
AnnaBridge	167:e84263d55307	596	* @arg @ref LL_LPTIM_PRESCALER_DIV16
AnnaBridge	167:e84263d55307	597	* @arg @ref LL_LPTIM_PRESCALER_DIV32
AnnaBridge	167:e84263d55307	598	* @arg @ref LL_LPTIM_PRESCALER_DIV64
AnnaBridge	167:e84263d55307	599	* @arg @ref LL_LPTIM_PRESCALER_DIV128
AnnaBridge	167:e84263d55307	600	* @retval None
AnnaBridge	167:e84263d55307	601	*/
AnnaBridge	167:e84263d55307	602	__STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
AnnaBridge	167:e84263d55307	603	{
AnnaBridge	167:e84263d55307	604	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
AnnaBridge	167:e84263d55307	605	}
AnnaBridge	167:e84263d55307	606
AnnaBridge	167:e84263d55307	607	/**
AnnaBridge	167:e84263d55307	608	* @brief Get actual prescaler division ratio.
AnnaBridge	167:e84263d55307	609	* @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
AnnaBridge	167:e84263d55307	610	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	611	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	612	* @arg @ref LL_LPTIM_PRESCALER_DIV1
AnnaBridge	167:e84263d55307	613	* @arg @ref LL_LPTIM_PRESCALER_DIV2
AnnaBridge	167:e84263d55307	614	* @arg @ref LL_LPTIM_PRESCALER_DIV4
AnnaBridge	167:e84263d55307	615	* @arg @ref LL_LPTIM_PRESCALER_DIV8
AnnaBridge	167:e84263d55307	616	* @arg @ref LL_LPTIM_PRESCALER_DIV16
AnnaBridge	167:e84263d55307	617	* @arg @ref LL_LPTIM_PRESCALER_DIV32
AnnaBridge	167:e84263d55307	618	* @arg @ref LL_LPTIM_PRESCALER_DIV64
AnnaBridge	167:e84263d55307	619	* @arg @ref LL_LPTIM_PRESCALER_DIV128
AnnaBridge	167:e84263d55307	620	*/
AnnaBridge	167:e84263d55307	621	__STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	622	{
AnnaBridge	167:e84263d55307	623	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
AnnaBridge	167:e84263d55307	624	}
AnnaBridge	167:e84263d55307	625
AnnaBridge	167:e84263d55307	626
AnnaBridge	167:e84263d55307	627	/**
AnnaBridge	167:e84263d55307	628	* @}
AnnaBridge	167:e84263d55307	629	*/
AnnaBridge	167:e84263d55307	630
AnnaBridge	167:e84263d55307	631	/** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
AnnaBridge	167:e84263d55307	632	* @{
AnnaBridge	167:e84263d55307	633	*/
AnnaBridge	167:e84263d55307	634
AnnaBridge	167:e84263d55307	635	/**
AnnaBridge	167:e84263d55307	636	* @brief Enable the timeout function
AnnaBridge	167:e84263d55307	637	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	638	* @note The first trigger event will start the timer, any successive trigger
AnnaBridge	167:e84263d55307	639	* event will reset the counter and the timer will restart.
AnnaBridge	167:e84263d55307	640	* @note The timeout value corresponds to the compare value; if no trigger
AnnaBridge	167:e84263d55307	641	* occurs within the expected time frame, the MCU is waked-up by the
AnnaBridge	167:e84263d55307	642	* compare match event.
AnnaBridge	167:e84263d55307	643	* @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
AnnaBridge	167:e84263d55307	644	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	645	* @retval None
AnnaBridge	167:e84263d55307	646	*/
AnnaBridge	167:e84263d55307	647	__STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	648	{
AnnaBridge	167:e84263d55307	649	SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
AnnaBridge	167:e84263d55307	650	}
AnnaBridge	167:e84263d55307	651
AnnaBridge	167:e84263d55307	652	/**
AnnaBridge	167:e84263d55307	653	* @brief Disable the timeout function
AnnaBridge	167:e84263d55307	654	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	655	* @note A trigger event arriving when the timer is already started will be
AnnaBridge	167:e84263d55307	656	* ignored.
AnnaBridge	167:e84263d55307	657	* @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
AnnaBridge	167:e84263d55307	658	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	659	* @retval None
AnnaBridge	167:e84263d55307	660	*/
AnnaBridge	167:e84263d55307	661	__STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	662	{
AnnaBridge	167:e84263d55307	663	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
AnnaBridge	167:e84263d55307	664	}
AnnaBridge	167:e84263d55307	665
AnnaBridge	167:e84263d55307	666	/**
AnnaBridge	167:e84263d55307	667	* @brief Indicate whether the timeout function is enabled.
AnnaBridge	167:e84263d55307	668	* @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
AnnaBridge	167:e84263d55307	669	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	670	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	671	*/
AnnaBridge	167:e84263d55307	672	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	673	{
AnnaBridge	167:e84263d55307	674	return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
AnnaBridge	167:e84263d55307	675	}
AnnaBridge	167:e84263d55307	676
AnnaBridge	167:e84263d55307	677	/**
AnnaBridge	167:e84263d55307	678	* @brief Start the LPTIM counter
AnnaBridge	167:e84263d55307	679	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	680	* @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
AnnaBridge	167:e84263d55307	681	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	682	* @retval None
AnnaBridge	167:e84263d55307	683	*/
AnnaBridge	167:e84263d55307	684	__STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	685	{
AnnaBridge	167:e84263d55307	686	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
AnnaBridge	167:e84263d55307	687	}
AnnaBridge	167:e84263d55307	688
AnnaBridge	167:e84263d55307	689	/**
AnnaBridge	167:e84263d55307	690	* @brief Configure the external trigger used as a trigger event for the LPTIM.
AnnaBridge	167:e84263d55307	691	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	692	* @note An internal clock source must be present when a digital filter is
AnnaBridge	167:e84263d55307	693	* required for the trigger.
AnnaBridge	167:e84263d55307	694	* @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
AnnaBridge	167:e84263d55307	695	* CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
AnnaBridge	167:e84263d55307	696	* CFGR TRIGEN LL_LPTIM_ConfigTrigger
AnnaBridge	167:e84263d55307	697	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	698	* @param Source This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	699	* @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
AnnaBridge	167:e84263d55307	700	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
AnnaBridge	167:e84263d55307	701	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
AnnaBridge	167:e84263d55307	702	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
AnnaBridge	167:e84263d55307	703	* @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
AnnaBridge	167:e84263d55307	704	* @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
AnnaBridge	167:e84263d55307	705	* @param Filter This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	706	* @arg @ref LL_LPTIM_TRIG_FILTER_NONE
AnnaBridge	167:e84263d55307	707	* @arg @ref LL_LPTIM_TRIG_FILTER_2
AnnaBridge	167:e84263d55307	708	* @arg @ref LL_LPTIM_TRIG_FILTER_4
AnnaBridge	167:e84263d55307	709	* @arg @ref LL_LPTIM_TRIG_FILTER_8
AnnaBridge	167:e84263d55307	710	* @param Polarity This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	711	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
AnnaBridge	167:e84263d55307	712	* @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
AnnaBridge	167:e84263d55307	713	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
AnnaBridge	167:e84263d55307	714	* (*) value not defined in all devices.
AnnaBridge	167:e84263d55307	715	* @retval None
AnnaBridge	167:e84263d55307	716	*/
AnnaBridge	167:e84263d55307	717	__STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
AnnaBridge	167:e84263d55307	718	{
AnnaBridge	167:e84263d55307	719	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL \| LPTIM_CFGR_TRGFLT \| LPTIM_CFGR_TRIGEN, Source \| Filter \| Polarity);
AnnaBridge	167:e84263d55307	720	}
AnnaBridge	167:e84263d55307	721
AnnaBridge	167:e84263d55307	722	/**
AnnaBridge	167:e84263d55307	723	* @brief Get actual external trigger source.
AnnaBridge	167:e84263d55307	724	* @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
AnnaBridge	167:e84263d55307	725	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	726	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	727	* @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
AnnaBridge	167:e84263d55307	728	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
AnnaBridge	167:e84263d55307	729	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
AnnaBridge	167:e84263d55307	730	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
AnnaBridge	167:e84263d55307	731	* @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
AnnaBridge	167:e84263d55307	732	* @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
AnnaBridge	167:e84263d55307	733	*/
AnnaBridge	167:e84263d55307	734	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	735	{
AnnaBridge	167:e84263d55307	736	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
AnnaBridge	167:e84263d55307	737	}
AnnaBridge	167:e84263d55307	738
AnnaBridge	167:e84263d55307	739	/**
AnnaBridge	167:e84263d55307	740	* @brief Get actual external trigger filter.
AnnaBridge	167:e84263d55307	741	* @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
AnnaBridge	167:e84263d55307	742	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	743	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	744	* @arg @ref LL_LPTIM_TRIG_FILTER_NONE
AnnaBridge	167:e84263d55307	745	* @arg @ref LL_LPTIM_TRIG_FILTER_2
AnnaBridge	167:e84263d55307	746	* @arg @ref LL_LPTIM_TRIG_FILTER_4
AnnaBridge	167:e84263d55307	747	* @arg @ref LL_LPTIM_TRIG_FILTER_8
AnnaBridge	167:e84263d55307	748	*/
AnnaBridge	167:e84263d55307	749	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	750	{
AnnaBridge	167:e84263d55307	751	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
AnnaBridge	167:e84263d55307	752	}
AnnaBridge	167:e84263d55307	753
AnnaBridge	167:e84263d55307	754	/**
AnnaBridge	167:e84263d55307	755	* @brief Get actual external trigger polarity.
AnnaBridge	167:e84263d55307	756	* @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
AnnaBridge	167:e84263d55307	757	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	758	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	759	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
AnnaBridge	167:e84263d55307	760	* @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
AnnaBridge	167:e84263d55307	761	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
AnnaBridge	167:e84263d55307	762	*/
AnnaBridge	167:e84263d55307	763	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	764	{
AnnaBridge	167:e84263d55307	765	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
AnnaBridge	167:e84263d55307	766	}
AnnaBridge	167:e84263d55307	767
AnnaBridge	167:e84263d55307	768	/**
AnnaBridge	167:e84263d55307	769	* @}
AnnaBridge	167:e84263d55307	770	*/
AnnaBridge	167:e84263d55307	771
AnnaBridge	167:e84263d55307	772	/** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
AnnaBridge	167:e84263d55307	773	* @{
AnnaBridge	167:e84263d55307	774	*/
AnnaBridge	167:e84263d55307	775
AnnaBridge	167:e84263d55307	776	/**
AnnaBridge	167:e84263d55307	777	* @brief Set the source of the clock used by the LPTIM instance.
AnnaBridge	167:e84263d55307	778	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	779	* @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
AnnaBridge	167:e84263d55307	780	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	781	* @param ClockSource This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	782	* @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
AnnaBridge	167:e84263d55307	783	* @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
AnnaBridge	167:e84263d55307	784	* @retval None
AnnaBridge	167:e84263d55307	785	*/
AnnaBridge	167:e84263d55307	786	__STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
AnnaBridge	167:e84263d55307	787	{
AnnaBridge	167:e84263d55307	788	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
AnnaBridge	167:e84263d55307	789	}
AnnaBridge	167:e84263d55307	790
AnnaBridge	167:e84263d55307	791	/**
AnnaBridge	167:e84263d55307	792	* @brief Get actual LPTIM instance clock source.
AnnaBridge	167:e84263d55307	793	* @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
AnnaBridge	167:e84263d55307	794	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	795	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	796	* @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
AnnaBridge	167:e84263d55307	797	* @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
AnnaBridge	167:e84263d55307	798	*/
AnnaBridge	167:e84263d55307	799	__STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	800	{
AnnaBridge	167:e84263d55307	801	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
AnnaBridge	167:e84263d55307	802	}
AnnaBridge	167:e84263d55307	803
AnnaBridge	167:e84263d55307	804	/**
AnnaBridge	167:e84263d55307	805	* @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
AnnaBridge	167:e84263d55307	806	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	807	* @note When both external clock signal edges are considered active ones,
AnnaBridge	167:e84263d55307	808	* the LPTIM must also be clocked by an internal clock source with a
AnnaBridge	167:e84263d55307	809	* frequency equal to at least four times the external clock frequency.
AnnaBridge	167:e84263d55307	810	* @note An internal clock source must be present when a digital filter is
AnnaBridge	167:e84263d55307	811	* required for external clock.
AnnaBridge	167:e84263d55307	812	* @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
AnnaBridge	167:e84263d55307	813	* CFGR CKPOL LL_LPTIM_ConfigClock
AnnaBridge	167:e84263d55307	814	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	815	* @param ClockFilter This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	816	* @arg @ref LL_LPTIM_CLK_FILTER_NONE
AnnaBridge	167:e84263d55307	817	* @arg @ref LL_LPTIM_CLK_FILTER_2
AnnaBridge	167:e84263d55307	818	* @arg @ref LL_LPTIM_CLK_FILTER_4
AnnaBridge	167:e84263d55307	819	* @arg @ref LL_LPTIM_CLK_FILTER_8
AnnaBridge	167:e84263d55307	820	* @param ClockPolarity This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	821	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING
AnnaBridge	167:e84263d55307	822	* @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
AnnaBridge	167:e84263d55307	823	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
AnnaBridge	167:e84263d55307	824	* @retval None
AnnaBridge	167:e84263d55307	825	*/
AnnaBridge	167:e84263d55307	826	__STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
AnnaBridge	167:e84263d55307	827	{
AnnaBridge	167:e84263d55307	828	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT \| LPTIM_CFGR_CKPOL, ClockFilter \| ClockPolarity);
AnnaBridge	167:e84263d55307	829	}
AnnaBridge	167:e84263d55307	830
AnnaBridge	167:e84263d55307	831	/**
AnnaBridge	167:e84263d55307	832	* @brief Get actual clock polarity
AnnaBridge	167:e84263d55307	833	* @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
AnnaBridge	167:e84263d55307	834	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	835	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	836	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING
AnnaBridge	167:e84263d55307	837	* @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
AnnaBridge	167:e84263d55307	838	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
AnnaBridge	167:e84263d55307	839	*/
AnnaBridge	167:e84263d55307	840	__STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	841	{
AnnaBridge	167:e84263d55307	842	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
AnnaBridge	167:e84263d55307	843	}
AnnaBridge	167:e84263d55307	844
AnnaBridge	167:e84263d55307	845	/**
AnnaBridge	167:e84263d55307	846	* @brief Get actual clock digital filter
AnnaBridge	167:e84263d55307	847	* @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
AnnaBridge	167:e84263d55307	848	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	849	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	850	* @arg @ref LL_LPTIM_CLK_FILTER_NONE
AnnaBridge	167:e84263d55307	851	* @arg @ref LL_LPTIM_CLK_FILTER_2
AnnaBridge	167:e84263d55307	852	* @arg @ref LL_LPTIM_CLK_FILTER_4
AnnaBridge	167:e84263d55307	853	* @arg @ref LL_LPTIM_CLK_FILTER_8
AnnaBridge	167:e84263d55307	854	*/
AnnaBridge	167:e84263d55307	855	__STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	856	{
AnnaBridge	167:e84263d55307	857	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
AnnaBridge	167:e84263d55307	858	}
AnnaBridge	167:e84263d55307	859
AnnaBridge	167:e84263d55307	860	/**
AnnaBridge	167:e84263d55307	861	* @}
AnnaBridge	167:e84263d55307	862	*/
AnnaBridge	167:e84263d55307	863
AnnaBridge	167:e84263d55307	864	/** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
AnnaBridge	167:e84263d55307	865	* @{
AnnaBridge	167:e84263d55307	866	*/
AnnaBridge	167:e84263d55307	867
AnnaBridge	167:e84263d55307	868	/**
AnnaBridge	167:e84263d55307	869	* @brief Configure the encoder mode.
AnnaBridge	167:e84263d55307	870	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	871	* @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
AnnaBridge	167:e84263d55307	872	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	873	* @param EncoderMode This parameter can be one of the following values:
AnnaBridge	167:e84263d55307	874	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING
AnnaBridge	167:e84263d55307	875	* @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
AnnaBridge	167:e84263d55307	876	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
AnnaBridge	167:e84263d55307	877	* @retval None
AnnaBridge	167:e84263d55307	878	*/
AnnaBridge	167:e84263d55307	879	__STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
AnnaBridge	167:e84263d55307	880	{
AnnaBridge	167:e84263d55307	881	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
AnnaBridge	167:e84263d55307	882	}
AnnaBridge	167:e84263d55307	883
AnnaBridge	167:e84263d55307	884	/**
AnnaBridge	167:e84263d55307	885	* @brief Get actual encoder mode.
AnnaBridge	167:e84263d55307	886	* @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
AnnaBridge	167:e84263d55307	887	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	888	* @retval Returned value can be one of the following values:
AnnaBridge	167:e84263d55307	889	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING
AnnaBridge	167:e84263d55307	890	* @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
AnnaBridge	167:e84263d55307	891	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
AnnaBridge	167:e84263d55307	892	*/
AnnaBridge	167:e84263d55307	893	__STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	894	{
AnnaBridge	167:e84263d55307	895	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
AnnaBridge	167:e84263d55307	896	}
AnnaBridge	167:e84263d55307	897
AnnaBridge	167:e84263d55307	898	/**
AnnaBridge	167:e84263d55307	899	* @brief Enable the encoder mode
AnnaBridge	167:e84263d55307	900	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	901	* @note In this mode the LPTIM instance must be clocked by an internal clock
AnnaBridge	167:e84263d55307	902	* source. Also, the prescaler division ratio must be equal to 1.
AnnaBridge	167:e84263d55307	903	* @note LPTIM instance must be configured in continuous mode prior enabling
AnnaBridge	167:e84263d55307	904	* the encoder mode.
AnnaBridge	167:e84263d55307	905	* @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
AnnaBridge	167:e84263d55307	906	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	907	* @retval None
AnnaBridge	167:e84263d55307	908	*/
AnnaBridge	167:e84263d55307	909	__STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	910	{
AnnaBridge	167:e84263d55307	911	SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
AnnaBridge	167:e84263d55307	912	}
AnnaBridge	167:e84263d55307	913
AnnaBridge	167:e84263d55307	914	/**
AnnaBridge	167:e84263d55307	915	* @brief Disable the encoder mode
AnnaBridge	167:e84263d55307	916	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	167:e84263d55307	917	* @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
AnnaBridge	167:e84263d55307	918	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	919	* @retval None
AnnaBridge	167:e84263d55307	920	*/
AnnaBridge	167:e84263d55307	921	__STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	922	{
AnnaBridge	167:e84263d55307	923	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
AnnaBridge	167:e84263d55307	924	}
AnnaBridge	167:e84263d55307	925
AnnaBridge	167:e84263d55307	926	/**
AnnaBridge	167:e84263d55307	927	* @brief Indicates whether the LPTIM operates in encoder mode.
AnnaBridge	167:e84263d55307	928	* @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
AnnaBridge	167:e84263d55307	929	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	930	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	931	*/
AnnaBridge	167:e84263d55307	932	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	933	{
AnnaBridge	167:e84263d55307	934	return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
AnnaBridge	167:e84263d55307	935	}
AnnaBridge	167:e84263d55307	936
AnnaBridge	167:e84263d55307	937	/**
AnnaBridge	167:e84263d55307	938	* @}
AnnaBridge	167:e84263d55307	939	*/
AnnaBridge	167:e84263d55307	940
AnnaBridge	167:e84263d55307	941	/** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
AnnaBridge	167:e84263d55307	942	* @{
AnnaBridge	167:e84263d55307	943	*/
AnnaBridge	167:e84263d55307	944
AnnaBridge	167:e84263d55307	945	/**
AnnaBridge	167:e84263d55307	946	* @brief Clear the compare match flag (CMPMCF)
AnnaBridge	167:e84263d55307	947	* @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
AnnaBridge	167:e84263d55307	948	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	949	* @retval None
AnnaBridge	167:e84263d55307	950	*/
AnnaBridge	167:e84263d55307	951	__STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	952	{
AnnaBridge	167:e84263d55307	953	SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
AnnaBridge	167:e84263d55307	954	}
AnnaBridge	167:e84263d55307	955
AnnaBridge	167:e84263d55307	956	/**
AnnaBridge	167:e84263d55307	957	* @brief Inform application whether a compare match interrupt has occurred.
AnnaBridge	167:e84263d55307	958	* @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
AnnaBridge	167:e84263d55307	959	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	960	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	961	*/
AnnaBridge	167:e84263d55307	962	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	963	{
AnnaBridge	167:e84263d55307	964	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
AnnaBridge	167:e84263d55307	965	}
AnnaBridge	167:e84263d55307	966
AnnaBridge	167:e84263d55307	967	/**
AnnaBridge	167:e84263d55307	968	* @brief Clear the autoreload match flag (ARRMCF)
AnnaBridge	167:e84263d55307	969	* @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
AnnaBridge	167:e84263d55307	970	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	971	* @retval None
AnnaBridge	167:e84263d55307	972	*/
AnnaBridge	167:e84263d55307	973	__STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	974	{
AnnaBridge	167:e84263d55307	975	SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
AnnaBridge	167:e84263d55307	976	}
AnnaBridge	167:e84263d55307	977
AnnaBridge	167:e84263d55307	978	/**
AnnaBridge	167:e84263d55307	979	* @brief Inform application whether a autoreload match interrupt has occured.
AnnaBridge	167:e84263d55307	980	* @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
AnnaBridge	167:e84263d55307	981	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	982	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	983	*/
AnnaBridge	167:e84263d55307	984	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	985	{
AnnaBridge	167:e84263d55307	986	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
AnnaBridge	167:e84263d55307	987	}
AnnaBridge	167:e84263d55307	988
AnnaBridge	167:e84263d55307	989	/**
AnnaBridge	167:e84263d55307	990	* @brief Clear the external trigger valid edge flag(EXTTRIGCF).
AnnaBridge	167:e84263d55307	991	* @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
AnnaBridge	167:e84263d55307	992	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	993	* @retval None
AnnaBridge	167:e84263d55307	994	*/
AnnaBridge	167:e84263d55307	995	__STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	996	{
AnnaBridge	167:e84263d55307	997	SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
AnnaBridge	167:e84263d55307	998	}
AnnaBridge	167:e84263d55307	999
AnnaBridge	167:e84263d55307	1000	/**
AnnaBridge	167:e84263d55307	1001	* @brief Inform application whether a valid edge on the selected external trigger input has occurred.
AnnaBridge	167:e84263d55307	1002	* @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
AnnaBridge	167:e84263d55307	1003	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1004	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1005	*/
AnnaBridge	167:e84263d55307	1006	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1007	{
AnnaBridge	167:e84263d55307	1008	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
AnnaBridge	167:e84263d55307	1009	}
AnnaBridge	167:e84263d55307	1010
AnnaBridge	167:e84263d55307	1011	/**
AnnaBridge	167:e84263d55307	1012	* @brief Clear the compare register update interrupt flag (CMPOKCF).
AnnaBridge	167:e84263d55307	1013	* @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
AnnaBridge	167:e84263d55307	1014	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1015	* @retval None
AnnaBridge	167:e84263d55307	1016	*/
AnnaBridge	167:e84263d55307	1017	__STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1018	{
AnnaBridge	167:e84263d55307	1019	SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
AnnaBridge	167:e84263d55307	1020	}
AnnaBridge	167:e84263d55307	1021
AnnaBridge	167:e84263d55307	1022	/**
AnnaBridge	167:e84263d55307	1023	* @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
AnnaBridge	167:e84263d55307	1024	* @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
AnnaBridge	167:e84263d55307	1025	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1026	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1027	*/
AnnaBridge	167:e84263d55307	1028	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1029	{
AnnaBridge	167:e84263d55307	1030	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
AnnaBridge	167:e84263d55307	1031	}
AnnaBridge	167:e84263d55307	1032
AnnaBridge	167:e84263d55307	1033	/**
AnnaBridge	167:e84263d55307	1034	* @brief Clear the autoreload register update interrupt flag (ARROKCF).
AnnaBridge	167:e84263d55307	1035	* @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
AnnaBridge	167:e84263d55307	1036	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1037	* @retval None
AnnaBridge	167:e84263d55307	1038	*/
AnnaBridge	167:e84263d55307	1039	__STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1040	{
AnnaBridge	167:e84263d55307	1041	SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
AnnaBridge	167:e84263d55307	1042	}
AnnaBridge	167:e84263d55307	1043
AnnaBridge	167:e84263d55307	1044	/**
AnnaBridge	167:e84263d55307	1045	* @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
AnnaBridge	167:e84263d55307	1046	* @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
AnnaBridge	167:e84263d55307	1047	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1048	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1049	*/
AnnaBridge	167:e84263d55307	1050	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1051	{
AnnaBridge	167:e84263d55307	1052	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
AnnaBridge	167:e84263d55307	1053	}
AnnaBridge	167:e84263d55307	1054
AnnaBridge	167:e84263d55307	1055	/**
AnnaBridge	167:e84263d55307	1056	* @brief Clear the counter direction change to up interrupt flag (UPCF).
AnnaBridge	167:e84263d55307	1057	* @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
AnnaBridge	167:e84263d55307	1058	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1059	* @retval None
AnnaBridge	167:e84263d55307	1060	*/
AnnaBridge	167:e84263d55307	1061	__STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1062	{
AnnaBridge	167:e84263d55307	1063	SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
AnnaBridge	167:e84263d55307	1064	}
AnnaBridge	167:e84263d55307	1065
AnnaBridge	167:e84263d55307	1066	/**
AnnaBridge	167:e84263d55307	1067	* @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
AnnaBridge	167:e84263d55307	1068	* @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
AnnaBridge	167:e84263d55307	1069	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1070	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1071	*/
AnnaBridge	167:e84263d55307	1072	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1073	{
AnnaBridge	167:e84263d55307	1074	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
AnnaBridge	167:e84263d55307	1075	}
AnnaBridge	167:e84263d55307	1076
AnnaBridge	167:e84263d55307	1077	/**
AnnaBridge	167:e84263d55307	1078	* @brief Clear the counter direction change to down interrupt flag (DOWNCF).
AnnaBridge	167:e84263d55307	1079	* @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
AnnaBridge	167:e84263d55307	1080	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1081	* @retval None
AnnaBridge	167:e84263d55307	1082	*/
AnnaBridge	167:e84263d55307	1083	__STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1084	{
AnnaBridge	167:e84263d55307	1085	SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
AnnaBridge	167:e84263d55307	1086	}
AnnaBridge	167:e84263d55307	1087
AnnaBridge	167:e84263d55307	1088	/**
AnnaBridge	167:e84263d55307	1089	* @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
AnnaBridge	167:e84263d55307	1090	* @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
AnnaBridge	167:e84263d55307	1091	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1092	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1093	*/
AnnaBridge	167:e84263d55307	1094	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1095	{
AnnaBridge	167:e84263d55307	1096	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
AnnaBridge	167:e84263d55307	1097	}
AnnaBridge	167:e84263d55307	1098
AnnaBridge	167:e84263d55307	1099	/**
AnnaBridge	167:e84263d55307	1100	* @}
AnnaBridge	167:e84263d55307	1101	*/
AnnaBridge	167:e84263d55307	1102
AnnaBridge	167:e84263d55307	1103	/** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
AnnaBridge	167:e84263d55307	1104	* @{
AnnaBridge	167:e84263d55307	1105	*/
AnnaBridge	167:e84263d55307	1106
AnnaBridge	167:e84263d55307	1107	/**
AnnaBridge	167:e84263d55307	1108	* @brief Enable compare match interrupt (CMPMIE).
AnnaBridge	167:e84263d55307	1109	* @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
AnnaBridge	167:e84263d55307	1110	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1111	* @retval None
AnnaBridge	167:e84263d55307	1112	*/
AnnaBridge	167:e84263d55307	1113	__STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1114	{
AnnaBridge	167:e84263d55307	1115	SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
AnnaBridge	167:e84263d55307	1116	}
AnnaBridge	167:e84263d55307	1117
AnnaBridge	167:e84263d55307	1118	/**
AnnaBridge	167:e84263d55307	1119	* @brief Disable compare match interrupt (CMPMIE).
AnnaBridge	167:e84263d55307	1120	* @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
AnnaBridge	167:e84263d55307	1121	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1122	* @retval None
AnnaBridge	167:e84263d55307	1123	*/
AnnaBridge	167:e84263d55307	1124	__STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1125	{
AnnaBridge	167:e84263d55307	1126	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
AnnaBridge	167:e84263d55307	1127	}
AnnaBridge	167:e84263d55307	1128
AnnaBridge	167:e84263d55307	1129	/**
AnnaBridge	167:e84263d55307	1130	* @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
AnnaBridge	167:e84263d55307	1131	* @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
AnnaBridge	167:e84263d55307	1132	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1133	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1134	*/
AnnaBridge	167:e84263d55307	1135	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1136	{
AnnaBridge	167:e84263d55307	1137	return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
AnnaBridge	167:e84263d55307	1138	}
AnnaBridge	167:e84263d55307	1139
AnnaBridge	167:e84263d55307	1140	/**
AnnaBridge	167:e84263d55307	1141	* @brief Enable autoreload match interrupt (ARRMIE).
AnnaBridge	167:e84263d55307	1142	* @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
AnnaBridge	167:e84263d55307	1143	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1144	* @retval None
AnnaBridge	167:e84263d55307	1145	*/
AnnaBridge	167:e84263d55307	1146	__STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1147	{
AnnaBridge	167:e84263d55307	1148	SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
AnnaBridge	167:e84263d55307	1149	}
AnnaBridge	167:e84263d55307	1150
AnnaBridge	167:e84263d55307	1151	/**
AnnaBridge	167:e84263d55307	1152	* @brief Disable autoreload match interrupt (ARRMIE).
AnnaBridge	167:e84263d55307	1153	* @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
AnnaBridge	167:e84263d55307	1154	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1155	* @retval None
AnnaBridge	167:e84263d55307	1156	*/
AnnaBridge	167:e84263d55307	1157	__STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1158	{
AnnaBridge	167:e84263d55307	1159	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
AnnaBridge	167:e84263d55307	1160	}
AnnaBridge	167:e84263d55307	1161
AnnaBridge	167:e84263d55307	1162	/**
AnnaBridge	167:e84263d55307	1163	* @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
AnnaBridge	167:e84263d55307	1164	* @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
AnnaBridge	167:e84263d55307	1165	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1166	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1167	*/
AnnaBridge	167:e84263d55307	1168	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1169	{
AnnaBridge	167:e84263d55307	1170	return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
AnnaBridge	167:e84263d55307	1171	}
AnnaBridge	167:e84263d55307	1172
AnnaBridge	167:e84263d55307	1173	/**
AnnaBridge	167:e84263d55307	1174	* @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
AnnaBridge	167:e84263d55307	1175	* @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
AnnaBridge	167:e84263d55307	1176	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1177	* @retval None
AnnaBridge	167:e84263d55307	1178	*/
AnnaBridge	167:e84263d55307	1179	__STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1180	{
AnnaBridge	167:e84263d55307	1181	SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
AnnaBridge	167:e84263d55307	1182	}
AnnaBridge	167:e84263d55307	1183
AnnaBridge	167:e84263d55307	1184	/**
AnnaBridge	167:e84263d55307	1185	* @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
AnnaBridge	167:e84263d55307	1186	* @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
AnnaBridge	167:e84263d55307	1187	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1188	* @retval None
AnnaBridge	167:e84263d55307	1189	*/
AnnaBridge	167:e84263d55307	1190	__STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1191	{
AnnaBridge	167:e84263d55307	1192	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
AnnaBridge	167:e84263d55307	1193	}
AnnaBridge	167:e84263d55307	1194
AnnaBridge	167:e84263d55307	1195	/**
AnnaBridge	167:e84263d55307	1196	* @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
AnnaBridge	167:e84263d55307	1197	* @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
AnnaBridge	167:e84263d55307	1198	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1199	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1200	*/
AnnaBridge	167:e84263d55307	1201	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1202	{
AnnaBridge	167:e84263d55307	1203	return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
AnnaBridge	167:e84263d55307	1204	}
AnnaBridge	167:e84263d55307	1205
AnnaBridge	167:e84263d55307	1206	/**
AnnaBridge	167:e84263d55307	1207	* @brief Enable compare register write completed interrupt (CMPOKIE).
AnnaBridge	167:e84263d55307	1208	* @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
AnnaBridge	167:e84263d55307	1209	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1210	* @retval None
AnnaBridge	167:e84263d55307	1211	*/
AnnaBridge	167:e84263d55307	1212	__STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1213	{
AnnaBridge	167:e84263d55307	1214	SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
AnnaBridge	167:e84263d55307	1215	}
AnnaBridge	167:e84263d55307	1216
AnnaBridge	167:e84263d55307	1217	/**
AnnaBridge	167:e84263d55307	1218	* @brief Disable compare register write completed interrupt (CMPOKIE).
AnnaBridge	167:e84263d55307	1219	* @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
AnnaBridge	167:e84263d55307	1220	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1221	* @retval None
AnnaBridge	167:e84263d55307	1222	*/
AnnaBridge	167:e84263d55307	1223	__STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1224	{
AnnaBridge	167:e84263d55307	1225	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
AnnaBridge	167:e84263d55307	1226	}
AnnaBridge	167:e84263d55307	1227
AnnaBridge	167:e84263d55307	1228	/**
AnnaBridge	167:e84263d55307	1229	* @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
AnnaBridge	167:e84263d55307	1230	* @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
AnnaBridge	167:e84263d55307	1231	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1232	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1233	*/
AnnaBridge	167:e84263d55307	1234	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1235	{
AnnaBridge	167:e84263d55307	1236	return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
AnnaBridge	167:e84263d55307	1237	}
AnnaBridge	167:e84263d55307	1238
AnnaBridge	167:e84263d55307	1239	/**
AnnaBridge	167:e84263d55307	1240	* @brief Enable autoreload register write completed interrupt (ARROKIE).
AnnaBridge	167:e84263d55307	1241	* @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
AnnaBridge	167:e84263d55307	1242	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1243	* @retval None
AnnaBridge	167:e84263d55307	1244	*/
AnnaBridge	167:e84263d55307	1245	__STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1246	{
AnnaBridge	167:e84263d55307	1247	SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
AnnaBridge	167:e84263d55307	1248	}
AnnaBridge	167:e84263d55307	1249
AnnaBridge	167:e84263d55307	1250	/**
AnnaBridge	167:e84263d55307	1251	* @brief Disable autoreload register write completed interrupt (ARROKIE).
AnnaBridge	167:e84263d55307	1252	* @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
AnnaBridge	167:e84263d55307	1253	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1254	* @retval None
AnnaBridge	167:e84263d55307	1255	*/
AnnaBridge	167:e84263d55307	1256	__STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1257	{
AnnaBridge	167:e84263d55307	1258	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
AnnaBridge	167:e84263d55307	1259	}
AnnaBridge	167:e84263d55307	1260
AnnaBridge	167:e84263d55307	1261	/**
AnnaBridge	167:e84263d55307	1262	* @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
AnnaBridge	167:e84263d55307	1263	* @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
AnnaBridge	167:e84263d55307	1264	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1265	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1266	*/
AnnaBridge	167:e84263d55307	1267	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1268	{
AnnaBridge	167:e84263d55307	1269	return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
AnnaBridge	167:e84263d55307	1270	}
AnnaBridge	167:e84263d55307	1271
AnnaBridge	167:e84263d55307	1272	/**
AnnaBridge	167:e84263d55307	1273	* @brief Enable direction change to up interrupt (UPIE).
AnnaBridge	167:e84263d55307	1274	* @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
AnnaBridge	167:e84263d55307	1275	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1276	* @retval None
AnnaBridge	167:e84263d55307	1277	*/
AnnaBridge	167:e84263d55307	1278	__STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1279	{
AnnaBridge	167:e84263d55307	1280	SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
AnnaBridge	167:e84263d55307	1281	}
AnnaBridge	167:e84263d55307	1282
AnnaBridge	167:e84263d55307	1283	/**
AnnaBridge	167:e84263d55307	1284	* @brief Disable direction change to up interrupt (UPIE).
AnnaBridge	167:e84263d55307	1285	* @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
AnnaBridge	167:e84263d55307	1286	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1287	* @retval None
AnnaBridge	167:e84263d55307	1288	*/
AnnaBridge	167:e84263d55307	1289	__STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1290	{
AnnaBridge	167:e84263d55307	1291	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
AnnaBridge	167:e84263d55307	1292	}
AnnaBridge	167:e84263d55307	1293
AnnaBridge	167:e84263d55307	1294	/**
AnnaBridge	167:e84263d55307	1295	* @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
AnnaBridge	167:e84263d55307	1296	* @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
AnnaBridge	167:e84263d55307	1297	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1298	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1299	*/
AnnaBridge	167:e84263d55307	1300	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1301	{
AnnaBridge	167:e84263d55307	1302	return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
AnnaBridge	167:e84263d55307	1303	}
AnnaBridge	167:e84263d55307	1304
AnnaBridge	167:e84263d55307	1305	/**
AnnaBridge	167:e84263d55307	1306	* @brief Enable direction change to down interrupt (DOWNIE).
AnnaBridge	167:e84263d55307	1307	* @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
AnnaBridge	167:e84263d55307	1308	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1309	* @retval None
AnnaBridge	167:e84263d55307	1310	*/
AnnaBridge	167:e84263d55307	1311	__STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1312	{
AnnaBridge	167:e84263d55307	1313	SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
AnnaBridge	167:e84263d55307	1314	}
AnnaBridge	167:e84263d55307	1315
AnnaBridge	167:e84263d55307	1316	/**
AnnaBridge	167:e84263d55307	1317	* @brief Disable direction change to down interrupt (DOWNIE).
AnnaBridge	167:e84263d55307	1318	* @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
AnnaBridge	167:e84263d55307	1319	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1320	* @retval None
AnnaBridge	167:e84263d55307	1321	*/
AnnaBridge	167:e84263d55307	1322	__STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1323	{
AnnaBridge	167:e84263d55307	1324	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
AnnaBridge	167:e84263d55307	1325	}
AnnaBridge	167:e84263d55307	1326
AnnaBridge	167:e84263d55307	1327	/**
AnnaBridge	167:e84263d55307	1328	* @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
AnnaBridge	167:e84263d55307	1329	* @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
AnnaBridge	167:e84263d55307	1330	* @param LPTIMx Low-Power Timer instance
AnnaBridge	167:e84263d55307	1331	* @retval State of bit (1 or 0).
AnnaBridge	167:e84263d55307	1332	*/
AnnaBridge	167:e84263d55307	1333	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	167:e84263d55307	1334	{
AnnaBridge	167:e84263d55307	1335	return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
AnnaBridge	167:e84263d55307	1336	}
AnnaBridge	167:e84263d55307	1337
AnnaBridge	167:e84263d55307	1338	/**
AnnaBridge	167:e84263d55307	1339	* @}
AnnaBridge	167:e84263d55307	1340	*/
AnnaBridge	167:e84263d55307	1341
AnnaBridge	167:e84263d55307	1342	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	167:e84263d55307	1343	/** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
AnnaBridge	167:e84263d55307	1344	* @{
AnnaBridge	167:e84263d55307	1345	*/
AnnaBridge	167:e84263d55307	1346
AnnaBridge	167:e84263d55307	1347	ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
AnnaBridge	167:e84263d55307	1348	void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
AnnaBridge	167:e84263d55307	1349	ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef LPTIMx, LL_LPTIM_InitTypeDef LPTIM_InitStruct);
AnnaBridge	167:e84263d55307	1350	/**
AnnaBridge	167:e84263d55307	1351	* @}
AnnaBridge	167:e84263d55307	1352	*/
AnnaBridge	167:e84263d55307	1353	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	167:e84263d55307	1354
AnnaBridge	167:e84263d55307	1355	/**
AnnaBridge	167:e84263d55307	1356	* @}
AnnaBridge	167:e84263d55307	1357	*/
AnnaBridge	167:e84263d55307	1358
AnnaBridge	167:e84263d55307	1359	/**
AnnaBridge	167:e84263d55307	1360	* @}
AnnaBridge	167:e84263d55307	1361	*/
AnnaBridge	167:e84263d55307	1362
AnnaBridge	167:e84263d55307	1363	#endif /* LPTIM1 */
AnnaBridge	167:e84263d55307	1364
AnnaBridge	167:e84263d55307	1365	/**
AnnaBridge	167:e84263d55307	1366	* @}
AnnaBridge	167:e84263d55307	1367	*/
AnnaBridge	167:e84263d55307	1368
AnnaBridge	167:e84263d55307	1369	#ifdef __cplusplus
AnnaBridge	167:e84263d55307	1370	}
AnnaBridge	167:e84263d55307	1371	#endif
AnnaBridge	167:e84263d55307	1372
AnnaBridge	167:e84263d55307	1373	#endif /* __STM32F4xx_LL_LPTIM_H */
AnnaBridge	167:e84263d55307	1374
AnnaBridge	167:e84263d55307	1375	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/