mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_rtc.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
182:a56a73fd2a6f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx_hal_rtc.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief RTC HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the Real Time Clock (RTC) peripheral:
<> 144:ef7eb2e8f9f7 8 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 9 * + RTC Time and Date functions
<> 144:ef7eb2e8f9f7 10 * + RTC Alarm functions
<> 144:ef7eb2e8f9f7 11 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 12 * + Peripheral State functions
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 @verbatim
<> 144:ef7eb2e8f9f7 15 ==============================================================================
<> 144:ef7eb2e8f9f7 16 ##### Backup Domain Operating Condition #####
<> 144:ef7eb2e8f9f7 17 ==============================================================================
<> 144:ef7eb2e8f9f7 18 [..] The real-time clock (RTC), the RTC backup registers, and the backup
<> 144:ef7eb2e8f9f7 19 SRAM (BKP SRAM) can be powered from the VBAT voltage when the main
<> 144:ef7eb2e8f9f7 20 VDD supply is powered off.
<> 144:ef7eb2e8f9f7 21 To retain the content of the RTC backup registers, backup SRAM, and supply
<> 144:ef7eb2e8f9f7 22 the RTC when VDD is turned off, VBAT pin can be connected to an optional
<> 144:ef7eb2e8f9f7 23 standby voltage supplied by a battery or by another source.
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 [..] To allow the RTC operating even when the main digital supply (VDD) is turned
<> 144:ef7eb2e8f9f7 26 off, the VBAT pin powers the following blocks:
<> 144:ef7eb2e8f9f7 27 (#) The RTC
<> 144:ef7eb2e8f9f7 28 (#) The LSE oscillator
<> 144:ef7eb2e8f9f7 29 (#) The backup SRAM when the low power backup regulator is enabled
<> 144:ef7eb2e8f9f7 30 (#) PC13 to PC15 I/Os, plus PI8 I/O (when available)
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 [..] When the backup domain is supplied by VDD (analog switch connected to VDD),
<> 144:ef7eb2e8f9f7 33 the following pins are available:
<> 144:ef7eb2e8f9f7 34 (#) PC14 and PC15 can be used as either GPIO or LSE pins
<> 144:ef7eb2e8f9f7 35 (#) PC13 can be used as a GPIO or as the RTC_AF1 pin
<> 144:ef7eb2e8f9f7 36 (#) PI8 can be used as a GPIO or as the RTC_AF2 pin
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 [..] When the backup domain is supplied by VBAT (analog switch connected to VBAT
<> 144:ef7eb2e8f9f7 39 because VDD is not present), the following pins are available:
<> 144:ef7eb2e8f9f7 40 (#) PC14 and PC15 can be used as LSE pins only
<> 144:ef7eb2e8f9f7 41 (#) PC13 can be used as the RTC_AF1 pin
<> 144:ef7eb2e8f9f7 42 (#) PI8 can be used as the RTC_AF2 pin
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 ##### Backup Domain Reset #####
<> 144:ef7eb2e8f9f7 45 ==================================================================
<> 144:ef7eb2e8f9f7 46 [..] The backup domain reset sets all RTC registers and the RCC_BDCR register
<> 144:ef7eb2e8f9f7 47 to their reset values. The BKPSRAM is not affected by this reset. The only
<> 144:ef7eb2e8f9f7 48 way to reset the BKPSRAM is through the Flash interface by requesting
<> 144:ef7eb2e8f9f7 49 a protection level change from 1 to 0.
<> 144:ef7eb2e8f9f7 50 [..] A backup domain reset is generated when one of the following events occurs:
<> 144:ef7eb2e8f9f7 51 (#) Software reset, triggered by setting the BDRST bit in the
<> 144:ef7eb2e8f9f7 52 RCC Backup domain control register (RCC_BDCR).
<> 144:ef7eb2e8f9f7 53 (#) VDD or VBAT power on, if both supplies have previously been powered off.
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 ##### Backup Domain Access #####
<> 144:ef7eb2e8f9f7 56 ==================================================================
<> 144:ef7eb2e8f9f7 57 [..] After reset, the backup domain (RTC registers, RTC backup data
<> 144:ef7eb2e8f9f7 58 registers and backup SRAM) is protected against possible unwanted write
<> 144:ef7eb2e8f9f7 59 accesses.
<> 144:ef7eb2e8f9f7 60 [..] To enable access to the RTC Domain and RTC registers, proceed as follows:
<> 144:ef7eb2e8f9f7 61 (+) Enable the Power Controller (PWR) APB1 interface clock using the
<> 144:ef7eb2e8f9f7 62 __HAL_RCC_PWR_CLK_ENABLE() function.
<> 144:ef7eb2e8f9f7 63 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
<> 144:ef7eb2e8f9f7 64 (+) Select the RTC clock source using the __HAL_RCC_RTC_CONFIG() function.
<> 144:ef7eb2e8f9f7 65 (+) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() function.
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 69 ==================================================================
<> 144:ef7eb2e8f9f7 70 [..]
<> 144:ef7eb2e8f9f7 71 (+) Enable the RTC domain access (see description in the section above).
<> 144:ef7eb2e8f9f7 72 (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
<> 144:ef7eb2e8f9f7 73 format using the HAL_RTC_Init() function.
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 *** Time and Date configuration ***
<> 144:ef7eb2e8f9f7 76 ===================================
<> 144:ef7eb2e8f9f7 77 [..]
<> 144:ef7eb2e8f9f7 78 (+) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime()
<> 144:ef7eb2e8f9f7 79 and HAL_RTC_SetDate() functions.
<> 144:ef7eb2e8f9f7 80 (+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions.
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 *** Alarm configuration ***
<> 144:ef7eb2e8f9f7 83 ===========================
<> 144:ef7eb2e8f9f7 84 [..]
<> 144:ef7eb2e8f9f7 85 (+) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function.
<> 144:ef7eb2e8f9f7 86 You can also configure the RTC Alarm with interrupt mode using the HAL_RTC_SetAlarm_IT() function.
<> 144:ef7eb2e8f9f7 87 (+) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function.
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 ##### RTC and low power modes #####
<> 144:ef7eb2e8f9f7 90 ==================================================================
<> 144:ef7eb2e8f9f7 91 [..] The MCU can be woken up from a low power mode by an RTC alternate
<> 144:ef7eb2e8f9f7 92 function.
<> 144:ef7eb2e8f9f7 93 [..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B),
<> 144:ef7eb2e8f9f7 94 RTC wake-up, RTC tamper event detection and RTC time stamp event detection.
<> 144:ef7eb2e8f9f7 95 These RTC alternate functions can wake up the system from the Stop and
<> 144:ef7eb2e8f9f7 96 Standby low power modes.
<> 144:ef7eb2e8f9f7 97 [..] The system can also wake up from low power modes without depending
<> 144:ef7eb2e8f9f7 98 on an external interrupt (Auto-wake-up mode), by using the RTC alarm
<> 144:ef7eb2e8f9f7 99 or the RTC wake-up events.
<> 144:ef7eb2e8f9f7 100 [..] The RTC provides a programmable time base for waking up from the
<> 144:ef7eb2e8f9f7 101 Stop or Standby mode at regular intervals.
<> 144:ef7eb2e8f9f7 102 Wake-up from STOP and STANDBY modes is possible only when the RTC clock source
<> 144:ef7eb2e8f9f7 103 is LSE or LSI.
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 @endverbatim
<> 144:ef7eb2e8f9f7 106 ******************************************************************************
<> 144:ef7eb2e8f9f7 107 * @attention
<> 144:ef7eb2e8f9f7 108 *
AnnaBridge 167:e84263d55307 109 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 110 *
<> 144:ef7eb2e8f9f7 111 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 112 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 113 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 114 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 115 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 116 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 117 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 118 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 119 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 120 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 121 *
<> 144:ef7eb2e8f9f7 122 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 123 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 124 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 125 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 126 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 127 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 128 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 129 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 130 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 131 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 132 *
<> 144:ef7eb2e8f9f7 133 ******************************************************************************
<> 144:ef7eb2e8f9f7 134 */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 137 #include "stm32f4xx_hal.h"
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 /** @addtogroup STM32F4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 140 * @{
<> 144:ef7eb2e8f9f7 141 */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 /** @defgroup RTC RTC
<> 144:ef7eb2e8f9f7 144 * @brief RTC HAL module driver
<> 144:ef7eb2e8f9f7 145 * @{
<> 144:ef7eb2e8f9f7 146 */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 #ifdef HAL_RTC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 151 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 152 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 153 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 154 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 155 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 /** @defgroup RTC_Exported_Functions RTC Exported Functions
<> 144:ef7eb2e8f9f7 158 * @{
<> 144:ef7eb2e8f9f7 159 */
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 162 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 163 *
<> 144:ef7eb2e8f9f7 164 @verbatim
<> 144:ef7eb2e8f9f7 165 ===============================================================================
<> 144:ef7eb2e8f9f7 166 ##### Initialization and de-initialization functions #####
<> 144:ef7eb2e8f9f7 167 ===============================================================================
<> 144:ef7eb2e8f9f7 168 [..] This section provides functions allowing to initialize and configure the
<> 144:ef7eb2e8f9f7 169 RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable
<> 144:ef7eb2e8f9f7 170 RTC registers Write protection, enter and exit the RTC initialization mode,
<> 144:ef7eb2e8f9f7 171 RTC registers synchronization check and reference clock detection enable.
<> 144:ef7eb2e8f9f7 172 (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base.
<> 144:ef7eb2e8f9f7 173 It is split into 2 programmable prescalers to minimize power consumption.
<> 144:ef7eb2e8f9f7 174 (++) A 7-bit asynchronous prescaler and a 13-bit synchronous prescaler.
<> 144:ef7eb2e8f9f7 175 (++) When both prescalers are used, it is recommended to configure the
<> 144:ef7eb2e8f9f7 176 asynchronous prescaler to a high value to minimize power consumption.
<> 144:ef7eb2e8f9f7 177 (#) All RTC registers are Write protected. Writing to the RTC registers
<> 144:ef7eb2e8f9f7 178 is enabled by writing a key into the Write Protection register, RTC_WPR.
<> 144:ef7eb2e8f9f7 179 (#) To configure the RTC Calendar, user application should enter
<> 144:ef7eb2e8f9f7 180 initialization mode. In this mode, the calendar counter is stopped
<> 144:ef7eb2e8f9f7 181 and its value can be updated. When the initialization sequence is
<> 144:ef7eb2e8f9f7 182 complete, the calendar restarts counting after 4 RTCCLK cycles.
<> 144:ef7eb2e8f9f7 183 (#) To read the calendar through the shadow registers after Calendar
<> 144:ef7eb2e8f9f7 184 initialization, calendar update or after wake-up from low power modes
<> 144:ef7eb2e8f9f7 185 the software must first clear the RSF flag. The software must then
<> 144:ef7eb2e8f9f7 186 wait until it is set again before reading the calendar, which means
<> 144:ef7eb2e8f9f7 187 that the calendar registers have been correctly copied into the
<> 144:ef7eb2e8f9f7 188 RTC_TR and RTC_DR shadow registers.The HAL_RTC_WaitForSynchro() function
<> 144:ef7eb2e8f9f7 189 implements the above software sequence (RSF clear and RSF check).
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 @endverbatim
<> 144:ef7eb2e8f9f7 192 * @{
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /**
<> 144:ef7eb2e8f9f7 196 * @brief Initializes the RTC peripheral
AnnaBridge 182:a56a73fd2a6f 197 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 198 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 199 * @retval HAL status
<> 144:ef7eb2e8f9f7 200 */
<> 144:ef7eb2e8f9f7 201 HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 202 {
<> 144:ef7eb2e8f9f7 203 /* Check the RTC peripheral state */
<> 144:ef7eb2e8f9f7 204 if(hrtc == NULL)
<> 144:ef7eb2e8f9f7 205 {
<> 144:ef7eb2e8f9f7 206 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 207 }
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /* Check the parameters */
<> 144:ef7eb2e8f9f7 210 assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat));
<> 144:ef7eb2e8f9f7 211 assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv));
<> 144:ef7eb2e8f9f7 212 assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv));
<> 144:ef7eb2e8f9f7 213 assert_param (IS_RTC_OUTPUT(hrtc->Init.OutPut));
<> 144:ef7eb2e8f9f7 214 assert_param (IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity));
<> 144:ef7eb2e8f9f7 215 assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType));
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 if(hrtc->State == HAL_RTC_STATE_RESET)
<> 144:ef7eb2e8f9f7 218 {
<> 144:ef7eb2e8f9f7 219 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 220 hrtc->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 221 /* Initialize RTC MSP */
<> 144:ef7eb2e8f9f7 222 HAL_RTC_MspInit(hrtc);
<> 144:ef7eb2e8f9f7 223 }
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /* Set RTC state */
<> 144:ef7eb2e8f9f7 226 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 229 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 232 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 233 {
<> 144:ef7eb2e8f9f7 234 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 235 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /* Set RTC state */
<> 144:ef7eb2e8f9f7 238 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 241 }
<> 144:ef7eb2e8f9f7 242 else
<> 144:ef7eb2e8f9f7 243 {
<> 144:ef7eb2e8f9f7 244 /* Clear RTC_CR FMT, OSEL and POL Bits */
<> 144:ef7eb2e8f9f7 245 hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL));
<> 144:ef7eb2e8f9f7 246 /* Set RTC_CR register */
<> 144:ef7eb2e8f9f7 247 hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /* Configure the RTC PRER */
<> 144:ef7eb2e8f9f7 250 hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
<> 144:ef7eb2e8f9f7 251 hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16U);
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 254 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
AnnaBridge 182:a56a73fd2a6f 255
AnnaBridge 182:a56a73fd2a6f 256 /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
AnnaBridge 182:a56a73fd2a6f 257 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
AnnaBridge 182:a56a73fd2a6f 258 {
AnnaBridge 182:a56a73fd2a6f 259 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
AnnaBridge 182:a56a73fd2a6f 260 {
AnnaBridge 182:a56a73fd2a6f 261 /* Enable the write protection for RTC registers */
AnnaBridge 182:a56a73fd2a6f 262 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
AnnaBridge 182:a56a73fd2a6f 263
AnnaBridge 182:a56a73fd2a6f 264 hrtc->State = HAL_RTC_STATE_ERROR;
AnnaBridge 182:a56a73fd2a6f 265
AnnaBridge 182:a56a73fd2a6f 266 return HAL_ERROR;
AnnaBridge 182:a56a73fd2a6f 267 }
AnnaBridge 182:a56a73fd2a6f 268 }
AnnaBridge 182:a56a73fd2a6f 269
<> 144:ef7eb2e8f9f7 270 hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_ALARMOUTTYPE;
<> 144:ef7eb2e8f9f7 271 hrtc->Instance->TAFCR |= (uint32_t)(hrtc->Init.OutPutType);
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 274 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 /* Set RTC state */
<> 144:ef7eb2e8f9f7 277 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 return HAL_OK;
<> 144:ef7eb2e8f9f7 280 }
<> 144:ef7eb2e8f9f7 281 }
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /**
<> 144:ef7eb2e8f9f7 284 * @brief DeInitializes the RTC peripheral
AnnaBridge 182:a56a73fd2a6f 285 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 286 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 287 * @note This function doesn't reset the RTC Backup Data registers.
<> 144:ef7eb2e8f9f7 288 * @retval HAL status
<> 144:ef7eb2e8f9f7 289 */
<> 144:ef7eb2e8f9f7 290 HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 291 {
<> 144:ef7eb2e8f9f7 292 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /* Set RTC state */
<> 144:ef7eb2e8f9f7 295 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 298 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 301 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 302 {
<> 144:ef7eb2e8f9f7 303 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 304 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /* Set RTC state */
<> 144:ef7eb2e8f9f7 307 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311 else
<> 144:ef7eb2e8f9f7 312 {
<> 144:ef7eb2e8f9f7 313 /* Reset TR, DR and CR registers */
AnnaBridge 167:e84263d55307 314 hrtc->Instance->TR = 0x00000000U;
AnnaBridge 167:e84263d55307 315 hrtc->Instance->DR = 0x00002101U;
<> 144:ef7eb2e8f9f7 316 /* Reset All CR bits except CR[2:0] */
AnnaBridge 167:e84263d55307 317 hrtc->Instance->CR &= 0x00000007U;
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /* Get tick */
<> 144:ef7eb2e8f9f7 320 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 /* Wait till WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 323 while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 324 {
<> 144:ef7eb2e8f9f7 325 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 326 {
<> 144:ef7eb2e8f9f7 327 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 328 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /* Set RTC state */
<> 144:ef7eb2e8f9f7 331 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 334 }
<> 144:ef7eb2e8f9f7 335 }
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /* Reset all RTC CR register bits */
AnnaBridge 167:e84263d55307 338 hrtc->Instance->CR &= 0x00000000U;
AnnaBridge 167:e84263d55307 339 hrtc->Instance->WUTR = 0x0000FFFFU;
AnnaBridge 167:e84263d55307 340 hrtc->Instance->PRER = 0x007F00FFU;
AnnaBridge 167:e84263d55307 341 hrtc->Instance->CALIBR = 0x00000000U;
AnnaBridge 167:e84263d55307 342 hrtc->Instance->ALRMAR = 0x00000000U;
AnnaBridge 167:e84263d55307 343 hrtc->Instance->ALRMBR = 0x00000000U;
AnnaBridge 167:e84263d55307 344 hrtc->Instance->SHIFTR = 0x00000000U;
AnnaBridge 167:e84263d55307 345 hrtc->Instance->CALR = 0x00000000U;
AnnaBridge 167:e84263d55307 346 hrtc->Instance->ALRMASSR = 0x00000000U;
AnnaBridge 167:e84263d55307 347 hrtc->Instance->ALRMBSSR = 0x00000000U;
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 /* Reset ISR register and exit initialization mode */
AnnaBridge 167:e84263d55307 350 hrtc->Instance->ISR = 0x00000000U;
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 /* Reset Tamper and alternate functions configuration register */
<> 144:ef7eb2e8f9f7 353 hrtc->Instance->TAFCR = 0x00000000U;
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 356 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 357 {
<> 144:ef7eb2e8f9f7 358 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 359 {
<> 144:ef7eb2e8f9f7 360 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 361 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 366 }
<> 144:ef7eb2e8f9f7 367 }
<> 144:ef7eb2e8f9f7 368 }
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 371 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /* De-Initialize RTC MSP */
<> 144:ef7eb2e8f9f7 374 HAL_RTC_MspDeInit(hrtc);
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 hrtc->State = HAL_RTC_STATE_RESET;
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /* Release Lock */
<> 144:ef7eb2e8f9f7 379 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 380
<> 144:ef7eb2e8f9f7 381 return HAL_OK;
<> 144:ef7eb2e8f9f7 382 }
<> 144:ef7eb2e8f9f7 383
<> 144:ef7eb2e8f9f7 384 /**
<> 144:ef7eb2e8f9f7 385 * @brief Initializes the RTC MSP.
AnnaBridge 182:a56a73fd2a6f 386 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 387 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 388 * @retval None
<> 144:ef7eb2e8f9f7 389 */
<> 144:ef7eb2e8f9f7 390 __weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 391 {
<> 144:ef7eb2e8f9f7 392 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 393 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 394 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 395 the HAL_RTC_MspInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 396 */
<> 144:ef7eb2e8f9f7 397 }
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 /**
<> 144:ef7eb2e8f9f7 400 * @brief DeInitializes the RTC MSP.
AnnaBridge 182:a56a73fd2a6f 401 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 402 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 403 * @retval None
<> 144:ef7eb2e8f9f7 404 */
<> 144:ef7eb2e8f9f7 405 __weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 406 {
<> 144:ef7eb2e8f9f7 407 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 408 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 409 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 410 the HAL_RTC_MspDeInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 411 */
<> 144:ef7eb2e8f9f7 412 }
<> 144:ef7eb2e8f9f7 413
<> 144:ef7eb2e8f9f7 414 /**
<> 144:ef7eb2e8f9f7 415 * @}
<> 144:ef7eb2e8f9f7 416 */
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418 /** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions
<> 144:ef7eb2e8f9f7 419 * @brief RTC Time and Date functions
<> 144:ef7eb2e8f9f7 420 *
<> 144:ef7eb2e8f9f7 421 @verbatim
<> 144:ef7eb2e8f9f7 422 ===============================================================================
<> 144:ef7eb2e8f9f7 423 ##### RTC Time and Date functions #####
<> 144:ef7eb2e8f9f7 424 ===============================================================================
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 [..] This section provides functions allowing to configure Time and Date features
<> 144:ef7eb2e8f9f7 427
<> 144:ef7eb2e8f9f7 428 @endverbatim
<> 144:ef7eb2e8f9f7 429 * @{
<> 144:ef7eb2e8f9f7 430 */
<> 144:ef7eb2e8f9f7 431
<> 144:ef7eb2e8f9f7 432 /**
<> 144:ef7eb2e8f9f7 433 * @brief Sets RTC current time.
AnnaBridge 182:a56a73fd2a6f 434 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 435 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 436 * @param sTime Pointer to Time structure
AnnaBridge 182:a56a73fd2a6f 437 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 438 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 439 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 440 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 441 * @retval HAL status
<> 144:ef7eb2e8f9f7 442 */
<> 144:ef7eb2e8f9f7 443 HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
<> 144:ef7eb2e8f9f7 444 {
<> 144:ef7eb2e8f9f7 445 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 /* Check the parameters */
<> 144:ef7eb2e8f9f7 448 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 449 assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving));
<> 144:ef7eb2e8f9f7 450 assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation));
<> 144:ef7eb2e8f9f7 451
<> 144:ef7eb2e8f9f7 452 /* Process Locked */
<> 144:ef7eb2e8f9f7 453 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 454
<> 144:ef7eb2e8f9f7 455 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 456
<> 144:ef7eb2e8f9f7 457 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 458 {
<> 144:ef7eb2e8f9f7 459 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 460 {
<> 144:ef7eb2e8f9f7 461 assert_param(IS_RTC_HOUR12(sTime->Hours));
<> 144:ef7eb2e8f9f7 462 assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
<> 144:ef7eb2e8f9f7 463 }
<> 144:ef7eb2e8f9f7 464 else
<> 144:ef7eb2e8f9f7 465 {
<> 144:ef7eb2e8f9f7 466 sTime->TimeFormat = 0x00U;
<> 144:ef7eb2e8f9f7 467 assert_param(IS_RTC_HOUR24(sTime->Hours));
<> 144:ef7eb2e8f9f7 468 }
<> 144:ef7eb2e8f9f7 469 assert_param(IS_RTC_MINUTES(sTime->Minutes));
<> 144:ef7eb2e8f9f7 470 assert_param(IS_RTC_SECONDS(sTime->Seconds));
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16U) | \
<> 144:ef7eb2e8f9f7 473 ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8U) | \
<> 144:ef7eb2e8f9f7 474 ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \
<> 144:ef7eb2e8f9f7 475 (((uint32_t)sTime->TimeFormat) << 16U));
<> 144:ef7eb2e8f9f7 476 }
<> 144:ef7eb2e8f9f7 477 else
<> 144:ef7eb2e8f9f7 478 {
<> 144:ef7eb2e8f9f7 479 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 480 {
<> 144:ef7eb2e8f9f7 481 tmpreg = RTC_Bcd2ToByte(sTime->Hours);
<> 144:ef7eb2e8f9f7 482 assert_param(IS_RTC_HOUR12(tmpreg));
<> 144:ef7eb2e8f9f7 483 assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
<> 144:ef7eb2e8f9f7 484 }
<> 144:ef7eb2e8f9f7 485 else
<> 144:ef7eb2e8f9f7 486 {
<> 144:ef7eb2e8f9f7 487 sTime->TimeFormat = 0x00U;
<> 144:ef7eb2e8f9f7 488 assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours)));
<> 144:ef7eb2e8f9f7 489 }
<> 144:ef7eb2e8f9f7 490 assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
<> 144:ef7eb2e8f9f7 491 assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
<> 144:ef7eb2e8f9f7 492 tmpreg = (((uint32_t)(sTime->Hours) << 16U) | \
<> 144:ef7eb2e8f9f7 493 ((uint32_t)(sTime->Minutes) << 8U) | \
<> 144:ef7eb2e8f9f7 494 ((uint32_t)sTime->Seconds) | \
<> 144:ef7eb2e8f9f7 495 ((uint32_t)(sTime->TimeFormat) << 16U));
<> 144:ef7eb2e8f9f7 496 }
<> 144:ef7eb2e8f9f7 497
<> 144:ef7eb2e8f9f7 498 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 499 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 500
<> 144:ef7eb2e8f9f7 501 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 502 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 503 {
<> 144:ef7eb2e8f9f7 504 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 505 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 /* Set RTC state */
<> 144:ef7eb2e8f9f7 508 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 509
<> 144:ef7eb2e8f9f7 510 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 511 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 512
<> 144:ef7eb2e8f9f7 513 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 514 }
<> 144:ef7eb2e8f9f7 515 else
<> 144:ef7eb2e8f9f7 516 {
<> 144:ef7eb2e8f9f7 517 /* Set the RTC_TR register */
<> 144:ef7eb2e8f9f7 518 hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 519
<> 144:ef7eb2e8f9f7 520 /* Clear the bits to be configured */
<> 144:ef7eb2e8f9f7 521 hrtc->Instance->CR &= (uint32_t)~RTC_CR_BCK;
<> 144:ef7eb2e8f9f7 522
<> 144:ef7eb2e8f9f7 523 /* Configure the RTC_CR register */
<> 144:ef7eb2e8f9f7 524 hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation);
<> 144:ef7eb2e8f9f7 525
<> 144:ef7eb2e8f9f7 526 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 527 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 528
<> 144:ef7eb2e8f9f7 529 /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 530 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 531 {
<> 144:ef7eb2e8f9f7 532 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 533 {
<> 144:ef7eb2e8f9f7 534 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 535 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 538
<> 144:ef7eb2e8f9f7 539 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 540 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 541
<> 144:ef7eb2e8f9f7 542 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 543 }
<> 144:ef7eb2e8f9f7 544 }
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 547 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 550
<> 144:ef7eb2e8f9f7 551 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 return HAL_OK;
<> 144:ef7eb2e8f9f7 554 }
<> 144:ef7eb2e8f9f7 555 }
<> 144:ef7eb2e8f9f7 556
<> 144:ef7eb2e8f9f7 557 /**
<> 144:ef7eb2e8f9f7 558 * @brief Gets RTC current time.
AnnaBridge 182:a56a73fd2a6f 559 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 560 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 561 * @param sTime Pointer to Time structure
AnnaBridge 182:a56a73fd2a6f 562 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 563 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 564 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 565 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 566 * @note You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds
<> 144:ef7eb2e8f9f7 567 * value in second fraction ratio with time unit following generic formula:
<> 144:ef7eb2e8f9f7 568 * Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
<> 144:ef7eb2e8f9f7 569 * This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS
<> 144:ef7eb2e8f9f7 570 * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
<> 144:ef7eb2e8f9f7 571 * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
<> 144:ef7eb2e8f9f7 572 * Reading RTC current time locks the values in calendar shadow registers until current date is read.
<> 144:ef7eb2e8f9f7 573 * @retval HAL status
<> 144:ef7eb2e8f9f7 574 */
<> 144:ef7eb2e8f9f7 575 HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
<> 144:ef7eb2e8f9f7 576 {
<> 144:ef7eb2e8f9f7 577 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 578
<> 144:ef7eb2e8f9f7 579 /* Check the parameters */
<> 144:ef7eb2e8f9f7 580 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 /* Get subseconds structure field from the corresponding register */
<> 144:ef7eb2e8f9f7 583 sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR);
<> 144:ef7eb2e8f9f7 584
<> 144:ef7eb2e8f9f7 585 /* Get SecondFraction structure field from the corresponding register field*/
<> 144:ef7eb2e8f9f7 586 sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S);
<> 144:ef7eb2e8f9f7 587
<> 144:ef7eb2e8f9f7 588 /* Get the TR register */
<> 144:ef7eb2e8f9f7 589 tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 590
<> 144:ef7eb2e8f9f7 591 /* Fill the structure fields with the read parameters */
<> 144:ef7eb2e8f9f7 592 sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
AnnaBridge 167:e84263d55307 593 sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U);
<> 144:ef7eb2e8f9f7 594 sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU));
<> 144:ef7eb2e8f9f7 595 sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16U);
<> 144:ef7eb2e8f9f7 596
<> 144:ef7eb2e8f9f7 597 /* Check the input parameters format */
<> 144:ef7eb2e8f9f7 598 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 599 {
<> 144:ef7eb2e8f9f7 600 /* Convert the time structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 601 sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours);
<> 144:ef7eb2e8f9f7 602 sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes);
<> 144:ef7eb2e8f9f7 603 sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds);
<> 144:ef7eb2e8f9f7 604 }
<> 144:ef7eb2e8f9f7 605
<> 144:ef7eb2e8f9f7 606 return HAL_OK;
<> 144:ef7eb2e8f9f7 607 }
<> 144:ef7eb2e8f9f7 608
<> 144:ef7eb2e8f9f7 609 /**
<> 144:ef7eb2e8f9f7 610 * @brief Sets RTC current date.
AnnaBridge 182:a56a73fd2a6f 611 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 612 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 613 * @param sDate Pointer to date structure
AnnaBridge 182:a56a73fd2a6f 614 * @param Format specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 615 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 616 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 617 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 618 * @retval HAL status
<> 144:ef7eb2e8f9f7 619 */
<> 144:ef7eb2e8f9f7 620 HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
<> 144:ef7eb2e8f9f7 621 {
<> 144:ef7eb2e8f9f7 622 uint32_t datetmpreg = 0U;
<> 144:ef7eb2e8f9f7 623
<> 144:ef7eb2e8f9f7 624 /* Check the parameters */
<> 144:ef7eb2e8f9f7 625 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 626
<> 144:ef7eb2e8f9f7 627 /* Process Locked */
<> 144:ef7eb2e8f9f7 628 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 629
<> 144:ef7eb2e8f9f7 630 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 631
<> 144:ef7eb2e8f9f7 632 if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U))
<> 144:ef7eb2e8f9f7 633 {
<> 144:ef7eb2e8f9f7 634 sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU);
<> 144:ef7eb2e8f9f7 635 }
<> 144:ef7eb2e8f9f7 636
<> 144:ef7eb2e8f9f7 637 assert_param(IS_RTC_WEEKDAY(sDate->WeekDay));
<> 144:ef7eb2e8f9f7 638
<> 144:ef7eb2e8f9f7 639 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 640 {
<> 144:ef7eb2e8f9f7 641 assert_param(IS_RTC_YEAR(sDate->Year));
<> 144:ef7eb2e8f9f7 642 assert_param(IS_RTC_MONTH(sDate->Month));
<> 144:ef7eb2e8f9f7 643 assert_param(IS_RTC_DATE(sDate->Date));
<> 144:ef7eb2e8f9f7 644
<> 144:ef7eb2e8f9f7 645 datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16U) | \
<> 144:ef7eb2e8f9f7 646 ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8U) | \
<> 144:ef7eb2e8f9f7 647 ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \
<> 144:ef7eb2e8f9f7 648 ((uint32_t)sDate->WeekDay << 13U));
<> 144:ef7eb2e8f9f7 649 }
<> 144:ef7eb2e8f9f7 650 else
<> 144:ef7eb2e8f9f7 651 {
<> 144:ef7eb2e8f9f7 652 assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year)));
<> 144:ef7eb2e8f9f7 653 assert_param(IS_RTC_MONTH(datetmpreg));
<> 144:ef7eb2e8f9f7 654 assert_param(IS_RTC_DATE(datetmpreg));
<> 144:ef7eb2e8f9f7 655
<> 144:ef7eb2e8f9f7 656 datetmpreg = ((((uint32_t)sDate->Year) << 16U) | \
<> 144:ef7eb2e8f9f7 657 (((uint32_t)sDate->Month) << 8U) | \
<> 144:ef7eb2e8f9f7 658 ((uint32_t)sDate->Date) | \
<> 144:ef7eb2e8f9f7 659 (((uint32_t)sDate->WeekDay) << 13U));
<> 144:ef7eb2e8f9f7 660 }
<> 144:ef7eb2e8f9f7 661
<> 144:ef7eb2e8f9f7 662 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 663 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 664
<> 144:ef7eb2e8f9f7 665 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 666 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 667 {
<> 144:ef7eb2e8f9f7 668 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 669 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 670
<> 144:ef7eb2e8f9f7 671 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 672 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 673
<> 144:ef7eb2e8f9f7 674 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 675 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 676
<> 144:ef7eb2e8f9f7 677 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 678 }
<> 144:ef7eb2e8f9f7 679 else
<> 144:ef7eb2e8f9f7 680 {
<> 144:ef7eb2e8f9f7 681 /* Set the RTC_DR register */
<> 144:ef7eb2e8f9f7 682 hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 683
<> 144:ef7eb2e8f9f7 684 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 685 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 686
<> 144:ef7eb2e8f9f7 687 /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 688 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 689 {
<> 144:ef7eb2e8f9f7 690 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 691 {
<> 144:ef7eb2e8f9f7 692 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 693 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 694
<> 144:ef7eb2e8f9f7 695 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 696
<> 144:ef7eb2e8f9f7 697 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 698 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 699
<> 144:ef7eb2e8f9f7 700 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 701 }
<> 144:ef7eb2e8f9f7 702 }
<> 144:ef7eb2e8f9f7 703
<> 144:ef7eb2e8f9f7 704 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 705 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 706
<> 144:ef7eb2e8f9f7 707 hrtc->State = HAL_RTC_STATE_READY ;
<> 144:ef7eb2e8f9f7 708
<> 144:ef7eb2e8f9f7 709 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 710 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 711
<> 144:ef7eb2e8f9f7 712 return HAL_OK;
<> 144:ef7eb2e8f9f7 713 }
<> 144:ef7eb2e8f9f7 714 }
<> 144:ef7eb2e8f9f7 715
<> 144:ef7eb2e8f9f7 716 /**
<> 144:ef7eb2e8f9f7 717 * @brief Gets RTC current date.
AnnaBridge 182:a56a73fd2a6f 718 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 719 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 720 * @param sDate Pointer to Date structure
AnnaBridge 182:a56a73fd2a6f 721 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 722 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 723 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 724 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 725 * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
<> 144:ef7eb2e8f9f7 726 * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
<> 144:ef7eb2e8f9f7 727 * Reading RTC current time locks the values in calendar shadow registers until Current date is read.
<> 144:ef7eb2e8f9f7 728 * @retval HAL status
<> 144:ef7eb2e8f9f7 729 */
<> 144:ef7eb2e8f9f7 730 HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
<> 144:ef7eb2e8f9f7 731 {
<> 144:ef7eb2e8f9f7 732 uint32_t datetmpreg = 0U;
<> 144:ef7eb2e8f9f7 733
<> 144:ef7eb2e8f9f7 734 /* Check the parameters */
<> 144:ef7eb2e8f9f7 735 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 736
<> 144:ef7eb2e8f9f7 737 /* Get the DR register */
<> 144:ef7eb2e8f9f7 738 datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 739
<> 144:ef7eb2e8f9f7 740 /* Fill the structure fields with the read parameters */
<> 144:ef7eb2e8f9f7 741 sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16U);
<> 144:ef7eb2e8f9f7 742 sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
<> 144:ef7eb2e8f9f7 743 sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU));
<> 144:ef7eb2e8f9f7 744 sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13U);
<> 144:ef7eb2e8f9f7 745
<> 144:ef7eb2e8f9f7 746 /* Check the input parameters format */
<> 144:ef7eb2e8f9f7 747 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 748 {
<> 144:ef7eb2e8f9f7 749 /* Convert the date structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 750 sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year);
<> 144:ef7eb2e8f9f7 751 sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month);
<> 144:ef7eb2e8f9f7 752 sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date);
<> 144:ef7eb2e8f9f7 753 }
<> 144:ef7eb2e8f9f7 754 return HAL_OK;
<> 144:ef7eb2e8f9f7 755 }
<> 144:ef7eb2e8f9f7 756
<> 144:ef7eb2e8f9f7 757 /**
<> 144:ef7eb2e8f9f7 758 * @}
<> 144:ef7eb2e8f9f7 759 */
<> 144:ef7eb2e8f9f7 760
<> 144:ef7eb2e8f9f7 761 /** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions
<> 144:ef7eb2e8f9f7 762 * @brief RTC Alarm functions
<> 144:ef7eb2e8f9f7 763 *
<> 144:ef7eb2e8f9f7 764 @verbatim
<> 144:ef7eb2e8f9f7 765 ===============================================================================
<> 144:ef7eb2e8f9f7 766 ##### RTC Alarm functions #####
<> 144:ef7eb2e8f9f7 767 ===============================================================================
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 [..] This section provides functions allowing to configure Alarm feature
<> 144:ef7eb2e8f9f7 770
<> 144:ef7eb2e8f9f7 771 @endverbatim
<> 144:ef7eb2e8f9f7 772 * @{
<> 144:ef7eb2e8f9f7 773 */
<> 144:ef7eb2e8f9f7 774 /**
<> 144:ef7eb2e8f9f7 775 * @brief Sets the specified RTC Alarm.
AnnaBridge 182:a56a73fd2a6f 776 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 777 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 778 * @param sAlarm Pointer to Alarm structure
AnnaBridge 182:a56a73fd2a6f 779 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 780 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 781 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 782 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 783 * @retval HAL status
<> 144:ef7eb2e8f9f7 784 */
<> 144:ef7eb2e8f9f7 785 HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
<> 144:ef7eb2e8f9f7 786 {
<> 144:ef7eb2e8f9f7 787 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 788 uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
<> 144:ef7eb2e8f9f7 789
<> 144:ef7eb2e8f9f7 790 /* Check the parameters */
<> 144:ef7eb2e8f9f7 791 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 792 assert_param(IS_RTC_ALARM(sAlarm->Alarm));
<> 144:ef7eb2e8f9f7 793 assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 794 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
<> 144:ef7eb2e8f9f7 795 assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
<> 144:ef7eb2e8f9f7 796 assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
<> 144:ef7eb2e8f9f7 797
<> 144:ef7eb2e8f9f7 798 /* Process Locked */
<> 144:ef7eb2e8f9f7 799 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 800
<> 144:ef7eb2e8f9f7 801 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 802
<> 144:ef7eb2e8f9f7 803 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 804 {
<> 144:ef7eb2e8f9f7 805 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 806 {
<> 144:ef7eb2e8f9f7 807 assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
<> 144:ef7eb2e8f9f7 808 assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<> 144:ef7eb2e8f9f7 809 }
<> 144:ef7eb2e8f9f7 810 else
<> 144:ef7eb2e8f9f7 811 {
<> 144:ef7eb2e8f9f7 812 sAlarm->AlarmTime.TimeFormat = 0x00U;
<> 144:ef7eb2e8f9f7 813 assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
<> 144:ef7eb2e8f9f7 814 }
<> 144:ef7eb2e8f9f7 815 assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
<> 144:ef7eb2e8f9f7 816 assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
<> 144:ef7eb2e8f9f7 817
<> 144:ef7eb2e8f9f7 818 if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<> 144:ef7eb2e8f9f7 819 {
<> 144:ef7eb2e8f9f7 820 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
<> 144:ef7eb2e8f9f7 821 }
<> 144:ef7eb2e8f9f7 822 else
<> 144:ef7eb2e8f9f7 823 {
<> 144:ef7eb2e8f9f7 824 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
<> 144:ef7eb2e8f9f7 825 }
<> 144:ef7eb2e8f9f7 826
<> 144:ef7eb2e8f9f7 827 tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
<> 144:ef7eb2e8f9f7 828 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
<> 144:ef7eb2e8f9f7 829 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
<> 144:ef7eb2e8f9f7 830 ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
<> 144:ef7eb2e8f9f7 831 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
<> 144:ef7eb2e8f9f7 832 ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
<> 144:ef7eb2e8f9f7 833 ((uint32_t)sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 834 }
<> 144:ef7eb2e8f9f7 835 else
<> 144:ef7eb2e8f9f7 836 {
<> 144:ef7eb2e8f9f7 837 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 838 {
<> 144:ef7eb2e8f9f7 839 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<> 144:ef7eb2e8f9f7 840 assert_param(IS_RTC_HOUR12(tmpreg));
<> 144:ef7eb2e8f9f7 841 assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<> 144:ef7eb2e8f9f7 842 }
<> 144:ef7eb2e8f9f7 843 else
<> 144:ef7eb2e8f9f7 844 {
<> 144:ef7eb2e8f9f7 845 sAlarm->AlarmTime.TimeFormat = 0x00U;
<> 144:ef7eb2e8f9f7 846 assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
<> 144:ef7eb2e8f9f7 847 }
<> 144:ef7eb2e8f9f7 848
<> 144:ef7eb2e8f9f7 849 assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
<> 144:ef7eb2e8f9f7 850 assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
<> 144:ef7eb2e8f9f7 851
<> 144:ef7eb2e8f9f7 852 if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<> 144:ef7eb2e8f9f7 853 {
<> 144:ef7eb2e8f9f7 854 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 855 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
<> 144:ef7eb2e8f9f7 856 }
<> 144:ef7eb2e8f9f7 857 else
<> 144:ef7eb2e8f9f7 858 {
<> 144:ef7eb2e8f9f7 859 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 860 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
<> 144:ef7eb2e8f9f7 861 }
<> 144:ef7eb2e8f9f7 862
<> 144:ef7eb2e8f9f7 863 tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
<> 144:ef7eb2e8f9f7 864 ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
<> 144:ef7eb2e8f9f7 865 ((uint32_t) sAlarm->AlarmTime.Seconds) | \
<> 144:ef7eb2e8f9f7 866 ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
<> 144:ef7eb2e8f9f7 867 ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
<> 144:ef7eb2e8f9f7 868 ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
<> 144:ef7eb2e8f9f7 869 ((uint32_t)sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 870 }
<> 144:ef7eb2e8f9f7 871
<> 144:ef7eb2e8f9f7 872 /* Configure the Alarm A or Alarm B Sub Second registers */
<> 144:ef7eb2e8f9f7 873 subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
<> 144:ef7eb2e8f9f7 874
<> 144:ef7eb2e8f9f7 875 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 876 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 877
<> 144:ef7eb2e8f9f7 878 /* Configure the Alarm register */
<> 144:ef7eb2e8f9f7 879 if(sAlarm->Alarm == RTC_ALARM_A)
<> 144:ef7eb2e8f9f7 880 {
<> 144:ef7eb2e8f9f7 881 /* Disable the Alarm A interrupt */
<> 144:ef7eb2e8f9f7 882 __HAL_RTC_ALARMA_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 883
<> 144:ef7eb2e8f9f7 884 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 885 __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
<> 144:ef7eb2e8f9f7 886
<> 144:ef7eb2e8f9f7 887 /* Get tick */
<> 144:ef7eb2e8f9f7 888 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 889
<> 144:ef7eb2e8f9f7 890 /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 891 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
<> 144:ef7eb2e8f9f7 892 {
<> 144:ef7eb2e8f9f7 893 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 894 {
<> 144:ef7eb2e8f9f7 895 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 896 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 897
<> 144:ef7eb2e8f9f7 898 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 899
<> 144:ef7eb2e8f9f7 900 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 901 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 902
<> 144:ef7eb2e8f9f7 903 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 904 }
<> 144:ef7eb2e8f9f7 905 }
<> 144:ef7eb2e8f9f7 906
<> 144:ef7eb2e8f9f7 907 hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 908 /* Configure the Alarm A Sub Second register */
<> 144:ef7eb2e8f9f7 909 hrtc->Instance->ALRMASSR = subsecondtmpreg;
<> 144:ef7eb2e8f9f7 910 /* Configure the Alarm state: Enable Alarm */
<> 144:ef7eb2e8f9f7 911 __HAL_RTC_ALARMA_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 912 }
<> 144:ef7eb2e8f9f7 913 else
<> 144:ef7eb2e8f9f7 914 {
<> 144:ef7eb2e8f9f7 915 /* Disable the Alarm B interrupt */
<> 144:ef7eb2e8f9f7 916 __HAL_RTC_ALARMB_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 917
<> 144:ef7eb2e8f9f7 918 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 919 __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
<> 144:ef7eb2e8f9f7 920
<> 144:ef7eb2e8f9f7 921 /* Get tick */
<> 144:ef7eb2e8f9f7 922 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 923
<> 144:ef7eb2e8f9f7 924 /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 925 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
<> 144:ef7eb2e8f9f7 926 {
<> 144:ef7eb2e8f9f7 927 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 928 {
<> 144:ef7eb2e8f9f7 929 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 930 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 931
<> 144:ef7eb2e8f9f7 932 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 933
<> 144:ef7eb2e8f9f7 934 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 935 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 936
<> 144:ef7eb2e8f9f7 937 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 938 }
<> 144:ef7eb2e8f9f7 939 }
<> 144:ef7eb2e8f9f7 940
<> 144:ef7eb2e8f9f7 941 hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 942 /* Configure the Alarm B Sub Second register */
<> 144:ef7eb2e8f9f7 943 hrtc->Instance->ALRMBSSR = subsecondtmpreg;
<> 144:ef7eb2e8f9f7 944 /* Configure the Alarm state: Enable Alarm */
<> 144:ef7eb2e8f9f7 945 __HAL_RTC_ALARMB_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 946 }
<> 144:ef7eb2e8f9f7 947
<> 144:ef7eb2e8f9f7 948 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 949 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 950
<> 144:ef7eb2e8f9f7 951 /* Change RTC state */
<> 144:ef7eb2e8f9f7 952 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 953
<> 144:ef7eb2e8f9f7 954 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 955 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 956
<> 144:ef7eb2e8f9f7 957 return HAL_OK;
<> 144:ef7eb2e8f9f7 958 }
<> 144:ef7eb2e8f9f7 959
<> 144:ef7eb2e8f9f7 960 /**
<> 144:ef7eb2e8f9f7 961 * @brief Sets the specified RTC Alarm with Interrupt
AnnaBridge 182:a56a73fd2a6f 962 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 963 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 964 * @param sAlarm Pointer to Alarm structure
AnnaBridge 182:a56a73fd2a6f 965 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 966 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 967 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 968 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 969 * @retval HAL status
<> 144:ef7eb2e8f9f7 970 */
<> 144:ef7eb2e8f9f7 971 HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
<> 144:ef7eb2e8f9f7 972 {
<> 144:ef7eb2e8f9f7 973 uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
<> 144:ef7eb2e8f9f7 974 __IO uint32_t count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U) ;
<> 144:ef7eb2e8f9f7 975
<> 144:ef7eb2e8f9f7 976 /* Check the parameters */
<> 144:ef7eb2e8f9f7 977 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 978 assert_param(IS_RTC_ALARM(sAlarm->Alarm));
<> 144:ef7eb2e8f9f7 979 assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 980 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
<> 144:ef7eb2e8f9f7 981 assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
<> 144:ef7eb2e8f9f7 982 assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
<> 144:ef7eb2e8f9f7 983
<> 144:ef7eb2e8f9f7 984 /* Process Locked */
<> 144:ef7eb2e8f9f7 985 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 986
<> 144:ef7eb2e8f9f7 987 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 988
<> 144:ef7eb2e8f9f7 989 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 990 {
<> 144:ef7eb2e8f9f7 991 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 992 {
<> 144:ef7eb2e8f9f7 993 assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
<> 144:ef7eb2e8f9f7 994 assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<> 144:ef7eb2e8f9f7 995 }
<> 144:ef7eb2e8f9f7 996 else
<> 144:ef7eb2e8f9f7 997 {
<> 144:ef7eb2e8f9f7 998 sAlarm->AlarmTime.TimeFormat = 0x00U;
<> 144:ef7eb2e8f9f7 999 assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
<> 144:ef7eb2e8f9f7 1000 }
<> 144:ef7eb2e8f9f7 1001 assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
<> 144:ef7eb2e8f9f7 1002 assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
<> 144:ef7eb2e8f9f7 1003
<> 144:ef7eb2e8f9f7 1004 if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<> 144:ef7eb2e8f9f7 1005 {
<> 144:ef7eb2e8f9f7 1006 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
<> 144:ef7eb2e8f9f7 1007 }
<> 144:ef7eb2e8f9f7 1008 else
<> 144:ef7eb2e8f9f7 1009 {
<> 144:ef7eb2e8f9f7 1010 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
<> 144:ef7eb2e8f9f7 1011 }
<> 144:ef7eb2e8f9f7 1012 tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
<> 144:ef7eb2e8f9f7 1013 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
<> 144:ef7eb2e8f9f7 1014 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
<> 144:ef7eb2e8f9f7 1015 ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
<> 144:ef7eb2e8f9f7 1016 ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
<> 144:ef7eb2e8f9f7 1017 ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
<> 144:ef7eb2e8f9f7 1018 ((uint32_t)sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 1019 }
<> 144:ef7eb2e8f9f7 1020 else
<> 144:ef7eb2e8f9f7 1021 {
<> 144:ef7eb2e8f9f7 1022 if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1023 {
<> 144:ef7eb2e8f9f7 1024 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<> 144:ef7eb2e8f9f7 1025 assert_param(IS_RTC_HOUR12(tmpreg));
<> 144:ef7eb2e8f9f7 1026 assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<> 144:ef7eb2e8f9f7 1027 }
<> 144:ef7eb2e8f9f7 1028 else
<> 144:ef7eb2e8f9f7 1029 {
<> 144:ef7eb2e8f9f7 1030 sAlarm->AlarmTime.TimeFormat = 0x00U;
<> 144:ef7eb2e8f9f7 1031 assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
<> 144:ef7eb2e8f9f7 1032 }
<> 144:ef7eb2e8f9f7 1033
<> 144:ef7eb2e8f9f7 1034 assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
<> 144:ef7eb2e8f9f7 1035 assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
<> 144:ef7eb2e8f9f7 1036
<> 144:ef7eb2e8f9f7 1037 if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<> 144:ef7eb2e8f9f7 1038 {
<> 144:ef7eb2e8f9f7 1039 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 1040 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
<> 144:ef7eb2e8f9f7 1041 }
<> 144:ef7eb2e8f9f7 1042 else
<> 144:ef7eb2e8f9f7 1043 {
<> 144:ef7eb2e8f9f7 1044 tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 1045 assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
<> 144:ef7eb2e8f9f7 1046 }
<> 144:ef7eb2e8f9f7 1047 tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
<> 144:ef7eb2e8f9f7 1048 ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
<> 144:ef7eb2e8f9f7 1049 ((uint32_t) sAlarm->AlarmTime.Seconds) | \
<> 144:ef7eb2e8f9f7 1050 ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
<> 144:ef7eb2e8f9f7 1051 ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
<> 144:ef7eb2e8f9f7 1052 ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
<> 144:ef7eb2e8f9f7 1053 ((uint32_t)sAlarm->AlarmMask));
<> 144:ef7eb2e8f9f7 1054 }
<> 144:ef7eb2e8f9f7 1055 /* Configure the Alarm A or Alarm B Sub Second registers */
<> 144:ef7eb2e8f9f7 1056 subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
<> 144:ef7eb2e8f9f7 1057
<> 144:ef7eb2e8f9f7 1058 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1059 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1060
<> 144:ef7eb2e8f9f7 1061 /* Configure the Alarm register */
<> 144:ef7eb2e8f9f7 1062 if(sAlarm->Alarm == RTC_ALARM_A)
<> 144:ef7eb2e8f9f7 1063 {
<> 144:ef7eb2e8f9f7 1064 /* Disable the Alarm A interrupt */
<> 144:ef7eb2e8f9f7 1065 __HAL_RTC_ALARMA_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1066
<> 144:ef7eb2e8f9f7 1067 /* Clear flag alarm A */
<> 144:ef7eb2e8f9f7 1068 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
<> 144:ef7eb2e8f9f7 1069
<> 144:ef7eb2e8f9f7 1070 /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1071 do
<> 144:ef7eb2e8f9f7 1072 {
AnnaBridge 167:e84263d55307 1073 if (count-- == 0U)
<> 144:ef7eb2e8f9f7 1074 {
<> 144:ef7eb2e8f9f7 1075 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1076 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1077
<> 144:ef7eb2e8f9f7 1078 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1079
<> 144:ef7eb2e8f9f7 1080 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1081 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1082
<> 144:ef7eb2e8f9f7 1083 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1084 }
<> 144:ef7eb2e8f9f7 1085 }
<> 144:ef7eb2e8f9f7 1086 while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET);
<> 144:ef7eb2e8f9f7 1087
<> 144:ef7eb2e8f9f7 1088 hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 1089 /* Configure the Alarm A Sub Second register */
<> 144:ef7eb2e8f9f7 1090 hrtc->Instance->ALRMASSR = subsecondtmpreg;
<> 144:ef7eb2e8f9f7 1091 /* Configure the Alarm state: Enable Alarm */
<> 144:ef7eb2e8f9f7 1092 __HAL_RTC_ALARMA_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1093 /* Configure the Alarm interrupt */
<> 144:ef7eb2e8f9f7 1094 __HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA);
<> 144:ef7eb2e8f9f7 1095 }
<> 144:ef7eb2e8f9f7 1096 else
<> 144:ef7eb2e8f9f7 1097 {
<> 144:ef7eb2e8f9f7 1098 /* Disable the Alarm B interrupt */
<> 144:ef7eb2e8f9f7 1099 __HAL_RTC_ALARMB_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1100
<> 144:ef7eb2e8f9f7 1101 /* Clear flag alarm B */
<> 144:ef7eb2e8f9f7 1102 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
<> 144:ef7eb2e8f9f7 1103
<> 144:ef7eb2e8f9f7 1104 /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1105 do
<> 144:ef7eb2e8f9f7 1106 {
AnnaBridge 167:e84263d55307 1107 if (count-- == 0U)
<> 144:ef7eb2e8f9f7 1108 {
<> 144:ef7eb2e8f9f7 1109 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1110 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1111
<> 144:ef7eb2e8f9f7 1112 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1113
<> 144:ef7eb2e8f9f7 1114 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1115 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1116
<> 144:ef7eb2e8f9f7 1117 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1118 }
<> 144:ef7eb2e8f9f7 1119 }
<> 144:ef7eb2e8f9f7 1120 while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET);
<> 144:ef7eb2e8f9f7 1121
<> 144:ef7eb2e8f9f7 1122 hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 1123 /* Configure the Alarm B Sub Second register */
<> 144:ef7eb2e8f9f7 1124 hrtc->Instance->ALRMBSSR = subsecondtmpreg;
<> 144:ef7eb2e8f9f7 1125 /* Configure the Alarm state: Enable Alarm */
<> 144:ef7eb2e8f9f7 1126 __HAL_RTC_ALARMB_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1127 /* Configure the Alarm interrupt */
<> 144:ef7eb2e8f9f7 1128 __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB);
<> 144:ef7eb2e8f9f7 1129 }
<> 144:ef7eb2e8f9f7 1130
<> 144:ef7eb2e8f9f7 1131 /* RTC Alarm Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 1132 __HAL_RTC_ALARM_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 1133
<> 144:ef7eb2e8f9f7 1134 EXTI->RTSR |= RTC_EXTI_LINE_ALARM_EVENT;
<> 144:ef7eb2e8f9f7 1135
<> 144:ef7eb2e8f9f7 1136 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1137 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1138
<> 144:ef7eb2e8f9f7 1139 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1140
<> 144:ef7eb2e8f9f7 1141 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1142 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1143
<> 144:ef7eb2e8f9f7 1144 return HAL_OK;
<> 144:ef7eb2e8f9f7 1145 }
<> 144:ef7eb2e8f9f7 1146
<> 144:ef7eb2e8f9f7 1147 /**
<> 144:ef7eb2e8f9f7 1148 * @brief Deactivate the specified RTC Alarm
AnnaBridge 182:a56a73fd2a6f 1149 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1150 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1151 * @param Alarm Specifies the Alarm.
<> 144:ef7eb2e8f9f7 1152 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1153 * @arg RTC_ALARM_A: AlarmA
<> 144:ef7eb2e8f9f7 1154 * @arg RTC_ALARM_B: AlarmB
<> 144:ef7eb2e8f9f7 1155 * @retval HAL status
<> 144:ef7eb2e8f9f7 1156 */
<> 144:ef7eb2e8f9f7 1157 HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm)
<> 144:ef7eb2e8f9f7 1158 {
<> 144:ef7eb2e8f9f7 1159 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1160
<> 144:ef7eb2e8f9f7 1161 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1162 assert_param(IS_RTC_ALARM(Alarm));
<> 144:ef7eb2e8f9f7 1163
<> 144:ef7eb2e8f9f7 1164 /* Process Locked */
<> 144:ef7eb2e8f9f7 1165 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1166
<> 144:ef7eb2e8f9f7 1167 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1168
<> 144:ef7eb2e8f9f7 1169 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1170 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1171
<> 144:ef7eb2e8f9f7 1172 if(Alarm == RTC_ALARM_A)
<> 144:ef7eb2e8f9f7 1173 {
<> 144:ef7eb2e8f9f7 1174 /* AlarmA */
<> 144:ef7eb2e8f9f7 1175 __HAL_RTC_ALARMA_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1176
<> 144:ef7eb2e8f9f7 1177 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 1178 __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
<> 144:ef7eb2e8f9f7 1179
<> 144:ef7eb2e8f9f7 1180 /* Get tick */
<> 144:ef7eb2e8f9f7 1181 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1182
<> 144:ef7eb2e8f9f7 1183 /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1184 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
<> 144:ef7eb2e8f9f7 1185 {
<> 144:ef7eb2e8f9f7 1186 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1187 {
<> 144:ef7eb2e8f9f7 1188 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1189 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1190
<> 144:ef7eb2e8f9f7 1191 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1192
<> 144:ef7eb2e8f9f7 1193 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1194 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1195
<> 144:ef7eb2e8f9f7 1196 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1197 }
<> 144:ef7eb2e8f9f7 1198 }
<> 144:ef7eb2e8f9f7 1199 }
<> 144:ef7eb2e8f9f7 1200 else
<> 144:ef7eb2e8f9f7 1201 {
<> 144:ef7eb2e8f9f7 1202 /* AlarmB */
<> 144:ef7eb2e8f9f7 1203 __HAL_RTC_ALARMB_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1204
<> 144:ef7eb2e8f9f7 1205 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 1206 __HAL_RTC_ALARM_DISABLE_IT(hrtc,RTC_IT_ALRB);
<> 144:ef7eb2e8f9f7 1207
<> 144:ef7eb2e8f9f7 1208 /* Get tick */
<> 144:ef7eb2e8f9f7 1209 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1210
<> 144:ef7eb2e8f9f7 1211 /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1212 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
<> 144:ef7eb2e8f9f7 1213 {
<> 144:ef7eb2e8f9f7 1214 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1215 {
<> 144:ef7eb2e8f9f7 1216 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1217 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1218
<> 144:ef7eb2e8f9f7 1219 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1220
<> 144:ef7eb2e8f9f7 1221 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1222 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1223
<> 144:ef7eb2e8f9f7 1224 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1225 }
<> 144:ef7eb2e8f9f7 1226 }
<> 144:ef7eb2e8f9f7 1227 }
<> 144:ef7eb2e8f9f7 1228 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1229 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1230
<> 144:ef7eb2e8f9f7 1231 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1232
<> 144:ef7eb2e8f9f7 1233 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1234 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1235
<> 144:ef7eb2e8f9f7 1236 return HAL_OK;
<> 144:ef7eb2e8f9f7 1237 }
<> 144:ef7eb2e8f9f7 1238
<> 144:ef7eb2e8f9f7 1239 /**
<> 144:ef7eb2e8f9f7 1240 * @brief Gets the RTC Alarm value and masks.
AnnaBridge 182:a56a73fd2a6f 1241 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1242 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1243 * @param sAlarm Pointer to Date structure
AnnaBridge 182:a56a73fd2a6f 1244 * @param Alarm Specifies the Alarm.
<> 144:ef7eb2e8f9f7 1245 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1246 * @arg RTC_ALARM_A: AlarmA
<> 144:ef7eb2e8f9f7 1247 * @arg RTC_ALARM_B: AlarmB
AnnaBridge 182:a56a73fd2a6f 1248 * @param Format Specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 1249 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1250 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 1251 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 1252 * @retval HAL status
<> 144:ef7eb2e8f9f7 1253 */
<> 144:ef7eb2e8f9f7 1254 HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format)
<> 144:ef7eb2e8f9f7 1255 {
<> 144:ef7eb2e8f9f7 1256 uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
<> 144:ef7eb2e8f9f7 1257
<> 144:ef7eb2e8f9f7 1258 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1259 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 1260 assert_param(IS_RTC_ALARM(Alarm));
<> 144:ef7eb2e8f9f7 1261
<> 144:ef7eb2e8f9f7 1262 if(Alarm == RTC_ALARM_A)
<> 144:ef7eb2e8f9f7 1263 {
<> 144:ef7eb2e8f9f7 1264 /* AlarmA */
<> 144:ef7eb2e8f9f7 1265 sAlarm->Alarm = RTC_ALARM_A;
<> 144:ef7eb2e8f9f7 1266
<> 144:ef7eb2e8f9f7 1267 tmpreg = (uint32_t)(hrtc->Instance->ALRMAR);
<> 144:ef7eb2e8f9f7 1268 subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS);
<> 144:ef7eb2e8f9f7 1269 }
<> 144:ef7eb2e8f9f7 1270 else
<> 144:ef7eb2e8f9f7 1271 {
<> 144:ef7eb2e8f9f7 1272 sAlarm->Alarm = RTC_ALARM_B;
<> 144:ef7eb2e8f9f7 1273
<> 144:ef7eb2e8f9f7 1274 tmpreg = (uint32_t)(hrtc->Instance->ALRMBR);
<> 144:ef7eb2e8f9f7 1275 subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS);
<> 144:ef7eb2e8f9f7 1276 }
<> 144:ef7eb2e8f9f7 1277
<> 144:ef7eb2e8f9f7 1278 /* Fill the structure with the read parameters */
<> 144:ef7eb2e8f9f7 1279 sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16U);
<> 144:ef7eb2e8f9f7 1280 sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8U);
<> 144:ef7eb2e8f9f7 1281 sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU));
<> 144:ef7eb2e8f9f7 1282 sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16U);
<> 144:ef7eb2e8f9f7 1283 sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg;
<> 144:ef7eb2e8f9f7 1284 sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24U);
<> 144:ef7eb2e8f9f7 1285 sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL);
<> 144:ef7eb2e8f9f7 1286 sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL);
<> 144:ef7eb2e8f9f7 1287
<> 144:ef7eb2e8f9f7 1288 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 1289 {
<> 144:ef7eb2e8f9f7 1290 sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<> 144:ef7eb2e8f9f7 1291 sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes);
<> 144:ef7eb2e8f9f7 1292 sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds);
<> 144:ef7eb2e8f9f7 1293 sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<> 144:ef7eb2e8f9f7 1294 }
<> 144:ef7eb2e8f9f7 1295
<> 144:ef7eb2e8f9f7 1296 return HAL_OK;
<> 144:ef7eb2e8f9f7 1297 }
<> 144:ef7eb2e8f9f7 1298
<> 144:ef7eb2e8f9f7 1299 /**
<> 144:ef7eb2e8f9f7 1300 * @brief This function handles Alarm interrupt request.
AnnaBridge 182:a56a73fd2a6f 1301 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1302 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1303 * @retval None
<> 144:ef7eb2e8f9f7 1304 */
<> 144:ef7eb2e8f9f7 1305 void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1306 {
<> 144:ef7eb2e8f9f7 1307 if(__HAL_RTC_ALARM_GET_IT(hrtc, RTC_IT_ALRA))
<> 144:ef7eb2e8f9f7 1308 {
<> 144:ef7eb2e8f9f7 1309 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 1310 if((uint32_t)(hrtc->Instance->CR & RTC_IT_ALRA) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1311 {
<> 144:ef7eb2e8f9f7 1312 /* AlarmA callback */
<> 144:ef7eb2e8f9f7 1313 HAL_RTC_AlarmAEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 1314
<> 144:ef7eb2e8f9f7 1315 /* Clear the Alarm interrupt pending bit */
<> 144:ef7eb2e8f9f7 1316 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc,RTC_FLAG_ALRAF);
<> 144:ef7eb2e8f9f7 1317 }
<> 144:ef7eb2e8f9f7 1318 }
<> 144:ef7eb2e8f9f7 1319
<> 144:ef7eb2e8f9f7 1320 if(__HAL_RTC_ALARM_GET_IT(hrtc, RTC_IT_ALRB))
<> 144:ef7eb2e8f9f7 1321 {
<> 144:ef7eb2e8f9f7 1322 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 1323 if((uint32_t)(hrtc->Instance->CR & RTC_IT_ALRB) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1324 {
<> 144:ef7eb2e8f9f7 1325 /* AlarmB callback */
<> 144:ef7eb2e8f9f7 1326 HAL_RTCEx_AlarmBEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 1327
<> 144:ef7eb2e8f9f7 1328 /* Clear the Alarm interrupt pending bit */
<> 144:ef7eb2e8f9f7 1329 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc,RTC_FLAG_ALRBF);
<> 144:ef7eb2e8f9f7 1330 }
<> 144:ef7eb2e8f9f7 1331 }
<> 144:ef7eb2e8f9f7 1332
<> 144:ef7eb2e8f9f7 1333 /* Clear the EXTI's line Flag for RTC Alarm */
<> 144:ef7eb2e8f9f7 1334 __HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 1335
<> 144:ef7eb2e8f9f7 1336 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1337 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1338 }
<> 144:ef7eb2e8f9f7 1339
<> 144:ef7eb2e8f9f7 1340 /**
<> 144:ef7eb2e8f9f7 1341 * @brief Alarm A callback.
AnnaBridge 182:a56a73fd2a6f 1342 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1343 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1344 * @retval None
<> 144:ef7eb2e8f9f7 1345 */
<> 144:ef7eb2e8f9f7 1346 __weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1347 {
<> 144:ef7eb2e8f9f7 1348 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1349 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 1350 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1351 the HAL_RTC_AlarmAEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1352 */
<> 144:ef7eb2e8f9f7 1353 }
<> 144:ef7eb2e8f9f7 1354
<> 144:ef7eb2e8f9f7 1355 /**
<> 144:ef7eb2e8f9f7 1356 * @brief This function handles AlarmA Polling request.
AnnaBridge 182:a56a73fd2a6f 1357 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1358 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1359 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 1360 * @retval HAL status
<> 144:ef7eb2e8f9f7 1361 */
<> 144:ef7eb2e8f9f7 1362 HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1363 {
<> 144:ef7eb2e8f9f7 1364 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1365
<> 144:ef7eb2e8f9f7 1366 /* Get tick */
<> 144:ef7eb2e8f9f7 1367 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1368
<> 144:ef7eb2e8f9f7 1369 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET)
<> 144:ef7eb2e8f9f7 1370 {
<> 144:ef7eb2e8f9f7 1371 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1372 {
<> 144:ef7eb2e8f9f7 1373 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1374 {
<> 144:ef7eb2e8f9f7 1375 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1376 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1377 }
<> 144:ef7eb2e8f9f7 1378 }
<> 144:ef7eb2e8f9f7 1379 }
<> 144:ef7eb2e8f9f7 1380
<> 144:ef7eb2e8f9f7 1381 /* Clear the Alarm interrupt pending bit */
<> 144:ef7eb2e8f9f7 1382 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
<> 144:ef7eb2e8f9f7 1383
<> 144:ef7eb2e8f9f7 1384 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1385 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1386
<> 144:ef7eb2e8f9f7 1387 return HAL_OK;
<> 144:ef7eb2e8f9f7 1388 }
<> 144:ef7eb2e8f9f7 1389
<> 144:ef7eb2e8f9f7 1390 /**
<> 144:ef7eb2e8f9f7 1391 * @}
<> 144:ef7eb2e8f9f7 1392 */
<> 144:ef7eb2e8f9f7 1393
<> 144:ef7eb2e8f9f7 1394 /** @defgroup RTC_Exported_Functions_Group4 Peripheral Control functions
<> 144:ef7eb2e8f9f7 1395 * @brief Peripheral Control functions
<> 144:ef7eb2e8f9f7 1396 *
<> 144:ef7eb2e8f9f7 1397 @verbatim
<> 144:ef7eb2e8f9f7 1398 ===============================================================================
<> 144:ef7eb2e8f9f7 1399 ##### Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 1400 ===============================================================================
<> 144:ef7eb2e8f9f7 1401 [..]
<> 144:ef7eb2e8f9f7 1402 This subsection provides functions allowing to
<> 144:ef7eb2e8f9f7 1403 (+) Wait for RTC Time and Date Synchronization
<> 144:ef7eb2e8f9f7 1404
<> 144:ef7eb2e8f9f7 1405 @endverbatim
<> 144:ef7eb2e8f9f7 1406 * @{
<> 144:ef7eb2e8f9f7 1407 */
<> 144:ef7eb2e8f9f7 1408
<> 144:ef7eb2e8f9f7 1409 /**
<> 144:ef7eb2e8f9f7 1410 * @brief Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are
<> 144:ef7eb2e8f9f7 1411 * synchronized with RTC APB clock.
<> 144:ef7eb2e8f9f7 1412 * @note The RTC Resynchronization mode is write protected, use the
<> 144:ef7eb2e8f9f7 1413 * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
<> 144:ef7eb2e8f9f7 1414 * @note To read the calendar through the shadow registers after Calendar
<> 144:ef7eb2e8f9f7 1415 * initialization, calendar update or after wake-up from low power modes
<> 144:ef7eb2e8f9f7 1416 * the software must first clear the RSF flag.
<> 144:ef7eb2e8f9f7 1417 * The software must then wait until it is set again before reading
<> 144:ef7eb2e8f9f7 1418 * the calendar, which means that the calendar registers have been
<> 144:ef7eb2e8f9f7 1419 * correctly copied into the RTC_TR and RTC_DR shadow registers.
AnnaBridge 182:a56a73fd2a6f 1420 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1421 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1422 * @retval HAL status
<> 144:ef7eb2e8f9f7 1423 */
<> 144:ef7eb2e8f9f7 1424 HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1425 {
<> 144:ef7eb2e8f9f7 1426 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1427
<> 144:ef7eb2e8f9f7 1428 /* Clear RSF flag */
<> 144:ef7eb2e8f9f7 1429 hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
<> 144:ef7eb2e8f9f7 1430
<> 144:ef7eb2e8f9f7 1431 /* Get tick */
<> 144:ef7eb2e8f9f7 1432 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1433
<> 144:ef7eb2e8f9f7 1434 /* Wait the registers to be synchronised */
<> 144:ef7eb2e8f9f7 1435 while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1436 {
<> 144:ef7eb2e8f9f7 1437 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1438 {
<> 144:ef7eb2e8f9f7 1439 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1440 }
<> 144:ef7eb2e8f9f7 1441 }
<> 144:ef7eb2e8f9f7 1442
<> 144:ef7eb2e8f9f7 1443 return HAL_OK;
<> 144:ef7eb2e8f9f7 1444 }
<> 144:ef7eb2e8f9f7 1445
<> 144:ef7eb2e8f9f7 1446 /**
<> 144:ef7eb2e8f9f7 1447 * @}
<> 144:ef7eb2e8f9f7 1448 */
<> 144:ef7eb2e8f9f7 1449
<> 144:ef7eb2e8f9f7 1450 /** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions
<> 144:ef7eb2e8f9f7 1451 * @brief Peripheral State functions
<> 144:ef7eb2e8f9f7 1452 *
<> 144:ef7eb2e8f9f7 1453 @verbatim
<> 144:ef7eb2e8f9f7 1454 ===============================================================================
<> 144:ef7eb2e8f9f7 1455 ##### Peripheral State functions #####
<> 144:ef7eb2e8f9f7 1456 ===============================================================================
<> 144:ef7eb2e8f9f7 1457 [..]
<> 144:ef7eb2e8f9f7 1458 This subsection provides functions allowing to
<> 144:ef7eb2e8f9f7 1459 (+) Get RTC state
<> 144:ef7eb2e8f9f7 1460
<> 144:ef7eb2e8f9f7 1461 @endverbatim
<> 144:ef7eb2e8f9f7 1462 * @{
<> 144:ef7eb2e8f9f7 1463 */
<> 144:ef7eb2e8f9f7 1464 /**
<> 144:ef7eb2e8f9f7 1465 * @brief Returns the RTC state.
AnnaBridge 182:a56a73fd2a6f 1466 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1467 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1468 * @retval HAL state
<> 144:ef7eb2e8f9f7 1469 */
<> 144:ef7eb2e8f9f7 1470 HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1471 {
<> 144:ef7eb2e8f9f7 1472 return hrtc->State;
<> 144:ef7eb2e8f9f7 1473 }
<> 144:ef7eb2e8f9f7 1474
<> 144:ef7eb2e8f9f7 1475 /**
<> 144:ef7eb2e8f9f7 1476 * @}
<> 144:ef7eb2e8f9f7 1477 */
<> 144:ef7eb2e8f9f7 1478
<> 144:ef7eb2e8f9f7 1479 /**
<> 144:ef7eb2e8f9f7 1480 * @brief Enters the RTC Initialization mode.
<> 144:ef7eb2e8f9f7 1481 * @note The RTC Initialization mode is write protected, use the
<> 144:ef7eb2e8f9f7 1482 * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
AnnaBridge 182:a56a73fd2a6f 1483 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1484 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1485 * @retval HAL status
<> 144:ef7eb2e8f9f7 1486 */
<> 144:ef7eb2e8f9f7 1487 HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1488 {
<> 144:ef7eb2e8f9f7 1489 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1490
<> 144:ef7eb2e8f9f7 1491 /* Check if the Initialization mode is set */
<> 144:ef7eb2e8f9f7 1492 if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1493 {
<> 144:ef7eb2e8f9f7 1494 /* Set the Initialization mode */
<> 144:ef7eb2e8f9f7 1495 hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
<> 144:ef7eb2e8f9f7 1496
<> 144:ef7eb2e8f9f7 1497 /* Get tick */
<> 144:ef7eb2e8f9f7 1498 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1499
<> 144:ef7eb2e8f9f7 1500 /* Wait till RTC is in INIT state and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1501 while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1502 {
<> 144:ef7eb2e8f9f7 1503 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1504 {
<> 144:ef7eb2e8f9f7 1505 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1506 }
<> 144:ef7eb2e8f9f7 1507 }
<> 144:ef7eb2e8f9f7 1508 }
<> 144:ef7eb2e8f9f7 1509
<> 144:ef7eb2e8f9f7 1510 return HAL_OK;
<> 144:ef7eb2e8f9f7 1511 }
<> 144:ef7eb2e8f9f7 1512
<> 144:ef7eb2e8f9f7 1513
<> 144:ef7eb2e8f9f7 1514 /**
<> 144:ef7eb2e8f9f7 1515 * @brief Converts a 2 digit decimal to BCD format.
AnnaBridge 182:a56a73fd2a6f 1516 * @param Value Byte to be converted
<> 144:ef7eb2e8f9f7 1517 * @retval Converted byte
<> 144:ef7eb2e8f9f7 1518 */
<> 144:ef7eb2e8f9f7 1519 uint8_t RTC_ByteToBcd2(uint8_t Value)
<> 144:ef7eb2e8f9f7 1520 {
<> 144:ef7eb2e8f9f7 1521 uint32_t bcdhigh = 0U;
<> 144:ef7eb2e8f9f7 1522
<> 144:ef7eb2e8f9f7 1523 while(Value >= 10U)
<> 144:ef7eb2e8f9f7 1524 {
<> 144:ef7eb2e8f9f7 1525 bcdhigh++;
<> 144:ef7eb2e8f9f7 1526 Value -= 10U;
<> 144:ef7eb2e8f9f7 1527 }
<> 144:ef7eb2e8f9f7 1528
<> 144:ef7eb2e8f9f7 1529 return ((uint8_t)(bcdhigh << 4U) | Value);
<> 144:ef7eb2e8f9f7 1530 }
<> 144:ef7eb2e8f9f7 1531
<> 144:ef7eb2e8f9f7 1532 /**
<> 144:ef7eb2e8f9f7 1533 * @brief Converts from 2 digit BCD to Binary.
AnnaBridge 182:a56a73fd2a6f 1534 * @param Value BCD value to be converted
<> 144:ef7eb2e8f9f7 1535 * @retval Converted word
<> 144:ef7eb2e8f9f7 1536 */
<> 144:ef7eb2e8f9f7 1537 uint8_t RTC_Bcd2ToByte(uint8_t Value)
<> 144:ef7eb2e8f9f7 1538 {
<> 144:ef7eb2e8f9f7 1539 uint32_t tmp = 0U;
AnnaBridge 167:e84263d55307 1540 tmp = ((uint8_t)(Value & (uint8_t)0xF0) >> (uint8_t)0x4) * 10;
AnnaBridge 167:e84263d55307 1541 return (tmp + (Value & (uint8_t)0x0F));
<> 144:ef7eb2e8f9f7 1542 }
<> 144:ef7eb2e8f9f7 1543
<> 144:ef7eb2e8f9f7 1544 /**
<> 144:ef7eb2e8f9f7 1545 * @}
<> 144:ef7eb2e8f9f7 1546 */
<> 144:ef7eb2e8f9f7 1547
<> 144:ef7eb2e8f9f7 1548 #endif /* HAL_RTC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 1549 /**
<> 144:ef7eb2e8f9f7 1550 * @}
<> 144:ef7eb2e8f9f7 1551 */
<> 144:ef7eb2e8f9f7 1552
<> 144:ef7eb2e8f9f7 1553 /**
<> 144:ef7eb2e8f9f7 1554 * @}
<> 144:ef7eb2e8f9f7 1555 */
<> 144:ef7eb2e8f9f7 1556
<> 144:ef7eb2e8f9f7 1557 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/