mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_cec.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
182:a56a73fd2a6f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx_hal_cec.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief CEC HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the High Definition Multimedia Interface
<> 144:ef7eb2e8f9f7 8 * Consumer Electronics Control Peripheral (CEC).
<> 144:ef7eb2e8f9f7 9 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 10 * + IO operation functions
<> 144:ef7eb2e8f9f7 11 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 @verbatim
<> 144:ef7eb2e8f9f7 15 ===============================================================================
<> 144:ef7eb2e8f9f7 16 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 17 ===============================================================================
<> 144:ef7eb2e8f9f7 18 [..]
<> 144:ef7eb2e8f9f7 19 The CEC HAL driver can be used as follow:
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 (#) Declare a CEC_HandleTypeDef handle structure.
<> 144:ef7eb2e8f9f7 22 (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
<> 144:ef7eb2e8f9f7 23 (##) Enable the CEC interface clock.
<> 144:ef7eb2e8f9f7 24 (##) CEC pins configuration:
AnnaBridge 167:e84263d55307 25 (+++) Enable the clock for the CEC GPIOs.
AnnaBridge 167:e84263d55307 26 (+++) Configure these CEC pins as alternate function pull-up.
<> 144:ef7eb2e8f9f7 27 (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
<> 144:ef7eb2e8f9f7 28 and HAL_CEC_Receive_IT() APIs):
AnnaBridge 167:e84263d55307 29 (+++) Configure the CEC interrupt priority.
AnnaBridge 167:e84263d55307 30 (+++) Enable the NVIC CEC IRQ handle.
AnnaBridge 167:e84263d55307 31 (+++) The specific CEC interrupts (Transmission complete interrupt,
AnnaBridge 167:e84263d55307 32 RXNE interrupt and Error Interrupts) will be managed using the macros
AnnaBridge 167:e84263d55307 33 __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
AnnaBridge 167:e84263d55307 34 and receive process.
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
<> 144:ef7eb2e8f9f7 37 in case of Bit Rising Error, Error-Bit generation conditions, device logical
<> 144:ef7eb2e8f9f7 38 address and Listen mode in the hcec Init structure.
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 (#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
AnnaBridge 167:e84263d55307 41
AnnaBridge 167:e84263d55307 42 [..]
AnnaBridge 167:e84263d55307 43 (@) This API (HAL_CEC_Init()) configures also the low level Hardware (GPIO, CLOCK, CORTEX...)
<> 144:ef7eb2e8f9f7 44 by calling the customed HAL_CEC_MspInit() API.
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 @endverbatim
<> 144:ef7eb2e8f9f7 47 ******************************************************************************
<> 144:ef7eb2e8f9f7 48 * @attention
<> 144:ef7eb2e8f9f7 49 *
AnnaBridge 167:e84263d55307 50 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 51 *
<> 144:ef7eb2e8f9f7 52 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 53 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 54 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 55 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 56 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 57 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 58 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 59 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 60 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 61 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 62 *
<> 144:ef7eb2e8f9f7 63 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 64 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 65 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 66 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 67 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 68 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 69 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 70 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 71 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 72 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 73 *
<> 144:ef7eb2e8f9f7 74 ******************************************************************************
<> 144:ef7eb2e8f9f7 75 */
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 78 #include "stm32f4xx_hal.h"
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 /** @addtogroup STM32F4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 81 * @{
<> 144:ef7eb2e8f9f7 82 */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /** @defgroup CEC CEC
<> 144:ef7eb2e8f9f7 85 * @brief HAL CEC module driver
<> 144:ef7eb2e8f9f7 86 * @{
<> 144:ef7eb2e8f9f7 87 */
<> 144:ef7eb2e8f9f7 88 #ifdef HAL_CEC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 #if defined(STM32F446xx)
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 93 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 94 /** @defgroup CEC_Private_Constants CEC Private Constants
<> 144:ef7eb2e8f9f7 95 * @{
<> 144:ef7eb2e8f9f7 96 */
<> 144:ef7eb2e8f9f7 97 /**
<> 144:ef7eb2e8f9f7 98 * @}
<> 144:ef7eb2e8f9f7 99 */
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 102 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 103 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 104 /** @defgroup CEC_Private_Functions CEC Private Functions
<> 144:ef7eb2e8f9f7 105 * @{
<> 144:ef7eb2e8f9f7 106 */
<> 144:ef7eb2e8f9f7 107 /**
<> 144:ef7eb2e8f9f7 108 * @}
<> 144:ef7eb2e8f9f7 109 */
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 /* Exported functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /** @defgroup CEC_Exported_Functions CEC Exported Functions
<> 144:ef7eb2e8f9f7 114 * @{
<> 144:ef7eb2e8f9f7 115 */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 118 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 119 *
<> 144:ef7eb2e8f9f7 120 @verbatim
<> 144:ef7eb2e8f9f7 121 ===============================================================================
<> 144:ef7eb2e8f9f7 122 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 123 ===============================================================================
<> 144:ef7eb2e8f9f7 124 [..]
<> 144:ef7eb2e8f9f7 125 This subsection provides a set of functions allowing to initialize the CEC
<> 144:ef7eb2e8f9f7 126 (+) The following parameters need to be configured:
<> 144:ef7eb2e8f9f7 127 (++) SignalFreeTime
<> 144:ef7eb2e8f9f7 128 (++) Tolerance
<> 144:ef7eb2e8f9f7 129 (++) BRERxStop (RX stopped or not upon Bit Rising Error)
<> 144:ef7eb2e8f9f7 130 (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error)
<> 144:ef7eb2e8f9f7 131 (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error)
<> 144:ef7eb2e8f9f7 132 (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
<> 144:ef7eb2e8f9f7 133 (++) SignalFreeTimeOption (SFT Timer start definition)
<> 144:ef7eb2e8f9f7 134 (++) OwnAddress (CEC device address)
<> 144:ef7eb2e8f9f7 135 (++) ListenMode
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 @endverbatim
<> 144:ef7eb2e8f9f7 138 * @{
<> 144:ef7eb2e8f9f7 139 */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 /**
<> 144:ef7eb2e8f9f7 142 * @brief Initializes the CEC mode according to the specified
<> 144:ef7eb2e8f9f7 143 * parameters in the CEC_InitTypeDef and creates the associated handle .
AnnaBridge 182:a56a73fd2a6f 144 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 145 * @retval HAL status
<> 144:ef7eb2e8f9f7 146 */
<> 144:ef7eb2e8f9f7 147 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 148 {
<> 144:ef7eb2e8f9f7 149 /* Check the CEC handle allocation */
<> 144:ef7eb2e8f9f7 150 if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL))
<> 144:ef7eb2e8f9f7 151 {
<> 144:ef7eb2e8f9f7 152 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 153 }
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /* Check the parameters */
<> 144:ef7eb2e8f9f7 156 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
<> 144:ef7eb2e8f9f7 157 assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
<> 144:ef7eb2e8f9f7 158 assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
<> 144:ef7eb2e8f9f7 159 assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
<> 144:ef7eb2e8f9f7 160 assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
<> 144:ef7eb2e8f9f7 161 assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
<> 144:ef7eb2e8f9f7 162 assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
<> 144:ef7eb2e8f9f7 163 assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
<> 144:ef7eb2e8f9f7 164 assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
<> 144:ef7eb2e8f9f7 165 assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 if(hcec->gState == HAL_CEC_STATE_RESET)
<> 144:ef7eb2e8f9f7 168 {
<> 144:ef7eb2e8f9f7 169 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 170 hcec->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 171 /* Init the low level hardware : GPIO, CLOCK */
<> 144:ef7eb2e8f9f7 172 HAL_CEC_MspInit(hcec);
<> 144:ef7eb2e8f9f7 173 }
<> 144:ef7eb2e8f9f7 174 hcec->gState = HAL_CEC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 177 __HAL_CEC_DISABLE(hcec);
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 /* Write to CEC Control Register */
<> 144:ef7eb2e8f9f7 180 hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\
<> 144:ef7eb2e8f9f7 181 hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\
<> 144:ef7eb2e8f9f7 182 hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\
<> 144:ef7eb2e8f9f7 183 hcec->Init.ListenMode;
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 /* Enable the following CEC Transmission/Reception interrupts as
<> 144:ef7eb2e8f9f7 186 * well as the following CEC Transmission/Reception Errors interrupts
<> 144:ef7eb2e8f9f7 187 * Rx Byte Received IT
<> 144:ef7eb2e8f9f7 188 * End of Reception IT
<> 144:ef7eb2e8f9f7 189 * Rx overrun
<> 144:ef7eb2e8f9f7 190 * Rx bit rising error
<> 144:ef7eb2e8f9f7 191 * Rx short bit period error
<> 144:ef7eb2e8f9f7 192 * Rx long bit period error
<> 144:ef7eb2e8f9f7 193 * Rx missing acknowledge
<> 144:ef7eb2e8f9f7 194 * Tx Byte Request IT
<> 144:ef7eb2e8f9f7 195 * End of Transmission IT
<> 144:ef7eb2e8f9f7 196 * Tx Missing Acknowledge IT
<> 144:ef7eb2e8f9f7 197 * Tx-Error IT
<> 144:ef7eb2e8f9f7 198 * Tx-Buffer Underrun IT
<> 144:ef7eb2e8f9f7 199 * Tx arbitration lost */
<> 144:ef7eb2e8f9f7 200 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 /* Enable the CEC Peripheral */
<> 144:ef7eb2e8f9f7 203 __HAL_CEC_ENABLE(hcec);
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 144:ef7eb2e8f9f7 206 hcec->gState = HAL_CEC_STATE_READY;
<> 144:ef7eb2e8f9f7 207 hcec->RxState = HAL_CEC_STATE_READY;
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 return HAL_OK;
<> 144:ef7eb2e8f9f7 210 }
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 /**
<> 144:ef7eb2e8f9f7 213 * @brief DeInitializes the CEC peripheral
AnnaBridge 182:a56a73fd2a6f 214 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 215 * @retval HAL status
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 218 {
<> 144:ef7eb2e8f9f7 219 /* Check the CEC handle allocation */
<> 144:ef7eb2e8f9f7 220 if(hcec == NULL)
<> 144:ef7eb2e8f9f7 221 {
<> 144:ef7eb2e8f9f7 222 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 223 }
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /* Check the parameters */
<> 144:ef7eb2e8f9f7 226 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 hcec->gState = HAL_CEC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 231 HAL_CEC_MspDeInit(hcec);
<> 144:ef7eb2e8f9f7 232 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 233 __HAL_CEC_DISABLE(hcec);
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /* Clear Flags */
<> 144:ef7eb2e8f9f7 236 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR);
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 /* Disable the following CEC Transmission/Reception interrupts as
<> 144:ef7eb2e8f9f7 239 * well as the following CEC Transmission/Reception Errors interrupts
<> 144:ef7eb2e8f9f7 240 * Rx Byte Received IT
<> 144:ef7eb2e8f9f7 241 * End of Reception IT
<> 144:ef7eb2e8f9f7 242 * Rx overrun
<> 144:ef7eb2e8f9f7 243 * Rx bit rising error
<> 144:ef7eb2e8f9f7 244 * Rx short bit period error
<> 144:ef7eb2e8f9f7 245 * Rx long bit period error
<> 144:ef7eb2e8f9f7 246 * Rx missing acknowledge
<> 144:ef7eb2e8f9f7 247 * Tx Byte Request IT
<> 144:ef7eb2e8f9f7 248 * End of Transmission IT
<> 144:ef7eb2e8f9f7 249 * Tx Missing Acknowledge IT
<> 144:ef7eb2e8f9f7 250 * Tx-Error IT
<> 144:ef7eb2e8f9f7 251 * Tx-Buffer Underrun IT
<> 144:ef7eb2e8f9f7 252 * Tx arbitration lost */
<> 144:ef7eb2e8f9f7 253 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 144:ef7eb2e8f9f7 256 hcec->gState = HAL_CEC_STATE_RESET;
<> 144:ef7eb2e8f9f7 257 hcec->RxState = HAL_CEC_STATE_RESET;
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /* Process Unlock */
<> 144:ef7eb2e8f9f7 260 __HAL_UNLOCK(hcec);
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 return HAL_OK;
<> 144:ef7eb2e8f9f7 263 }
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 /**
<> 144:ef7eb2e8f9f7 266 * @brief Initializes the Own Address of the CEC device
AnnaBridge 182:a56a73fd2a6f 267 * @param hcec CEC handle
AnnaBridge 182:a56a73fd2a6f 268 * @param CEC_OwnAddress The CEC own address.
<> 144:ef7eb2e8f9f7 269 * @retval HAL status
<> 144:ef7eb2e8f9f7 270 */
<> 144:ef7eb2e8f9f7 271 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
<> 144:ef7eb2e8f9f7 272 {
<> 144:ef7eb2e8f9f7 273 /* Check the parameters */
<> 144:ef7eb2e8f9f7 274 assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
<> 144:ef7eb2e8f9f7 277 {
<> 144:ef7eb2e8f9f7 278 /* Process Locked */
<> 144:ef7eb2e8f9f7 279 __HAL_LOCK(hcec);
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 hcec->gState = HAL_CEC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 284 __HAL_CEC_DISABLE(hcec);
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
<> 144:ef7eb2e8f9f7 287 {
AnnaBridge 167:e84263d55307 288 hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U);
<> 144:ef7eb2e8f9f7 289 }
<> 144:ef7eb2e8f9f7 290 else
<> 144:ef7eb2e8f9f7 291 {
<> 144:ef7eb2e8f9f7 292 hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
<> 144:ef7eb2e8f9f7 293 }
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 hcec->gState = HAL_CEC_STATE_READY;
<> 144:ef7eb2e8f9f7 296 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 299 __HAL_UNLOCK(hcec);
<> 144:ef7eb2e8f9f7 300
<> 144:ef7eb2e8f9f7 301 /* Enable the Peripheral */
<> 144:ef7eb2e8f9f7 302 __HAL_CEC_ENABLE(hcec);
<> 144:ef7eb2e8f9f7 303
<> 144:ef7eb2e8f9f7 304 return HAL_OK;
<> 144:ef7eb2e8f9f7 305 }
<> 144:ef7eb2e8f9f7 306 else
<> 144:ef7eb2e8f9f7 307 {
<> 144:ef7eb2e8f9f7 308 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 309 }
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 /**
<> 144:ef7eb2e8f9f7 313 * @brief CEC MSP Init
AnnaBridge 182:a56a73fd2a6f 314 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 315 * @retval None
<> 144:ef7eb2e8f9f7 316 */
<> 144:ef7eb2e8f9f7 317 __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 318 {
<> 144:ef7eb2e8f9f7 319 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 320 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 321 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 322 the HAL_CEC_MspInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 323 */
<> 144:ef7eb2e8f9f7 324 }
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /**
<> 144:ef7eb2e8f9f7 327 * @brief CEC MSP DeInit
AnnaBridge 182:a56a73fd2a6f 328 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 329 * @retval None
<> 144:ef7eb2e8f9f7 330 */
<> 144:ef7eb2e8f9f7 331 __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 332 {
<> 144:ef7eb2e8f9f7 333 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 334 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 335 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 336 the HAL_CEC_MspDeInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 337 */
<> 144:ef7eb2e8f9f7 338 }
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 /**
<> 144:ef7eb2e8f9f7 341 * @}
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
<> 144:ef7eb2e8f9f7 345 * @brief CEC Transmit/Receive functions
<> 144:ef7eb2e8f9f7 346 *
<> 144:ef7eb2e8f9f7 347 @verbatim
<> 144:ef7eb2e8f9f7 348 ===============================================================================
<> 144:ef7eb2e8f9f7 349 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 350 ===============================================================================
<> 144:ef7eb2e8f9f7 351 This subsection provides a set of functions allowing to manage the CEC data transfers.
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 (#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
<> 144:ef7eb2e8f9f7 354 logical addresses (4-bit long addresses, 0x0F for broadcast messages destination)
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 (#) The communication is performed using Interrupts.
<> 144:ef7eb2e8f9f7 357 These API's return the HAL status.
<> 144:ef7eb2e8f9f7 358 The end of the data processing will be indicated through the
<> 144:ef7eb2e8f9f7 359 dedicated CEC IRQ when using Interrupt mode.
<> 144:ef7eb2e8f9f7 360 The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
<> 144:ef7eb2e8f9f7 361 will be executed respectivelly at the end of the transmit or Receive process
<> 144:ef7eb2e8f9f7 362 The HAL_CEC_ErrorCallback()user callback will be executed when a communication
<> 144:ef7eb2e8f9f7 363 error is detected
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 (#) API's with Interrupt are :
<> 144:ef7eb2e8f9f7 366 (+) HAL_CEC_Transmit_IT()
<> 144:ef7eb2e8f9f7 367 (+) HAL_CEC_IRQHandler()
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 (#) A set of User Callbacks are provided:
<> 144:ef7eb2e8f9f7 370 (+) HAL_CEC_TxCpltCallback()
<> 144:ef7eb2e8f9f7 371 (+) HAL_CEC_RxCpltCallback()
<> 144:ef7eb2e8f9f7 372 (+) HAL_CEC_ErrorCallback()
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 @endverbatim
<> 144:ef7eb2e8f9f7 375 * @{
<> 144:ef7eb2e8f9f7 376 */
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /**
<> 144:ef7eb2e8f9f7 379 * @brief Send data in interrupt mode
AnnaBridge 182:a56a73fd2a6f 380 * @param hcec CEC handle
AnnaBridge 182:a56a73fd2a6f 381 * @param InitiatorAddress Initiator logical address
AnnaBridge 182:a56a73fd2a6f 382 * @param DestinationAddress destination logical address
AnnaBridge 182:a56a73fd2a6f 383 * @param pData pointer to input byte data buffer
AnnaBridge 182:a56a73fd2a6f 384 * @param Size amount of data to be sent in bytes (without counting the header).
<> 144:ef7eb2e8f9f7 385 * 0 means only the header is sent (ping operation).
<> 144:ef7eb2e8f9f7 386 * Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
<> 144:ef7eb2e8f9f7 387 * @retval HAL status
<> 144:ef7eb2e8f9f7 388 */
<> 144:ef7eb2e8f9f7 389 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
<> 144:ef7eb2e8f9f7 390 {
<> 144:ef7eb2e8f9f7 391 /* if the IP isn't already busy and if there is no previous transmission
<> 144:ef7eb2e8f9f7 392 already pending due to arbitration lost */
<> 144:ef7eb2e8f9f7 393 if (hcec->gState == HAL_CEC_STATE_READY)
<> 144:ef7eb2e8f9f7 394 {
<> 144:ef7eb2e8f9f7 395 if((pData == NULL ) && (Size > 0U))
<> 144:ef7eb2e8f9f7 396 {
<> 144:ef7eb2e8f9f7 397 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 398 }
<> 144:ef7eb2e8f9f7 399
<> 144:ef7eb2e8f9f7 400 assert_param(IS_CEC_ADDRESS(DestinationAddress));
<> 144:ef7eb2e8f9f7 401 assert_param(IS_CEC_ADDRESS(InitiatorAddress));
<> 144:ef7eb2e8f9f7 402 assert_param(IS_CEC_MSGSIZE(Size));
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 /* Process Locked */
<> 144:ef7eb2e8f9f7 405 __HAL_LOCK(hcec);
<> 144:ef7eb2e8f9f7 406 hcec->pTxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 407 hcec->gState = HAL_CEC_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 408 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 144:ef7eb2e8f9f7 409
<> 144:ef7eb2e8f9f7 410 /* initialize the number of bytes to send,
<> 144:ef7eb2e8f9f7 411 * 0 means only one header is sent (ping operation) */
<> 144:ef7eb2e8f9f7 412 hcec->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 413
<> 144:ef7eb2e8f9f7 414 /* in case of no payload (Size = 0), sender is only pinging the system;
<> 144:ef7eb2e8f9f7 415 Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
<> 144:ef7eb2e8f9f7 416 if (Size == 0U)
<> 144:ef7eb2e8f9f7 417 {
<> 144:ef7eb2e8f9f7 418 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
<> 144:ef7eb2e8f9f7 419 }
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 /* send header block */
<> 144:ef7eb2e8f9f7 422 hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress);
<> 144:ef7eb2e8f9f7 423 /* Set TX Start of Message (TXSOM) bit */
<> 144:ef7eb2e8f9f7 424 __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 427 __HAL_UNLOCK(hcec);
<> 144:ef7eb2e8f9f7 428
<> 144:ef7eb2e8f9f7 429 return HAL_OK;
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 }
<> 144:ef7eb2e8f9f7 432 else
<> 144:ef7eb2e8f9f7 433 {
<> 144:ef7eb2e8f9f7 434 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 435 }
<> 144:ef7eb2e8f9f7 436 }
<> 144:ef7eb2e8f9f7 437
<> 144:ef7eb2e8f9f7 438 /**
<> 144:ef7eb2e8f9f7 439 * @brief Get size of the received frame.
AnnaBridge 182:a56a73fd2a6f 440 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 441 * @retval Frame size
<> 144:ef7eb2e8f9f7 442 */
<> 144:ef7eb2e8f9f7 443 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 444 {
<> 144:ef7eb2e8f9f7 445 return hcec->RxXferSize;
<> 144:ef7eb2e8f9f7 446 }
<> 144:ef7eb2e8f9f7 447
<> 144:ef7eb2e8f9f7 448 /**
<> 144:ef7eb2e8f9f7 449 * @brief Change Rx Buffer.
AnnaBridge 182:a56a73fd2a6f 450 * @param hcec CEC handle
AnnaBridge 182:a56a73fd2a6f 451 * @param Rxbuffer Rx Buffer
<> 144:ef7eb2e8f9f7 452 * @note This function can be called only inside the HAL_CEC_RxCpltCallback()
<> 144:ef7eb2e8f9f7 453 * @retval Frame size
<> 144:ef7eb2e8f9f7 454 */
<> 144:ef7eb2e8f9f7 455 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
<> 144:ef7eb2e8f9f7 456 {
<> 144:ef7eb2e8f9f7 457 hcec->Init.RxBuffer = Rxbuffer;
<> 144:ef7eb2e8f9f7 458 }
<> 144:ef7eb2e8f9f7 459
<> 144:ef7eb2e8f9f7 460 /**
<> 144:ef7eb2e8f9f7 461 * @brief This function handles CEC interrupt requests.
AnnaBridge 182:a56a73fd2a6f 462 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 463 * @retval None
<> 144:ef7eb2e8f9f7 464 */
<> 144:ef7eb2e8f9f7 465 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 466 {
<> 144:ef7eb2e8f9f7 467
<> 144:ef7eb2e8f9f7 468 /* save interrupts register for further error or interrupts handling purposes */
<> 144:ef7eb2e8f9f7 469 uint32_t reg = 0U;
<> 144:ef7eb2e8f9f7 470 reg = hcec->Instance->ISR;
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472
<> 144:ef7eb2e8f9f7 473 /* ----------------------------Arbitration Lost Management----------------------------------*/
<> 144:ef7eb2e8f9f7 474 /* CEC TX arbitration error interrupt occurred --------------------------------------*/
<> 144:ef7eb2e8f9f7 475 if((reg & CEC_FLAG_ARBLST) != RESET)
<> 144:ef7eb2e8f9f7 476 {
<> 144:ef7eb2e8f9f7 477 hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
<> 144:ef7eb2e8f9f7 478 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
<> 144:ef7eb2e8f9f7 479 }
<> 144:ef7eb2e8f9f7 480
<> 144:ef7eb2e8f9f7 481 /* ----------------------------Rx Management----------------------------------*/
<> 144:ef7eb2e8f9f7 482 /* CEC RX byte received interrupt ---------------------------------------------------*/
<> 144:ef7eb2e8f9f7 483 if((reg & CEC_FLAG_RXBR) != RESET)
<> 144:ef7eb2e8f9f7 484 {
<> 144:ef7eb2e8f9f7 485 /* reception is starting */
<> 144:ef7eb2e8f9f7 486 hcec->RxState = HAL_CEC_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 487 hcec->RxXferSize++;
<> 144:ef7eb2e8f9f7 488 /* read received byte */
<> 144:ef7eb2e8f9f7 489 *hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
<> 144:ef7eb2e8f9f7 490 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
<> 144:ef7eb2e8f9f7 491 }
<> 144:ef7eb2e8f9f7 492
<> 144:ef7eb2e8f9f7 493 /* CEC RX end received interrupt ---------------------------------------------------*/
<> 144:ef7eb2e8f9f7 494 if((reg & CEC_FLAG_RXEND) != RESET)
<> 144:ef7eb2e8f9f7 495 {
<> 144:ef7eb2e8f9f7 496 /* clear IT */
<> 144:ef7eb2e8f9f7 497 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
<> 144:ef7eb2e8f9f7 498
<> 144:ef7eb2e8f9f7 499 /* Rx process is completed, restore hcec->RxState to Ready */
<> 144:ef7eb2e8f9f7 500 hcec->RxState = HAL_CEC_STATE_READY;
<> 144:ef7eb2e8f9f7 501 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 144:ef7eb2e8f9f7 502 hcec->Init.RxBuffer -= hcec->RxXferSize;
<> 144:ef7eb2e8f9f7 503 HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
<> 144:ef7eb2e8f9f7 504 hcec->RxXferSize = 0U;
<> 144:ef7eb2e8f9f7 505 }
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 /* ----------------------------Tx Management----------------------------------*/
<> 144:ef7eb2e8f9f7 508 /* CEC TX byte request interrupt ------------------------------------------------*/
<> 144:ef7eb2e8f9f7 509 if((reg & CEC_FLAG_TXBR) != RESET)
<> 144:ef7eb2e8f9f7 510 {
<> 144:ef7eb2e8f9f7 511 if (hcec->TxXferCount == 0U)
<> 144:ef7eb2e8f9f7 512 {
<> 144:ef7eb2e8f9f7 513 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
<> 144:ef7eb2e8f9f7 514 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
<> 144:ef7eb2e8f9f7 515 hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
<> 144:ef7eb2e8f9f7 516 }
<> 144:ef7eb2e8f9f7 517 else
<> 144:ef7eb2e8f9f7 518 {
<> 144:ef7eb2e8f9f7 519 hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
<> 144:ef7eb2e8f9f7 520 hcec->TxXferCount--;
<> 144:ef7eb2e8f9f7 521 }
<> 144:ef7eb2e8f9f7 522 /* clear Tx-Byte request flag */
<> 144:ef7eb2e8f9f7 523 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
<> 144:ef7eb2e8f9f7 524 }
<> 144:ef7eb2e8f9f7 525
<> 144:ef7eb2e8f9f7 526 /* CEC TX end interrupt ------------------------------------------------*/
<> 144:ef7eb2e8f9f7 527 if((reg & CEC_FLAG_TXEND) != RESET)
<> 144:ef7eb2e8f9f7 528 {
<> 144:ef7eb2e8f9f7 529 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /* Tx process is ended, restore hcec->gState to Ready */
<> 144:ef7eb2e8f9f7 532 hcec->gState = HAL_CEC_STATE_READY;
<> 144:ef7eb2e8f9f7 533 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to
<> 144:ef7eb2e8f9f7 534 start again the Transmission under the Tx call back API */
<> 144:ef7eb2e8f9f7 535 __HAL_UNLOCK(hcec);
<> 144:ef7eb2e8f9f7 536 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
<> 144:ef7eb2e8f9f7 537 HAL_CEC_TxCpltCallback(hcec);
<> 144:ef7eb2e8f9f7 538 }
<> 144:ef7eb2e8f9f7 539
<> 144:ef7eb2e8f9f7 540 /* ----------------------------Rx/Tx Error Management----------------------------------*/
<> 144:ef7eb2e8f9f7 541 if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U)
<> 144:ef7eb2e8f9f7 542 {
<> 144:ef7eb2e8f9f7 543 hcec->ErrorCode = reg;
<> 144:ef7eb2e8f9f7 544 __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE);
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546
<> 144:ef7eb2e8f9f7 547 if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET)
<> 144:ef7eb2e8f9f7 548 {
<> 144:ef7eb2e8f9f7 549 hcec->Init.RxBuffer-=hcec->RxXferSize;
<> 144:ef7eb2e8f9f7 550 hcec->RxXferSize = 0U;
<> 144:ef7eb2e8f9f7 551 hcec->RxState = HAL_CEC_STATE_READY;
<> 144:ef7eb2e8f9f7 552 }
<> 144:ef7eb2e8f9f7 553 else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
<> 144:ef7eb2e8f9f7 554 {
<> 144:ef7eb2e8f9f7 555 /* Set the CEC state ready to be able to start again the process */
<> 144:ef7eb2e8f9f7 556 hcec->gState = HAL_CEC_STATE_READY;
<> 144:ef7eb2e8f9f7 557 }
<> 144:ef7eb2e8f9f7 558
<> 144:ef7eb2e8f9f7 559 /* Error Call Back */
<> 144:ef7eb2e8f9f7 560 HAL_CEC_ErrorCallback(hcec);
<> 144:ef7eb2e8f9f7 561 }
<> 144:ef7eb2e8f9f7 562
<> 144:ef7eb2e8f9f7 563 }
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 /**
<> 144:ef7eb2e8f9f7 566 * @brief Tx Transfer completed callback
AnnaBridge 182:a56a73fd2a6f 567 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 568 * @retval None
<> 144:ef7eb2e8f9f7 569 */
<> 144:ef7eb2e8f9f7 570 __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 571 {
<> 144:ef7eb2e8f9f7 572 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 573 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 574 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 575 the HAL_CEC_TxCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 576 */
<> 144:ef7eb2e8f9f7 577 }
<> 144:ef7eb2e8f9f7 578
<> 144:ef7eb2e8f9f7 579 /**
<> 144:ef7eb2e8f9f7 580 * @brief Rx Transfer completed callback
AnnaBridge 182:a56a73fd2a6f 581 * @param hcec CEC handle
AnnaBridge 182:a56a73fd2a6f 582 * @param RxFrameSize Size of frame
<> 144:ef7eb2e8f9f7 583 * @retval None
<> 144:ef7eb2e8f9f7 584 */
<> 144:ef7eb2e8f9f7 585 __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
<> 144:ef7eb2e8f9f7 586 {
<> 144:ef7eb2e8f9f7 587 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 588 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 589 UNUSED(RxFrameSize);
<> 144:ef7eb2e8f9f7 590 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 591 the HAL_CEC_RxCpltCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 592 */
<> 144:ef7eb2e8f9f7 593 }
<> 144:ef7eb2e8f9f7 594
<> 144:ef7eb2e8f9f7 595 /**
<> 144:ef7eb2e8f9f7 596 * @brief CEC error callbacks
AnnaBridge 182:a56a73fd2a6f 597 * @param hcec CEC handle
<> 144:ef7eb2e8f9f7 598 * @retval None
<> 144:ef7eb2e8f9f7 599 */
<> 144:ef7eb2e8f9f7 600 __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 601 {
<> 144:ef7eb2e8f9f7 602 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 603 UNUSED(hcec);
<> 144:ef7eb2e8f9f7 604 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 605 the HAL_CEC_ErrorCallback can be implemented in the user file
<> 144:ef7eb2e8f9f7 606 */
<> 144:ef7eb2e8f9f7 607 }
<> 144:ef7eb2e8f9f7 608 /**
<> 144:ef7eb2e8f9f7 609 * @}
<> 144:ef7eb2e8f9f7 610 */
<> 144:ef7eb2e8f9f7 611
<> 144:ef7eb2e8f9f7 612 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
<> 144:ef7eb2e8f9f7 613 * @brief CEC control functions
<> 144:ef7eb2e8f9f7 614 *
<> 144:ef7eb2e8f9f7 615 @verbatim
<> 144:ef7eb2e8f9f7 616 ===============================================================================
<> 144:ef7eb2e8f9f7 617 ##### Peripheral Control function #####
<> 144:ef7eb2e8f9f7 618 ===============================================================================
<> 144:ef7eb2e8f9f7 619 [..]
<> 144:ef7eb2e8f9f7 620 This subsection provides a set of functions allowing to control the CEC.
<> 144:ef7eb2e8f9f7 621 (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
<> 144:ef7eb2e8f9f7 622 (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
<> 144:ef7eb2e8f9f7 623 @endverbatim
<> 144:ef7eb2e8f9f7 624 * @{
<> 144:ef7eb2e8f9f7 625 */
<> 144:ef7eb2e8f9f7 626 /**
<> 144:ef7eb2e8f9f7 627 * @brief return the CEC state
AnnaBridge 182:a56a73fd2a6f 628 * @param hcec pointer to a CEC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 629 * the configuration information for the specified CEC module.
<> 144:ef7eb2e8f9f7 630 * @retval HAL state
<> 144:ef7eb2e8f9f7 631 */
<> 144:ef7eb2e8f9f7 632 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 633 {
<> 144:ef7eb2e8f9f7 634 uint32_t temp1 = 0x00U, temp2 = 0x00U;
<> 144:ef7eb2e8f9f7 635 temp1 = hcec->gState;
<> 144:ef7eb2e8f9f7 636 temp2 = hcec->RxState;
<> 144:ef7eb2e8f9f7 637
<> 144:ef7eb2e8f9f7 638 return (HAL_CEC_StateTypeDef)(temp1 | temp2);
<> 144:ef7eb2e8f9f7 639 }
<> 144:ef7eb2e8f9f7 640
<> 144:ef7eb2e8f9f7 641 /**
<> 144:ef7eb2e8f9f7 642 * @brief Return the CEC error code
AnnaBridge 182:a56a73fd2a6f 643 * @param hcec pointer to a CEC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 644 * the configuration information for the specified CEC.
<> 144:ef7eb2e8f9f7 645 * @retval CEC Error Code
<> 144:ef7eb2e8f9f7 646 */
<> 144:ef7eb2e8f9f7 647 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
<> 144:ef7eb2e8f9f7 648 {
<> 144:ef7eb2e8f9f7 649 return hcec->ErrorCode;
<> 144:ef7eb2e8f9f7 650 }
<> 144:ef7eb2e8f9f7 651
<> 144:ef7eb2e8f9f7 652 /**
<> 144:ef7eb2e8f9f7 653 * @}
<> 144:ef7eb2e8f9f7 654 */
<> 144:ef7eb2e8f9f7 655
<> 144:ef7eb2e8f9f7 656 /**
<> 144:ef7eb2e8f9f7 657 * @}
<> 144:ef7eb2e8f9f7 658 */
<> 144:ef7eb2e8f9f7 659
<> 144:ef7eb2e8f9f7 660 #endif /* STM32F446xx */
<> 144:ef7eb2e8f9f7 661
<> 144:ef7eb2e8f9f7 662 #endif /* HAL_CEC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 663 /**
<> 144:ef7eb2e8f9f7 664 * @}
<> 144:ef7eb2e8f9f7 665 */
<> 144:ef7eb2e8f9f7 666
<> 144:ef7eb2e8f9f7 667 /**
<> 144:ef7eb2e8f9f7 668 * @}
<> 144:ef7eb2e8f9f7 669 */
<> 144:ef7eb2e8f9f7 670
<> 144:ef7eb2e8f9f7 671 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/