mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/system_clock.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 170:19eb464bc2be 1 /* mbed Microcontroller Library
Kojto 170:19eb464bc2be 2 * Copyright (c) 2006-2017 ARM Limited
Kojto 170:19eb464bc2be 3 *
Kojto 170:19eb464bc2be 4 * Licensed under the Apache License, Version 2.0 (the "License");
Kojto 170:19eb464bc2be 5 * you may not use this file except in compliance with the License.
Kojto 170:19eb464bc2be 6 * You may obtain a copy of the License at
Kojto 170:19eb464bc2be 7 *
Kojto 170:19eb464bc2be 8 * http://www.apache.org/licenses/LICENSE-2.0
Kojto 170:19eb464bc2be 9 *
Kojto 170:19eb464bc2be 10 * Unless required by applicable law or agreed to in writing, software
Kojto 170:19eb464bc2be 11 * distributed under the License is distributed on an "AS IS" BASIS,
Kojto 170:19eb464bc2be 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Kojto 170:19eb464bc2be 13 * See the License for the specific language governing permissions and
Kojto 170:19eb464bc2be 14 * limitations under the License.
Kojto 170:19eb464bc2be 15 */
Kojto 170:19eb464bc2be 16
Kojto 170:19eb464bc2be 17 /**
Kojto 170:19eb464bc2be 18 * This file configures the system clock as follows:
Kojto 170:19eb464bc2be 19 *-----------------------------------------------------------------------------
Kojto 170:19eb464bc2be 20 * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
Kojto 170:19eb464bc2be 21 * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
Kojto 170:19eb464bc2be 22 * | 3- USE_PLL_HSI (internal 16 MHz)
Kojto 170:19eb464bc2be 23 *-----------------------------------------------------------------------------
Kojto 170:19eb464bc2be 24 * SYSCLK(MHz) | 120
Kojto 170:19eb464bc2be 25 * AHBCLK (MHz) | 120
Kojto 170:19eb464bc2be 26 * APB1CLK (MHz) | 30
Kojto 170:19eb464bc2be 27 * APB2CLK (MHz) | 60
Kojto 170:19eb464bc2be 28 * USB capable | YES
Kojto 170:19eb464bc2be 29 *-----------------------------------------------------------------------------
Kojto 170:19eb464bc2be 30 **/
Kojto 170:19eb464bc2be 31
Kojto 170:19eb464bc2be 32 #include "stm32f2xx.h"
AnnaBridge 188:bcfe06ba3d64 33 #include "nvic_addr.h"
AnnaBridge 187:0387e8f68319 34 #include "mbed_error.h"
Kojto 170:19eb464bc2be 35
Kojto 170:19eb464bc2be 36 /*!< Uncomment the following line if you need to relocate your vector Table in
Kojto 170:19eb464bc2be 37 Internal SRAM. */
Kojto 170:19eb464bc2be 38 /* #define VECT_TAB_SRAM */
Kojto 170:19eb464bc2be 39 #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
Kojto 170:19eb464bc2be 40 This value must be a multiple of 0x200. */
Kojto 170:19eb464bc2be 41
Kojto 170:19eb464bc2be 42
Kojto 170:19eb464bc2be 43 // clock source is selected with CLOCK_SOURCE in json config
Kojto 170:19eb464bc2be 44 #define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
Kojto 170:19eb464bc2be 45 #define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
Kojto 170:19eb464bc2be 46 #define USE_PLL_HSI 0x2 // Use HSI internal clock
Kojto 170:19eb464bc2be 47
Kojto 170:19eb464bc2be 48 #if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
Kojto 170:19eb464bc2be 49 uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
Kojto 170:19eb464bc2be 50 #endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
Kojto 170:19eb464bc2be 51
Kojto 170:19eb464bc2be 52 #if ((CLOCK_SOURCE) & USE_PLL_HSI)
Kojto 170:19eb464bc2be 53 uint8_t SetSysClock_PLL_HSI(void);
Kojto 170:19eb464bc2be 54 #endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
Kojto 170:19eb464bc2be 55
Kojto 170:19eb464bc2be 56 /**
Kojto 170:19eb464bc2be 57 * @brief Setup the microcontroller system
Kojto 170:19eb464bc2be 58 * Initialize the Embedded Flash Interface, the PLL and update the
Kojto 170:19eb464bc2be 59 * SystemFrequency variable.
Kojto 170:19eb464bc2be 60 * @param None
Kojto 170:19eb464bc2be 61 * @retval None
Kojto 170:19eb464bc2be 62 */
Kojto 170:19eb464bc2be 63 void SystemInit(void)
Kojto 170:19eb464bc2be 64 {
Kojto 170:19eb464bc2be 65 /* Reset the RCC clock configuration to the default reset state ------------*/
Kojto 170:19eb464bc2be 66 /* Set HSION bit */
Kojto 170:19eb464bc2be 67 RCC->CR |= (uint32_t)0x00000001;
Kojto 170:19eb464bc2be 68
Kojto 170:19eb464bc2be 69 /* Reset CFGR register */
Kojto 170:19eb464bc2be 70 RCC->CFGR = 0x00000000;
Kojto 170:19eb464bc2be 71
Kojto 170:19eb464bc2be 72 /* Reset HSEON, CSSON and PLLON bits */
Kojto 170:19eb464bc2be 73 RCC->CR &= (uint32_t)0xFEF6FFFF;
Kojto 170:19eb464bc2be 74
Kojto 170:19eb464bc2be 75 /* Reset PLLCFGR register */
Kojto 170:19eb464bc2be 76 RCC->PLLCFGR = 0x24003010;
Kojto 170:19eb464bc2be 77
Kojto 170:19eb464bc2be 78 /* Reset HSEBYP bit */
Kojto 170:19eb464bc2be 79 RCC->CR &= (uint32_t)0xFFFBFFFF;
Kojto 170:19eb464bc2be 80
Kojto 170:19eb464bc2be 81 /* Disable all interrupts */
Kojto 170:19eb464bc2be 82 RCC->CIR = 0x00000000;
Kojto 170:19eb464bc2be 83
Kojto 170:19eb464bc2be 84 #ifdef DATA_IN_ExtSRAM
Kojto 170:19eb464bc2be 85 SystemInit_ExtMemCtl();
Kojto 170:19eb464bc2be 86 #endif /* DATA_IN_ExtSRAM */
Kojto 170:19eb464bc2be 87
Kojto 170:19eb464bc2be 88 /* Configure the Vector Table location add offset address ------------------*/
Kojto 170:19eb464bc2be 89 #ifdef VECT_TAB_SRAM
Kojto 170:19eb464bc2be 90 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
Kojto 170:19eb464bc2be 91 #else
AnnaBridge 188:bcfe06ba3d64 92 SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
Kojto 170:19eb464bc2be 93 #endif
Kojto 170:19eb464bc2be 94
Kojto 170:19eb464bc2be 95 }
Kojto 170:19eb464bc2be 96
Kojto 170:19eb464bc2be 97
Kojto 170:19eb464bc2be 98 /**
Kojto 170:19eb464bc2be 99 * @brief Configures the System clock source, PLL Multiplier and Divider factors,
Kojto 170:19eb464bc2be 100 * AHB/APBx prescalers and Flash settings
Kojto 170:19eb464bc2be 101 * @note This function should be called only once the RCC clock configuration
Kojto 170:19eb464bc2be 102 * is reset to the default reset state (done in SystemInit() function).
Kojto 170:19eb464bc2be 103 * @param None
Kojto 170:19eb464bc2be 104 * @retval None
Kojto 170:19eb464bc2be 105 */
Kojto 170:19eb464bc2be 106
Kojto 170:19eb464bc2be 107 void SetSysClock(void)
Kojto 170:19eb464bc2be 108 {
Kojto 170:19eb464bc2be 109 #if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
Kojto 170:19eb464bc2be 110 /* 1- Try to start with HSE and external clock */
Kojto 170:19eb464bc2be 111 if (SetSysClock_PLL_HSE(1) == 0)
Kojto 170:19eb464bc2be 112 #endif
Kojto 170:19eb464bc2be 113 {
Kojto 170:19eb464bc2be 114 #if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
Kojto 170:19eb464bc2be 115 /* 2- If fail try to start with HSE and external xtal */
Kojto 170:19eb464bc2be 116 if (SetSysClock_PLL_HSE(0) == 0)
Kojto 170:19eb464bc2be 117 #endif
Kojto 170:19eb464bc2be 118 {
Kojto 170:19eb464bc2be 119 #if ((CLOCK_SOURCE) & USE_PLL_HSI)
Kojto 170:19eb464bc2be 120 /* 3- If fail start with HSI clock */
Kojto 170:19eb464bc2be 121 if (SetSysClock_PLL_HSI() == 0)
Kojto 170:19eb464bc2be 122 #endif
Kojto 170:19eb464bc2be 123 {
AnnaBridge 187:0387e8f68319 124 {
AnnaBridge 187:0387e8f68319 125 error("SetSysClock failed\n");
Kojto 170:19eb464bc2be 126 }
Kojto 170:19eb464bc2be 127 }
Kojto 170:19eb464bc2be 128 }
Kojto 170:19eb464bc2be 129 }
Kojto 170:19eb464bc2be 130
Kojto 170:19eb464bc2be 131 #if 0 // SYSCLK can be map to PC_9
Kojto 170:19eb464bc2be 132 HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_2);
Kojto 170:19eb464bc2be 133 #endif
Kojto 170:19eb464bc2be 134 }
Kojto 170:19eb464bc2be 135
Kojto 170:19eb464bc2be 136 #if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
Kojto 170:19eb464bc2be 137 /******************************************************************************/
Kojto 170:19eb464bc2be 138 /* PLL (clocked by HSE) used as System clock source */
Kojto 170:19eb464bc2be 139 /******************************************************************************/
Kojto 170:19eb464bc2be 140 uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
Kojto 170:19eb464bc2be 141 {
Kojto 170:19eb464bc2be 142 RCC_OscInitTypeDef RCC_OscInitStruct;
Kojto 170:19eb464bc2be 143 RCC_ClkInitTypeDef RCC_ClkInitStruct;
Kojto 170:19eb464bc2be 144
Kojto 170:19eb464bc2be 145 /* The voltage scaling allows optimizing the power consumption when the device is
Kojto 170:19eb464bc2be 146 clocked below the maximum system frequency, to update the voltage scaling value
Kojto 170:19eb464bc2be 147 regarding system frequency refer to product datasheet. */
Kojto 170:19eb464bc2be 148 __HAL_RCC_PWR_CLK_ENABLE();
Kojto 170:19eb464bc2be 149
Kojto 170:19eb464bc2be 150 // Enable HSE oscillator and activate PLL with HSE as source
Kojto 170:19eb464bc2be 151 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
Kojto 170:19eb464bc2be 152 if (bypass == 0) {
Kojto 170:19eb464bc2be 153 RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External xtal on OSC_IN/OSC_OUT */
Kojto 170:19eb464bc2be 154 } else {
Kojto 170:19eb464bc2be 155 RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External clock on OSC_IN */
Kojto 170:19eb464bc2be 156 }
Kojto 170:19eb464bc2be 157 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
Kojto 170:19eb464bc2be 158 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
Kojto 170:19eb464bc2be 159 RCC_OscInitStruct.PLL.PLLM = 8;
Kojto 170:19eb464bc2be 160 RCC_OscInitStruct.PLL.PLLN = 240;
Kojto 170:19eb464bc2be 161 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
Kojto 170:19eb464bc2be 162 RCC_OscInitStruct.PLL.PLLQ = 5;
Kojto 170:19eb464bc2be 163
Kojto 170:19eb464bc2be 164 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Kojto 170:19eb464bc2be 165 return 0; // FAIL
Kojto 170:19eb464bc2be 166 }
Kojto 170:19eb464bc2be 167
Kojto 170:19eb464bc2be 168 // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
Kojto 170:19eb464bc2be 169 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
Kojto 170:19eb464bc2be 170 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
Kojto 170:19eb464bc2be 171 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
Kojto 170:19eb464bc2be 172 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
Kojto 170:19eb464bc2be 173 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
Kojto 170:19eb464bc2be 174
Kojto 170:19eb464bc2be 175 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
Kojto 170:19eb464bc2be 176 return 0; // FAIL
Kojto 170:19eb464bc2be 177 }
Kojto 170:19eb464bc2be 178
Kojto 170:19eb464bc2be 179 return 1; // OK
Kojto 170:19eb464bc2be 180 }
Kojto 170:19eb464bc2be 181 #endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
Kojto 170:19eb464bc2be 182
Kojto 170:19eb464bc2be 183 #if ((CLOCK_SOURCE) & USE_PLL_HSI)
Kojto 170:19eb464bc2be 184 /******************************************************************************/
Kojto 170:19eb464bc2be 185 /* PLL (clocked by HSI) used as System clock source */
Kojto 170:19eb464bc2be 186 /******************************************************************************/
Kojto 170:19eb464bc2be 187 uint8_t SetSysClock_PLL_HSI(void)
Kojto 170:19eb464bc2be 188 {
Kojto 170:19eb464bc2be 189 RCC_ClkInitTypeDef RCC_ClkInitStruct;
Kojto 170:19eb464bc2be 190 RCC_OscInitTypeDef RCC_OscInitStruct;
Kojto 170:19eb464bc2be 191
Kojto 170:19eb464bc2be 192 /* The voltage scaling allows optimizing the power consumption when the device is
Kojto 170:19eb464bc2be 193 clocked below the maximum system frequency, to update the voltage scaling value
Kojto 170:19eb464bc2be 194 regarding system frequency refer to product datasheet. */
Kojto 170:19eb464bc2be 195 __HAL_RCC_PWR_CLK_ENABLE();
Kojto 170:19eb464bc2be 196
Kojto 170:19eb464bc2be 197 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
Kojto 170:19eb464bc2be 198 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
AnnaBridge 182:a56a73fd2a6f 199 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
Kojto 170:19eb464bc2be 200 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
Kojto 170:19eb464bc2be 201 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
Kojto 170:19eb464bc2be 202 RCC_OscInitStruct.PLL.PLLM = 16;
Kojto 170:19eb464bc2be 203 RCC_OscInitStruct.PLL.PLLN = 240;
Kojto 170:19eb464bc2be 204 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
Kojto 170:19eb464bc2be 205 RCC_OscInitStruct.PLL.PLLQ = 5;
Kojto 170:19eb464bc2be 206 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Kojto 170:19eb464bc2be 207 return 0; // FAIL
Kojto 170:19eb464bc2be 208 }
Kojto 170:19eb464bc2be 209
Kojto 170:19eb464bc2be 210 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
Kojto 170:19eb464bc2be 211 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
Kojto 170:19eb464bc2be 212 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
Kojto 170:19eb464bc2be 213 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
Kojto 170:19eb464bc2be 214 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
Kojto 170:19eb464bc2be 215 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
Kojto 170:19eb464bc2be 216 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
Kojto 170:19eb464bc2be 217 return 0; // FAIL
Kojto 170:19eb464bc2be 218 }
Kojto 170:19eb464bc2be 219
Kojto 170:19eb464bc2be 220
Kojto 170:19eb464bc2be 221 return 1; // OK
Kojto 170:19eb464bc2be 222 }
Kojto 170:19eb464bc2be 223 #endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */