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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_mmc.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:e614a9f1c9e2 1 /**
AnnaBridge 165:e614a9f1c9e2 2 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 3 * @file stm32f1xx_hal_mmc.h
AnnaBridge 165:e614a9f1c9e2 4 * @author MCD Application Team
AnnaBridge 165:e614a9f1c9e2 5 * @brief Header file of MMC HAL module.
AnnaBridge 165:e614a9f1c9e2 6 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 7 * @attention
AnnaBridge 165:e614a9f1c9e2 8 *
AnnaBridge 165:e614a9f1c9e2 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 165:e614a9f1c9e2 10 *
AnnaBridge 165:e614a9f1c9e2 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 165:e614a9f1c9e2 12 * are permitted provided that the following conditions are met:
AnnaBridge 165:e614a9f1c9e2 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 165:e614a9f1c9e2 14 * this list of conditions and the following disclaimer.
AnnaBridge 165:e614a9f1c9e2 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 165:e614a9f1c9e2 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 165:e614a9f1c9e2 17 * and/or other materials provided with the distribution.
AnnaBridge 165:e614a9f1c9e2 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 165:e614a9f1c9e2 19 * may be used to endorse or promote products derived from this software
AnnaBridge 165:e614a9f1c9e2 20 * without specific prior written permission.
AnnaBridge 165:e614a9f1c9e2 21 *
AnnaBridge 165:e614a9f1c9e2 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 165:e614a9f1c9e2 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 165:e614a9f1c9e2 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 165:e614a9f1c9e2 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 165:e614a9f1c9e2 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 165:e614a9f1c9e2 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 165:e614a9f1c9e2 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 165:e614a9f1c9e2 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 165:e614a9f1c9e2 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 165:e614a9f1c9e2 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 165:e614a9f1c9e2 32 *
AnnaBridge 165:e614a9f1c9e2 33 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 34 */
AnnaBridge 165:e614a9f1c9e2 35
AnnaBridge 165:e614a9f1c9e2 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 37 #ifndef __STM32F1xx_HAL_MMC_H
AnnaBridge 165:e614a9f1c9e2 38 #define __STM32F1xx_HAL_MMC_H
AnnaBridge 165:e614a9f1c9e2 39
AnnaBridge 165:e614a9f1c9e2 40 #ifdef __cplusplus
AnnaBridge 165:e614a9f1c9e2 41 extern "C" {
AnnaBridge 165:e614a9f1c9e2 42 #endif
AnnaBridge 165:e614a9f1c9e2 43
AnnaBridge 165:e614a9f1c9e2 44 #if defined(STM32F103xE) || defined(STM32F103xG)
AnnaBridge 165:e614a9f1c9e2 45
AnnaBridge 165:e614a9f1c9e2 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 47 #include "stm32f1xx_ll_sdmmc.h"
AnnaBridge 165:e614a9f1c9e2 48
AnnaBridge 165:e614a9f1c9e2 49 /** @addtogroup STM32F1xx_HAL_Driver
AnnaBridge 165:e614a9f1c9e2 50 * @{
AnnaBridge 165:e614a9f1c9e2 51 */
AnnaBridge 165:e614a9f1c9e2 52
AnnaBridge 165:e614a9f1c9e2 53 /** @defgroup MMC MMC
AnnaBridge 165:e614a9f1c9e2 54 * @brief MMC HAL module driver
AnnaBridge 165:e614a9f1c9e2 55 * @{
AnnaBridge 165:e614a9f1c9e2 56 */
AnnaBridge 165:e614a9f1c9e2 57
AnnaBridge 165:e614a9f1c9e2 58 /* Exported types ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 59 /** @defgroup MMC_Exported_Types MMC Exported Types
AnnaBridge 165:e614a9f1c9e2 60 * @{
AnnaBridge 165:e614a9f1c9e2 61 */
AnnaBridge 165:e614a9f1c9e2 62
AnnaBridge 165:e614a9f1c9e2 63 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
AnnaBridge 165:e614a9f1c9e2 64 * @{
AnnaBridge 165:e614a9f1c9e2 65 */
AnnaBridge 165:e614a9f1c9e2 66 typedef enum
AnnaBridge 165:e614a9f1c9e2 67 {
AnnaBridge 165:e614a9f1c9e2 68 HAL_MMC_STATE_RESET = 0x00000000U, /*!< MMC not yet initialized or disabled */
AnnaBridge 165:e614a9f1c9e2 69 HAL_MMC_STATE_READY = 0x00000001U, /*!< MMC initialized and ready for use */
AnnaBridge 165:e614a9f1c9e2 70 HAL_MMC_STATE_TIMEOUT = 0x00000002U, /*!< MMC Timeout state */
AnnaBridge 165:e614a9f1c9e2 71 HAL_MMC_STATE_BUSY = 0x00000003U, /*!< MMC process ongoing */
AnnaBridge 165:e614a9f1c9e2 72 HAL_MMC_STATE_PROGRAMMING = 0x00000004U, /*!< MMC Programming State */
AnnaBridge 165:e614a9f1c9e2 73 HAL_MMC_STATE_RECEIVING = 0x00000005U, /*!< MMC Receinving State */
AnnaBridge 165:e614a9f1c9e2 74 HAL_MMC_STATE_TRANSFER = 0x00000006U, /*!< MMC Transfert State */
AnnaBridge 165:e614a9f1c9e2 75 HAL_MMC_STATE_ERROR = 0x0000000FU /*!< MMC is in error state */
AnnaBridge 165:e614a9f1c9e2 76 }HAL_MMC_StateTypeDef;
AnnaBridge 165:e614a9f1c9e2 77 /**
AnnaBridge 165:e614a9f1c9e2 78 * @}
AnnaBridge 165:e614a9f1c9e2 79 */
AnnaBridge 165:e614a9f1c9e2 80
AnnaBridge 165:e614a9f1c9e2 81 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
AnnaBridge 165:e614a9f1c9e2 82 * @{
AnnaBridge 165:e614a9f1c9e2 83 */
AnnaBridge 165:e614a9f1c9e2 84 typedef enum
AnnaBridge 165:e614a9f1c9e2 85 {
AnnaBridge 165:e614a9f1c9e2 86 HAL_MMC_CARD_READY = 0x00000001U, /*!< Card state is ready */
AnnaBridge 165:e614a9f1c9e2 87 HAL_MMC_CARD_IDENTIFICATION = 0x00000002U, /*!< Card is in identification state */
AnnaBridge 165:e614a9f1c9e2 88 HAL_MMC_CARD_STANDBY = 0x00000003U, /*!< Card is in standby state */
AnnaBridge 165:e614a9f1c9e2 89 HAL_MMC_CARD_TRANSFER = 0x00000004U, /*!< Card is in transfer state */
AnnaBridge 165:e614a9f1c9e2 90 HAL_MMC_CARD_SENDING = 0x00000005U, /*!< Card is sending an operation */
AnnaBridge 165:e614a9f1c9e2 91 HAL_MMC_CARD_RECEIVING = 0x00000006U, /*!< Card is receiving operation information */
AnnaBridge 165:e614a9f1c9e2 92 HAL_MMC_CARD_PROGRAMMING = 0x00000007U, /*!< Card is in programming state */
AnnaBridge 165:e614a9f1c9e2 93 HAL_MMC_CARD_DISCONNECTED = 0x00000008U, /*!< Card is disconnected */
AnnaBridge 165:e614a9f1c9e2 94 HAL_MMC_CARD_ERROR = 0x000000FFU /*!< Card response Error */
AnnaBridge 165:e614a9f1c9e2 95 }HAL_MMC_CardStateTypeDef;
AnnaBridge 165:e614a9f1c9e2 96 /**
AnnaBridge 165:e614a9f1c9e2 97 * @}
AnnaBridge 165:e614a9f1c9e2 98 */
AnnaBridge 165:e614a9f1c9e2 99
AnnaBridge 165:e614a9f1c9e2 100 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition
AnnaBridge 165:e614a9f1c9e2 101 * @{
AnnaBridge 165:e614a9f1c9e2 102 */
AnnaBridge 165:e614a9f1c9e2 103 #define MMC_InitTypeDef SDIO_InitTypeDef
AnnaBridge 165:e614a9f1c9e2 104 #define MMC_TypeDef SDIO_TypeDef
AnnaBridge 165:e614a9f1c9e2 105
AnnaBridge 165:e614a9f1c9e2 106 /**
AnnaBridge 165:e614a9f1c9e2 107 * @brief MMC Card Information Structure definition
AnnaBridge 165:e614a9f1c9e2 108 */
AnnaBridge 165:e614a9f1c9e2 109 typedef struct
AnnaBridge 165:e614a9f1c9e2 110 {
AnnaBridge 165:e614a9f1c9e2 111 uint32_t CardType; /*!< Specifies the card Type */
AnnaBridge 165:e614a9f1c9e2 112
AnnaBridge 165:e614a9f1c9e2 113 uint32_t Class; /*!< Specifies the class of the card class */
AnnaBridge 165:e614a9f1c9e2 114
AnnaBridge 165:e614a9f1c9e2 115 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
AnnaBridge 165:e614a9f1c9e2 116
AnnaBridge 165:e614a9f1c9e2 117 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
AnnaBridge 165:e614a9f1c9e2 118
AnnaBridge 165:e614a9f1c9e2 119 uint32_t BlockSize; /*!< Specifies one block size in bytes */
AnnaBridge 165:e614a9f1c9e2 120
AnnaBridge 165:e614a9f1c9e2 121 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
AnnaBridge 165:e614a9f1c9e2 122
AnnaBridge 165:e614a9f1c9e2 123 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
AnnaBridge 165:e614a9f1c9e2 124
AnnaBridge 165:e614a9f1c9e2 125 }HAL_MMC_CardInfoTypeDef;
AnnaBridge 165:e614a9f1c9e2 126
AnnaBridge 165:e614a9f1c9e2 127 /**
AnnaBridge 165:e614a9f1c9e2 128 * @brief MMC handle Structure definition
AnnaBridge 165:e614a9f1c9e2 129 */
AnnaBridge 165:e614a9f1c9e2 130 typedef struct
AnnaBridge 165:e614a9f1c9e2 131 {
AnnaBridge 165:e614a9f1c9e2 132 MMC_TypeDef *Instance; /*!< MMC registers base address */
AnnaBridge 165:e614a9f1c9e2 133
AnnaBridge 165:e614a9f1c9e2 134 MMC_InitTypeDef Init; /*!< MMC required parameters */
AnnaBridge 165:e614a9f1c9e2 135
AnnaBridge 165:e614a9f1c9e2 136 HAL_LockTypeDef Lock; /*!< MMC locking object */
AnnaBridge 165:e614a9f1c9e2 137
AnnaBridge 165:e614a9f1c9e2 138 uint32_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */
AnnaBridge 165:e614a9f1c9e2 139
AnnaBridge 165:e614a9f1c9e2 140 uint32_t TxXferSize; /*!< MMC Tx Transfer size */
AnnaBridge 165:e614a9f1c9e2 141
AnnaBridge 165:e614a9f1c9e2 142 uint32_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */
AnnaBridge 165:e614a9f1c9e2 143
AnnaBridge 165:e614a9f1c9e2 144 uint32_t RxXferSize; /*!< MMC Rx Transfer size */
AnnaBridge 165:e614a9f1c9e2 145
AnnaBridge 165:e614a9f1c9e2 146 __IO uint32_t Context; /*!< MMC transfer context */
AnnaBridge 165:e614a9f1c9e2 147
AnnaBridge 165:e614a9f1c9e2 148 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */
AnnaBridge 165:e614a9f1c9e2 149
AnnaBridge 165:e614a9f1c9e2 150 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */
AnnaBridge 165:e614a9f1c9e2 151
AnnaBridge 165:e614a9f1c9e2 152 DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */
AnnaBridge 165:e614a9f1c9e2 153
AnnaBridge 165:e614a9f1c9e2 154 DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */
AnnaBridge 165:e614a9f1c9e2 155
AnnaBridge 165:e614a9f1c9e2 156 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */
AnnaBridge 165:e614a9f1c9e2 157
AnnaBridge 165:e614a9f1c9e2 158 uint32_t CSD[4U]; /*!< MMC card specific data table */
AnnaBridge 165:e614a9f1c9e2 159
AnnaBridge 165:e614a9f1c9e2 160 uint32_t CID[4U]; /*!< MMC card identification number table */
AnnaBridge 165:e614a9f1c9e2 161
AnnaBridge 165:e614a9f1c9e2 162 }MMC_HandleTypeDef;
AnnaBridge 165:e614a9f1c9e2 163
AnnaBridge 165:e614a9f1c9e2 164 /**
AnnaBridge 165:e614a9f1c9e2 165 * @}
AnnaBridge 165:e614a9f1c9e2 166 */
AnnaBridge 165:e614a9f1c9e2 167
AnnaBridge 165:e614a9f1c9e2 168 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
AnnaBridge 165:e614a9f1c9e2 169 * @{
AnnaBridge 165:e614a9f1c9e2 170 */
AnnaBridge 165:e614a9f1c9e2 171 typedef struct
AnnaBridge 165:e614a9f1c9e2 172 {
AnnaBridge 165:e614a9f1c9e2 173 __IO uint8_t CSDStruct; /*!< CSD structure */
AnnaBridge 165:e614a9f1c9e2 174 __IO uint8_t SysSpecVersion; /*!< System specification version */
AnnaBridge 165:e614a9f1c9e2 175 __IO uint8_t Reserved1; /*!< Reserved */
AnnaBridge 165:e614a9f1c9e2 176 __IO uint8_t TAAC; /*!< Data read access time 1 */
AnnaBridge 165:e614a9f1c9e2 177 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
AnnaBridge 165:e614a9f1c9e2 178 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
AnnaBridge 165:e614a9f1c9e2 179 __IO uint16_t CardComdClasses; /*!< Card command classes */
AnnaBridge 165:e614a9f1c9e2 180 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
AnnaBridge 165:e614a9f1c9e2 181 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
AnnaBridge 165:e614a9f1c9e2 182 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
AnnaBridge 165:e614a9f1c9e2 183 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
AnnaBridge 165:e614a9f1c9e2 184 __IO uint8_t DSRImpl; /*!< DSR implemented */
AnnaBridge 165:e614a9f1c9e2 185 __IO uint8_t Reserved2; /*!< Reserved */
AnnaBridge 165:e614a9f1c9e2 186 __IO uint32_t DeviceSize; /*!< Device Size */
AnnaBridge 165:e614a9f1c9e2 187 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
AnnaBridge 165:e614a9f1c9e2 188 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
AnnaBridge 165:e614a9f1c9e2 189 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
AnnaBridge 165:e614a9f1c9e2 190 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
AnnaBridge 165:e614a9f1c9e2 191 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
AnnaBridge 165:e614a9f1c9e2 192 __IO uint8_t EraseGrSize; /*!< Erase group size */
AnnaBridge 165:e614a9f1c9e2 193 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
AnnaBridge 165:e614a9f1c9e2 194 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
AnnaBridge 165:e614a9f1c9e2 195 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
AnnaBridge 165:e614a9f1c9e2 196 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
AnnaBridge 165:e614a9f1c9e2 197 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
AnnaBridge 165:e614a9f1c9e2 198 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
AnnaBridge 165:e614a9f1c9e2 199 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
AnnaBridge 165:e614a9f1c9e2 200 __IO uint8_t Reserved3; /*!< Reserved */
AnnaBridge 165:e614a9f1c9e2 201 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
AnnaBridge 165:e614a9f1c9e2 202 __IO uint8_t FileFormatGrouop; /*!< File format group */
AnnaBridge 165:e614a9f1c9e2 203 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
AnnaBridge 165:e614a9f1c9e2 204 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
AnnaBridge 165:e614a9f1c9e2 205 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
AnnaBridge 165:e614a9f1c9e2 206 __IO uint8_t FileFormat; /*!< File format */
AnnaBridge 165:e614a9f1c9e2 207 __IO uint8_t ECC; /*!< ECC code */
AnnaBridge 165:e614a9f1c9e2 208 __IO uint8_t CSD_CRC; /*!< CSD CRC */
AnnaBridge 165:e614a9f1c9e2 209 __IO uint8_t Reserved4; /*!< Always 1 */
AnnaBridge 165:e614a9f1c9e2 210
AnnaBridge 165:e614a9f1c9e2 211 }HAL_MMC_CardCSDTypeDef;
AnnaBridge 165:e614a9f1c9e2 212 /**
AnnaBridge 165:e614a9f1c9e2 213 * @}
AnnaBridge 165:e614a9f1c9e2 214 */
AnnaBridge 165:e614a9f1c9e2 215
AnnaBridge 165:e614a9f1c9e2 216 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
AnnaBridge 165:e614a9f1c9e2 217 * @{
AnnaBridge 165:e614a9f1c9e2 218 */
AnnaBridge 165:e614a9f1c9e2 219 typedef struct
AnnaBridge 165:e614a9f1c9e2 220 {
AnnaBridge 165:e614a9f1c9e2 221 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
AnnaBridge 165:e614a9f1c9e2 222 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
AnnaBridge 165:e614a9f1c9e2 223 __IO uint32_t ProdName1; /*!< Product Name part1 */
AnnaBridge 165:e614a9f1c9e2 224 __IO uint8_t ProdName2; /*!< Product Name part2 */
AnnaBridge 165:e614a9f1c9e2 225 __IO uint8_t ProdRev; /*!< Product Revision */
AnnaBridge 165:e614a9f1c9e2 226 __IO uint32_t ProdSN; /*!< Product Serial Number */
AnnaBridge 165:e614a9f1c9e2 227 __IO uint8_t Reserved1; /*!< Reserved1 */
AnnaBridge 165:e614a9f1c9e2 228 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
AnnaBridge 165:e614a9f1c9e2 229 __IO uint8_t CID_CRC; /*!< CID CRC */
AnnaBridge 165:e614a9f1c9e2 230 __IO uint8_t Reserved2; /*!< Always 1 */
AnnaBridge 165:e614a9f1c9e2 231
AnnaBridge 165:e614a9f1c9e2 232 }HAL_MMC_CardCIDTypeDef;
AnnaBridge 165:e614a9f1c9e2 233 /**
AnnaBridge 165:e614a9f1c9e2 234 * @}
AnnaBridge 165:e614a9f1c9e2 235 */
AnnaBridge 165:e614a9f1c9e2 236
AnnaBridge 165:e614a9f1c9e2 237 /** @defgroup MMC_Exported_Types_Group6 MMC Card Status returned by ACMD13
AnnaBridge 165:e614a9f1c9e2 238 * @{
AnnaBridge 165:e614a9f1c9e2 239 */
AnnaBridge 165:e614a9f1c9e2 240 typedef struct
AnnaBridge 165:e614a9f1c9e2 241 {
AnnaBridge 165:e614a9f1c9e2 242 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */
AnnaBridge 165:e614a9f1c9e2 243 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */
AnnaBridge 165:e614a9f1c9e2 244 __IO uint16_t CardType; /*!< Carries information about card type */
AnnaBridge 165:e614a9f1c9e2 245 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */
AnnaBridge 165:e614a9f1c9e2 246 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */
AnnaBridge 165:e614a9f1c9e2 247 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */
AnnaBridge 165:e614a9f1c9e2 248 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */
AnnaBridge 165:e614a9f1c9e2 249 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */
AnnaBridge 165:e614a9f1c9e2 250 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */
AnnaBridge 165:e614a9f1c9e2 251 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */
AnnaBridge 165:e614a9f1c9e2 252
AnnaBridge 165:e614a9f1c9e2 253 }HAL_MMC_CardStatusTypeDef;
AnnaBridge 165:e614a9f1c9e2 254 /**
AnnaBridge 165:e614a9f1c9e2 255 * @}
AnnaBridge 165:e614a9f1c9e2 256 */
AnnaBridge 165:e614a9f1c9e2 257
AnnaBridge 165:e614a9f1c9e2 258 /**
AnnaBridge 165:e614a9f1c9e2 259 * @}
AnnaBridge 165:e614a9f1c9e2 260 */
AnnaBridge 165:e614a9f1c9e2 261
AnnaBridge 165:e614a9f1c9e2 262 /* Exported constants --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 263 /** @defgroup MMC_Exported_Constants Exported Constants
AnnaBridge 165:e614a9f1c9e2 264 * @{
AnnaBridge 165:e614a9f1c9e2 265 */
AnnaBridge 165:e614a9f1c9e2 266
AnnaBridge 165:e614a9f1c9e2 267 #define BLOCKSIZE 512U /*!< Block size is 512 bytes */
AnnaBridge 165:e614a9f1c9e2 268
AnnaBridge 165:e614a9f1c9e2 269 #define CAPACITY 0x400000U /*!< Log Block Nuumber for 2 G bytes Cards */
AnnaBridge 165:e614a9f1c9e2 270
AnnaBridge 165:e614a9f1c9e2 271 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
AnnaBridge 165:e614a9f1c9e2 272 * @{
AnnaBridge 165:e614a9f1c9e2 273 */
AnnaBridge 165:e614a9f1c9e2 274 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
AnnaBridge 165:e614a9f1c9e2 275 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
AnnaBridge 165:e614a9f1c9e2 276 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
AnnaBridge 165:e614a9f1c9e2 277 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
AnnaBridge 165:e614a9f1c9e2 278 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
AnnaBridge 165:e614a9f1c9e2 279 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
AnnaBridge 165:e614a9f1c9e2 280 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
AnnaBridge 165:e614a9f1c9e2 281 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
AnnaBridge 165:e614a9f1c9e2 282 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the
AnnaBridge 165:e614a9f1c9e2 283 number of transferred bytes does not match the block length */
AnnaBridge 165:e614a9f1c9e2 284 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
AnnaBridge 165:e614a9f1c9e2 285 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
AnnaBridge 165:e614a9f1c9e2 286 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
AnnaBridge 165:e614a9f1c9e2 287 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock
AnnaBridge 165:e614a9f1c9e2 288 command or if there was an attempt to access a locked card */
AnnaBridge 165:e614a9f1c9e2 289 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
AnnaBridge 165:e614a9f1c9e2 290 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
AnnaBridge 165:e614a9f1c9e2 291 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
AnnaBridge 165:e614a9f1c9e2 292 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
AnnaBridge 165:e614a9f1c9e2 293 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
AnnaBridge 165:e614a9f1c9e2 294 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
AnnaBridge 165:e614a9f1c9e2 295 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
AnnaBridge 165:e614a9f1c9e2 296 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
AnnaBridge 165:e614a9f1c9e2 297 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
AnnaBridge 165:e614a9f1c9e2 298 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
AnnaBridge 165:e614a9f1c9e2 299 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out
AnnaBridge 165:e614a9f1c9e2 300 of erase sequence command was received */
AnnaBridge 165:e614a9f1c9e2 301 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
AnnaBridge 165:e614a9f1c9e2 302 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
AnnaBridge 165:e614a9f1c9e2 303 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
AnnaBridge 165:e614a9f1c9e2 304 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
AnnaBridge 165:e614a9f1c9e2 305 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
AnnaBridge 165:e614a9f1c9e2 306 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
AnnaBridge 165:e614a9f1c9e2 307 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
AnnaBridge 165:e614a9f1c9e2 308 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
AnnaBridge 165:e614a9f1c9e2 309 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
AnnaBridge 165:e614a9f1c9e2 310 /**
AnnaBridge 165:e614a9f1c9e2 311 * @}
AnnaBridge 165:e614a9f1c9e2 312 */
AnnaBridge 165:e614a9f1c9e2 313
AnnaBridge 165:e614a9f1c9e2 314 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration structure
AnnaBridge 165:e614a9f1c9e2 315 * @{
AnnaBridge 165:e614a9f1c9e2 316 */
AnnaBridge 165:e614a9f1c9e2 317 #define MMC_CONTEXT_NONE 0x00000000U /*!< None */
AnnaBridge 165:e614a9f1c9e2 318 #define MMC_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */
AnnaBridge 165:e614a9f1c9e2 319 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */
AnnaBridge 165:e614a9f1c9e2 320 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */
AnnaBridge 165:e614a9f1c9e2 321 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */
AnnaBridge 165:e614a9f1c9e2 322 #define MMC_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */
AnnaBridge 165:e614a9f1c9e2 323 #define MMC_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */
AnnaBridge 165:e614a9f1c9e2 324 /**
AnnaBridge 165:e614a9f1c9e2 325 * @}
AnnaBridge 165:e614a9f1c9e2 326 */
AnnaBridge 165:e614a9f1c9e2 327
AnnaBridge 165:e614a9f1c9e2 328 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
AnnaBridge 165:e614a9f1c9e2 329 * @{
AnnaBridge 165:e614a9f1c9e2 330 */
AnnaBridge 165:e614a9f1c9e2 331 /**
AnnaBridge 165:e614a9f1c9e2 332 * @brief
AnnaBridge 165:e614a9f1c9e2 333 */
AnnaBridge 165:e614a9f1c9e2 334 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */
AnnaBridge 165:e614a9f1c9e2 335 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */
AnnaBridge 165:e614a9f1c9e2 336 #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */
AnnaBridge 165:e614a9f1c9e2 337 #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */
AnnaBridge 165:e614a9f1c9e2 338 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U
AnnaBridge 165:e614a9f1c9e2 339 /**
AnnaBridge 165:e614a9f1c9e2 340 * @}
AnnaBridge 165:e614a9f1c9e2 341 */
AnnaBridge 165:e614a9f1c9e2 342
AnnaBridge 165:e614a9f1c9e2 343 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
AnnaBridge 165:e614a9f1c9e2 344 * @{
AnnaBridge 165:e614a9f1c9e2 345 */
AnnaBridge 165:e614a9f1c9e2 346 #define MMC_HIGH_VOLTAGE_CARD 0x00000000U
AnnaBridge 165:e614a9f1c9e2 347 #define MMC_DUAL_VOLTAGE_CARD 0x00000001U
AnnaBridge 165:e614a9f1c9e2 348 /**
AnnaBridge 165:e614a9f1c9e2 349 * @}
AnnaBridge 165:e614a9f1c9e2 350 */
AnnaBridge 165:e614a9f1c9e2 351
AnnaBridge 165:e614a9f1c9e2 352 /**
AnnaBridge 165:e614a9f1c9e2 353 * @}
AnnaBridge 165:e614a9f1c9e2 354 */
AnnaBridge 165:e614a9f1c9e2 355
AnnaBridge 165:e614a9f1c9e2 356 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 357 /** @defgroup MMC_Exported_macros MMC Exported Macros
AnnaBridge 165:e614a9f1c9e2 358 * @brief macros to handle interrupts and specific clock configurations
AnnaBridge 165:e614a9f1c9e2 359 * @{
AnnaBridge 165:e614a9f1c9e2 360 */
AnnaBridge 165:e614a9f1c9e2 361
AnnaBridge 165:e614a9f1c9e2 362 /**
AnnaBridge 165:e614a9f1c9e2 363 * @brief Enable the MMC device.
AnnaBridge 165:e614a9f1c9e2 364 * @retval None
AnnaBridge 165:e614a9f1c9e2 365 */
AnnaBridge 165:e614a9f1c9e2 366 #define __HAL_MMC_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance)
AnnaBridge 165:e614a9f1c9e2 367
AnnaBridge 165:e614a9f1c9e2 368 /**
AnnaBridge 165:e614a9f1c9e2 369 * @brief Disable the MMC device.
AnnaBridge 165:e614a9f1c9e2 370 * @retval None
AnnaBridge 165:e614a9f1c9e2 371 */
AnnaBridge 165:e614a9f1c9e2 372 #define __HAL_MMC_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance)
AnnaBridge 165:e614a9f1c9e2 373
AnnaBridge 165:e614a9f1c9e2 374 /**
AnnaBridge 165:e614a9f1c9e2 375 * @brief Enable the SDMMC DMA transfer.
AnnaBridge 165:e614a9f1c9e2 376 * @retval None
AnnaBridge 165:e614a9f1c9e2 377 */
AnnaBridge 165:e614a9f1c9e2 378 #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance)
AnnaBridge 165:e614a9f1c9e2 379
AnnaBridge 165:e614a9f1c9e2 380 /**
AnnaBridge 165:e614a9f1c9e2 381 * @brief Disable the SDMMC DMA transfer.
AnnaBridge 165:e614a9f1c9e2 382 * @retval None
AnnaBridge 165:e614a9f1c9e2 383 */
AnnaBridge 165:e614a9f1c9e2 384 #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance)
AnnaBridge 165:e614a9f1c9e2 385
AnnaBridge 165:e614a9f1c9e2 386 /**
AnnaBridge 165:e614a9f1c9e2 387 * @brief Enable the MMC device interrupt.
AnnaBridge 165:e614a9f1c9e2 388 * @param __HANDLE__: MMC Handle
AnnaBridge 165:e614a9f1c9e2 389 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled.
AnnaBridge 165:e614a9f1c9e2 390 * This parameter can be one or a combination of the following values:
AnnaBridge 165:e614a9f1c9e2 391 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 165:e614a9f1c9e2 392 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 165:e614a9f1c9e2 393 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 165:e614a9f1c9e2 394 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 165:e614a9f1c9e2 395 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 165:e614a9f1c9e2 396 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 165:e614a9f1c9e2 397 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 165:e614a9f1c9e2 398 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 165:e614a9f1c9e2 399 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 165:e614a9f1c9e2 400 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 165:e614a9f1c9e2 401 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 165:e614a9f1c9e2 402 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 165:e614a9f1c9e2 403 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 165:e614a9f1c9e2 404 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 165:e614a9f1c9e2 405 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 165:e614a9f1c9e2 406 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 165:e614a9f1c9e2 407 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 165:e614a9f1c9e2 408 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 165:e614a9f1c9e2 409 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 165:e614a9f1c9e2 410 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 165:e614a9f1c9e2 411 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 165:e614a9f1c9e2 412 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 165:e614a9f1c9e2 413 * @retval None
AnnaBridge 165:e614a9f1c9e2 414 */
AnnaBridge 165:e614a9f1c9e2 415 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 165:e614a9f1c9e2 416
AnnaBridge 165:e614a9f1c9e2 417 /**
AnnaBridge 165:e614a9f1c9e2 418 * @brief Disable the MMC device interrupt.
AnnaBridge 165:e614a9f1c9e2 419 * @param __HANDLE__: MMC Handle
AnnaBridge 165:e614a9f1c9e2 420 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled.
AnnaBridge 165:e614a9f1c9e2 421 * This parameter can be one or a combination of the following values:
AnnaBridge 165:e614a9f1c9e2 422 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 165:e614a9f1c9e2 423 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 165:e614a9f1c9e2 424 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 165:e614a9f1c9e2 425 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 165:e614a9f1c9e2 426 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 165:e614a9f1c9e2 427 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 165:e614a9f1c9e2 428 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 165:e614a9f1c9e2 429 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 165:e614a9f1c9e2 430 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 165:e614a9f1c9e2 431 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 165:e614a9f1c9e2 432 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 165:e614a9f1c9e2 433 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 165:e614a9f1c9e2 434 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 165:e614a9f1c9e2 435 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 165:e614a9f1c9e2 436 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 165:e614a9f1c9e2 437 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 165:e614a9f1c9e2 438 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 165:e614a9f1c9e2 439 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 165:e614a9f1c9e2 440 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 165:e614a9f1c9e2 441 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 165:e614a9f1c9e2 442 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 165:e614a9f1c9e2 443 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 165:e614a9f1c9e2 444 * @retval None
AnnaBridge 165:e614a9f1c9e2 445 */
AnnaBridge 165:e614a9f1c9e2 446 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 165:e614a9f1c9e2 447
AnnaBridge 165:e614a9f1c9e2 448 /**
AnnaBridge 165:e614a9f1c9e2 449 * @brief Check whether the specified MMC flag is set or not.
AnnaBridge 165:e614a9f1c9e2 450 * @param __HANDLE__: MMC Handle
AnnaBridge 165:e614a9f1c9e2 451 * @param __FLAG__: specifies the flag to check.
AnnaBridge 165:e614a9f1c9e2 452 * This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 453 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 165:e614a9f1c9e2 454 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 165:e614a9f1c9e2 455 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 165:e614a9f1c9e2 456 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
AnnaBridge 165:e614a9f1c9e2 457 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 165:e614a9f1c9e2 458 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 165:e614a9f1c9e2 459 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 165:e614a9f1c9e2 460 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 165:e614a9f1c9e2 461 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 165:e614a9f1c9e2 462 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 165:e614a9f1c9e2 463 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
AnnaBridge 165:e614a9f1c9e2 464 * @arg SDIO_FLAG_TXACT: Data transmit in progress
AnnaBridge 165:e614a9f1c9e2 465 * @arg SDIO_FLAG_RXACT: Data receive in progress
AnnaBridge 165:e614a9f1c9e2 466 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
AnnaBridge 165:e614a9f1c9e2 467 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
AnnaBridge 165:e614a9f1c9e2 468 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
AnnaBridge 165:e614a9f1c9e2 469 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
AnnaBridge 165:e614a9f1c9e2 470 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
AnnaBridge 165:e614a9f1c9e2 471 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
AnnaBridge 165:e614a9f1c9e2 472 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
AnnaBridge 165:e614a9f1c9e2 473 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
AnnaBridge 165:e614a9f1c9e2 474 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 165:e614a9f1c9e2 475 * @retval The new state of MMC FLAG (SET or RESET).
AnnaBridge 165:e614a9f1c9e2 476 */
AnnaBridge 165:e614a9f1c9e2 477 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 165:e614a9f1c9e2 478
AnnaBridge 165:e614a9f1c9e2 479 /**
AnnaBridge 165:e614a9f1c9e2 480 * @brief Clear the MMC's pending flags.
AnnaBridge 165:e614a9f1c9e2 481 * @param __HANDLE__: MMC Handle
AnnaBridge 165:e614a9f1c9e2 482 * @param __FLAG__: specifies the flag to clear.
AnnaBridge 165:e614a9f1c9e2 483 * This parameter can be one or a combination of the following values:
AnnaBridge 165:e614a9f1c9e2 484 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
AnnaBridge 165:e614a9f1c9e2 485 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
AnnaBridge 165:e614a9f1c9e2 486 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
AnnaBridge 165:e614a9f1c9e2 487 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
AnnaBridge 165:e614a9f1c9e2 488 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
AnnaBridge 165:e614a9f1c9e2 489 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
AnnaBridge 165:e614a9f1c9e2 490 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
AnnaBridge 165:e614a9f1c9e2 491 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
AnnaBridge 165:e614a9f1c9e2 492 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
AnnaBridge 165:e614a9f1c9e2 493 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
AnnaBridge 165:e614a9f1c9e2 494 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
AnnaBridge 165:e614a9f1c9e2 495 * @retval None
AnnaBridge 165:e614a9f1c9e2 496 */
AnnaBridge 165:e614a9f1c9e2 497 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
AnnaBridge 165:e614a9f1c9e2 498
AnnaBridge 165:e614a9f1c9e2 499 /**
AnnaBridge 165:e614a9f1c9e2 500 * @brief Check whether the specified MMC interrupt has occurred or not.
AnnaBridge 165:e614a9f1c9e2 501 * @param __HANDLE__: MMC Handle
AnnaBridge 165:e614a9f1c9e2 502 * @param __INTERRUPT__: specifies the SDMMC interrupt source to check.
AnnaBridge 165:e614a9f1c9e2 503 * This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 504 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 165:e614a9f1c9e2 505 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 165:e614a9f1c9e2 506 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 165:e614a9f1c9e2 507 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 165:e614a9f1c9e2 508 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 165:e614a9f1c9e2 509 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 165:e614a9f1c9e2 510 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 165:e614a9f1c9e2 511 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 165:e614a9f1c9e2 512 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
AnnaBridge 165:e614a9f1c9e2 513 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
AnnaBridge 165:e614a9f1c9e2 514 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
AnnaBridge 165:e614a9f1c9e2 515 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
AnnaBridge 165:e614a9f1c9e2 516 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
AnnaBridge 165:e614a9f1c9e2 517 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
AnnaBridge 165:e614a9f1c9e2 518 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
AnnaBridge 165:e614a9f1c9e2 519 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
AnnaBridge 165:e614a9f1c9e2 520 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
AnnaBridge 165:e614a9f1c9e2 521 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
AnnaBridge 165:e614a9f1c9e2 522 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
AnnaBridge 165:e614a9f1c9e2 523 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
AnnaBridge 165:e614a9f1c9e2 524 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
AnnaBridge 165:e614a9f1c9e2 525 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 165:e614a9f1c9e2 526 * @retval The new state of MMC IT (SET or RESET).
AnnaBridge 165:e614a9f1c9e2 527 */
AnnaBridge 165:e614a9f1c9e2 528 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 165:e614a9f1c9e2 529
AnnaBridge 165:e614a9f1c9e2 530 /**
AnnaBridge 165:e614a9f1c9e2 531 * @brief Clear the MMC's interrupt pending bits.
AnnaBridge 165:e614a9f1c9e2 532 * @param __HANDLE__: MMC Handle
AnnaBridge 165:e614a9f1c9e2 533 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
AnnaBridge 165:e614a9f1c9e2 534 * This parameter can be one or a combination of the following values:
AnnaBridge 165:e614a9f1c9e2 535 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
AnnaBridge 165:e614a9f1c9e2 536 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
AnnaBridge 165:e614a9f1c9e2 537 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
AnnaBridge 165:e614a9f1c9e2 538 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
AnnaBridge 165:e614a9f1c9e2 539 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
AnnaBridge 165:e614a9f1c9e2 540 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
AnnaBridge 165:e614a9f1c9e2 541 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
AnnaBridge 165:e614a9f1c9e2 542 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
AnnaBridge 165:e614a9f1c9e2 543 * @arg SDIO_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt
AnnaBridge 165:e614a9f1c9e2 544 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
AnnaBridge 165:e614a9f1c9e2 545 * @retval None
AnnaBridge 165:e614a9f1c9e2 546 */
AnnaBridge 165:e614a9f1c9e2 547 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
AnnaBridge 165:e614a9f1c9e2 548
AnnaBridge 165:e614a9f1c9e2 549 /**
AnnaBridge 165:e614a9f1c9e2 550 * @}
AnnaBridge 165:e614a9f1c9e2 551 */
AnnaBridge 165:e614a9f1c9e2 552
AnnaBridge 165:e614a9f1c9e2 553 /* Exported functions --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 554 /** @defgroup MMC_Exported_Functions MMC Exported Functions
AnnaBridge 165:e614a9f1c9e2 555 * @{
AnnaBridge 165:e614a9f1c9e2 556 */
AnnaBridge 165:e614a9f1c9e2 557
AnnaBridge 165:e614a9f1c9e2 558 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 165:e614a9f1c9e2 559 * @{
AnnaBridge 165:e614a9f1c9e2 560 */
AnnaBridge 165:e614a9f1c9e2 561 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 562 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 563 HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 564 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 565 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 566 /**
AnnaBridge 165:e614a9f1c9e2 567 * @}
AnnaBridge 165:e614a9f1c9e2 568 */
AnnaBridge 165:e614a9f1c9e2 569
AnnaBridge 165:e614a9f1c9e2 570 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
AnnaBridge 165:e614a9f1c9e2 571 * @{
AnnaBridge 165:e614a9f1c9e2 572 */
AnnaBridge 165:e614a9f1c9e2 573 /* Blocking mode: Polling */
AnnaBridge 165:e614a9f1c9e2 574 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 165:e614a9f1c9e2 575 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
AnnaBridge 165:e614a9f1c9e2 576 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
AnnaBridge 165:e614a9f1c9e2 577 /* Non-Blocking mode: IT */
AnnaBridge 165:e614a9f1c9e2 578 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 165:e614a9f1c9e2 579 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 165:e614a9f1c9e2 580 /* Non-Blocking mode: DMA */
AnnaBridge 165:e614a9f1c9e2 581 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 165:e614a9f1c9e2 582 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
AnnaBridge 165:e614a9f1c9e2 583
AnnaBridge 165:e614a9f1c9e2 584 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 585
AnnaBridge 165:e614a9f1c9e2 586 /* Callback in non blocking modes (DMA) */
AnnaBridge 165:e614a9f1c9e2 587 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 588 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 589 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 590 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 591 /**
AnnaBridge 165:e614a9f1c9e2 592 * @}
AnnaBridge 165:e614a9f1c9e2 593 */
AnnaBridge 165:e614a9f1c9e2 594
AnnaBridge 165:e614a9f1c9e2 595 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 165:e614a9f1c9e2 596 * @{
AnnaBridge 165:e614a9f1c9e2 597 */
AnnaBridge 165:e614a9f1c9e2 598 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
AnnaBridge 165:e614a9f1c9e2 599 /**
AnnaBridge 165:e614a9f1c9e2 600 * @}
AnnaBridge 165:e614a9f1c9e2 601 */
AnnaBridge 165:e614a9f1c9e2 602
AnnaBridge 165:e614a9f1c9e2 603 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
AnnaBridge 165:e614a9f1c9e2 604 * @{
AnnaBridge 165:e614a9f1c9e2 605 */
AnnaBridge 165:e614a9f1c9e2 606 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 607 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
AnnaBridge 165:e614a9f1c9e2 608 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
AnnaBridge 165:e614a9f1c9e2 609 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
AnnaBridge 165:e614a9f1c9e2 610 /**
AnnaBridge 165:e614a9f1c9e2 611 * @}
AnnaBridge 165:e614a9f1c9e2 612 */
AnnaBridge 165:e614a9f1c9e2 613
AnnaBridge 165:e614a9f1c9e2 614 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
AnnaBridge 165:e614a9f1c9e2 615 * @{
AnnaBridge 165:e614a9f1c9e2 616 */
AnnaBridge 165:e614a9f1c9e2 617 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 618 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 619 /**
AnnaBridge 165:e614a9f1c9e2 620 * @}
AnnaBridge 165:e614a9f1c9e2 621 */
AnnaBridge 165:e614a9f1c9e2 622
AnnaBridge 165:e614a9f1c9e2 623 /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management
AnnaBridge 165:e614a9f1c9e2 624 * @{
AnnaBridge 165:e614a9f1c9e2 625 */
AnnaBridge 165:e614a9f1c9e2 626 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 627 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
AnnaBridge 165:e614a9f1c9e2 628 /**
AnnaBridge 165:e614a9f1c9e2 629 * @}
AnnaBridge 165:e614a9f1c9e2 630 */
AnnaBridge 165:e614a9f1c9e2 631
AnnaBridge 165:e614a9f1c9e2 632 /* Private types -------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 633 /** @defgroup MMC_Private_Types MMC Private Types
AnnaBridge 165:e614a9f1c9e2 634 * @{
AnnaBridge 165:e614a9f1c9e2 635 */
AnnaBridge 165:e614a9f1c9e2 636
AnnaBridge 165:e614a9f1c9e2 637 /**
AnnaBridge 165:e614a9f1c9e2 638 * @}
AnnaBridge 165:e614a9f1c9e2 639 */
AnnaBridge 165:e614a9f1c9e2 640
AnnaBridge 165:e614a9f1c9e2 641 /* Private defines -----------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 642 /** @defgroup MMC_Private_Defines MMC Private Defines
AnnaBridge 165:e614a9f1c9e2 643 * @{
AnnaBridge 165:e614a9f1c9e2 644 */
AnnaBridge 165:e614a9f1c9e2 645
AnnaBridge 165:e614a9f1c9e2 646 /**
AnnaBridge 165:e614a9f1c9e2 647 * @}
AnnaBridge 165:e614a9f1c9e2 648 */
AnnaBridge 165:e614a9f1c9e2 649
AnnaBridge 165:e614a9f1c9e2 650 /* Private variables ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 651 /** @defgroup MMC_Private_Variables MMC Private Variables
AnnaBridge 165:e614a9f1c9e2 652 * @{
AnnaBridge 165:e614a9f1c9e2 653 */
AnnaBridge 165:e614a9f1c9e2 654
AnnaBridge 165:e614a9f1c9e2 655 /**
AnnaBridge 165:e614a9f1c9e2 656 * @}
AnnaBridge 165:e614a9f1c9e2 657 */
AnnaBridge 165:e614a9f1c9e2 658
AnnaBridge 165:e614a9f1c9e2 659 /* Private constants ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 660 /** @defgroup MMC_Private_Constants MMC Private Constants
AnnaBridge 165:e614a9f1c9e2 661 * @{
AnnaBridge 165:e614a9f1c9e2 662 */
AnnaBridge 165:e614a9f1c9e2 663
AnnaBridge 165:e614a9f1c9e2 664 /**
AnnaBridge 165:e614a9f1c9e2 665 * @}
AnnaBridge 165:e614a9f1c9e2 666 */
AnnaBridge 165:e614a9f1c9e2 667
AnnaBridge 165:e614a9f1c9e2 668 /* Private macros ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 669 /** @defgroup MMC_Private_Macros MMC Private Macros
AnnaBridge 165:e614a9f1c9e2 670 * @{
AnnaBridge 165:e614a9f1c9e2 671 */
AnnaBridge 165:e614a9f1c9e2 672
AnnaBridge 165:e614a9f1c9e2 673 /**
AnnaBridge 165:e614a9f1c9e2 674 * @}
AnnaBridge 165:e614a9f1c9e2 675 */
AnnaBridge 165:e614a9f1c9e2 676
AnnaBridge 165:e614a9f1c9e2 677 /* Private functions prototypes ----------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 678 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
AnnaBridge 165:e614a9f1c9e2 679 * @{
AnnaBridge 165:e614a9f1c9e2 680 */
AnnaBridge 165:e614a9f1c9e2 681
AnnaBridge 165:e614a9f1c9e2 682 /**
AnnaBridge 165:e614a9f1c9e2 683 * @}
AnnaBridge 165:e614a9f1c9e2 684 */
AnnaBridge 165:e614a9f1c9e2 685
AnnaBridge 165:e614a9f1c9e2 686 /* Private functions ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 687 /** @defgroup MMC_Private_Functions MMC Private Functions
AnnaBridge 165:e614a9f1c9e2 688 * @{
AnnaBridge 165:e614a9f1c9e2 689 */
AnnaBridge 165:e614a9f1c9e2 690
AnnaBridge 165:e614a9f1c9e2 691 /**
AnnaBridge 165:e614a9f1c9e2 692 * @}
AnnaBridge 165:e614a9f1c9e2 693 */
AnnaBridge 165:e614a9f1c9e2 694
AnnaBridge 165:e614a9f1c9e2 695 /**
AnnaBridge 165:e614a9f1c9e2 696 * @}
AnnaBridge 165:e614a9f1c9e2 697 */
AnnaBridge 165:e614a9f1c9e2 698
AnnaBridge 165:e614a9f1c9e2 699 /**
AnnaBridge 165:e614a9f1c9e2 700 * @}
AnnaBridge 165:e614a9f1c9e2 701 */
AnnaBridge 165:e614a9f1c9e2 702
AnnaBridge 165:e614a9f1c9e2 703 /**
AnnaBridge 165:e614a9f1c9e2 704 * @}
AnnaBridge 165:e614a9f1c9e2 705 */
AnnaBridge 165:e614a9f1c9e2 706
AnnaBridge 165:e614a9f1c9e2 707 #endif /* STM32F103xE || STM32F103xG */
AnnaBridge 165:e614a9f1c9e2 708
AnnaBridge 165:e614a9f1c9e2 709 #ifdef __cplusplus
AnnaBridge 165:e614a9f1c9e2 710 }
AnnaBridge 165:e614a9f1c9e2 711 #endif
AnnaBridge 165:e614a9f1c9e2 712
AnnaBridge 165:e614a9f1c9e2 713
AnnaBridge 165:e614a9f1c9e2 714 #endif /* __STM32F1xx_HAL_MMC_H */
AnnaBridge 165:e614a9f1c9e2 715
AnnaBridge 165:e614a9f1c9e2 716 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/