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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_comp.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_comp.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief COMP HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the COMP peripheral:
<> 144:ef7eb2e8f9f7 8 * + Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 9 * + I/O operation functions
<> 144:ef7eb2e8f9f7 10 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 11 * + Peripheral State functions
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 @verbatim
<> 144:ef7eb2e8f9f7 14 ================================================================================
<> 144:ef7eb2e8f9f7 15 ##### COMP Peripheral features #####
<> 144:ef7eb2e8f9f7 16 ================================================================================
<> 144:ef7eb2e8f9f7 17
<> 144:ef7eb2e8f9f7 18 [..]
<> 144:ef7eb2e8f9f7 19 The STM32F0xx device family integrates up to 2 analog comparators COMP1 and COMP2:
<> 144:ef7eb2e8f9f7 20 (+) The non inverting input and inverting input can be set to GPIO pins.
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 (+) The COMP output is available using HAL_COMP_GetOutputLevel()
<> 144:ef7eb2e8f9f7 23 and can be set on GPIO pins.
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 (+) The COMP output can be redirected to embedded timers (TIM1, TIM2 and TIM3).
<> 144:ef7eb2e8f9f7 26
<> 144:ef7eb2e8f9f7 27 (+) The comparators COMP1 and COMP2 can be combined in window mode.
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 (+) The comparators have interrupt capability with wake-up
<> 144:ef7eb2e8f9f7 30 from Sleep and Stop modes (through the EXTI controller):
<> 144:ef7eb2e8f9f7 31 (++) COMP1 is internally connected to EXTI Line 21
<> 144:ef7eb2e8f9f7 32 (++) COMP2 is internally connected to EXTI Line 22
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 (+) From the corresponding IRQ handler, the right interrupt source can be retrieved with the
<> 144:ef7eb2e8f9f7 35 macros __HAL_COMP_COMP1_EXTI_GET_FLAG() and __HAL_COMP_COMP2_EXTI_GET_FLAG().
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 39 ================================================================================
<> 144:ef7eb2e8f9f7 40 [..]
<> 144:ef7eb2e8f9f7 41 This driver provides functions to configure and program the Comparators of STM32F05x, STM32F07x and STM32F09x devices.
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 To use the comparator, perform the following steps:
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 (#) Fill in the HAL_COMP_MspInit() to
<> 144:ef7eb2e8f9f7 46 (++) Configure the comparator input in analog mode using HAL_GPIO_Init()
<> 144:ef7eb2e8f9f7 47 (++) Configure the comparator output in alternate function mode using HAL_GPIO_Init() to map the comparator
<> 144:ef7eb2e8f9f7 48 output to the GPIO pin
<> 144:ef7eb2e8f9f7 49 (++) If required enable the COMP interrupt by configuring and enabling EXTI line in Interrupt mode and
<> 144:ef7eb2e8f9f7 50 selecting the desired sensitivity level using HAL_GPIO_Init() function. After that enable the comparator
<> 144:ef7eb2e8f9f7 51 interrupt vector using HAL_NVIC_EnableIRQ() function.
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 (#) Configure the comparator using HAL_COMP_Init() function:
<> 144:ef7eb2e8f9f7 54 (++) Select the inverting input (input minus)
<> 144:ef7eb2e8f9f7 55 (++) Select the non inverting input (input plus)
<> 144:ef7eb2e8f9f7 56 (++) Select the output polarity
<> 144:ef7eb2e8f9f7 57 (++) Select the output redirection
<> 144:ef7eb2e8f9f7 58 (++) Select the hysteresis level
<> 144:ef7eb2e8f9f7 59 (++) Select the power mode
<> 144:ef7eb2e8f9f7 60 (++) Select the event/interrupt mode
<> 144:ef7eb2e8f9f7 61 (++) Select the window mode
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 -@@- HAL_COMP_Init() calls internally __HAL_RCC_SYSCFG_CLK_ENABLE() in order
<> 144:ef7eb2e8f9f7 64 to access the comparator(s) registers.
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 (#) Enable the comparator using HAL_COMP_Start() function or HAL_COMP_Start_IT() function for interrupt mode.
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 (#) Use HAL_COMP_TriggerCallback() and/or HAL_COMP_GetOutputLevel() functions
<> 144:ef7eb2e8f9f7 69 to manage comparator outputs (event/interrupt triggered and output level).
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 (#) Disable the comparator using HAL_COMP_Stop() or HAL_COMP_Stop_IT()
<> 144:ef7eb2e8f9f7 72 function.
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 (#) De-initialize the comparator using HAL_COMP_DeInit() function.
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 (#) For safety purposes comparator(s) can be locked using HAL_COMP_Lock() function.
<> 144:ef7eb2e8f9f7 77 Only a MCU reset can reset that protection.
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 @endverbatim
<> 144:ef7eb2e8f9f7 80 ******************************************************************************
<> 144:ef7eb2e8f9f7 81 * @attention
<> 144:ef7eb2e8f9f7 82 *
<> 144:ef7eb2e8f9f7 83 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 84 *
<> 144:ef7eb2e8f9f7 85 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 86 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 87 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 88 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 89 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 90 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 91 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 92 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 93 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 94 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 95 *
<> 144:ef7eb2e8f9f7 96 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 97 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 98 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 99 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 100 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 101 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 102 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 103 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 104 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 105 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 106 *
<> 144:ef7eb2e8f9f7 107 ******************************************************************************
<> 144:ef7eb2e8f9f7 108 */
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /*
<> 144:ef7eb2e8f9f7 111 Additional Tables:
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 Table 1. COMP Inputs for the STM32F05x, STM32F07x and STM32F09x devices
<> 144:ef7eb2e8f9f7 114 +--------------------------------------------------+
<> 144:ef7eb2e8f9f7 115 | | | COMP1 | COMP2 |
<> 144:ef7eb2e8f9f7 116 |-----------------|----------------|---------------|
<> 144:ef7eb2e8f9f7 117 | | 1/4 VREFINT | OK | OK |
<> 144:ef7eb2e8f9f7 118 | | 1/2 VREFINT | OK | OK |
<> 144:ef7eb2e8f9f7 119 | | 3/4 VREFINT | OK | OK |
<> 144:ef7eb2e8f9f7 120 | Inverting Input | VREFINT | OK | OK |
<> 144:ef7eb2e8f9f7 121 | | DAC1 OUT (PA4) | OK | OK |
<> 144:ef7eb2e8f9f7 122 | | DAC2 OUT (PA5) | OK | OK |
<> 144:ef7eb2e8f9f7 123 | | IO1 | PA0 | PA2 |
<> 144:ef7eb2e8f9f7 124 |-----------------|----------------|-------|-------|
<> 144:ef7eb2e8f9f7 125 | Non Inverting | | PA1 | PA3 |
<> 144:ef7eb2e8f9f7 126 | Input | | | |
<> 144:ef7eb2e8f9f7 127 +--------------------------------------------------+
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 Table 2. COMP Outputs for the STM32F05x, STM32F07x and STM32F09x devices
<> 144:ef7eb2e8f9f7 130 +---------------+
<> 144:ef7eb2e8f9f7 131 | COMP1 | COMP2 |
<> 144:ef7eb2e8f9f7 132 |-------|-------|
<> 144:ef7eb2e8f9f7 133 | PA0 | PA2 |
<> 144:ef7eb2e8f9f7 134 | PA6 | PA7 |
<> 144:ef7eb2e8f9f7 135 | PA11 | PA12 |
<> 144:ef7eb2e8f9f7 136 +---------------+
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 Table 3. COMP Outputs redirection to embedded timers for the STM32F05x, STM32F07x and STM32F09x devices
<> 144:ef7eb2e8f9f7 139 +---------------------------------+
<> 144:ef7eb2e8f9f7 140 | COMP1 | COMP2 |
<> 144:ef7eb2e8f9f7 141 |----------------|----------------|
<> 144:ef7eb2e8f9f7 142 | TIM1 BKIN | TIM1 BKIN |
<> 144:ef7eb2e8f9f7 143 | | |
<> 144:ef7eb2e8f9f7 144 | TIM1 OCREFCLR | TIM1 OCREFCLR |
<> 144:ef7eb2e8f9f7 145 | | |
<> 144:ef7eb2e8f9f7 146 | TIM1 IC1 | TIM1 IC1 |
<> 144:ef7eb2e8f9f7 147 | | |
<> 144:ef7eb2e8f9f7 148 | TIM2 IC4 | TIM2 IC4 |
<> 144:ef7eb2e8f9f7 149 | | |
<> 144:ef7eb2e8f9f7 150 | TIM2 OCREFCLR | TIM2 OCREFCLR |
<> 144:ef7eb2e8f9f7 151 | | |
<> 144:ef7eb2e8f9f7 152 | TIM3 IC1 | TIM3 IC1 |
<> 144:ef7eb2e8f9f7 153 | | |
<> 144:ef7eb2e8f9f7 154 | TIM3 OCREFCLR | TIM3 OCREFCLR |
<> 144:ef7eb2e8f9f7 155 +---------------------------------+
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 */
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 160 #include "stm32f0xx_hal.h"
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 #ifdef HAL_COMP_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 #if defined(STM32F051x8) || defined(STM32F058xx) || \
<> 144:ef7eb2e8f9f7 165 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
<> 144:ef7eb2e8f9f7 166 defined(STM32F091xC) || defined (STM32F098xx)
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 169 * @{
<> 144:ef7eb2e8f9f7 170 */
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 /** @defgroup COMP COMP
<> 144:ef7eb2e8f9f7 173 * @brief COMP HAL module driver
<> 144:ef7eb2e8f9f7 174 * @{
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 178 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /** @defgroup COMP_Private_Constants COMP Private Constants
<> 144:ef7eb2e8f9f7 181 * @{
<> 144:ef7eb2e8f9f7 182 */
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /* Delay for COMP startup time. */
<> 144:ef7eb2e8f9f7 185 /* Note: Delay required to reach propagation delay specification. */
<> 144:ef7eb2e8f9f7 186 /* Literal set to maximum value (refer to device datasheet, */
<> 144:ef7eb2e8f9f7 187 /* parameter "tSTART"). */
<> 144:ef7eb2e8f9f7 188 /* Unit: us */
Anna Bridge 180:96ed750bd169 189 #define COMP_DELAY_STARTUP_US (60U) /*!< Delay for COMP startup time */
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /* CSR register reset value */
<> 156:95d6b41a828b 192 #define COMP_CSR_RESET_VALUE (0x00000000U)
<> 144:ef7eb2e8f9f7 193 /* CSR register masks */
<> 156:95d6b41a828b 194 #define COMP_CSR_RESET_PARAMETERS_MASK (0x00003FFFU)
<> 156:95d6b41a828b 195 #define COMP_CSR_UPDATE_PARAMETERS_MASK (0x00003FFEU)
<> 144:ef7eb2e8f9f7 196 /* CSR COMPx non inverting input mask */
<> 144:ef7eb2e8f9f7 197 #define COMP_CSR_COMPxNONINSEL_MASK ((uint16_t)COMP_CSR_COMP1SW1)
<> 144:ef7eb2e8f9f7 198 /* CSR COMP2 shift */
<> 144:ef7eb2e8f9f7 199 #define COMP_CSR_COMP1_SHIFT 0U
<> 144:ef7eb2e8f9f7 200 #define COMP_CSR_COMP2_SHIFT 16U
<> 144:ef7eb2e8f9f7 201 /**
<> 144:ef7eb2e8f9f7 202 * @}
<> 144:ef7eb2e8f9f7 203 */
<> 144:ef7eb2e8f9f7 204 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 205 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 206 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 207 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /** @defgroup COMP_Exported_Functions COMP Exported Functions
<> 144:ef7eb2e8f9f7 210 * @{
<> 144:ef7eb2e8f9f7 211 */
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /** @defgroup COMP_Exported_Functions_Group1 Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 214 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 215 *
<> 144:ef7eb2e8f9f7 216 @verbatim
<> 144:ef7eb2e8f9f7 217 ===============================================================================
<> 144:ef7eb2e8f9f7 218 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 219 ===============================================================================
<> 144:ef7eb2e8f9f7 220 [..] This section provides functions to initialize and de-initialize comparators
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 @endverbatim
<> 144:ef7eb2e8f9f7 223 * @{
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 /**
<> 144:ef7eb2e8f9f7 227 * @brief Initializes the COMP according to the specified
<> 144:ef7eb2e8f9f7 228 * parameters in the COMP_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 229 * @note If the selected comparator is locked, initialization can't be performed.
<> 144:ef7eb2e8f9f7 230 * To unlock the configuration, perform a system reset.
Anna Bridge 180:96ed750bd169 231 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 232 * @retval HAL status
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234 HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 235 {
<> 144:ef7eb2e8f9f7 236 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 237 uint32_t regshift = COMP_CSR_COMP1_SHIFT;
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /* Check the COMP handle allocation and lock status */
<> 144:ef7eb2e8f9f7 240 if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
<> 144:ef7eb2e8f9f7 241 {
<> 144:ef7eb2e8f9f7 242 status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 243 }
<> 144:ef7eb2e8f9f7 244 else
<> 144:ef7eb2e8f9f7 245 {
<> 144:ef7eb2e8f9f7 246 /* Check the parameter */
<> 144:ef7eb2e8f9f7 247 assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 248 assert_param(IS_COMP_INVERTINGINPUT(hcomp->Init.InvertingInput));
<> 144:ef7eb2e8f9f7 249 assert_param(IS_COMP_NONINVERTINGINPUT(hcomp->Init.NonInvertingInput));
<> 144:ef7eb2e8f9f7 250 assert_param(IS_COMP_OUTPUT(hcomp->Init.Output));
<> 144:ef7eb2e8f9f7 251 assert_param(IS_COMP_OUTPUTPOL(hcomp->Init.OutputPol));
<> 144:ef7eb2e8f9f7 252 assert_param(IS_COMP_HYSTERESIS(hcomp->Init.Hysteresis));
<> 144:ef7eb2e8f9f7 253 assert_param(IS_COMP_MODE(hcomp->Init.Mode));
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 if(hcomp->Init.NonInvertingInput == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED)
<> 144:ef7eb2e8f9f7 256 {
<> 144:ef7eb2e8f9f7 257 assert_param(IS_COMP_DAC1SWITCH_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 258 }
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 if(hcomp->Init.WindowMode != COMP_WINDOWMODE_DISABLE)
<> 144:ef7eb2e8f9f7 261 {
<> 144:ef7eb2e8f9f7 262 assert_param(IS_COMP_WINDOWMODE_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 263 }
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 /* Init SYSCFG and the low level hardware to access comparators */
<> 144:ef7eb2e8f9f7 266 __HAL_RCC_SYSCFG_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /* Init the low level hardware : SYSCFG to access comparators */
<> 144:ef7eb2e8f9f7 269 HAL_COMP_MspInit(hcomp);
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 if(hcomp->State == HAL_COMP_STATE_RESET)
<> 144:ef7eb2e8f9f7 272 {
<> 144:ef7eb2e8f9f7 273 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 274 hcomp->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 275 }
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /* Change COMP peripheral state */
<> 144:ef7eb2e8f9f7 278 hcomp->State = HAL_COMP_STATE_BUSY;
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /* Set COMP parameters */
<> 144:ef7eb2e8f9f7 281 /* Set COMPxINSEL bits according to hcomp->Init.InvertingInput value */
<> 144:ef7eb2e8f9f7 282 /* Set COMPxOUTSEL bits according to hcomp->Init.Output value */
<> 144:ef7eb2e8f9f7 283 /* Set COMPxPOL bit according to hcomp->Init.OutputPol value */
<> 144:ef7eb2e8f9f7 284 /* Set COMPxHYST bits according to hcomp->Init.Hysteresis value */
<> 144:ef7eb2e8f9f7 285 /* Set COMPxMODE bits according to hcomp->Init.Mode value */
<> 144:ef7eb2e8f9f7 286 if(hcomp->Instance == COMP2)
<> 144:ef7eb2e8f9f7 287 {
<> 144:ef7eb2e8f9f7 288 regshift = COMP_CSR_COMP2_SHIFT;
<> 144:ef7eb2e8f9f7 289 }
<> 144:ef7eb2e8f9f7 290 MODIFY_REG(COMP->CSR,
<> 144:ef7eb2e8f9f7 291 (COMP_CSR_COMPxINSEL | COMP_CSR_COMPxNONINSEL_MASK | \
<> 144:ef7eb2e8f9f7 292 COMP_CSR_COMPxOUTSEL | COMP_CSR_COMPxPOL | \
<> 144:ef7eb2e8f9f7 293 COMP_CSR_COMPxHYST | COMP_CSR_COMPxMODE) << regshift,
<> 144:ef7eb2e8f9f7 294 (hcomp->Init.InvertingInput | \
<> 144:ef7eb2e8f9f7 295 hcomp->Init.NonInvertingInput | \
<> 144:ef7eb2e8f9f7 296 hcomp->Init.Output | \
<> 144:ef7eb2e8f9f7 297 hcomp->Init.OutputPol | \
<> 144:ef7eb2e8f9f7 298 hcomp->Init.Hysteresis | \
<> 144:ef7eb2e8f9f7 299 hcomp->Init.Mode) << regshift);
<> 144:ef7eb2e8f9f7 300
<> 144:ef7eb2e8f9f7 301 if(hcomp->Init.WindowMode != COMP_WINDOWMODE_DISABLE)
<> 144:ef7eb2e8f9f7 302 {
<> 144:ef7eb2e8f9f7 303 COMP->CSR |= COMP_CSR_WNDWEN;
<> 144:ef7eb2e8f9f7 304 }
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /* Initialize the COMP state*/
<> 144:ef7eb2e8f9f7 307 hcomp->State = HAL_COMP_STATE_READY;
<> 144:ef7eb2e8f9f7 308 }
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 return status;
<> 144:ef7eb2e8f9f7 311 }
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 /**
<> 144:ef7eb2e8f9f7 314 * @brief DeInitializes the COMP peripheral
<> 144:ef7eb2e8f9f7 315 * @note Deinitialization can't be performed if the COMP configuration is locked.
<> 144:ef7eb2e8f9f7 316 * To unlock the configuration, perform a system reset.
Anna Bridge 180:96ed750bd169 317 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 318 * @retval HAL status
<> 144:ef7eb2e8f9f7 319 */
<> 144:ef7eb2e8f9f7 320 HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 321 {
<> 144:ef7eb2e8f9f7 322 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 323 uint32_t regshift = COMP_CSR_COMP1_SHIFT;
<> 144:ef7eb2e8f9f7 324
<> 144:ef7eb2e8f9f7 325 /* Check the COMP handle allocation and lock status */
<> 144:ef7eb2e8f9f7 326 if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
<> 144:ef7eb2e8f9f7 327 {
<> 144:ef7eb2e8f9f7 328 status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 329 }
<> 144:ef7eb2e8f9f7 330 else
<> 144:ef7eb2e8f9f7 331 {
<> 144:ef7eb2e8f9f7 332 /* Check the parameter */
<> 144:ef7eb2e8f9f7 333 assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /* Set COMP_CSR register to reset value for the corresponding COMP instance */
<> 144:ef7eb2e8f9f7 336 if(hcomp->Instance == COMP2)
<> 144:ef7eb2e8f9f7 337 {
<> 144:ef7eb2e8f9f7 338 regshift = COMP_CSR_COMP2_SHIFT;
<> 144:ef7eb2e8f9f7 339 }
<> 144:ef7eb2e8f9f7 340 MODIFY_REG(COMP->CSR,
<> 144:ef7eb2e8f9f7 341 COMP_CSR_RESET_PARAMETERS_MASK << regshift,
<> 144:ef7eb2e8f9f7 342 COMP_CSR_RESET_VALUE << regshift);
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /* DeInit the low level hardware: SYSCFG, GPIO, CLOCK and NVIC */
<> 144:ef7eb2e8f9f7 345 HAL_COMP_MspDeInit(hcomp);
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 hcomp->State = HAL_COMP_STATE_RESET;
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 /* Release Lock */
<> 144:ef7eb2e8f9f7 350 __HAL_UNLOCK(hcomp);
<> 144:ef7eb2e8f9f7 351 }
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 return status;
<> 144:ef7eb2e8f9f7 354 }
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 /**
<> 144:ef7eb2e8f9f7 357 * @brief Initializes the COMP MSP.
Anna Bridge 180:96ed750bd169 358 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 359 * @retval None
<> 144:ef7eb2e8f9f7 360 */
<> 144:ef7eb2e8f9f7 361 __weak void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 362 {
<> 144:ef7eb2e8f9f7 363 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 364 UNUSED(hcomp);
<> 144:ef7eb2e8f9f7 365
<> 144:ef7eb2e8f9f7 366 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 367 the HAL_COMP_MspInit could be implenetd in the user file
<> 144:ef7eb2e8f9f7 368 */
<> 144:ef7eb2e8f9f7 369 }
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 /**
<> 144:ef7eb2e8f9f7 372 * @brief DeInitializes COMP MSP.
Anna Bridge 180:96ed750bd169 373 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 374 * @retval None
<> 144:ef7eb2e8f9f7 375 */
<> 144:ef7eb2e8f9f7 376 __weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 377 {
<> 144:ef7eb2e8f9f7 378 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 379 UNUSED(hcomp);
<> 144:ef7eb2e8f9f7 380
<> 144:ef7eb2e8f9f7 381 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 382 the HAL_COMP_MspDeInit could be implenetd in the user file
<> 144:ef7eb2e8f9f7 383 */
<> 144:ef7eb2e8f9f7 384 }
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386 /**
<> 144:ef7eb2e8f9f7 387 * @}
<> 144:ef7eb2e8f9f7 388 */
<> 144:ef7eb2e8f9f7 389
<> 144:ef7eb2e8f9f7 390 /** @defgroup COMP_Exported_Functions_Group2 I/O operation functions
<> 144:ef7eb2e8f9f7 391 * @brief Data transfers functions
<> 144:ef7eb2e8f9f7 392 *
<> 144:ef7eb2e8f9f7 393 @verbatim
<> 144:ef7eb2e8f9f7 394 ===============================================================================
<> 144:ef7eb2e8f9f7 395 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 396 ===============================================================================
<> 144:ef7eb2e8f9f7 397 [..]
<> 144:ef7eb2e8f9f7 398 This subsection provides a set of functions allowing to manage the COMP data
<> 144:ef7eb2e8f9f7 399 transfers.
<> 144:ef7eb2e8f9f7 400
<> 144:ef7eb2e8f9f7 401 @endverbatim
<> 144:ef7eb2e8f9f7 402 * @{
<> 144:ef7eb2e8f9f7 403 */
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405 /**
<> 144:ef7eb2e8f9f7 406 * @brief Start the comparator
Anna Bridge 180:96ed750bd169 407 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 408 * @retval HAL status
<> 144:ef7eb2e8f9f7 409 */
<> 144:ef7eb2e8f9f7 410 HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 411 {
<> 156:95d6b41a828b 412 uint32_t wait_loop_index = 0U;
<> 144:ef7eb2e8f9f7 413 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 414 uint32_t regshift = COMP_CSR_COMP1_SHIFT;
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 /* Check the COMP handle allocation and lock status */
<> 144:ef7eb2e8f9f7 417 if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
<> 144:ef7eb2e8f9f7 418 {
<> 144:ef7eb2e8f9f7 419 status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 420 }
<> 144:ef7eb2e8f9f7 421 else
<> 144:ef7eb2e8f9f7 422 {
<> 144:ef7eb2e8f9f7 423 /* Check the parameter */
<> 144:ef7eb2e8f9f7 424 assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 if(hcomp->State == HAL_COMP_STATE_READY)
<> 144:ef7eb2e8f9f7 427 {
<> 144:ef7eb2e8f9f7 428 /* Enable the selected comparator */
<> 144:ef7eb2e8f9f7 429 if(hcomp->Instance == COMP2)
<> 144:ef7eb2e8f9f7 430 {
<> 144:ef7eb2e8f9f7 431 regshift = COMP_CSR_COMP2_SHIFT;
<> 144:ef7eb2e8f9f7 432 }
<> 144:ef7eb2e8f9f7 433 SET_BIT(COMP->CSR, COMP_CSR_COMPxEN << regshift);
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 /* Set HAL COMP handle state */
<> 144:ef7eb2e8f9f7 436 hcomp->State = HAL_COMP_STATE_BUSY;
<> 144:ef7eb2e8f9f7 437
<> 144:ef7eb2e8f9f7 438 /* Delay for COMP startup time */
Anna Bridge 180:96ed750bd169 439 wait_loop_index = (COMP_DELAY_STARTUP_US * (SystemCoreClock / 1000000U));
<> 156:95d6b41a828b 440 while(wait_loop_index != 0U)
<> 144:ef7eb2e8f9f7 441 {
<> 144:ef7eb2e8f9f7 442 wait_loop_index--;
<> 144:ef7eb2e8f9f7 443 }
<> 144:ef7eb2e8f9f7 444 }
<> 144:ef7eb2e8f9f7 445 else
<> 144:ef7eb2e8f9f7 446 {
<> 144:ef7eb2e8f9f7 447 status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 448 }
<> 144:ef7eb2e8f9f7 449 }
<> 144:ef7eb2e8f9f7 450
<> 144:ef7eb2e8f9f7 451 return status;
<> 144:ef7eb2e8f9f7 452 }
<> 144:ef7eb2e8f9f7 453
<> 144:ef7eb2e8f9f7 454 /**
<> 144:ef7eb2e8f9f7 455 * @brief Stop the comparator
Anna Bridge 180:96ed750bd169 456 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 457 * @retval HAL status
<> 144:ef7eb2e8f9f7 458 */
<> 144:ef7eb2e8f9f7 459 HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 460 {
<> 144:ef7eb2e8f9f7 461 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 462 uint32_t regshift = COMP_CSR_COMP1_SHIFT;
<> 144:ef7eb2e8f9f7 463
<> 144:ef7eb2e8f9f7 464 /* Check the COMP handle allocation and lock status */
<> 144:ef7eb2e8f9f7 465 if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
<> 144:ef7eb2e8f9f7 466 {
<> 144:ef7eb2e8f9f7 467 status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 468 }
<> 144:ef7eb2e8f9f7 469 else
<> 144:ef7eb2e8f9f7 470 {
<> 144:ef7eb2e8f9f7 471 /* Check the parameter */
<> 144:ef7eb2e8f9f7 472 assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 473
<> 144:ef7eb2e8f9f7 474 if(hcomp->State == HAL_COMP_STATE_BUSY)
<> 144:ef7eb2e8f9f7 475 {
<> 144:ef7eb2e8f9f7 476 /* Disable the selected comparator */
<> 144:ef7eb2e8f9f7 477 if(hcomp->Instance == COMP2)
<> 144:ef7eb2e8f9f7 478 {
<> 144:ef7eb2e8f9f7 479 regshift = COMP_CSR_COMP2_SHIFT;
<> 144:ef7eb2e8f9f7 480 }
<> 144:ef7eb2e8f9f7 481 CLEAR_BIT(COMP->CSR, COMP_CSR_COMPxEN << regshift);
<> 144:ef7eb2e8f9f7 482
<> 144:ef7eb2e8f9f7 483 hcomp->State = HAL_COMP_STATE_READY;
<> 144:ef7eb2e8f9f7 484 }
<> 144:ef7eb2e8f9f7 485 else
<> 144:ef7eb2e8f9f7 486 {
<> 144:ef7eb2e8f9f7 487 status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 488 }
<> 144:ef7eb2e8f9f7 489 }
<> 144:ef7eb2e8f9f7 490
<> 144:ef7eb2e8f9f7 491 return status;
<> 144:ef7eb2e8f9f7 492 }
<> 144:ef7eb2e8f9f7 493
<> 144:ef7eb2e8f9f7 494 /**
<> 144:ef7eb2e8f9f7 495 * @brief Enables the interrupt and starts the comparator
Anna Bridge 180:96ed750bd169 496 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 497 * @retval HAL status.
<> 144:ef7eb2e8f9f7 498 */
<> 144:ef7eb2e8f9f7 499 HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 500 {
<> 144:ef7eb2e8f9f7 501 HAL_StatusTypeDef status = HAL_OK;
<> 156:95d6b41a828b 502 uint32_t extiline = 0U;
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 /* Check the parameter */
<> 144:ef7eb2e8f9f7 505 assert_param(IS_COMP_TRIGGERMODE(hcomp->Init.TriggerMode));
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 status = HAL_COMP_Start(hcomp);
<> 144:ef7eb2e8f9f7 508 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 509 {
<> 144:ef7eb2e8f9f7 510 /* Check the Exti Line output configuration */
<> 144:ef7eb2e8f9f7 511 extiline = COMP_GET_EXTI_LINE(hcomp->Instance);
<> 144:ef7eb2e8f9f7 512 /* Configure the rising edge */
<> 144:ef7eb2e8f9f7 513 if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_IT_RISING) != RESET)
<> 144:ef7eb2e8f9f7 514 {
<> 144:ef7eb2e8f9f7 515 SET_BIT(EXTI->RTSR, extiline);
<> 144:ef7eb2e8f9f7 516 }
<> 144:ef7eb2e8f9f7 517 else
<> 144:ef7eb2e8f9f7 518 {
<> 144:ef7eb2e8f9f7 519 CLEAR_BIT(EXTI->RTSR, extiline);
<> 144:ef7eb2e8f9f7 520 }
<> 144:ef7eb2e8f9f7 521 /* Configure the falling edge */
<> 144:ef7eb2e8f9f7 522 if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_IT_FALLING) != RESET)
<> 144:ef7eb2e8f9f7 523 {
<> 144:ef7eb2e8f9f7 524 SET_BIT(EXTI->FTSR, extiline);
<> 144:ef7eb2e8f9f7 525 }
<> 144:ef7eb2e8f9f7 526 else
<> 144:ef7eb2e8f9f7 527 {
<> 144:ef7eb2e8f9f7 528 CLEAR_BIT(EXTI->FTSR, extiline);
<> 144:ef7eb2e8f9f7 529 }
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /* Clear COMP EXTI pending bit */
<> 144:ef7eb2e8f9f7 532 WRITE_REG(EXTI->PR, extiline);
<> 144:ef7eb2e8f9f7 533
<> 144:ef7eb2e8f9f7 534 /* Enable Exti interrupt mode */
<> 144:ef7eb2e8f9f7 535 SET_BIT(EXTI->IMR, extiline);
<> 144:ef7eb2e8f9f7 536 }
<> 144:ef7eb2e8f9f7 537
<> 144:ef7eb2e8f9f7 538 return status;
<> 144:ef7eb2e8f9f7 539 }
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 /**
<> 144:ef7eb2e8f9f7 542 * @brief Disable the interrupt and Stop the comparator
Anna Bridge 180:96ed750bd169 543 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 544 * @retval HAL status
<> 144:ef7eb2e8f9f7 545 */
<> 144:ef7eb2e8f9f7 546 HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 547 {
<> 144:ef7eb2e8f9f7 548 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 549
<> 144:ef7eb2e8f9f7 550 /* Disable the Exti Line interrupt mode */
<> 144:ef7eb2e8f9f7 551 CLEAR_BIT(EXTI->IMR, COMP_GET_EXTI_LINE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 status = HAL_COMP_Stop(hcomp);
<> 144:ef7eb2e8f9f7 554
<> 144:ef7eb2e8f9f7 555 return status;
<> 144:ef7eb2e8f9f7 556 }
<> 144:ef7eb2e8f9f7 557
<> 144:ef7eb2e8f9f7 558 /**
<> 144:ef7eb2e8f9f7 559 * @brief Comparator IRQ Handler
Anna Bridge 180:96ed750bd169 560 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 561 * @retval HAL status
<> 144:ef7eb2e8f9f7 562 */
<> 144:ef7eb2e8f9f7 563 void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 564 {
<> 144:ef7eb2e8f9f7 565 uint32_t extiline = COMP_GET_EXTI_LINE(hcomp->Instance);
<> 144:ef7eb2e8f9f7 566
<> 144:ef7eb2e8f9f7 567 /* Check COMP Exti flag */
<> 144:ef7eb2e8f9f7 568 if(READ_BIT(EXTI->PR, extiline) != RESET)
<> 144:ef7eb2e8f9f7 569 {
<> 144:ef7eb2e8f9f7 570 /* Clear COMP Exti pending bit */
<> 144:ef7eb2e8f9f7 571 WRITE_REG(EXTI->PR, extiline);
<> 144:ef7eb2e8f9f7 572
<> 144:ef7eb2e8f9f7 573 /* COMP trigger user callback */
<> 144:ef7eb2e8f9f7 574 HAL_COMP_TriggerCallback(hcomp);
<> 144:ef7eb2e8f9f7 575 }
<> 144:ef7eb2e8f9f7 576 }
<> 144:ef7eb2e8f9f7 577
<> 144:ef7eb2e8f9f7 578 /**
<> 144:ef7eb2e8f9f7 579 * @}
<> 144:ef7eb2e8f9f7 580 */
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 /** @defgroup COMP_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 583 * @brief management functions
<> 144:ef7eb2e8f9f7 584 *
<> 144:ef7eb2e8f9f7 585 @verbatim
<> 144:ef7eb2e8f9f7 586 ===============================================================================
<> 144:ef7eb2e8f9f7 587 ##### Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 588 ===============================================================================
<> 144:ef7eb2e8f9f7 589 [..]
<> 144:ef7eb2e8f9f7 590 This subsection provides a set of functions allowing to control the COMP data
<> 144:ef7eb2e8f9f7 591 transfers.
<> 144:ef7eb2e8f9f7 592
<> 144:ef7eb2e8f9f7 593 @endverbatim
<> 144:ef7eb2e8f9f7 594 * @{
<> 144:ef7eb2e8f9f7 595 */
<> 144:ef7eb2e8f9f7 596
<> 144:ef7eb2e8f9f7 597 /**
<> 144:ef7eb2e8f9f7 598 * @brief Lock the selected comparator configuration.
Anna Bridge 180:96ed750bd169 599 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 600 * @retval HAL status
<> 144:ef7eb2e8f9f7 601 */
<> 144:ef7eb2e8f9f7 602 HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 603 {
<> 144:ef7eb2e8f9f7 604 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 605 uint32_t regshift = COMP_CSR_COMP1_SHIFT;
<> 144:ef7eb2e8f9f7 606
<> 144:ef7eb2e8f9f7 607 /* Check the COMP handle allocation and lock status */
<> 144:ef7eb2e8f9f7 608 if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
<> 144:ef7eb2e8f9f7 609 {
<> 144:ef7eb2e8f9f7 610 status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 611 }
<> 144:ef7eb2e8f9f7 612 else
<> 144:ef7eb2e8f9f7 613 {
<> 144:ef7eb2e8f9f7 614 /* Check the parameter */
<> 144:ef7eb2e8f9f7 615 assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 616
<> 144:ef7eb2e8f9f7 617 /* Set lock flag */
<> 144:ef7eb2e8f9f7 618 hcomp->State |= COMP_STATE_BIT_LOCK;
<> 144:ef7eb2e8f9f7 619
<> 144:ef7eb2e8f9f7 620 /* Set the lock bit corresponding to selected comparator */
<> 144:ef7eb2e8f9f7 621 if(hcomp->Instance == COMP2)
<> 144:ef7eb2e8f9f7 622 {
<> 144:ef7eb2e8f9f7 623 regshift = COMP_CSR_COMP2_SHIFT;
<> 144:ef7eb2e8f9f7 624 }
<> 144:ef7eb2e8f9f7 625 SET_BIT(COMP->CSR, COMP_CSR_COMPxLOCK << regshift);
<> 144:ef7eb2e8f9f7 626 }
<> 144:ef7eb2e8f9f7 627
<> 144:ef7eb2e8f9f7 628 return status;
<> 144:ef7eb2e8f9f7 629 }
<> 144:ef7eb2e8f9f7 630
<> 144:ef7eb2e8f9f7 631 /**
<> 144:ef7eb2e8f9f7 632 * @brief Return the output level (high or low) of the selected comparator.
<> 144:ef7eb2e8f9f7 633 * The output level depends on the selected polarity.
<> 144:ef7eb2e8f9f7 634 * If the polarity is not inverted:
<> 144:ef7eb2e8f9f7 635 * - Comparator output is low when the non-inverting input is at a lower
<> 144:ef7eb2e8f9f7 636 * voltage than the inverting input
<> 144:ef7eb2e8f9f7 637 * - Comparator output is high when the non-inverting input is at a higher
<> 144:ef7eb2e8f9f7 638 * voltage than the inverting input
<> 144:ef7eb2e8f9f7 639 * If the polarity is inverted:
<> 144:ef7eb2e8f9f7 640 * - Comparator output is high when the non-inverting input is at a lower
<> 144:ef7eb2e8f9f7 641 * voltage than the inverting input
<> 144:ef7eb2e8f9f7 642 * - Comparator output is low when the non-inverting input is at a higher
<> 144:ef7eb2e8f9f7 643 * voltage than the inverting input
Anna Bridge 180:96ed750bd169 644 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 645 * @retval Returns the selected comparator output level: COMP_OUTPUTLEVEL_LOW or COMP_OUTPUTLEVEL_HIGH.
<> 144:ef7eb2e8f9f7 646 *
<> 144:ef7eb2e8f9f7 647 */
<> 144:ef7eb2e8f9f7 648 uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 649 {
<> 144:ef7eb2e8f9f7 650 uint32_t level=0;
<> 144:ef7eb2e8f9f7 651 uint32_t regshift = COMP_CSR_COMP1_SHIFT;
<> 144:ef7eb2e8f9f7 652
<> 144:ef7eb2e8f9f7 653 /* Check the parameter */
<> 144:ef7eb2e8f9f7 654 assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 655
<> 144:ef7eb2e8f9f7 656 if(hcomp->Instance == COMP2)
<> 144:ef7eb2e8f9f7 657 {
<> 144:ef7eb2e8f9f7 658 regshift = COMP_CSR_COMP2_SHIFT;
<> 144:ef7eb2e8f9f7 659 }
<> 144:ef7eb2e8f9f7 660 level = READ_BIT(COMP->CSR, COMP_CSR_COMPxOUT << regshift);
<> 144:ef7eb2e8f9f7 661
<> 156:95d6b41a828b 662 if(level != 0U)
<> 144:ef7eb2e8f9f7 663 {
<> 144:ef7eb2e8f9f7 664 return(COMP_OUTPUTLEVEL_HIGH);
<> 144:ef7eb2e8f9f7 665 }
<> 144:ef7eb2e8f9f7 666 return(COMP_OUTPUTLEVEL_LOW);
<> 144:ef7eb2e8f9f7 667 }
<> 144:ef7eb2e8f9f7 668
<> 144:ef7eb2e8f9f7 669 /**
<> 144:ef7eb2e8f9f7 670 * @brief Comparator callback.
Anna Bridge 180:96ed750bd169 671 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 672 * @retval None
<> 144:ef7eb2e8f9f7 673 */
<> 144:ef7eb2e8f9f7 674 __weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 675 {
<> 144:ef7eb2e8f9f7 676 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 677 UNUSED(hcomp);
<> 144:ef7eb2e8f9f7 678
<> 144:ef7eb2e8f9f7 679 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 680 the HAL_COMP_TriggerCallback should be implemented in the user file
<> 144:ef7eb2e8f9f7 681 */
<> 144:ef7eb2e8f9f7 682 }
<> 144:ef7eb2e8f9f7 683
<> 144:ef7eb2e8f9f7 684
<> 144:ef7eb2e8f9f7 685 /**
<> 144:ef7eb2e8f9f7 686 * @}
<> 144:ef7eb2e8f9f7 687 */
<> 144:ef7eb2e8f9f7 688
<> 144:ef7eb2e8f9f7 689 /** @defgroup COMP_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 690 * @brief Peripheral State functions
<> 144:ef7eb2e8f9f7 691 *
<> 144:ef7eb2e8f9f7 692 @verbatim
<> 144:ef7eb2e8f9f7 693 ===============================================================================
<> 144:ef7eb2e8f9f7 694 ##### Peripheral State functions #####
<> 144:ef7eb2e8f9f7 695 ===============================================================================
<> 144:ef7eb2e8f9f7 696 [..]
<> 144:ef7eb2e8f9f7 697 This subsection permit to get in run-time the status of the peripheral
<> 144:ef7eb2e8f9f7 698 and the data flow.
<> 144:ef7eb2e8f9f7 699
<> 144:ef7eb2e8f9f7 700 @endverbatim
<> 144:ef7eb2e8f9f7 701 * @{
<> 144:ef7eb2e8f9f7 702 */
<> 144:ef7eb2e8f9f7 703
<> 144:ef7eb2e8f9f7 704 /**
<> 144:ef7eb2e8f9f7 705 * @brief Return the COMP state
Anna Bridge 180:96ed750bd169 706 * @param hcomp COMP handle
<> 144:ef7eb2e8f9f7 707 * @retval HAL state
<> 144:ef7eb2e8f9f7 708 */
<> 144:ef7eb2e8f9f7 709 uint32_t HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
<> 144:ef7eb2e8f9f7 710 {
<> 144:ef7eb2e8f9f7 711 /* Check the COMP handle allocation */
<> 144:ef7eb2e8f9f7 712 if(hcomp == NULL)
<> 144:ef7eb2e8f9f7 713 {
<> 144:ef7eb2e8f9f7 714 return HAL_COMP_STATE_RESET;
<> 144:ef7eb2e8f9f7 715 }
<> 144:ef7eb2e8f9f7 716
<> 144:ef7eb2e8f9f7 717 /* Check the parameter */
<> 144:ef7eb2e8f9f7 718 assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
<> 144:ef7eb2e8f9f7 719
<> 144:ef7eb2e8f9f7 720 return hcomp->State;
<> 144:ef7eb2e8f9f7 721 }
<> 144:ef7eb2e8f9f7 722 /**
<> 144:ef7eb2e8f9f7 723 * @}
<> 144:ef7eb2e8f9f7 724 */
<> 144:ef7eb2e8f9f7 725
<> 144:ef7eb2e8f9f7 726 /**
<> 144:ef7eb2e8f9f7 727 * @}
<> 144:ef7eb2e8f9f7 728 */
<> 144:ef7eb2e8f9f7 729
<> 144:ef7eb2e8f9f7 730 /**
<> 144:ef7eb2e8f9f7 731 * @}
<> 144:ef7eb2e8f9f7 732 */
<> 144:ef7eb2e8f9f7 733
<> 144:ef7eb2e8f9f7 734 /**
<> 144:ef7eb2e8f9f7 735 * @}
<> 144:ef7eb2e8f9f7 736 */
<> 144:ef7eb2e8f9f7 737
<> 144:ef7eb2e8f9f7 738 #endif /* STM32F051x8 || STM32F058xx || */
<> 144:ef7eb2e8f9f7 739 /* STM32F071xB || STM32F072xB || STM32F078xx || */
<> 144:ef7eb2e8f9f7 740 /* STM32F091xC || defined (STM32F098xx) */
<> 144:ef7eb2e8f9f7 741
<> 144:ef7eb2e8f9f7 742 #endif /* HAL_COMP_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 743
<> 144:ef7eb2e8f9f7 744 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/