mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
180:96ed750bd169
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
<> 144:ef7eb2e8f9f7 2 ;* File Name : startup_stm32f091xc.s
<> 144:ef7eb2e8f9f7 3 ;* Author : MCD Application Team
<> 144:ef7eb2e8f9f7 4 ;* Description : STM32F091xc/STM32F098xc devices vector table for EWARM toolchain.
<> 144:ef7eb2e8f9f7 5 ;* This module performs:
<> 144:ef7eb2e8f9f7 6 ;* - Set the initial SP
<> 144:ef7eb2e8f9f7 7 ;* - Set the initial PC == __iar_program_start,
<> 144:ef7eb2e8f9f7 8 ;* - Set the vector table entries with the exceptions ISR
<> 144:ef7eb2e8f9f7 9 ;* address,
<> 144:ef7eb2e8f9f7 10 ;* - Branches to main in the C library (which eventually
<> 144:ef7eb2e8f9f7 11 ;* calls main()).
<> 144:ef7eb2e8f9f7 12 ;* After Reset the Cortex-M0 processor is in Thread mode,
<> 144:ef7eb2e8f9f7 13 ;* priority is Privileged, and the Stack is set to Main.
<> 144:ef7eb2e8f9f7 14 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 15 ;*
<> 144:ef7eb2e8f9f7 16 ;* Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 17 ;* are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 18 ;* 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 19 ;* this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 20 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 21 ;* this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 22 ;* and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 23 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 24 ;* may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 25 ;* without specific prior written permission.
<> 144:ef7eb2e8f9f7 26 ;*
<> 144:ef7eb2e8f9f7 27 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 28 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 29 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 30 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 31 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 32 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 33 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 34 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 35 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 36 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 37 ;*
<> 144:ef7eb2e8f9f7 38 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 39 ;
<> 144:ef7eb2e8f9f7 40 ;
<> 144:ef7eb2e8f9f7 41 ; The modules in this file are included in the libraries, and may be replaced
<> 144:ef7eb2e8f9f7 42 ; by any user-defined modules that define the PUBLIC symbol _program_start or
<> 144:ef7eb2e8f9f7 43 ; a user defined start symbol.
<> 144:ef7eb2e8f9f7 44 ; To override the cstartup defined in the library, simply add your modified
<> 144:ef7eb2e8f9f7 45 ; version to the workbench project.
<> 144:ef7eb2e8f9f7 46 ;
<> 144:ef7eb2e8f9f7 47 ; The vector table is normally located at address 0.
<> 144:ef7eb2e8f9f7 48 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
<> 144:ef7eb2e8f9f7 49 ; The name "__vector_table" has special meaning for C-SPY:
<> 144:ef7eb2e8f9f7 50 ; it is where the SP start value is found, and the NVIC vector
<> 144:ef7eb2e8f9f7 51 ; table register (VTOR) is initialized to this address if != 0.
<> 144:ef7eb2e8f9f7 52 ;
<> 144:ef7eb2e8f9f7 53 ; Cortex-M version
<> 144:ef7eb2e8f9f7 54 ;
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 MODULE ?cstartup
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 ;; Forward declaration of sections.
<> 144:ef7eb2e8f9f7 59 SECTION CSTACK:DATA:NOROOT(3)
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 SECTION .intvec:CODE:NOROOT(2)
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 EXTERN __iar_program_start
<> 144:ef7eb2e8f9f7 64 EXTERN SystemInit
<> 144:ef7eb2e8f9f7 65 PUBLIC __vector_table
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 DATA
<> 144:ef7eb2e8f9f7 68 __vector_table
<> 144:ef7eb2e8f9f7 69 DCD sfe(CSTACK)
<> 144:ef7eb2e8f9f7 70 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 73 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 74 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 75 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 76 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 77 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 78 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 79 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 80 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 81 DCD SVC_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 82 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 83 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 84 DCD PendSV_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 85 DCD SysTick_Handler ; SysTick Handler
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 ; External Interrupts
<> 144:ef7eb2e8f9f7 88 DCD WWDG_IRQHandler ; Window Watchdog
<> 144:ef7eb2e8f9f7 89 DCD PVD_VDDIO2_IRQHandler ; PVD and VDDIO2 through EXTI Line detect
<> 144:ef7eb2e8f9f7 90 DCD RTC_IRQHandler ; RTC through EXTI Line
<> 144:ef7eb2e8f9f7 91 DCD FLASH_IRQHandler ; FLASH
<> 144:ef7eb2e8f9f7 92 DCD RCC_CRS_IRQHandler ; RCC and CRS
<> 144:ef7eb2e8f9f7 93 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
<> 144:ef7eb2e8f9f7 94 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
<> 144:ef7eb2e8f9f7 95 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
<> 144:ef7eb2e8f9f7 96 DCD TSC_IRQHandler ; TS
<> 144:ef7eb2e8f9f7 97 DCD DMA1_Ch1_IRQHandler ; DMA1 Channel 1
<> 144:ef7eb2e8f9f7 98 DCD DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler ; DMA1 Channel 2 and 3 & DMA2 Channel 1 and 2
<> 144:ef7eb2e8f9f7 99 DCD DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler ; DMA1 Channel 4 to 7 & DMA2 Channel 3 to 5
<> 144:ef7eb2e8f9f7 100 DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
<> 144:ef7eb2e8f9f7 101 DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
<> 144:ef7eb2e8f9f7 102 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
<> 144:ef7eb2e8f9f7 103 DCD TIM2_IRQHandler ; TIM2
<> 144:ef7eb2e8f9f7 104 DCD TIM3_IRQHandler ; TIM3
<> 144:ef7eb2e8f9f7 105 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
<> 144:ef7eb2e8f9f7 106 DCD TIM7_IRQHandler ; TIM7
<> 144:ef7eb2e8f9f7 107 DCD TIM14_IRQHandler ; TIM14
<> 144:ef7eb2e8f9f7 108 DCD TIM15_IRQHandler ; TIM15
<> 144:ef7eb2e8f9f7 109 DCD TIM16_IRQHandler ; TIM16
<> 144:ef7eb2e8f9f7 110 DCD TIM17_IRQHandler ; TIM17
<> 144:ef7eb2e8f9f7 111 DCD I2C1_IRQHandler ; I2C1
<> 144:ef7eb2e8f9f7 112 DCD I2C2_IRQHandler ; I2C2
<> 144:ef7eb2e8f9f7 113 DCD SPI1_IRQHandler ; SPI1
<> 144:ef7eb2e8f9f7 114 DCD SPI2_IRQHandler ; SPI2
<> 144:ef7eb2e8f9f7 115 DCD USART1_IRQHandler ; USART1
<> 144:ef7eb2e8f9f7 116 DCD USART2_IRQHandler ; USART2
<> 144:ef7eb2e8f9f7 117 DCD USART3_8_IRQHandler ; USART3, USART4, USART5, USART6, USART7, USART8
<> 144:ef7eb2e8f9f7 118 DCD CEC_CAN_IRQHandler ; CEC and CAN
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 144:ef7eb2e8f9f7 121 ;;
<> 144:ef7eb2e8f9f7 122 ;; Default interrupt handlers.
<> 144:ef7eb2e8f9f7 123 ;;
<> 144:ef7eb2e8f9f7 124 THUMB
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 PUBWEAK Reset_Handler
<> 144:ef7eb2e8f9f7 127 SECTION .text:CODE:NOROOT:REORDER(2)
<> 144:ef7eb2e8f9f7 128 Reset_Handler
<> 144:ef7eb2e8f9f7 129 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 130 BLX R0
<> 144:ef7eb2e8f9f7 131 LDR R0, =__iar_program_start
<> 144:ef7eb2e8f9f7 132 BX R0
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 PUBWEAK NMI_Handler
<> 144:ef7eb2e8f9f7 135 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 136 NMI_Handler
<> 144:ef7eb2e8f9f7 137 B NMI_Handler
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 PUBWEAK HardFault_Handler
<> 144:ef7eb2e8f9f7 140 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 141 HardFault_Handler
<> 144:ef7eb2e8f9f7 142 B HardFault_Handler
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 PUBWEAK SVC_Handler
<> 144:ef7eb2e8f9f7 145 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 146 SVC_Handler
<> 144:ef7eb2e8f9f7 147 B SVC_Handler
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 PUBWEAK PendSV_Handler
<> 144:ef7eb2e8f9f7 150 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 151 PendSV_Handler
<> 144:ef7eb2e8f9f7 152 B PendSV_Handler
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 PUBWEAK SysTick_Handler
<> 144:ef7eb2e8f9f7 155 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 156 SysTick_Handler
<> 144:ef7eb2e8f9f7 157 B SysTick_Handler
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 PUBWEAK WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 160 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 161 WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 162 B WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 PUBWEAK PVD_VDDIO2_IRQHandler
<> 144:ef7eb2e8f9f7 165 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 166 PVD_VDDIO2_IRQHandler
<> 144:ef7eb2e8f9f7 167 B PVD_VDDIO2_IRQHandler
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 PUBWEAK RTC_IRQHandler
<> 144:ef7eb2e8f9f7 170 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 171 RTC_IRQHandler
<> 144:ef7eb2e8f9f7 172 B RTC_IRQHandler
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 PUBWEAK FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 175 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 176 FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 177 B FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 PUBWEAK RCC_CRS_IRQHandler
<> 144:ef7eb2e8f9f7 180 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 181 RCC_CRS_IRQHandler
<> 144:ef7eb2e8f9f7 182 B RCC_CRS_IRQHandler
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 PUBWEAK EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 185 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 186 EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 187 B EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 PUBWEAK EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 190 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 191 EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 192 B EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 PUBWEAK EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 195 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 196 EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 197 B EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 PUBWEAK TSC_IRQHandler
<> 144:ef7eb2e8f9f7 200 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 201 TSC_IRQHandler
<> 144:ef7eb2e8f9f7 202 B TSC_IRQHandler
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 PUBWEAK DMA1_Ch1_IRQHandler
<> 144:ef7eb2e8f9f7 205 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 206 DMA1_Ch1_IRQHandler
<> 144:ef7eb2e8f9f7 207 B DMA1_Ch1_IRQHandler
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 PUBWEAK DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
<> 144:ef7eb2e8f9f7 210 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 211 DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
<> 144:ef7eb2e8f9f7 212 B DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 PUBWEAK DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
<> 144:ef7eb2e8f9f7 215 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 216 DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
<> 144:ef7eb2e8f9f7 217 B DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 PUBWEAK ADC1_COMP_IRQHandler
<> 144:ef7eb2e8f9f7 220 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 221 ADC1_COMP_IRQHandler
<> 144:ef7eb2e8f9f7 222 B ADC1_COMP_IRQHandler
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 225 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 226 TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 227 B TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 PUBWEAK TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 230 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 231 TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 232 B TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 PUBWEAK TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 235 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 236 TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 237 B TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 PUBWEAK TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 240 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 241 TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 242 B TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 PUBWEAK TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 245 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 246 TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 247 B TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 PUBWEAK TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 250 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 251 TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 252 B TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 PUBWEAK TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 255 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 256 TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 257 B TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 PUBWEAK TIM15_IRQHandler
<> 144:ef7eb2e8f9f7 260 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 261 TIM15_IRQHandler
<> 144:ef7eb2e8f9f7 262 B TIM15_IRQHandler
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 PUBWEAK TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 265 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 266 TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 267 B TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 PUBWEAK TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 270 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 271 TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 272 B TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 PUBWEAK I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 275 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 276 I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 277 B I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 PUBWEAK I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 280 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 281 I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 282 B I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 PUBWEAK SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 285 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 286 SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 287 B SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 PUBWEAK SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 290 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 291 SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 292 B SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 PUBWEAK USART1_IRQHandler
<> 144:ef7eb2e8f9f7 295 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 296 USART1_IRQHandler
<> 144:ef7eb2e8f9f7 297 B USART1_IRQHandler
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 PUBWEAK USART2_IRQHandler
<> 144:ef7eb2e8f9f7 300 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 301 USART2_IRQHandler
<> 144:ef7eb2e8f9f7 302 B USART2_IRQHandler
<> 144:ef7eb2e8f9f7 303
<> 144:ef7eb2e8f9f7 304 PUBWEAK USART3_8_IRQHandler
<> 144:ef7eb2e8f9f7 305 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 306 USART3_8_IRQHandler
<> 144:ef7eb2e8f9f7 307 B USART3_8_IRQHandler
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 PUBWEAK CEC_CAN_IRQHandler
<> 144:ef7eb2e8f9f7 310 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 311 CEC_CAN_IRQHandler
<> 144:ef7eb2e8f9f7 312 B CEC_CAN_IRQHandler
<> 144:ef7eb2e8f9f7 313
<> 144:ef7eb2e8f9f7 314 END
<> 144:ef7eb2e8f9f7 315 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****