mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_RENESAS/TARGET_RZ_A1XX/lp_ticker.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 187:0387e8f68319 1 /* mbed Microcontroller Library
AnnaBridge 187:0387e8f68319 2 * Copyright (c) 2006-2017 ARM Limited
AnnaBridge 187:0387e8f68319 3 *
AnnaBridge 187:0387e8f68319 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 187:0387e8f68319 5 * you may not use this file except in compliance with the License.
AnnaBridge 187:0387e8f68319 6 * You may obtain a copy of the License at
AnnaBridge 187:0387e8f68319 7 *
AnnaBridge 187:0387e8f68319 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 187:0387e8f68319 9 *
AnnaBridge 187:0387e8f68319 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 187:0387e8f68319 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 187:0387e8f68319 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 187:0387e8f68319 13 * See the License for the specific language governing permissions and
AnnaBridge 187:0387e8f68319 14 * limitations under the License.
AnnaBridge 187:0387e8f68319 15 */
AnnaBridge 187:0387e8f68319 16 #if DEVICE_LPTICKER
AnnaBridge 187:0387e8f68319 17 #include "lp_ticker_api.h"
AnnaBridge 187:0387e8f68319 18 #include "mtu2_iobitmask.h"
AnnaBridge 187:0387e8f68319 19 #include "mbed_drv_cfg.h"
AnnaBridge 187:0387e8f68319 20 #include "mtu2.h"
AnnaBridge 187:0387e8f68319 21
AnnaBridge 187:0387e8f68319 22 #if (LP_TICKER_MTU2_CH == 2)
AnnaBridge 187:0387e8f68319 23 #define LP_TICKER_TIMER_IRQn (TGI2A_IRQn)
AnnaBridge 187:0387e8f68319 24 #define MTU2TCR (MTU2TCR_2)
AnnaBridge 187:0387e8f68319 25 #define MTU2TCNT (MTU2TCNT_2)
AnnaBridge 187:0387e8f68319 26 #define MTU2TIER (MTU2TIER_2)
AnnaBridge 187:0387e8f68319 27 #define MTU2TGRA (MTU2TGRA_2)
AnnaBridge 187:0387e8f68319 28 #define MTU2TSR (MTU2TSR_2)
AnnaBridge 187:0387e8f68319 29 #define MTU2_TSTR_CST MTU2_TSTR_CST2
AnnaBridge 187:0387e8f68319 30 #define MTU2_TCR_TPSC (0x07)
AnnaBridge 187:0387e8f68319 31 #elif (LP_TICKER_MTU2_CH == 3)
AnnaBridge 187:0387e8f68319 32 #define LP_TICKER_TIMER_IRQn (TGI3A_IRQn)
AnnaBridge 187:0387e8f68319 33 #define MTU2TCR (MTU2TCR_3)
AnnaBridge 187:0387e8f68319 34 #define MTU2TCNT (MTU2TCNT_3)
AnnaBridge 187:0387e8f68319 35 #define MTU2TIER (MTU2TIER_3)
AnnaBridge 187:0387e8f68319 36 #define MTU2TGRA (MTU2TGRA_3)
AnnaBridge 187:0387e8f68319 37 #define MTU2TSR (MTU2TSR_3)
AnnaBridge 187:0387e8f68319 38 #define MTU2_TSTR_CST MTU2_TSTR_CST3
AnnaBridge 187:0387e8f68319 39 #define MTU2_TCR_TPSC (0x05)
AnnaBridge 187:0387e8f68319 40 #elif (LP_TICKER_MTU2_CH == 4)
AnnaBridge 187:0387e8f68319 41 #define LP_TICKER_TIMER_IRQn (TGI4A_IRQn)
AnnaBridge 187:0387e8f68319 42 #define MTU2TCR (MTU2TCR_4)
AnnaBridge 187:0387e8f68319 43 #define MTU2TCNT (MTU2TCNT_4)
AnnaBridge 187:0387e8f68319 44 #define MTU2TIER (MTU2TIER_4)
AnnaBridge 187:0387e8f68319 45 #define MTU2TGRA (MTU2TGRA_4)
AnnaBridge 187:0387e8f68319 46 #define MTU2TSR (MTU2TSR_4)
AnnaBridge 187:0387e8f68319 47 #define MTU2_TSTR_CST MTU2_TSTR_CST4
AnnaBridge 187:0387e8f68319 48 #define MTU2_TCR_TPSC (0x05)
AnnaBridge 187:0387e8f68319 49 #else
AnnaBridge 187:0387e8f68319 50 #error "Invalid number : LP_TICKER_MTU2_CH (2-4)"
AnnaBridge 187:0387e8f68319 51 #endif
AnnaBridge 187:0387e8f68319 52
AnnaBridge 187:0387e8f68319 53 static int lp_ticker_inited = 0;
AnnaBridge 187:0387e8f68319 54
AnnaBridge 187:0387e8f68319 55 void lp_ticker_init(void)
AnnaBridge 187:0387e8f68319 56 {
AnnaBridge 187:0387e8f68319 57 GIC_DisableIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 58 GIC_ClearPendingIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 59
AnnaBridge 187:0387e8f68319 60 /* Power Control for Peripherals */
AnnaBridge 187:0387e8f68319 61 mtu2_init();
AnnaBridge 187:0387e8f68319 62
AnnaBridge 187:0387e8f68319 63 if (lp_ticker_inited) return;
AnnaBridge 187:0387e8f68319 64 lp_ticker_inited = 1;
AnnaBridge 187:0387e8f68319 65
AnnaBridge 187:0387e8f68319 66 MTU2TCR = MTU2_TCR_TPSC;
AnnaBridge 187:0387e8f68319 67 MTU2TSTR |= MTU2_TSTR_CST;
AnnaBridge 187:0387e8f68319 68 MTU2TIER |= MTU2_TIER_n_TGIEA;
AnnaBridge 187:0387e8f68319 69
AnnaBridge 187:0387e8f68319 70 // INTC settings
AnnaBridge 187:0387e8f68319 71 InterruptHandlerRegister(LP_TICKER_TIMER_IRQn, (void (*)(uint32_t))lp_ticker_irq_handler);
AnnaBridge 187:0387e8f68319 72 GIC_SetPriority(LP_TICKER_TIMER_IRQn, 5);
AnnaBridge 187:0387e8f68319 73 GIC_SetConfiguration(LP_TICKER_TIMER_IRQn, 3);
AnnaBridge 187:0387e8f68319 74 }
AnnaBridge 187:0387e8f68319 75
AnnaBridge 187:0387e8f68319 76 void lp_ticker_free(void)
AnnaBridge 187:0387e8f68319 77 {
AnnaBridge 187:0387e8f68319 78 GIC_DisableIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 79 GIC_ClearPendingIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 80
AnnaBridge 187:0387e8f68319 81 MTU2TIER &= ~MTU2_TIER_n_TGIEA;
AnnaBridge 187:0387e8f68319 82 lp_ticker_inited = 0;
AnnaBridge 187:0387e8f68319 83 mtu2_free();
AnnaBridge 187:0387e8f68319 84 }
AnnaBridge 187:0387e8f68319 85
AnnaBridge 187:0387e8f68319 86 uint32_t lp_ticker_read()
AnnaBridge 187:0387e8f68319 87 {
AnnaBridge 187:0387e8f68319 88 return (uint32_t)MTU2TCNT;
AnnaBridge 187:0387e8f68319 89 }
AnnaBridge 187:0387e8f68319 90
AnnaBridge 187:0387e8f68319 91 void lp_ticker_set_interrupt(timestamp_t timestamp)
AnnaBridge 187:0387e8f68319 92 {
AnnaBridge 187:0387e8f68319 93 MTU2TSR = (MTU2TSR & 0xFE);
AnnaBridge 187:0387e8f68319 94 MTU2TGRA = (uint16_t)timestamp;
AnnaBridge 187:0387e8f68319 95 GIC_EnableIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 96 }
AnnaBridge 187:0387e8f68319 97
AnnaBridge 187:0387e8f68319 98 void lp_ticker_fire_interrupt(void)
AnnaBridge 187:0387e8f68319 99 {
AnnaBridge 187:0387e8f68319 100 GIC_SetPendingIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 101 GIC_EnableIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 102 }
AnnaBridge 187:0387e8f68319 103
AnnaBridge 187:0387e8f68319 104 void lp_ticker_disable_interrupt(void)
AnnaBridge 187:0387e8f68319 105 {
AnnaBridge 187:0387e8f68319 106 GIC_DisableIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 107 }
AnnaBridge 187:0387e8f68319 108
AnnaBridge 187:0387e8f68319 109 void lp_ticker_clear_interrupt(void)
AnnaBridge 187:0387e8f68319 110 {
AnnaBridge 187:0387e8f68319 111 MTU2TSR = (MTU2TSR & 0xFE);
AnnaBridge 187:0387e8f68319 112 GIC_ClearPendingIRQ(LP_TICKER_TIMER_IRQn);
AnnaBridge 187:0387e8f68319 113 }
AnnaBridge 187:0387e8f68319 114
AnnaBridge 187:0387e8f68319 115 const ticker_info_t* lp_ticker_get_info()
AnnaBridge 187:0387e8f68319 116 {
AnnaBridge 187:0387e8f68319 117 static const ticker_info_t info = {
AnnaBridge 187:0387e8f68319 118 (uint32_t)((float)RENESAS_RZ_A1_P0_CLK / 1024.0f + 0.5f),
AnnaBridge 187:0387e8f68319 119 16
AnnaBridge 187:0387e8f68319 120 };
AnnaBridge 187:0387e8f68319 121 return &info;
AnnaBridge 187:0387e8f68319 122 }
AnnaBridge 187:0387e8f68319 123
AnnaBridge 187:0387e8f68319 124 #endif // DEVICE_LPTICKER