mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_RENESAS/TARGET_RZ_A1XX/common/vfp_neon_push_pop.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
181:57724642e740 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 151:5eaa88a5bcc7 1 #ifndef __VFP_NEON_PUSH_POP_H__
<> 151:5eaa88a5bcc7 2 #define __VFP_NEON_PUSH_POP_H__
<> 151:5eaa88a5bcc7 3
<> 151:5eaa88a5bcc7 4
<> 151:5eaa88a5bcc7 5 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
<> 151:5eaa88a5bcc7 6 /* ARM armcc specific functions */
<> 151:5eaa88a5bcc7 7 #pragma push
<> 151:5eaa88a5bcc7 8 #pragma arm
Anna Bridge 180:96ed750bd169 9 static __asm void __vfp_neon_push(void) {
<> 151:5eaa88a5bcc7 10 ARM
<> 151:5eaa88a5bcc7 11
<> 151:5eaa88a5bcc7 12 VMRS R2,FPSCR
<> 151:5eaa88a5bcc7 13 STMDB SP!,{R2,R4} ; Push FPSCR, maintain 8-byte alignment
<> 151:5eaa88a5bcc7 14 VSTMDB SP!,{D0-D15}
<> 151:5eaa88a5bcc7 15 VSTMDB SP!,{D16-D31}
<> 151:5eaa88a5bcc7 16 BX LR
<> 151:5eaa88a5bcc7 17 }
<> 151:5eaa88a5bcc7 18 #pragma pop
<> 151:5eaa88a5bcc7 19
<> 151:5eaa88a5bcc7 20 #pragma push
<> 151:5eaa88a5bcc7 21 #pragma arm
Anna Bridge 180:96ed750bd169 22 static __asm void __vfp_neon_pop(void) {
<> 151:5eaa88a5bcc7 23 ARM
<> 151:5eaa88a5bcc7 24
<> 151:5eaa88a5bcc7 25 VLDMIA SP!,{D16-D31}
<> 151:5eaa88a5bcc7 26 VLDMIA SP!,{D0-D15}
<> 151:5eaa88a5bcc7 27 LDR R2,[SP]
<> 151:5eaa88a5bcc7 28 VMSR FPSCR,R2
<> 151:5eaa88a5bcc7 29 ADD SP,SP,#8
<> 151:5eaa88a5bcc7 30 BX LR
<> 151:5eaa88a5bcc7 31 }
<> 151:5eaa88a5bcc7 32 #pragma pop
<> 151:5eaa88a5bcc7 33
<> 151:5eaa88a5bcc7 34
<> 151:5eaa88a5bcc7 35 #pragma push
<> 151:5eaa88a5bcc7 36 #pragma arm
Anna Bridge 180:96ed750bd169 37 static __asm void __vfp_push(void) {
<> 151:5eaa88a5bcc7 38 ARM
<> 151:5eaa88a5bcc7 39
<> 151:5eaa88a5bcc7 40 VMRS R2,FPSCR
<> 151:5eaa88a5bcc7 41 STMDB SP!,{R2,R4} ; Push FPSCR, maintain 8-byte alignment
<> 151:5eaa88a5bcc7 42 VSTMDB SP!,{D0-D15}
<> 151:5eaa88a5bcc7 43 BX LR
<> 151:5eaa88a5bcc7 44 }
<> 151:5eaa88a5bcc7 45 #pragma pop
<> 151:5eaa88a5bcc7 46
<> 151:5eaa88a5bcc7 47 #pragma push
<> 151:5eaa88a5bcc7 48 #pragma arm
Anna Bridge 180:96ed750bd169 49 static __asm void __vfp_pop(void) {
<> 151:5eaa88a5bcc7 50 ARM
<> 151:5eaa88a5bcc7 51
<> 151:5eaa88a5bcc7 52 VLDMIA SP!,{D0-D15}
<> 151:5eaa88a5bcc7 53 LDR R2,[SP]
<> 151:5eaa88a5bcc7 54 VMSR FPSCR,R2
<> 151:5eaa88a5bcc7 55 ADD SP,SP,#8
<> 151:5eaa88a5bcc7 56 BX LR
<> 151:5eaa88a5bcc7 57 }
<> 151:5eaa88a5bcc7 58 #pragma pop
<> 151:5eaa88a5bcc7 59
<> 151:5eaa88a5bcc7 60 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
<> 151:5eaa88a5bcc7 61
<> 151:5eaa88a5bcc7 62 __arm static inline void __vfp_neon_push(void) {
<> 151:5eaa88a5bcc7 63 __asm(
<> 151:5eaa88a5bcc7 64 "ARM \n"
<> 151:5eaa88a5bcc7 65 "VMRS R2,FPSCR \n"
<> 151:5eaa88a5bcc7 66 "STMDB SP!,{R2,R4} \n" // Push FPSCR, maintain 8-byte alignment
<> 151:5eaa88a5bcc7 67 "VSTMDB SP!,{D0-D15} \n"
<> 151:5eaa88a5bcc7 68 "VSTMDB SP!,{D16-D31} \n"
<> 151:5eaa88a5bcc7 69 "BX lr \n" );
<> 151:5eaa88a5bcc7 70 }
<> 151:5eaa88a5bcc7 71
<> 151:5eaa88a5bcc7 72 __arm static inline void __vfp_neon_pop(void) {
<> 151:5eaa88a5bcc7 73 __asm(
<> 151:5eaa88a5bcc7 74 "ARM \n"
<> 151:5eaa88a5bcc7 75 "VLDMIA SP!,{D16-D31} \n"
<> 151:5eaa88a5bcc7 76 "VLDMIA SP!,{D0-D15} \n"
<> 151:5eaa88a5bcc7 77 "LDR R2,[SP] \n"
<> 151:5eaa88a5bcc7 78 "VMSR FPSCR,R2 \n"
<> 151:5eaa88a5bcc7 79 "ADD SP,SP,#8 \n"
<> 151:5eaa88a5bcc7 80 "BX lr \n" );
<> 151:5eaa88a5bcc7 81 }
<> 151:5eaa88a5bcc7 82
<> 151:5eaa88a5bcc7 83 __arm static inline void __vfp_push(void) {
<> 151:5eaa88a5bcc7 84 __asm(
<> 151:5eaa88a5bcc7 85 "ARM \n"
<> 151:5eaa88a5bcc7 86 "VMRS R2,FPSCR \n"
<> 151:5eaa88a5bcc7 87 "STMDB SP!,{R2,R4} \n" // Push FPSCR, maintain 8-byte alignment
<> 151:5eaa88a5bcc7 88 "VSTMDB SP!,{D0-D15} \n"
<> 151:5eaa88a5bcc7 89 "BX lr \n" );
<> 151:5eaa88a5bcc7 90 }
<> 151:5eaa88a5bcc7 91
<> 151:5eaa88a5bcc7 92 __arm static inline void __vfp_pop(void) {
<> 151:5eaa88a5bcc7 93 __asm(
<> 151:5eaa88a5bcc7 94 "ARM \n"
<> 151:5eaa88a5bcc7 95 "VLDMIA SP!,{D0-D15} \n"
<> 151:5eaa88a5bcc7 96 "LDR R2,[SP] \n"
<> 151:5eaa88a5bcc7 97 "VMSR FPSCR,R2 \n"
<> 151:5eaa88a5bcc7 98 "ADD SP,SP,#8 \n"
<> 151:5eaa88a5bcc7 99 "BX lr \n" );
<> 151:5eaa88a5bcc7 100 }
<> 151:5eaa88a5bcc7 101
<> 151:5eaa88a5bcc7 102 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
<> 151:5eaa88a5bcc7 103
<> 151:5eaa88a5bcc7 104 __attribute__( ( always_inline ) ) __STATIC_INLINE void __vfp_neon_push(void)
<> 151:5eaa88a5bcc7 105 {
<> 151:5eaa88a5bcc7 106 __asm__ volatile (
<> 151:5eaa88a5bcc7 107 ".ARM;"
<> 151:5eaa88a5bcc7 108
<> 151:5eaa88a5bcc7 109 "VMRS R2,FPSCR;"
<> 151:5eaa88a5bcc7 110 "STMDB SP!,{R2,R4};" // Push FPSCR, maintain 8-byte alignment
<> 151:5eaa88a5bcc7 111 "VSTMDB SP!,{D0-D15};"
<> 151:5eaa88a5bcc7 112 "VSTMDB SP!,{D16-D31};"
<> 151:5eaa88a5bcc7 113 :
Anna Bridge 180:96ed750bd169 114 :
<> 151:5eaa88a5bcc7 115 : );
<> 151:5eaa88a5bcc7 116 return;
<> 151:5eaa88a5bcc7 117 }
<> 151:5eaa88a5bcc7 118
<> 151:5eaa88a5bcc7 119 __attribute__( ( always_inline ) ) __STATIC_INLINE void __vfp_neon_pop(void)
<> 151:5eaa88a5bcc7 120 {
<> 151:5eaa88a5bcc7 121 __asm__ volatile (
<> 151:5eaa88a5bcc7 122 ".ARM;"
<> 151:5eaa88a5bcc7 123
<> 151:5eaa88a5bcc7 124 "VLDMIA SP!,{D16-D31};"
<> 151:5eaa88a5bcc7 125 "VLDMIA SP!,{D0-D15};"
<> 151:5eaa88a5bcc7 126 "LDR R2,[SP];"
<> 151:5eaa88a5bcc7 127 "VMSR FPSCR,R2;"
<> 151:5eaa88a5bcc7 128 "ADD SP,SP,#8;"
<> 151:5eaa88a5bcc7 129 :
Anna Bridge 180:96ed750bd169 130 :
<> 151:5eaa88a5bcc7 131 : );
<> 151:5eaa88a5bcc7 132 return;
<> 151:5eaa88a5bcc7 133 }
<> 151:5eaa88a5bcc7 134
<> 151:5eaa88a5bcc7 135 __attribute__( ( always_inline ) ) __STATIC_INLINE void __vfp_push(void)
<> 151:5eaa88a5bcc7 136 {
<> 151:5eaa88a5bcc7 137 __asm__ volatile (
<> 151:5eaa88a5bcc7 138 ".ARM;"
<> 151:5eaa88a5bcc7 139
<> 151:5eaa88a5bcc7 140 "VMRS R2,FPSCR;"
<> 151:5eaa88a5bcc7 141 "STMDB SP!,{R2,R4};" // Push FPSCR, maintain 8-byte alignment
<> 151:5eaa88a5bcc7 142 "VSTMDB SP!,{D0-D15};"
<> 151:5eaa88a5bcc7 143 :
Anna Bridge 180:96ed750bd169 144 :
<> 151:5eaa88a5bcc7 145 : );
<> 151:5eaa88a5bcc7 146 return;
<> 151:5eaa88a5bcc7 147 }
<> 151:5eaa88a5bcc7 148
<> 151:5eaa88a5bcc7 149 __attribute__( ( always_inline ) ) __STATIC_INLINE void __vfp_pop(void)
<> 151:5eaa88a5bcc7 150 {
<> 151:5eaa88a5bcc7 151 __asm__ volatile (
<> 151:5eaa88a5bcc7 152 ".ARM;"
<> 151:5eaa88a5bcc7 153
<> 151:5eaa88a5bcc7 154 "VLDMIA SP!,{D0-D15};"
<> 151:5eaa88a5bcc7 155 "LDR R2,[SP];"
<> 151:5eaa88a5bcc7 156 "VMSR FPSCR,R2;"
<> 151:5eaa88a5bcc7 157 "ADD SP,SP,#8;"
<> 151:5eaa88a5bcc7 158 :
Anna Bridge 180:96ed750bd169 159 :
<> 151:5eaa88a5bcc7 160 : );
<> 151:5eaa88a5bcc7 161 return;
<> 151:5eaa88a5bcc7 162 }
<> 151:5eaa88a5bcc7 163
<> 151:5eaa88a5bcc7 164 #endif
<> 151:5eaa88a5bcc7 165
<> 151:5eaa88a5bcc7 166 #endif