mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_ONSEMI/TARGET_NCS36510/reset_map.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
149:156823d33999 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file reset_map.h
<> 149:156823d33999 4 * @brief Reset hw module register map
<> 149:156823d33999 5 * @internal
<> 149:156823d33999 6 * @author ON Semiconductor
<> 149:156823d33999 7 * $Rev: 2848 $
<> 149:156823d33999 8 * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $
<> 149:156823d33999 9 ******************************************************************************
<> 149:156823d33999 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 149:156823d33999 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 149:156823d33999 12 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 149:156823d33999 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 149:156823d33999 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 149:156823d33999 15 * if applicable the software license agreement. Do not use this software and/or
<> 149:156823d33999 16 * documentation unless you have carefully read and you agree to the limited terms and
<> 149:156823d33999 17 * conditions. By using this software and/or documentation, you agree to the limited
<> 149:156823d33999 18 * terms and conditions.
<> 149:156823d33999 19 *
<> 149:156823d33999 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 149:156823d33999 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 149:156823d33999 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 149:156823d33999 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 149:156823d33999 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 149:156823d33999 25 * @endinternal
<> 149:156823d33999 26 *
<> 149:156823d33999 27 * @ingroup reset
<> 149:156823d33999 28 *
<> 149:156823d33999 29 * @details
<> 149:156823d33999 30 */
<> 149:156823d33999 31
<> 149:156823d33999 32 #ifndef RESET_MAP_H_
<> 149:156823d33999 33 #define RESET_MAP_H_
<> 149:156823d33999 34
<> 149:156823d33999 35 /*************************************************************************************************
<> 149:156823d33999 36 * *
<> 149:156823d33999 37 * Header files *
<> 149:156823d33999 38 * *
<> 149:156823d33999 39 *************************************************************************************************/
<> 149:156823d33999 40
<> 149:156823d33999 41 #include "architecture.h"
<> 149:156823d33999 42
<> 149:156823d33999 43 /**************************************************************************************************
<> 149:156823d33999 44 * *
<> 149:156823d33999 45 * Type definitions *
<> 149:156823d33999 46 * *
<> 149:156823d33999 47 **************************************************************************************************/
<> 149:156823d33999 48
<> 149:156823d33999 49 /** Reset status and clear register.
<> 149:156823d33999 50 * Also contains HW revision ID.
<> 149:156823d33999 51 */
<> 149:156823d33999 52 typedef struct {
<> 149:156823d33999 53 union {
<> 149:156823d33999 54 struct {
<> 149:156823d33999 55 __I uint32_t LOCKUP:1; /**< 1:Core did lock up */
<> 149:156823d33999 56 __I uint32_t WDOGRES:1; /**< 1:Watchdog reset occurred */
<> 149:156823d33999 57 __I uint32_t EXTRESET:1; /**< 1:External reset occurred */
<> 149:156823d33999 58 __I uint32_t SYSRESETREQ:1; /**< 1:System reset occurred */
<> 149:156823d33999 59 __I uint32_t POR:1; /**< 1:POR reset occurred */
<> 149:156823d33999 60 } BITS;
<> 149:156823d33999 61 __I uint32_t WORD;
<> 149:156823d33999 62 } SOURCE;
<> 149:156823d33999 63 __O uint32_t CLEARSOURCE; /**< writing any value to this register will clear the reset source register */
<> 149:156823d33999 64 __I uint32_t HWREVID; /**< Hardware ID, 0x80215400 */
<> 149:156823d33999 65 __IO uint32_t CONTROL; /**< External Reset & Watchdog behavior: 0 – External Reset & Watchdog will reset debug logic 1 – External Reset & Watchdog will not reset debug logic */
<> 149:156823d33999 66
<> 149:156823d33999 67 } ResetReg_t, *ResetReg_pt;
<> 149:156823d33999 68
<> 149:156823d33999 69 #endif /* RESET_MAP_H_ */