mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/spi_api.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
172:7d866c31b3c5 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include <math.h>
<> 144:ef7eb2e8f9f7 17
<> 144:ef7eb2e8f9f7 18 #include "spi_api.h"
<> 144:ef7eb2e8f9f7 19 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 20 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 21 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 static const PinMap PinMap_SPI_SCLK[] = {
<> 144:ef7eb2e8f9f7 24 {P0_7 , SPI_1, 2},
<> 144:ef7eb2e8f9f7 25 {P1_19, SPI_1, 5},
<> 144:ef7eb2e8f9f7 26 {P1_20, SPI_0, 5},
<> 144:ef7eb2e8f9f7 27 {P2_22, SPI_0, 2},
<> 144:ef7eb2e8f9f7 28 {P5_2, SPI_2, 2},
<> 144:ef7eb2e8f9f7 29 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 30 };
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 static const PinMap PinMap_SPI_MOSI[] = {
<> 144:ef7eb2e8f9f7 33 {P0_9 , SPI_1, 2},
<> 144:ef7eb2e8f9f7 34 {P1_24, SPI_0, 5},
<> 144:ef7eb2e8f9f7 35 {P2_27, SPI_0, 2},
<> 144:ef7eb2e8f9f7 36 {P5_0, SPI_2, 2},
<> 144:ef7eb2e8f9f7 37 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 38 };
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 static const PinMap PinMap_SPI_MISO[] = {
<> 144:ef7eb2e8f9f7 41 {P0_8 , SPI_1, 2},
<> 144:ef7eb2e8f9f7 42 {P1_23, SPI_0, 5},
<> 144:ef7eb2e8f9f7 43 {P2_26, SPI_0, 2},
<> 144:ef7eb2e8f9f7 44 {P5_1, SPI_2, 2},
<> 144:ef7eb2e8f9f7 45 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 46 };
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 static const PinMap PinMap_SPI_SSEL[] = {
<> 144:ef7eb2e8f9f7 49 {P0_6 , SPI_1, 2},
<> 144:ef7eb2e8f9f7 50 {P2_23, SPI_0, 2},
<> 144:ef7eb2e8f9f7 51 {P5_3, SPI_2, 2},
<> 144:ef7eb2e8f9f7 52 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 53 };
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 static inline int ssp_disable(spi_t *obj);
<> 144:ef7eb2e8f9f7 56 static inline int ssp_enable(spi_t *obj);
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
<> 144:ef7eb2e8f9f7 59 // determine the SPI to use
<> 144:ef7eb2e8f9f7 60 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 61 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 62 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 63 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 64 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
<> 144:ef7eb2e8f9f7 65 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
<> 144:ef7eb2e8f9f7 66 obj->spi = (LPC_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl);
<> 144:ef7eb2e8f9f7 67 MBED_ASSERT((int)obj->spi != NC);
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 // enable power and clocking
<> 144:ef7eb2e8f9f7 70 switch ((int)obj->spi) {
<> 144:ef7eb2e8f9f7 71 case SPI_0: LPC_SC->PCONP |= 1 << 21; break;
<> 144:ef7eb2e8f9f7 72 case SPI_1: LPC_SC->PCONP |= 1 << 10; break;
<> 144:ef7eb2e8f9f7 73 case SPI_2: LPC_SC->PCONP |= 1 << 20; break;
<> 144:ef7eb2e8f9f7 74 }
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 // pin out the spi pins
<> 144:ef7eb2e8f9f7 77 pinmap_pinout(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 78 pinmap_pinout(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 79 pinmap_pinout(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 80 if (ssel != NC) {
<> 144:ef7eb2e8f9f7 81 pinmap_pinout(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 82 }
<> 144:ef7eb2e8f9f7 83 }
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 void spi_free(spi_t *obj) {}
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 void spi_format(spi_t *obj, int bits, int mode, int slave) {
<> 144:ef7eb2e8f9f7 88 MBED_ASSERT(((bits >= 4) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
<> 144:ef7eb2e8f9f7 89 ssp_disable(obj);
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 int polarity = (mode & 0x2) ? 1 : 0;
<> 144:ef7eb2e8f9f7 92 int phase = (mode & 0x1) ? 1 : 0;
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 // set it up
<> 144:ef7eb2e8f9f7 95 int DSS = bits - 1; // DSS (data select size)
<> 144:ef7eb2e8f9f7 96 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
<> 144:ef7eb2e8f9f7 97 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 int FRF = 0; // FRF (frame format) = SPI
<> 144:ef7eb2e8f9f7 100 uint32_t tmp = obj->spi->CR0;
AnnaBridge 172:7d866c31b3c5 101 tmp &= ~(0x00FF); // Clear DSS, FRF, CPOL and CPHA [7:0]
<> 144:ef7eb2e8f9f7 102 tmp |= DSS << 0
<> 144:ef7eb2e8f9f7 103 | FRF << 4
<> 144:ef7eb2e8f9f7 104 | SPO << 6
<> 144:ef7eb2e8f9f7 105 | SPH << 7;
<> 144:ef7eb2e8f9f7 106 obj->spi->CR0 = tmp;
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 tmp = obj->spi->CR1;
<> 144:ef7eb2e8f9f7 109 tmp &= ~(0xD);
<> 144:ef7eb2e8f9f7 110 tmp |= 0 << 0 // LBM - loop back mode - off
<> 144:ef7eb2e8f9f7 111 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
<> 144:ef7eb2e8f9f7 112 | 0 << 3; // SOD - slave output disable - na
<> 144:ef7eb2e8f9f7 113 obj->spi->CR1 = tmp;
<> 144:ef7eb2e8f9f7 114 ssp_enable(obj);
<> 144:ef7eb2e8f9f7 115 }
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 void spi_frequency(spi_t *obj, int hz) {
<> 144:ef7eb2e8f9f7 118 ssp_disable(obj);
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 uint32_t PCLK = PeripheralClock;
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 int prescaler;
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
<> 144:ef7eb2e8f9f7 125 int prescale_hz = PCLK / prescaler;
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 // calculate the divider
<> 144:ef7eb2e8f9f7 128 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 // check we can support the divider
<> 144:ef7eb2e8f9f7 131 if (divider < 256) {
<> 144:ef7eb2e8f9f7 132 // prescaler
<> 144:ef7eb2e8f9f7 133 obj->spi->CPSR = prescaler;
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 // divider
AnnaBridge 172:7d866c31b3c5 136 obj->spi->CR0 &= ~(0xFF00); // Clear SCR: Serial clock rate [15:8]
<> 144:ef7eb2e8f9f7 137 obj->spi->CR0 |= (divider - 1) << 8;
<> 144:ef7eb2e8f9f7 138 ssp_enable(obj);
<> 144:ef7eb2e8f9f7 139 return;
<> 144:ef7eb2e8f9f7 140 }
<> 144:ef7eb2e8f9f7 141 }
<> 144:ef7eb2e8f9f7 142 error("Couldn't setup requested SPI frequency");
<> 144:ef7eb2e8f9f7 143 }
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 static inline int ssp_disable(spi_t *obj) {
<> 144:ef7eb2e8f9f7 146 return obj->spi->CR1 &= ~(1 << 1);
<> 144:ef7eb2e8f9f7 147 }
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 static inline int ssp_enable(spi_t *obj) {
<> 144:ef7eb2e8f9f7 150 return obj->spi->CR1 |= (1 << 1);
<> 144:ef7eb2e8f9f7 151 }
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 static inline int ssp_readable(spi_t *obj) {
<> 144:ef7eb2e8f9f7 154 return obj->spi->SR & (1 << 2);
<> 144:ef7eb2e8f9f7 155 }
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 static inline int ssp_writeable(spi_t *obj) {
<> 144:ef7eb2e8f9f7 158 return obj->spi->SR & (1 << 1);
<> 144:ef7eb2e8f9f7 159 }
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 static inline void ssp_write(spi_t *obj, int value) {
<> 144:ef7eb2e8f9f7 162 while (!ssp_writeable(obj));
<> 144:ef7eb2e8f9f7 163 obj->spi->DR = value;
<> 144:ef7eb2e8f9f7 164 }
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 static inline int ssp_read(spi_t *obj) {
<> 144:ef7eb2e8f9f7 167 while (!ssp_readable(obj));
<> 144:ef7eb2e8f9f7 168 return obj->spi->DR;
<> 144:ef7eb2e8f9f7 169 }
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 static inline int ssp_busy(spi_t *obj) {
<> 144:ef7eb2e8f9f7 172 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
<> 144:ef7eb2e8f9f7 173 }
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 int spi_master_write(spi_t *obj, int value) {
<> 144:ef7eb2e8f9f7 176 ssp_write(obj, value);
<> 144:ef7eb2e8f9f7 177 return ssp_read(obj);
<> 144:ef7eb2e8f9f7 178 }
<> 144:ef7eb2e8f9f7 179
Kojto 170:19eb464bc2be 180 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
Kojto 170:19eb464bc2be 181 char *rx_buffer, int rx_length, char write_fill) {
AnnaBridge 167:e84263d55307 182 int total = (tx_length > rx_length) ? tx_length : rx_length;
AnnaBridge 167:e84263d55307 183
AnnaBridge 167:e84263d55307 184 for (int i = 0; i < total; i++) {
Kojto 170:19eb464bc2be 185 char out = (i < tx_length) ? tx_buffer[i] : write_fill;
AnnaBridge 167:e84263d55307 186 char in = spi_master_write(obj, out);
AnnaBridge 167:e84263d55307 187 if (i < rx_length) {
AnnaBridge 167:e84263d55307 188 rx_buffer[i] = in;
AnnaBridge 167:e84263d55307 189 }
AnnaBridge 167:e84263d55307 190 }
AnnaBridge 167:e84263d55307 191
AnnaBridge 167:e84263d55307 192 return total;
AnnaBridge 167:e84263d55307 193 }
AnnaBridge 167:e84263d55307 194
<> 144:ef7eb2e8f9f7 195 int spi_slave_receive(spi_t *obj) {
<> 144:ef7eb2e8f9f7 196 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
<> 144:ef7eb2e8f9f7 197 }
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 int spi_slave_read(spi_t *obj) {
<> 144:ef7eb2e8f9f7 200 return obj->spi->DR;
<> 144:ef7eb2e8f9f7 201 }
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 void spi_slave_write(spi_t *obj, int value) {
<> 144:ef7eb2e8f9f7 204 while (ssp_writeable(obj) == 0) ;
<> 144:ef7eb2e8f9f7 205 obj->spi->DR = value;
<> 144:ef7eb2e8f9f7 206 }
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 int spi_busy(spi_t *obj) {
<> 144:ef7eb2e8f9f7 209 return ssp_busy(obj);
<> 144:ef7eb2e8f9f7 210 }