mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC13xx.S@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
149:156823d33999 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;/*****************************************************************************
<> 144:ef7eb2e8f9f7 2 ; * @file: startup_LPC13xx.s
<> 144:ef7eb2e8f9f7 3 ; * @purpose: CMSIS Cortex-M3 Core Device Startup File
<> 144:ef7eb2e8f9f7 4 ; * for the NXP LPC13xx Device Series
<> 144:ef7eb2e8f9f7 5 ; * @version: V1.02, modified for mbed
<> 144:ef7eb2e8f9f7 6 ; * @date: 27. July 2009, modified 3rd Aug 2009
<> 144:ef7eb2e8f9f7 7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
<> 144:ef7eb2e8f9f7 8 ; *
<> 144:ef7eb2e8f9f7 9 ; * Copyright (C) 2009 ARM Limited. All rights reserved.
<> 144:ef7eb2e8f9f7 10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M3
<> 144:ef7eb2e8f9f7 11 ; * processor based microcontrollers. This file can be freely distributed
<> 144:ef7eb2e8f9f7 12 ; * within development tools that are supporting such ARM based processors.
<> 144:ef7eb2e8f9f7 13 ; *
<> 144:ef7eb2e8f9f7 14 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
<> 144:ef7eb2e8f9f7 18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 ; *
<> 144:ef7eb2e8f9f7 20 ; *****************************************************************************/
<> 144:ef7eb2e8f9f7 21 Stack_Size EQU 0x00000400
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 AREA STACK, NOINIT, READWRITE, ALIGN=3
<> 144:ef7eb2e8f9f7 24 EXPORT __initial_sp
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 Stack_Mem SPACE Stack_Size
<> 144:ef7eb2e8f9f7 27 __initial_sp EQU 0x10002000 ; Top of RAM from LPC1347
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29
<> 144:ef7eb2e8f9f7 30 Heap_Size EQU 0x00000000
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 AREA HEAP, NOINIT, READWRITE, ALIGN=3
<> 144:ef7eb2e8f9f7 33 EXPORT __heap_base
<> 144:ef7eb2e8f9f7 34 EXPORT __heap_limit
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 __heap_base
<> 144:ef7eb2e8f9f7 37 Heap_Mem SPACE Heap_Size
<> 144:ef7eb2e8f9f7 38 __heap_limit
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 PRESERVE8
<> 144:ef7eb2e8f9f7 41 THUMB
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 ; Vector Table Mapped to Address 0 at Reset
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 AREA RESET, DATA, READONLY
<> 144:ef7eb2e8f9f7 46 EXPORT __Vectors
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 __Vectors DCD __initial_sp ; Top of Stack
<> 144:ef7eb2e8f9f7 49 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 50 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 51 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 52 DCD MemManage_Handler ; MPU Fault Handler
<> 144:ef7eb2e8f9f7 53 DCD BusFault_Handler ; Bus Fault Handler
<> 144:ef7eb2e8f9f7 54 DCD UsageFault_Handler ; Usage Fault Handler
<> 144:ef7eb2e8f9f7 55 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 56 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 57 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 58 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 59 DCD SVC_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 60 DCD DebugMon_Handler ; Debug Monitor Handler
<> 144:ef7eb2e8f9f7 61 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 62 DCD PendSV_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 63 DCD SysTick_Handler ; SysTick Handler
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 ; External Interrupts
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 DCD PIN_INT0_Handler ; All GPIO pin can be routed to PIN_INTx
<> 144:ef7eb2e8f9f7 68 DCD PIN_INT1_Handler
<> 144:ef7eb2e8f9f7 69 DCD PIN_INT2_Handler
<> 144:ef7eb2e8f9f7 70 DCD PIN_INT3_Handler
<> 144:ef7eb2e8f9f7 71 DCD PIN_INT4_Handler
<> 144:ef7eb2e8f9f7 72 DCD PIN_INT5_Handler
<> 144:ef7eb2e8f9f7 73 DCD PIN_INT6_Handler
<> 144:ef7eb2e8f9f7 74 DCD PIN_INT7_Handler
<> 144:ef7eb2e8f9f7 75 DCD GINT0_Handler
<> 144:ef7eb2e8f9f7 76 DCD GINT1_Handler ; PIO0 (0:7)
<> 144:ef7eb2e8f9f7 77 DCD 0
<> 144:ef7eb2e8f9f7 78 DCD 0
<> 144:ef7eb2e8f9f7 79 DCD OSTIMER_Handler
<> 144:ef7eb2e8f9f7 80 DCD 0
<> 144:ef7eb2e8f9f7 81 DCD SSP1_Handler ; SSP1
<> 144:ef7eb2e8f9f7 82 DCD I2C_Handler ; I2C
<> 144:ef7eb2e8f9f7 83 DCD CT16B0_Handler ; 16-bit Timer0
<> 144:ef7eb2e8f9f7 84 DCD CT16B1_Handler ; 16-bit Timer1
<> 144:ef7eb2e8f9f7 85 DCD CT32B0_Handler ; 32-bit Timer0
<> 144:ef7eb2e8f9f7 86 DCD CT32B1_Handler ; 32-bit Timer1
<> 144:ef7eb2e8f9f7 87 DCD SSP0_Handler ; SSP0
<> 144:ef7eb2e8f9f7 88 DCD USART_Handler ; USART
<> 144:ef7eb2e8f9f7 89 DCD USB_Handler ; USB IRQ
<> 144:ef7eb2e8f9f7 90 DCD USB_FIQHandler ; USB FIQ
<> 144:ef7eb2e8f9f7 91 DCD ADC_Handler ; A/D Converter
<> 144:ef7eb2e8f9f7 92 DCD WDT_Handler ; Watchdog timer
<> 144:ef7eb2e8f9f7 93 DCD BOD_Handler ; Brown Out Detect
<> 144:ef7eb2e8f9f7 94 DCD FMC_Handler ; IP2111 Flash Memory Controller
<> 144:ef7eb2e8f9f7 95 DCD OSCFAIL_Handler ; OSC FAIL
<> 144:ef7eb2e8f9f7 96 DCD PVTCIRCUIT_Handler ; PVT CIRCUIT
<> 144:ef7eb2e8f9f7 97 DCD USBWakeup_Handler ; USB wake up
<> 144:ef7eb2e8f9f7 98 DCD 0
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 IF :LNOT::DEF:NO_CRP
<> 144:ef7eb2e8f9f7 101 AREA |.ARM.__at_0x02FC|, CODE, READONLY
<> 144:ef7eb2e8f9f7 102 CRP_Key DCD 0xFFFFFFFF
<> 144:ef7eb2e8f9f7 103 ENDIF
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 AREA |.text|, CODE, READONLY
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 ; Reset Handler
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 Reset_Handler PROC
<> 144:ef7eb2e8f9f7 112 EXPORT Reset_Handler [WEAK]
<> 144:ef7eb2e8f9f7 113 IMPORT SystemInit
<> 144:ef7eb2e8f9f7 114 IMPORT __main
<> 144:ef7eb2e8f9f7 115 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 116 BLX R0
<> 144:ef7eb2e8f9f7 117 LDR R0, =__main
<> 144:ef7eb2e8f9f7 118 BX R0
<> 144:ef7eb2e8f9f7 119 ENDP
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 ; Dummy Exception Handlers (infinite loops which can be modified)
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 NMI_Handler PROC
<> 144:ef7eb2e8f9f7 125 EXPORT NMI_Handler [WEAK]
<> 144:ef7eb2e8f9f7 126 B .
<> 144:ef7eb2e8f9f7 127 ENDP
<> 144:ef7eb2e8f9f7 128 HardFault_Handler\
<> 144:ef7eb2e8f9f7 129 PROC
<> 144:ef7eb2e8f9f7 130 EXPORT HardFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 131 B .
<> 144:ef7eb2e8f9f7 132 ENDP
<> 144:ef7eb2e8f9f7 133 MemManage_Handler\
<> 144:ef7eb2e8f9f7 134 PROC
<> 144:ef7eb2e8f9f7 135 EXPORT MemManage_Handler [WEAK]
<> 144:ef7eb2e8f9f7 136 B .
<> 144:ef7eb2e8f9f7 137 ENDP
<> 144:ef7eb2e8f9f7 138 BusFault_Handler\
<> 144:ef7eb2e8f9f7 139 PROC
<> 144:ef7eb2e8f9f7 140 EXPORT BusFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 141 B .
<> 144:ef7eb2e8f9f7 142 ENDP
<> 144:ef7eb2e8f9f7 143 UsageFault_Handler\
<> 144:ef7eb2e8f9f7 144 PROC
<> 144:ef7eb2e8f9f7 145 EXPORT UsageFault_Handler [WEAK]
<> 144:ef7eb2e8f9f7 146 B .
<> 144:ef7eb2e8f9f7 147 ENDP
<> 144:ef7eb2e8f9f7 148 SVC_Handler PROC
<> 144:ef7eb2e8f9f7 149 EXPORT SVC_Handler [WEAK]
<> 144:ef7eb2e8f9f7 150 B .
<> 144:ef7eb2e8f9f7 151 ENDP
<> 144:ef7eb2e8f9f7 152 DebugMon_Handler\
<> 144:ef7eb2e8f9f7 153 PROC
<> 144:ef7eb2e8f9f7 154 EXPORT DebugMon_Handler [WEAK]
<> 144:ef7eb2e8f9f7 155 B .
<> 144:ef7eb2e8f9f7 156 ENDP
<> 144:ef7eb2e8f9f7 157 PendSV_Handler PROC
<> 144:ef7eb2e8f9f7 158 EXPORT PendSV_Handler [WEAK]
<> 144:ef7eb2e8f9f7 159 B .
<> 144:ef7eb2e8f9f7 160 ENDP
<> 144:ef7eb2e8f9f7 161 SysTick_Handler PROC
<> 144:ef7eb2e8f9f7 162 EXPORT SysTick_Handler [WEAK]
<> 144:ef7eb2e8f9f7 163 B .
<> 144:ef7eb2e8f9f7 164 ENDP
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 Default_Handler PROC
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 EXPORT PIN_INT0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 169 EXPORT PIN_INT1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 170 EXPORT PIN_INT2_Handler [WEAK]
<> 144:ef7eb2e8f9f7 171 EXPORT PIN_INT3_Handler [WEAK]
<> 144:ef7eb2e8f9f7 172 EXPORT PIN_INT4_Handler [WEAK]
<> 144:ef7eb2e8f9f7 173 EXPORT PIN_INT5_Handler [WEAK]
<> 144:ef7eb2e8f9f7 174 EXPORT PIN_INT6_Handler [WEAK]
<> 144:ef7eb2e8f9f7 175 EXPORT PIN_INT7_Handler [WEAK]
<> 144:ef7eb2e8f9f7 176 EXPORT GINT0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 177 EXPORT GINT1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 178 EXPORT OSTIMER_Handler [WEAK]
<> 144:ef7eb2e8f9f7 179 EXPORT SSP1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 180 EXPORT I2C_Handler [WEAK]
<> 144:ef7eb2e8f9f7 181 EXPORT CT16B0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 182 EXPORT CT16B1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 183 EXPORT CT32B0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 184 EXPORT CT32B1_Handler [WEAK]
<> 144:ef7eb2e8f9f7 185 EXPORT SSP0_Handler [WEAK]
<> 144:ef7eb2e8f9f7 186 EXPORT USART_Handler [WEAK]
<> 144:ef7eb2e8f9f7 187 EXPORT USB_Handler [WEAK]
<> 144:ef7eb2e8f9f7 188 EXPORT USB_FIQHandler [WEAK]
<> 144:ef7eb2e8f9f7 189 EXPORT ADC_Handler [WEAK]
<> 144:ef7eb2e8f9f7 190 EXPORT WDT_Handler [WEAK]
<> 144:ef7eb2e8f9f7 191 EXPORT BOD_Handler [WEAK]
<> 144:ef7eb2e8f9f7 192 EXPORT FMC_Handler [WEAK]
<> 144:ef7eb2e8f9f7 193 EXPORT OSCFAIL_Handler [WEAK]
<> 144:ef7eb2e8f9f7 194 EXPORT PVTCIRCUIT_Handler [WEAK]
<> 144:ef7eb2e8f9f7 195 EXPORT USBWakeup_Handler [WEAK]
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 PIN_INT0_Handler
<> 144:ef7eb2e8f9f7 198 PIN_INT1_Handler
<> 144:ef7eb2e8f9f7 199 PIN_INT2_Handler
<> 144:ef7eb2e8f9f7 200 PIN_INT3_Handler
<> 144:ef7eb2e8f9f7 201 PIN_INT4_Handler
<> 144:ef7eb2e8f9f7 202 PIN_INT5_Handler
<> 144:ef7eb2e8f9f7 203 PIN_INT6_Handler
<> 144:ef7eb2e8f9f7 204 PIN_INT7_Handler
<> 144:ef7eb2e8f9f7 205 GINT0_Handler
<> 144:ef7eb2e8f9f7 206 GINT1_Handler
<> 144:ef7eb2e8f9f7 207 OSTIMER_Handler
<> 144:ef7eb2e8f9f7 208 SSP1_Handler
<> 144:ef7eb2e8f9f7 209 I2C_Handler
<> 144:ef7eb2e8f9f7 210 CT16B0_Handler
<> 144:ef7eb2e8f9f7 211 CT16B1_Handler
<> 144:ef7eb2e8f9f7 212 CT32B0_Handler
<> 144:ef7eb2e8f9f7 213 CT32B1_Handler
<> 144:ef7eb2e8f9f7 214 SSP0_Handler
<> 144:ef7eb2e8f9f7 215 USART_Handler
<> 144:ef7eb2e8f9f7 216 USB_Handler
<> 144:ef7eb2e8f9f7 217 USB_FIQHandler
<> 144:ef7eb2e8f9f7 218 ADC_Handler
<> 144:ef7eb2e8f9f7 219 WDT_Handler
<> 144:ef7eb2e8f9f7 220 BOD_Handler
<> 144:ef7eb2e8f9f7 221 FMC_Handler
<> 144:ef7eb2e8f9f7 222 OSCFAIL_Handler
<> 144:ef7eb2e8f9f7 223 PVTCIRCUIT_Handler
<> 144:ef7eb2e8f9f7 224 USBWakeup_Handler
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 B .
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 ENDP
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 ALIGN
<> 144:ef7eb2e8f9f7 231 END