mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_NUVOTON/TARGET_M480/device/startup_M480.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 188:bcfe06ba3d64
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 172:7d866c31b3c5 | 1 | /****************************************************************************** |
AnnaBridge | 172:7d866c31b3c5 | 2 | * @file startup_M480.c |
AnnaBridge | 172:7d866c31b3c5 | 3 | * @version V0.10 |
AnnaBridge | 172:7d866c31b3c5 | 4 | * $Revision: 11 $ |
AnnaBridge | 172:7d866c31b3c5 | 5 | * $Date: 15/09/02 10:02a $ |
AnnaBridge | 172:7d866c31b3c5 | 6 | * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for M480 Series MCU |
AnnaBridge | 172:7d866c31b3c5 | 7 | * |
AnnaBridge | 172:7d866c31b3c5 | 8 | * @note |
AnnaBridge | 172:7d866c31b3c5 | 9 | * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. |
AnnaBridge | 172:7d866c31b3c5 | 10 | *****************************************************************************/ |
AnnaBridge | 172:7d866c31b3c5 | 11 | |
AnnaBridge | 172:7d866c31b3c5 | 12 | #include "M480.h" |
AnnaBridge | 172:7d866c31b3c5 | 13 | #include "PeripheralNames.h" |
AnnaBridge | 172:7d866c31b3c5 | 14 | |
AnnaBridge | 172:7d866c31b3c5 | 15 | /* Suppress warning messages */ |
AnnaBridge | 172:7d866c31b3c5 | 16 | #if defined(__CC_ARM) |
AnnaBridge | 172:7d866c31b3c5 | 17 | // Suppress warning message: extended constant initialiser used |
AnnaBridge | 172:7d866c31b3c5 | 18 | #pragma diag_suppress 1296 |
AnnaBridge | 172:7d866c31b3c5 | 19 | #elif defined(__ICCARM__) |
AnnaBridge | 172:7d866c31b3c5 | 20 | #elif defined(__GNUC__) |
AnnaBridge | 172:7d866c31b3c5 | 21 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 22 | |
AnnaBridge | 172:7d866c31b3c5 | 23 | /* Macro Definitions */ |
AnnaBridge | 172:7d866c31b3c5 | 24 | #if defined(__CC_ARM) |
AnnaBridge | 172:7d866c31b3c5 | 25 | #define WEAK __attribute__ ((weak)) |
AnnaBridge | 172:7d866c31b3c5 | 26 | #define ALIAS(f) __attribute__ ((weak, alias(#f))) |
AnnaBridge | 172:7d866c31b3c5 | 27 | |
AnnaBridge | 172:7d866c31b3c5 | 28 | #define WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) \ |
AnnaBridge | 172:7d866c31b3c5 | 29 | void FUN(void) __attribute__ ((weak, alias(#FUN_ALIAS))); |
AnnaBridge | 172:7d866c31b3c5 | 30 | |
AnnaBridge | 172:7d866c31b3c5 | 31 | #elif defined(__ICCARM__) |
AnnaBridge | 172:7d866c31b3c5 | 32 | //#define STRINGIFY(x) #x |
AnnaBridge | 172:7d866c31b3c5 | 33 | //#define _STRINGIFY(x) STRINGIFY(x) |
AnnaBridge | 172:7d866c31b3c5 | 34 | #define WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) \ |
AnnaBridge | 172:7d866c31b3c5 | 35 | void FUN(void); \ |
AnnaBridge | 172:7d866c31b3c5 | 36 | _Pragma(_STRINGIFY(_WEAK_ALIAS_FUNC(FUN, FUN_ALIAS))) |
AnnaBridge | 172:7d866c31b3c5 | 37 | #define _WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) weak __WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) |
AnnaBridge | 172:7d866c31b3c5 | 38 | #define __WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) FUN##=##FUN_ALIAS |
AnnaBridge | 172:7d866c31b3c5 | 39 | // Suppress warning message Pe1665 |
AnnaBridge | 172:7d866c31b3c5 | 40 | #pragma diag_suppress=Pe1665 |
AnnaBridge | 172:7d866c31b3c5 | 41 | |
AnnaBridge | 172:7d866c31b3c5 | 42 | #elif defined(__GNUC__) |
AnnaBridge | 172:7d866c31b3c5 | 43 | #define WEAK __attribute__ ((weak)) |
AnnaBridge | 172:7d866c31b3c5 | 44 | #define ALIAS(f) __attribute__ ((weak, alias(#f))) |
AnnaBridge | 172:7d866c31b3c5 | 45 | |
AnnaBridge | 172:7d866c31b3c5 | 46 | #define WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) \ |
AnnaBridge | 172:7d866c31b3c5 | 47 | void FUN(void) __attribute__ ((weak, alias(#FUN_ALIAS))); |
AnnaBridge | 172:7d866c31b3c5 | 48 | |
AnnaBridge | 172:7d866c31b3c5 | 49 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 50 | |
AnnaBridge | 172:7d866c31b3c5 | 51 | |
AnnaBridge | 172:7d866c31b3c5 | 52 | /* Initialize segments */ |
AnnaBridge | 174:b96e65c34a4d | 53 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
AnnaBridge | 172:7d866c31b3c5 | 54 | extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit; |
AnnaBridge | 172:7d866c31b3c5 | 55 | extern void __main(void); |
AnnaBridge | 172:7d866c31b3c5 | 56 | #elif defined(__ICCARM__) |
AnnaBridge | 172:7d866c31b3c5 | 57 | void __iar_program_start(void); |
AnnaBridge | 172:7d866c31b3c5 | 58 | #elif defined(__GNUC__) |
AnnaBridge | 172:7d866c31b3c5 | 59 | extern uint32_t __StackTop; |
AnnaBridge | 172:7d866c31b3c5 | 60 | extern uint32_t __etext; |
AnnaBridge | 172:7d866c31b3c5 | 61 | extern uint32_t __data_start__; |
AnnaBridge | 172:7d866c31b3c5 | 62 | extern uint32_t __data_end__; |
AnnaBridge | 172:7d866c31b3c5 | 63 | extern uint32_t __bss_start__; |
AnnaBridge | 172:7d866c31b3c5 | 64 | extern uint32_t __bss_end__; |
AnnaBridge | 172:7d866c31b3c5 | 65 | |
AnnaBridge | 172:7d866c31b3c5 | 66 | #if defined(TOOLCHAIN_GCC_ARM) |
AnnaBridge | 172:7d866c31b3c5 | 67 | extern void _start(void); |
AnnaBridge | 172:7d866c31b3c5 | 68 | #else |
AnnaBridge | 172:7d866c31b3c5 | 69 | #error("For GCC toolchain, only support GNU ARM Embedded") |
AnnaBridge | 172:7d866c31b3c5 | 70 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 71 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 72 | |
AnnaBridge | 172:7d866c31b3c5 | 73 | /* Default empty handler */ |
AnnaBridge | 172:7d866c31b3c5 | 74 | void Default_Handler(void); |
AnnaBridge | 172:7d866c31b3c5 | 75 | |
AnnaBridge | 172:7d866c31b3c5 | 76 | /* Reset handler */ |
AnnaBridge | 172:7d866c31b3c5 | 77 | void Reset_Handler(void); |
AnnaBridge | 172:7d866c31b3c5 | 78 | void Reset_Handler_1(void); |
AnnaBridge | 172:7d866c31b3c5 | 79 | void Reset_Handler_2(void); |
AnnaBridge | 172:7d866c31b3c5 | 80 | void Reset_Handler_Cascade(void *sp, void *pc); |
AnnaBridge | 172:7d866c31b3c5 | 81 | |
AnnaBridge | 172:7d866c31b3c5 | 82 | /* Cortex-M4 core handlers */ |
AnnaBridge | 172:7d866c31b3c5 | 83 | WEAK_ALIAS_FUNC(NMI_Handler, Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 84 | WEAK_ALIAS_FUNC(HardFault_Handler, Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 85 | WEAK_ALIAS_FUNC(MemManage_Handler, Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 86 | WEAK_ALIAS_FUNC(BusFault_Handler , Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 87 | WEAK_ALIAS_FUNC(UsageFault_Handler, Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 88 | WEAK_ALIAS_FUNC(SVC_Handler, Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 89 | WEAK_ALIAS_FUNC(DebugMon_Handler, Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 90 | WEAK_ALIAS_FUNC(PendSV_Handler, Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 91 | WEAK_ALIAS_FUNC(SysTick_Handler, Default_Handler) |
AnnaBridge | 172:7d866c31b3c5 | 92 | |
AnnaBridge | 172:7d866c31b3c5 | 93 | /* Peripherals handlers */ |
AnnaBridge | 172:7d866c31b3c5 | 94 | WEAK_ALIAS_FUNC(BOD_IRQHandler, Default_Handler) // 0: Brown Out detection |
AnnaBridge | 172:7d866c31b3c5 | 95 | WEAK_ALIAS_FUNC(IRC_IRQHandler, Default_Handler) // 1: Internal RC |
AnnaBridge | 172:7d866c31b3c5 | 96 | WEAK_ALIAS_FUNC(PWRWU_IRQHandler, Default_Handler) // 2: Power down wake up |
AnnaBridge | 172:7d866c31b3c5 | 97 | WEAK_ALIAS_FUNC(RAMPE_IRQHandler, Default_Handler) // 3: RAM parity error |
AnnaBridge | 172:7d866c31b3c5 | 98 | WEAK_ALIAS_FUNC(CKFAIL_IRQHandler, Default_Handler) // 4: Clock detection fail |
AnnaBridge | 172:7d866c31b3c5 | 99 | // 5: Reserved |
AnnaBridge | 172:7d866c31b3c5 | 100 | WEAK_ALIAS_FUNC(RTC_IRQHandler, Default_Handler) // 6: Real Time Clock |
AnnaBridge | 172:7d866c31b3c5 | 101 | WEAK_ALIAS_FUNC(TAMPER_IRQHandler, Default_Handler) // 7: Tamper detection |
AnnaBridge | 172:7d866c31b3c5 | 102 | WEAK_ALIAS_FUNC(WDT_IRQHandler, Default_Handler) // 8: Watchdog timer |
AnnaBridge | 172:7d866c31b3c5 | 103 | WEAK_ALIAS_FUNC(WWDT_IRQHandler, Default_Handler) // 9: Window watchdog timer |
AnnaBridge | 172:7d866c31b3c5 | 104 | WEAK_ALIAS_FUNC(EINT0_IRQHandler, Default_Handler) // 10: External Input 0 |
AnnaBridge | 172:7d866c31b3c5 | 105 | WEAK_ALIAS_FUNC(EINT1_IRQHandler, Default_Handler) // 11: External Input 1 |
AnnaBridge | 172:7d866c31b3c5 | 106 | WEAK_ALIAS_FUNC(EINT2_IRQHandler, Default_Handler) // 12: External Input 2 |
AnnaBridge | 172:7d866c31b3c5 | 107 | WEAK_ALIAS_FUNC(EINT3_IRQHandler, Default_Handler) // 13: External Input 3 |
AnnaBridge | 172:7d866c31b3c5 | 108 | WEAK_ALIAS_FUNC(EINT4_IRQHandler, Default_Handler) // 14: External Input 4 |
AnnaBridge | 172:7d866c31b3c5 | 109 | WEAK_ALIAS_FUNC(EINT5_IRQHandler, Default_Handler) // 15: External Input 5 |
AnnaBridge | 172:7d866c31b3c5 | 110 | WEAK_ALIAS_FUNC(GPA_IRQHandler, Default_Handler) // 16: GPIO Port A |
AnnaBridge | 172:7d866c31b3c5 | 111 | WEAK_ALIAS_FUNC(GPB_IRQHandler, Default_Handler) // 17: GPIO Port B |
AnnaBridge | 172:7d866c31b3c5 | 112 | WEAK_ALIAS_FUNC(GPC_IRQHandler, Default_Handler) // 18: GPIO Port C |
AnnaBridge | 172:7d866c31b3c5 | 113 | WEAK_ALIAS_FUNC(GPD_IRQHandler, Default_Handler) // 19: GPIO Port D |
AnnaBridge | 172:7d866c31b3c5 | 114 | WEAK_ALIAS_FUNC(GPE_IRQHandler, Default_Handler) // 20: GPIO Port E |
AnnaBridge | 172:7d866c31b3c5 | 115 | WEAK_ALIAS_FUNC(GPF_IRQHandler, Default_Handler) // 21: GPIO Port F |
AnnaBridge | 172:7d866c31b3c5 | 116 | WEAK_ALIAS_FUNC(SPI0_IRQHandler, Default_Handler) // 22: SPI0 |
AnnaBridge | 172:7d866c31b3c5 | 117 | WEAK_ALIAS_FUNC(SPI1_IRQHandler, Default_Handler) // 23: SPI1 |
AnnaBridge | 172:7d866c31b3c5 | 118 | WEAK_ALIAS_FUNC(BRAKE0_IRQHandler, Default_Handler) // 24: |
AnnaBridge | 172:7d866c31b3c5 | 119 | WEAK_ALIAS_FUNC(PWM0P0_IRQHandler, Default_Handler) // 25: |
AnnaBridge | 172:7d866c31b3c5 | 120 | WEAK_ALIAS_FUNC(PWM0P1_IRQHandler, Default_Handler) // 26: |
AnnaBridge | 172:7d866c31b3c5 | 121 | WEAK_ALIAS_FUNC(PWM0P2_IRQHandler, Default_Handler) // 27: |
AnnaBridge | 172:7d866c31b3c5 | 122 | WEAK_ALIAS_FUNC(BRAKE1_IRQHandler, Default_Handler) // 28: |
AnnaBridge | 172:7d866c31b3c5 | 123 | WEAK_ALIAS_FUNC(PWM1P0_IRQHandler, Default_Handler) // 29: |
AnnaBridge | 172:7d866c31b3c5 | 124 | WEAK_ALIAS_FUNC(PWM1P1_IRQHandler, Default_Handler) // 30: |
AnnaBridge | 172:7d866c31b3c5 | 125 | WEAK_ALIAS_FUNC(PWM1P2_IRQHandler, Default_Handler) // 31: |
AnnaBridge | 172:7d866c31b3c5 | 126 | WEAK_ALIAS_FUNC(TMR0_IRQHandler, Default_Handler) // 32: Timer 0 |
AnnaBridge | 172:7d866c31b3c5 | 127 | WEAK_ALIAS_FUNC(TMR1_IRQHandler, Default_Handler) // 33: Timer 1 |
AnnaBridge | 172:7d866c31b3c5 | 128 | WEAK_ALIAS_FUNC(TMR2_IRQHandler, Default_Handler) // 34: Timer 2 |
AnnaBridge | 172:7d866c31b3c5 | 129 | WEAK_ALIAS_FUNC(TMR3_IRQHandler, Default_Handler) // 35: Timer 3 |
AnnaBridge | 172:7d866c31b3c5 | 130 | WEAK_ALIAS_FUNC(UART0_IRQHandler, Default_Handler) // 36: UART0 |
AnnaBridge | 172:7d866c31b3c5 | 131 | WEAK_ALIAS_FUNC(UART1_IRQHandler, Default_Handler) // 37: UART1 |
AnnaBridge | 172:7d866c31b3c5 | 132 | WEAK_ALIAS_FUNC(I2C0_IRQHandler, Default_Handler) // 38: I2C0 |
AnnaBridge | 172:7d866c31b3c5 | 133 | WEAK_ALIAS_FUNC(I2C1_IRQHandler, Default_Handler) // 39: I2C1 |
AnnaBridge | 172:7d866c31b3c5 | 134 | WEAK_ALIAS_FUNC(PDMA_IRQHandler, Default_Handler) // 40: Peripheral DMA |
AnnaBridge | 172:7d866c31b3c5 | 135 | WEAK_ALIAS_FUNC(DAC_IRQHandler, Default_Handler) // 41: DAC |
AnnaBridge | 172:7d866c31b3c5 | 136 | WEAK_ALIAS_FUNC(ADC00_IRQHandler, Default_Handler) // 42: ADC0 interrupt source 0 |
AnnaBridge | 172:7d866c31b3c5 | 137 | WEAK_ALIAS_FUNC(ADC01_IRQHandler, Default_Handler) // 43: ADC0 interrupt source 1 |
AnnaBridge | 172:7d866c31b3c5 | 138 | WEAK_ALIAS_FUNC(ACMP01_IRQHandler, Default_Handler) // 44: ACMP0 and ACMP1 |
AnnaBridge | 172:7d866c31b3c5 | 139 | // 45: Reserved |
AnnaBridge | 172:7d866c31b3c5 | 140 | WEAK_ALIAS_FUNC(ADC02_IRQHandler, Default_Handler) // 46: ADC0 interrupt source 2 |
AnnaBridge | 172:7d866c31b3c5 | 141 | WEAK_ALIAS_FUNC(ADC03_IRQHandler, Default_Handler) // 47: ADC0 interrupt source 3 |
AnnaBridge | 172:7d866c31b3c5 | 142 | WEAK_ALIAS_FUNC(UART2_IRQHandler, Default_Handler) // 48: UART2 |
AnnaBridge | 172:7d866c31b3c5 | 143 | WEAK_ALIAS_FUNC(UART3_IRQHandler, Default_Handler) // 49: UART3 |
AnnaBridge | 172:7d866c31b3c5 | 144 | // 50: Reserved |
AnnaBridge | 172:7d866c31b3c5 | 145 | WEAK_ALIAS_FUNC(SPI2_IRQHandler, Default_Handler) // 51: SPI2 |
AnnaBridge | 172:7d866c31b3c5 | 146 | WEAK_ALIAS_FUNC(SPI3_IRQHandler, Default_Handler) // 52: SPI3 |
AnnaBridge | 172:7d866c31b3c5 | 147 | WEAK_ALIAS_FUNC(USBD_IRQHandler, Default_Handler) // 53: USB device |
AnnaBridge | 172:7d866c31b3c5 | 148 | WEAK_ALIAS_FUNC(OHCI_IRQHandler, Default_Handler) // 54: OHCI |
AnnaBridge | 172:7d866c31b3c5 | 149 | WEAK_ALIAS_FUNC(USBOTG_IRQHandler, Default_Handler) // 55: USB OTG |
AnnaBridge | 172:7d866c31b3c5 | 150 | WEAK_ALIAS_FUNC(CAN0_IRQHandler, Default_Handler) // 56: CAN0 |
AnnaBridge | 172:7d866c31b3c5 | 151 | WEAK_ALIAS_FUNC(CAN1_IRQHandler, Default_Handler) // 57: CAN1 |
AnnaBridge | 172:7d866c31b3c5 | 152 | WEAK_ALIAS_FUNC(SC0_IRQHandler, Default_Handler) // 58: |
AnnaBridge | 172:7d866c31b3c5 | 153 | WEAK_ALIAS_FUNC(SC1_IRQHandler, Default_Handler) // 59: |
AnnaBridge | 172:7d866c31b3c5 | 154 | WEAK_ALIAS_FUNC(SC2_IRQHandler, Default_Handler) // 60: |
AnnaBridge | 172:7d866c31b3c5 | 155 | // 61: |
AnnaBridge | 172:7d866c31b3c5 | 156 | WEAK_ALIAS_FUNC(SPI4_IRQHandler, Default_Handler) // 62: SPI4 |
AnnaBridge | 172:7d866c31b3c5 | 157 | // 63: |
AnnaBridge | 172:7d866c31b3c5 | 158 | WEAK_ALIAS_FUNC(SDH0_IRQHandler, Default_Handler) // 64: SDH0 |
AnnaBridge | 172:7d866c31b3c5 | 159 | WEAK_ALIAS_FUNC(USBD20_IRQHandler, Default_Handler) // 65: USBD20 |
AnnaBridge | 172:7d866c31b3c5 | 160 | WEAK_ALIAS_FUNC(EMAC_TX_IRQHandler, Default_Handler) // 66: EMAC_TX |
AnnaBridge | 172:7d866c31b3c5 | 161 | WEAK_ALIAS_FUNC(EMAC_RX_IRQHandler, Default_Handler) // 67: EMAX_RX |
AnnaBridge | 172:7d866c31b3c5 | 162 | WEAK_ALIAS_FUNC(I2S0_IRQHandler, Default_Handler) // 68: I2S0 |
AnnaBridge | 172:7d866c31b3c5 | 163 | // 69: ToDo: Add description to this Interrupt |
AnnaBridge | 172:7d866c31b3c5 | 164 | WEAK_ALIAS_FUNC(OPA0_IRQHandler, Default_Handler) // 70: OPA0 |
AnnaBridge | 172:7d866c31b3c5 | 165 | WEAK_ALIAS_FUNC(CRYPTO_IRQHandler, Default_Handler) // 71: CRYPTO |
AnnaBridge | 172:7d866c31b3c5 | 166 | WEAK_ALIAS_FUNC(GPG_IRQHandler, Default_Handler) // 72: |
AnnaBridge | 172:7d866c31b3c5 | 167 | WEAK_ALIAS_FUNC(EINT6_IRQHandler, Default_Handler) // 73: |
AnnaBridge | 172:7d866c31b3c5 | 168 | WEAK_ALIAS_FUNC(UART4_IRQHandler, Default_Handler) // 74: UART4 |
AnnaBridge | 172:7d866c31b3c5 | 169 | WEAK_ALIAS_FUNC(UART5_IRQHandler, Default_Handler) // 75: UART5 |
AnnaBridge | 172:7d866c31b3c5 | 170 | WEAK_ALIAS_FUNC(USCI0_IRQHandler, Default_Handler) // 76: USCI0 |
AnnaBridge | 172:7d866c31b3c5 | 171 | WEAK_ALIAS_FUNC(USCI1_IRQHandler, Default_Handler) // 77: USCI1 |
AnnaBridge | 172:7d866c31b3c5 | 172 | WEAK_ALIAS_FUNC(BPWM0_IRQHandler, Default_Handler) // 78: BPWM0 |
AnnaBridge | 172:7d866c31b3c5 | 173 | WEAK_ALIAS_FUNC(BPWM1_IRQHandler, Default_Handler) // 79: BPWM1 |
AnnaBridge | 172:7d866c31b3c5 | 174 | WEAK_ALIAS_FUNC(SPIM_IRQHandler, Default_Handler) // 80: SPIM |
AnnaBridge | 172:7d866c31b3c5 | 175 | // 81: |
AnnaBridge | 172:7d866c31b3c5 | 176 | WEAK_ALIAS_FUNC(I2C2_IRQHandler, Default_Handler) // 82: I2C2 |
AnnaBridge | 172:7d866c31b3c5 | 177 | // 83: |
AnnaBridge | 172:7d866c31b3c5 | 178 | WEAK_ALIAS_FUNC(QEI0_IRQHandler, Default_Handler) // 84: QEI0 |
AnnaBridge | 172:7d866c31b3c5 | 179 | WEAK_ALIAS_FUNC(QEI1_IRQHandler, Default_Handler) // 85: QEI1 |
AnnaBridge | 172:7d866c31b3c5 | 180 | WEAK_ALIAS_FUNC(ECAP0_IRQHandler, Default_Handler) // 86: ECAP0 |
AnnaBridge | 172:7d866c31b3c5 | 181 | WEAK_ALIAS_FUNC(ECAP1_IRQHandler, Default_Handler) // 87: ECAP1 |
AnnaBridge | 172:7d866c31b3c5 | 182 | WEAK_ALIAS_FUNC(GPH_IRQHandler, Default_Handler) // 88: |
AnnaBridge | 172:7d866c31b3c5 | 183 | WEAK_ALIAS_FUNC(EINT7_IRQHandler, Default_Handler) // 89: |
AnnaBridge | 172:7d866c31b3c5 | 184 | WEAK_ALIAS_FUNC(SDH1_IRQHandler, Default_Handler) // 90: SDH1 |
AnnaBridge | 172:7d866c31b3c5 | 185 | // 91: |
AnnaBridge | 172:7d866c31b3c5 | 186 | WEAK_ALIAS_FUNC(EHCI_IRQHandler, Default_Handler) // 92: EHCI |
AnnaBridge | 172:7d866c31b3c5 | 187 | WEAK_ALIAS_FUNC(USBOTG20_IRQHandler, Default_Handler) // 93: |
AnnaBridge | 172:7d866c31b3c5 | 188 | WEAK_ALIAS_FUNC(SWDC_IRQHandler, Default_Handler) // 94: |
AnnaBridge | 172:7d866c31b3c5 | 189 | WEAK_ALIAS_FUNC(ETMC_IRQHandler, Default_Handler) // 95: |
AnnaBridge | 172:7d866c31b3c5 | 190 | |
AnnaBridge | 172:7d866c31b3c5 | 191 | /* Vector table */ |
AnnaBridge | 174:b96e65c34a4d | 192 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
AnnaBridge | 172:7d866c31b3c5 | 193 | __attribute__ ((section("RESET"))) |
AnnaBridge | 172:7d866c31b3c5 | 194 | const uint32_t __vector_handlers[] = { |
AnnaBridge | 172:7d866c31b3c5 | 195 | #elif defined(__ICCARM__) |
AnnaBridge | 172:7d866c31b3c5 | 196 | extern uint32_t CSTACK$$Limit; |
AnnaBridge | 172:7d866c31b3c5 | 197 | const uint32_t __vector_table[] @ ".intvec" = { |
AnnaBridge | 172:7d866c31b3c5 | 198 | #elif defined(__GNUC__) |
AnnaBridge | 172:7d866c31b3c5 | 199 | __attribute__ ((section(".vector_table"))) |
AnnaBridge | 172:7d866c31b3c5 | 200 | const uint32_t __vector_handlers[] = { |
AnnaBridge | 172:7d866c31b3c5 | 201 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 202 | |
AnnaBridge | 174:b96e65c34a4d | 203 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
AnnaBridge | 172:7d866c31b3c5 | 204 | (uint32_t) &Image$$ARM_LIB_STACK$$ZI$$Limit, |
AnnaBridge | 172:7d866c31b3c5 | 205 | #elif defined(__ICCARM__) |
AnnaBridge | 172:7d866c31b3c5 | 206 | (uint32_t) &CSTACK$$Limit, |
AnnaBridge | 172:7d866c31b3c5 | 207 | #elif defined(__GNUC__) |
AnnaBridge | 172:7d866c31b3c5 | 208 | (uint32_t) &__StackTop, |
AnnaBridge | 172:7d866c31b3c5 | 209 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 210 | |
AnnaBridge | 172:7d866c31b3c5 | 211 | (uint32_t) Reset_Handler, // Reset Handler |
AnnaBridge | 172:7d866c31b3c5 | 212 | (uint32_t) NMI_Handler, // NMI Handler |
AnnaBridge | 172:7d866c31b3c5 | 213 | (uint32_t) HardFault_Handler, // Hard Fault Handler |
AnnaBridge | 172:7d866c31b3c5 | 214 | (uint32_t) MemManage_Handler, // MPU Fault Handler |
AnnaBridge | 172:7d866c31b3c5 | 215 | (uint32_t) BusFault_Handler, // Bus Fault Handler |
AnnaBridge | 172:7d866c31b3c5 | 216 | (uint32_t) UsageFault_Handler, // Usage Fault Handler |
AnnaBridge | 172:7d866c31b3c5 | 217 | 0, // Reserved |
AnnaBridge | 172:7d866c31b3c5 | 218 | 0, // Reserved |
AnnaBridge | 172:7d866c31b3c5 | 219 | 0, // Reserved |
AnnaBridge | 172:7d866c31b3c5 | 220 | 0, // Reserved |
AnnaBridge | 172:7d866c31b3c5 | 221 | (uint32_t) SVC_Handler, // SVCall Handler |
AnnaBridge | 172:7d866c31b3c5 | 222 | (uint32_t) DebugMon_Handler, // Debug Monitor Handler |
AnnaBridge | 172:7d866c31b3c5 | 223 | 0, // Reserved |
AnnaBridge | 172:7d866c31b3c5 | 224 | (uint32_t) PendSV_Handler, // PendSV Handler |
AnnaBridge | 172:7d866c31b3c5 | 225 | (uint32_t) SysTick_Handler, // SysTick Handler |
AnnaBridge | 172:7d866c31b3c5 | 226 | |
AnnaBridge | 172:7d866c31b3c5 | 227 | /* External Interrupts */ |
AnnaBridge | 172:7d866c31b3c5 | 228 | (uint32_t) BOD_IRQHandler, // 0: Brown Out detection |
AnnaBridge | 172:7d866c31b3c5 | 229 | (uint32_t) IRC_IRQHandler, // 1: Internal RC |
AnnaBridge | 172:7d866c31b3c5 | 230 | (uint32_t) PWRWU_IRQHandler, // 2: Power down wake up |
AnnaBridge | 172:7d866c31b3c5 | 231 | (uint32_t) RAMPE_IRQHandler, // 3: RAM parity error |
AnnaBridge | 172:7d866c31b3c5 | 232 | (uint32_t) CKFAIL_IRQHandler, // 4: Clock detection fail |
AnnaBridge | 172:7d866c31b3c5 | 233 | (uint32_t) Default_Handler, // 5: Reserved |
AnnaBridge | 172:7d866c31b3c5 | 234 | (uint32_t) RTC_IRQHandler, // 6: Real Time Clock |
AnnaBridge | 172:7d866c31b3c5 | 235 | (uint32_t) TAMPER_IRQHandler, // 7: Tamper detection |
AnnaBridge | 172:7d866c31b3c5 | 236 | (uint32_t) WDT_IRQHandler, // 8: Watchdog timer |
AnnaBridge | 172:7d866c31b3c5 | 237 | (uint32_t) WWDT_IRQHandler, // 9: Window watchdog timer |
AnnaBridge | 172:7d866c31b3c5 | 238 | (uint32_t) EINT0_IRQHandler, // 10: External Input 0 |
AnnaBridge | 172:7d866c31b3c5 | 239 | (uint32_t) EINT1_IRQHandler, // 11: External Input 1 |
AnnaBridge | 172:7d866c31b3c5 | 240 | (uint32_t) EINT2_IRQHandler, // 12: External Input 2 |
AnnaBridge | 172:7d866c31b3c5 | 241 | (uint32_t) EINT3_IRQHandler, // 13: External Input 3 |
AnnaBridge | 172:7d866c31b3c5 | 242 | (uint32_t) EINT4_IRQHandler, // 14: External Input 4 |
AnnaBridge | 172:7d866c31b3c5 | 243 | (uint32_t) EINT5_IRQHandler, // 15: External Input 5 |
AnnaBridge | 172:7d866c31b3c5 | 244 | (uint32_t) GPA_IRQHandler, // 16: GPIO Port A |
AnnaBridge | 172:7d866c31b3c5 | 245 | (uint32_t) GPB_IRQHandler, // 17: GPIO Port B |
AnnaBridge | 172:7d866c31b3c5 | 246 | (uint32_t) GPC_IRQHandler, // 18: GPIO Port C |
AnnaBridge | 172:7d866c31b3c5 | 247 | (uint32_t) GPD_IRQHandler, // 19: GPIO Port D |
AnnaBridge | 172:7d866c31b3c5 | 248 | (uint32_t) GPE_IRQHandler, // 20: GPIO Port E |
AnnaBridge | 172:7d866c31b3c5 | 249 | (uint32_t) GPF_IRQHandler, // 21: GPIO Port F |
AnnaBridge | 172:7d866c31b3c5 | 250 | (uint32_t) SPI0_IRQHandler, // 22: SPI0 |
AnnaBridge | 172:7d866c31b3c5 | 251 | (uint32_t) SPI1_IRQHandler, // 23: SPI1 |
AnnaBridge | 172:7d866c31b3c5 | 252 | (uint32_t) BRAKE0_IRQHandler, // 24: |
AnnaBridge | 172:7d866c31b3c5 | 253 | (uint32_t) PWM0P0_IRQHandler, // 25: |
AnnaBridge | 172:7d866c31b3c5 | 254 | (uint32_t) PWM0P1_IRQHandler, // 26: |
AnnaBridge | 172:7d866c31b3c5 | 255 | (uint32_t) PWM0P2_IRQHandler, // 27: |
AnnaBridge | 172:7d866c31b3c5 | 256 | (uint32_t) BRAKE1_IRQHandler, // 28: |
AnnaBridge | 172:7d866c31b3c5 | 257 | (uint32_t) PWM1P0_IRQHandler, // 29: |
AnnaBridge | 172:7d866c31b3c5 | 258 | (uint32_t) PWM1P1_IRQHandler, // 30: |
AnnaBridge | 172:7d866c31b3c5 | 259 | (uint32_t) PWM1P2_IRQHandler, // 31: |
AnnaBridge | 172:7d866c31b3c5 | 260 | (uint32_t) TMR0_IRQHandler, // 32: Timer 0 |
AnnaBridge | 172:7d866c31b3c5 | 261 | (uint32_t) TMR1_IRQHandler, // 33: Timer 1 |
AnnaBridge | 172:7d866c31b3c5 | 262 | (uint32_t) TMR2_IRQHandler, // 34: Timer 2 |
AnnaBridge | 172:7d866c31b3c5 | 263 | (uint32_t) TMR3_IRQHandler, // 35: Timer 3 |
AnnaBridge | 172:7d866c31b3c5 | 264 | (uint32_t) UART0_IRQHandler, // 36: UART0 |
AnnaBridge | 172:7d866c31b3c5 | 265 | (uint32_t) UART1_IRQHandler, // 37: UART1 |
AnnaBridge | 172:7d866c31b3c5 | 266 | (uint32_t) I2C0_IRQHandler, // 38: I2C0 |
AnnaBridge | 172:7d866c31b3c5 | 267 | (uint32_t) I2C1_IRQHandler, // 39: I2C1 |
AnnaBridge | 172:7d866c31b3c5 | 268 | (uint32_t) PDMA_IRQHandler, // 40: Peripheral DMA |
AnnaBridge | 172:7d866c31b3c5 | 269 | (uint32_t) DAC_IRQHandler, // 41: DAC |
AnnaBridge | 172:7d866c31b3c5 | 270 | (uint32_t) ADC00_IRQHandler, // 42: ADC0 interrupt source 0 |
AnnaBridge | 172:7d866c31b3c5 | 271 | (uint32_t) ADC01_IRQHandler, // 43: ADC0 interrupt source 1 |
AnnaBridge | 172:7d866c31b3c5 | 272 | (uint32_t) ACMP01_IRQHandler, // 44: ACMP0 and ACMP1 |
AnnaBridge | 172:7d866c31b3c5 | 273 | (uint32_t) Default_Handler, // 45: Reserved |
AnnaBridge | 172:7d866c31b3c5 | 274 | (uint32_t) ADC02_IRQHandler, // 46: ADC0 interrupt source 2 |
AnnaBridge | 172:7d866c31b3c5 | 275 | (uint32_t) ADC03_IRQHandler, // 47: ADC0 interrupt source 3 |
AnnaBridge | 172:7d866c31b3c5 | 276 | (uint32_t) UART2_IRQHandler, // 48: UART2 |
AnnaBridge | 172:7d866c31b3c5 | 277 | (uint32_t) UART3_IRQHandler, // 49: UART3 |
AnnaBridge | 172:7d866c31b3c5 | 278 | (uint32_t) Default_Handler, // 50: Reserved |
AnnaBridge | 172:7d866c31b3c5 | 279 | (uint32_t) SPI2_IRQHandler, // 51: SPI2 |
AnnaBridge | 172:7d866c31b3c5 | 280 | (uint32_t) SPI3_IRQHandler, // 52: SPI3 |
AnnaBridge | 172:7d866c31b3c5 | 281 | (uint32_t) USBD_IRQHandler, // 53: USB device |
AnnaBridge | 172:7d866c31b3c5 | 282 | (uint32_t) OHCI_IRQHandler, // 54: OHCI |
AnnaBridge | 172:7d866c31b3c5 | 283 | (uint32_t) USBOTG_IRQHandler, // 55: USB OTG |
AnnaBridge | 172:7d866c31b3c5 | 284 | (uint32_t) CAN0_IRQHandler, // 56: CAN0 |
AnnaBridge | 172:7d866c31b3c5 | 285 | (uint32_t) CAN1_IRQHandler, // 57: CAN1 |
AnnaBridge | 172:7d866c31b3c5 | 286 | (uint32_t) SC0_IRQHandler, // 58: |
AnnaBridge | 172:7d866c31b3c5 | 287 | (uint32_t) SC1_IRQHandler, // 59: |
AnnaBridge | 172:7d866c31b3c5 | 288 | (uint32_t) SC2_IRQHandler, // 60: |
AnnaBridge | 172:7d866c31b3c5 | 289 | (uint32_t) Default_Handler, // 61: |
AnnaBridge | 172:7d866c31b3c5 | 290 | (uint32_t) SPI4_IRQHandler, // 62: SPI4 |
AnnaBridge | 172:7d866c31b3c5 | 291 | (uint32_t) Default_Handler, // 63: |
AnnaBridge | 172:7d866c31b3c5 | 292 | (uint32_t) SDH0_IRQHandler, // 64: SDH0 |
AnnaBridge | 172:7d866c31b3c5 | 293 | (uint32_t) USBD20_IRQHandler, // 65: USBD20 |
AnnaBridge | 172:7d866c31b3c5 | 294 | (uint32_t) EMAC_TX_IRQHandler, // 66: EMAC_TX |
AnnaBridge | 172:7d866c31b3c5 | 295 | (uint32_t) EMAC_RX_IRQHandler, // 67: EMAX_RX |
AnnaBridge | 172:7d866c31b3c5 | 296 | (uint32_t) I2S0_IRQHandler, // 68: I2S0 |
AnnaBridge | 172:7d866c31b3c5 | 297 | (uint32_t) Default_Handler, // 69: ToDo: Add description to this Interrupt |
AnnaBridge | 172:7d866c31b3c5 | 298 | (uint32_t) OPA0_IRQHandler, // 70: OPA0 |
AnnaBridge | 172:7d866c31b3c5 | 299 | (uint32_t) CRYPTO_IRQHandler, // 71: CRYPTO |
AnnaBridge | 172:7d866c31b3c5 | 300 | (uint32_t) GPG_IRQHandler, // 72: |
AnnaBridge | 172:7d866c31b3c5 | 301 | (uint32_t) EINT6_IRQHandler, // 73: |
AnnaBridge | 172:7d866c31b3c5 | 302 | (uint32_t) UART4_IRQHandler, // 74: UART4 |
AnnaBridge | 172:7d866c31b3c5 | 303 | (uint32_t) UART5_IRQHandler, // 75: UART5 |
AnnaBridge | 172:7d866c31b3c5 | 304 | (uint32_t) USCI0_IRQHandler, // 76: USCI0 |
AnnaBridge | 172:7d866c31b3c5 | 305 | (uint32_t) USCI1_IRQHandler, // 77: USCI1 |
AnnaBridge | 172:7d866c31b3c5 | 306 | (uint32_t) BPWM0_IRQHandler, // 78: BPWM0 |
AnnaBridge | 172:7d866c31b3c5 | 307 | (uint32_t) BPWM1_IRQHandler, // 79: BPWM1 |
AnnaBridge | 172:7d866c31b3c5 | 308 | (uint32_t) SPIM_IRQHandler, // 80: SPIM |
AnnaBridge | 172:7d866c31b3c5 | 309 | (uint32_t) Default_Handler, // 81: |
AnnaBridge | 172:7d866c31b3c5 | 310 | (uint32_t) I2C2_IRQHandler, // 82: I2C2 |
AnnaBridge | 172:7d866c31b3c5 | 311 | (uint32_t) Default_Handler, // 83: |
AnnaBridge | 172:7d866c31b3c5 | 312 | (uint32_t) QEI0_IRQHandler, // 84: QEI0 |
AnnaBridge | 172:7d866c31b3c5 | 313 | (uint32_t) QEI1_IRQHandler, // 85: QEI1 |
AnnaBridge | 172:7d866c31b3c5 | 314 | (uint32_t) ECAP0_IRQHandler, // 86: ECAP0 |
AnnaBridge | 172:7d866c31b3c5 | 315 | (uint32_t) ECAP1_IRQHandler, // 87: ECAP1 |
AnnaBridge | 172:7d866c31b3c5 | 316 | (uint32_t) GPH_IRQHandler, // 88: |
AnnaBridge | 172:7d866c31b3c5 | 317 | (uint32_t) EINT7_IRQHandler, // 89: |
AnnaBridge | 172:7d866c31b3c5 | 318 | (uint32_t) SDH1_IRQHandler, // 90: SDH1 |
AnnaBridge | 172:7d866c31b3c5 | 319 | (uint32_t) Default_Handler, // 91: |
AnnaBridge | 172:7d866c31b3c5 | 320 | (uint32_t) EHCI_IRQHandler, // 92: EHCI |
AnnaBridge | 172:7d866c31b3c5 | 321 | (uint32_t) USBOTG20_IRQHandler, // 93: |
AnnaBridge | 172:7d866c31b3c5 | 322 | (uint32_t) SWDC_IRQHandler, // 94: |
AnnaBridge | 172:7d866c31b3c5 | 323 | (uint32_t) ETMC_IRQHandler, // 95: |
AnnaBridge | 172:7d866c31b3c5 | 324 | }; |
AnnaBridge | 172:7d866c31b3c5 | 325 | |
AnnaBridge | 172:7d866c31b3c5 | 326 | /* |
AnnaBridge | 172:7d866c31b3c5 | 327 | * Reset_Handler: |
AnnaBridge | 172:7d866c31b3c5 | 328 | * Divert one small memory block for Initial Stack |
AnnaBridge | 172:7d866c31b3c5 | 329 | * Continue Initial Stack for Reset_Handler_1 |
AnnaBridge | 172:7d866c31b3c5 | 330 | * Jump to Reset_Handler_1 |
AnnaBridge | 172:7d866c31b3c5 | 331 | * |
AnnaBridge | 172:7d866c31b3c5 | 332 | * Reset_Handler_1 |
AnnaBridge | 172:7d866c31b3c5 | 333 | * Enable SPIM CCM memory. From now on, this memory could be used for Initial Stack, depending on linker. |
AnnaBridge | 172:7d866c31b3c5 | 334 | * Configure Initial Stack, using linker-generated symbols for Reset_Handler_2 |
AnnaBridge | 172:7d866c31b3c5 | 335 | * Jump to Reset_Handler_2 |
AnnaBridge | 172:7d866c31b3c5 | 336 | * |
AnnaBridge | 172:7d866c31b3c5 | 337 | * Reset_Handler_2 |
AnnaBridge | 172:7d866c31b3c5 | 338 | * C/C++ runtime initialization |
AnnaBridge | 172:7d866c31b3c5 | 339 | */ |
AnnaBridge | 172:7d866c31b3c5 | 340 | |
AnnaBridge | 174:b96e65c34a4d | 341 | #if defined(__CC_ARM) |
AnnaBridge | 172:7d866c31b3c5 | 342 | |
AnnaBridge | 172:7d866c31b3c5 | 343 | __asm static void Reset_Handler(void) |
AnnaBridge | 172:7d866c31b3c5 | 344 | { |
AnnaBridge | 172:7d866c31b3c5 | 345 | LDR SP, =0x20000200 |
AnnaBridge | 172:7d866c31b3c5 | 346 | LDR R0, =0x20000200 |
AnnaBridge | 172:7d866c31b3c5 | 347 | LDR R1, =__cpp(Reset_Handler_1) |
AnnaBridge | 172:7d866c31b3c5 | 348 | LDR R2, =__cpp(Reset_Handler_Cascade) |
AnnaBridge | 172:7d866c31b3c5 | 349 | BX R2 |
AnnaBridge | 172:7d866c31b3c5 | 350 | } |
AnnaBridge | 172:7d866c31b3c5 | 351 | |
AnnaBridge | 172:7d866c31b3c5 | 352 | __asm void Reset_Handler_Cascade(void *sp, void *pc) |
AnnaBridge | 172:7d866c31b3c5 | 353 | { |
AnnaBridge | 172:7d866c31b3c5 | 354 | MOV SP, R0 |
AnnaBridge | 172:7d866c31b3c5 | 355 | BX R1 |
AnnaBridge | 172:7d866c31b3c5 | 356 | } |
AnnaBridge | 172:7d866c31b3c5 | 357 | |
AnnaBridge | 172:7d866c31b3c5 | 358 | #elif defined (__GNUC__) || defined (__ICCARM__) |
AnnaBridge | 172:7d866c31b3c5 | 359 | |
AnnaBridge | 172:7d866c31b3c5 | 360 | void Reset_Handler(void) |
AnnaBridge | 172:7d866c31b3c5 | 361 | { |
AnnaBridge | 172:7d866c31b3c5 | 362 | /* NOTE: In debugger disassembly view, check initial stack cannot be accessed until initial stack pointer has changed to 0x20000200 */ |
AnnaBridge | 172:7d866c31b3c5 | 363 | __asm volatile ( |
AnnaBridge | 172:7d866c31b3c5 | 364 | "mov sp, %0 \n" |
AnnaBridge | 172:7d866c31b3c5 | 365 | "mov r0, sp \n" |
AnnaBridge | 172:7d866c31b3c5 | 366 | "mov r1, %1 \n" |
AnnaBridge | 172:7d866c31b3c5 | 367 | "b Reset_Handler_Cascade \n" |
AnnaBridge | 172:7d866c31b3c5 | 368 | : /* output operands */ |
AnnaBridge | 172:7d866c31b3c5 | 369 | : "l"(0x20000200), "l"(&Reset_Handler_1) /* input operands */ |
AnnaBridge | 172:7d866c31b3c5 | 370 | : "r0", "r1", "cc" /* list of clobbered registers */ |
AnnaBridge | 172:7d866c31b3c5 | 371 | ); |
AnnaBridge | 172:7d866c31b3c5 | 372 | } |
AnnaBridge | 172:7d866c31b3c5 | 373 | |
AnnaBridge | 172:7d866c31b3c5 | 374 | void Reset_Handler_Cascade(void *sp, void *pc) |
AnnaBridge | 172:7d866c31b3c5 | 375 | { |
AnnaBridge | 172:7d866c31b3c5 | 376 | __asm volatile ( |
AnnaBridge | 172:7d866c31b3c5 | 377 | "mov sp, %0 \n" |
AnnaBridge | 172:7d866c31b3c5 | 378 | "bx %1 \n" |
AnnaBridge | 172:7d866c31b3c5 | 379 | : /* output operands */ |
AnnaBridge | 172:7d866c31b3c5 | 380 | : "l"(sp), "l"(pc) /* input operands */ |
AnnaBridge | 172:7d866c31b3c5 | 381 | : "cc" /* list of clobbered registers */ |
AnnaBridge | 172:7d866c31b3c5 | 382 | ); |
AnnaBridge | 172:7d866c31b3c5 | 383 | } |
AnnaBridge | 172:7d866c31b3c5 | 384 | |
AnnaBridge | 172:7d866c31b3c5 | 385 | #else |
AnnaBridge | 172:7d866c31b3c5 | 386 | |
AnnaBridge | 172:7d866c31b3c5 | 387 | #error "Unsupported toolchain" |
AnnaBridge | 172:7d866c31b3c5 | 388 | |
AnnaBridge | 172:7d866c31b3c5 | 389 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 390 | |
AnnaBridge | 172:7d866c31b3c5 | 391 | void Reset_Handler_1(void) |
AnnaBridge | 172:7d866c31b3c5 | 392 | { |
AnnaBridge | 172:7d866c31b3c5 | 393 | /* Disable register write-protection function */ |
AnnaBridge | 172:7d866c31b3c5 | 394 | SYS_UnlockReg(); |
AnnaBridge | 172:7d866c31b3c5 | 395 | |
AnnaBridge | 172:7d866c31b3c5 | 396 | /* Disable Power-on Reset function */ |
AnnaBridge | 172:7d866c31b3c5 | 397 | SYS_DISABLE_POR(); |
AnnaBridge | 172:7d866c31b3c5 | 398 | |
AnnaBridge | 172:7d866c31b3c5 | 399 | /** |
AnnaBridge | 172:7d866c31b3c5 | 400 | * NOTE 1: Some register accesses require unlock. |
AnnaBridge | 172:7d866c31b3c5 | 401 | * NOTE 2: Because EBI (external SRAM) init is done in SystemInit(), SystemInit() must be called at the very start. |
AnnaBridge | 172:7d866c31b3c5 | 402 | */ |
AnnaBridge | 172:7d866c31b3c5 | 403 | SystemInit(); |
AnnaBridge | 172:7d866c31b3c5 | 404 | |
AnnaBridge | 172:7d866c31b3c5 | 405 | /* Enable register write-protection function */ |
AnnaBridge | 172:7d866c31b3c5 | 406 | SYS_LockReg(); |
AnnaBridge | 172:7d866c31b3c5 | 407 | |
AnnaBridge | 174:b96e65c34a4d | 408 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
AnnaBridge | 172:7d866c31b3c5 | 409 | Reset_Handler_Cascade((void *) &Image$$ARM_LIB_STACK$$ZI$$Limit, (void *) Reset_Handler_2); |
AnnaBridge | 172:7d866c31b3c5 | 410 | #elif defined(__ICCARM__) |
AnnaBridge | 172:7d866c31b3c5 | 411 | Reset_Handler_Cascade((void *) &CSTACK$$Limit, (void *) Reset_Handler_2); |
AnnaBridge | 172:7d866c31b3c5 | 412 | #elif defined(__GNUC__) |
AnnaBridge | 172:7d866c31b3c5 | 413 | Reset_Handler_Cascade((void *) &__StackTop, (void *) Reset_Handler_2); |
AnnaBridge | 172:7d866c31b3c5 | 414 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 415 | } |
AnnaBridge | 172:7d866c31b3c5 | 416 | |
AnnaBridge | 172:7d866c31b3c5 | 417 | void Reset_Handler_2(void) |
AnnaBridge | 172:7d866c31b3c5 | 418 | { |
AnnaBridge | 172:7d866c31b3c5 | 419 | |
AnnaBridge | 174:b96e65c34a4d | 420 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
AnnaBridge | 172:7d866c31b3c5 | 421 | __main(); |
AnnaBridge | 172:7d866c31b3c5 | 422 | |
AnnaBridge | 172:7d866c31b3c5 | 423 | #elif defined(__ICCARM__) |
AnnaBridge | 172:7d866c31b3c5 | 424 | __iar_program_start(); |
AnnaBridge | 172:7d866c31b3c5 | 425 | |
AnnaBridge | 172:7d866c31b3c5 | 426 | #elif defined(__GNUC__) |
AnnaBridge | 172:7d866c31b3c5 | 427 | uint32_t *src_ind = (uint32_t *) &__etext; |
AnnaBridge | 172:7d866c31b3c5 | 428 | uint32_t *dst_ind = (uint32_t *) &__data_start__; |
AnnaBridge | 172:7d866c31b3c5 | 429 | uint32_t *dst_end = (uint32_t *) &__data_end__; |
AnnaBridge | 172:7d866c31b3c5 | 430 | |
AnnaBridge | 172:7d866c31b3c5 | 431 | /* Move .data section from ROM to RAM */ |
AnnaBridge | 172:7d866c31b3c5 | 432 | if (src_ind != dst_ind) { |
AnnaBridge | 172:7d866c31b3c5 | 433 | for (; dst_ind < dst_end;) { |
AnnaBridge | 172:7d866c31b3c5 | 434 | *dst_ind ++ = *src_ind ++; |
AnnaBridge | 172:7d866c31b3c5 | 435 | } |
AnnaBridge | 172:7d866c31b3c5 | 436 | } |
AnnaBridge | 172:7d866c31b3c5 | 437 | |
AnnaBridge | 172:7d866c31b3c5 | 438 | /* Initialize .bss section to zero */ |
AnnaBridge | 172:7d866c31b3c5 | 439 | dst_ind = (uint32_t *) &__bss_start__; |
AnnaBridge | 172:7d866c31b3c5 | 440 | dst_end = (uint32_t *) &__bss_end__; |
AnnaBridge | 172:7d866c31b3c5 | 441 | if (dst_ind != dst_end) { |
AnnaBridge | 172:7d866c31b3c5 | 442 | for (; dst_ind < dst_end;) { |
AnnaBridge | 172:7d866c31b3c5 | 443 | *dst_ind ++ = 0; |
AnnaBridge | 172:7d866c31b3c5 | 444 | } |
AnnaBridge | 172:7d866c31b3c5 | 445 | } |
AnnaBridge | 172:7d866c31b3c5 | 446 | |
AnnaBridge | 172:7d866c31b3c5 | 447 | _start(); |
AnnaBridge | 172:7d866c31b3c5 | 448 | |
AnnaBridge | 172:7d866c31b3c5 | 449 | #endif |
AnnaBridge | 172:7d866c31b3c5 | 450 | |
AnnaBridge | 172:7d866c31b3c5 | 451 | /* Infinite loop */ |
AnnaBridge | 172:7d866c31b3c5 | 452 | while (1); |
AnnaBridge | 172:7d866c31b3c5 | 453 | } |
AnnaBridge | 172:7d866c31b3c5 | 454 | |
AnnaBridge | 172:7d866c31b3c5 | 455 | |
AnnaBridge | 172:7d866c31b3c5 | 456 | /** |
AnnaBridge | 172:7d866c31b3c5 | 457 | * \brief Default interrupt handler for unused IRQs. |
AnnaBridge | 172:7d866c31b3c5 | 458 | */ |
AnnaBridge | 172:7d866c31b3c5 | 459 | void Default_Handler(void) |
AnnaBridge | 172:7d866c31b3c5 | 460 | { |
AnnaBridge | 172:7d866c31b3c5 | 461 | while (1); |
AnnaBridge | 172:7d866c31b3c5 | 462 | } |