mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
150:02e0a0aed4ec
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 150:02e0a0aed4ec 1 /*******************************************************************************
<> 150:02e0a0aed4ec 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 5 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 6 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 9 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 10 *
<> 150:02e0a0aed4ec 11 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 12 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 24 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 25 *
<> 150:02e0a0aed4ec 26 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 28 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 30 * ownership rights.
<> 150:02e0a0aed4ec 31 *******************************************************************************
<> 150:02e0a0aed4ec 32 */
<> 150:02e0a0aed4ec 33
<> 150:02e0a0aed4ec 34 .syntax unified
<> 150:02e0a0aed4ec 35 .arch armv7-m
<> 150:02e0a0aed4ec 36
<> 150:02e0a0aed4ec 37 .section .stack
<> 150:02e0a0aed4ec 38 .align 3
<> 150:02e0a0aed4ec 39 #ifdef __STACK_SIZE
<> 150:02e0a0aed4ec 40 .equ Stack_Size, __STACK_SIZE
<> 150:02e0a0aed4ec 41 #else
<> 150:02e0a0aed4ec 42 .equ Stack_Size, 0x00005000
<> 150:02e0a0aed4ec 43 #endif
<> 150:02e0a0aed4ec 44 .globl __StackTop
<> 150:02e0a0aed4ec 45 .globl __StackLimit
<> 150:02e0a0aed4ec 46 __StackLimit:
<> 150:02e0a0aed4ec 47 .space Stack_Size
<> 150:02e0a0aed4ec 48 .size __StackLimit, . - __StackLimit
<> 150:02e0a0aed4ec 49 __StackTop:
<> 150:02e0a0aed4ec 50 .size __StackTop, . - __StackTop
<> 150:02e0a0aed4ec 51
<> 150:02e0a0aed4ec 52 .section .heap
<> 150:02e0a0aed4ec 53 .align 3
<> 150:02e0a0aed4ec 54 #ifdef __HEAP_SIZE
<> 150:02e0a0aed4ec 55 .equ Heap_Size, __HEAP_SIZE
<> 150:02e0a0aed4ec 56 #else
<> 150:02e0a0aed4ec 57 .equ Heap_Size, 0x0000A000
<> 150:02e0a0aed4ec 58 #endif
<> 150:02e0a0aed4ec 59 .globl __HeapBase
<> 150:02e0a0aed4ec 60 .globl __HeapLimit
<> 150:02e0a0aed4ec 61 __HeapBase:
<> 150:02e0a0aed4ec 62 .if Heap_Size
<> 150:02e0a0aed4ec 63 .space Heap_Size
<> 150:02e0a0aed4ec 64 .endif
<> 150:02e0a0aed4ec 65 .size __HeapBase, . - __HeapBase
<> 150:02e0a0aed4ec 66 __HeapLimit:
<> 150:02e0a0aed4ec 67 .size __HeapLimit, . - __HeapLimit
<> 150:02e0a0aed4ec 68
<> 150:02e0a0aed4ec 69
<> 150:02e0a0aed4ec 70 .section .isr_vector
<> 150:02e0a0aed4ec 71 .align 2
<> 150:02e0a0aed4ec 72 .globl __isr_vector
<> 150:02e0a0aed4ec 73 __isr_vector:
<> 150:02e0a0aed4ec 74 .long __StackTop /* Top of Stack */
<> 150:02e0a0aed4ec 75 .long Reset_Handler /* Reset Handler */
<> 150:02e0a0aed4ec 76 .long NMI_Handler /* NMI Handler */
<> 150:02e0a0aed4ec 77 .long HardFault_Handler /* Hard Fault Handler */
<> 150:02e0a0aed4ec 78 .long MemManage_Handler /* MPU Fault Handler */
<> 150:02e0a0aed4ec 79 .long BusFault_Handler /* Bus Fault Handler */
<> 150:02e0a0aed4ec 80 .long UsageFault_Handler /* Usage Fault Handler */
<> 150:02e0a0aed4ec 81 .long 0 /* Reserved */
<> 150:02e0a0aed4ec 82 .long 0 /* Reserved */
<> 150:02e0a0aed4ec 83 .long 0 /* Reserved */
<> 150:02e0a0aed4ec 84 .long 0 /* Reserved */
<> 150:02e0a0aed4ec 85 .long SVC_Handler /* SVCall Handler */
<> 150:02e0a0aed4ec 86 .long DebugMon_Handler /* Debug Monitor Handler */
<> 150:02e0a0aed4ec 87 .long 0 /* Reserved */
<> 150:02e0a0aed4ec 88 .long PendSV_Handler /* PendSV Handler */
<> 150:02e0a0aed4ec 89 .long SysTick_Handler /* SysTick Handler */
<> 150:02e0a0aed4ec 90
<> 150:02e0a0aed4ec 91 /* MAX32625 Interrupts */
<> 150:02e0a0aed4ec 92 .long CLKMAN_IRQHandler /* 16:01 CLKMAN */
<> 150:02e0a0aed4ec 93 .long PWRMAN_IRQHandler /* 17:02 PWRMAN */
<> 150:02e0a0aed4ec 94 .long FLC_IRQHandler /* 18:03 Flash Controller */
<> 150:02e0a0aed4ec 95 .long RTC0_IRQHandler /* 19:04 RTC INT0 */
<> 150:02e0a0aed4ec 96 .long RTC1_IRQHandler /* 20:05 RTC INT1 */
<> 150:02e0a0aed4ec 97 .long RTC2_IRQHandler /* 21:06 RTC INT2 */
<> 150:02e0a0aed4ec 98 .long RTC3_IRQHandler /* 22:07 RTC INT3 */
<> 150:02e0a0aed4ec 99 .long PMU_IRQHandler /* 23:08 PMU */
<> 150:02e0a0aed4ec 100 .long USB_IRQHandler /* 24:09 USB */
<> 150:02e0a0aed4ec 101 .long AES_IRQHandler /* 25:10 AES */
<> 150:02e0a0aed4ec 102 .long MAA_IRQHandler /* 26:11 MAA */
<> 150:02e0a0aed4ec 103 .long WDT0_IRQHandler /* 27:12 WATCHDOG0 */
<> 150:02e0a0aed4ec 104 .long WDT0_P_IRQHandler /* 28:13 WATCHDOG0 PRE-WINDOW */
<> 150:02e0a0aed4ec 105 .long WDT1_IRQHandler /* 29:14 WATCHDOG1 */
<> 150:02e0a0aed4ec 106 .long WDT1_P_IRQHandler /* 30:15 WATCHDOG1 PRE-WINDOW */
<> 150:02e0a0aed4ec 107 .long GPIO_P0_IRQHandler /* 31:16 GPIO Port 0 */
<> 150:02e0a0aed4ec 108 .long GPIO_P1_IRQHandler /* 32:17 GPIO Port 1 */
<> 150:02e0a0aed4ec 109 .long GPIO_P2_IRQHandler /* 33:18 GPIO Port 2 */
<> 150:02e0a0aed4ec 110 .long GPIO_P3_IRQHandler /* 34:19 GPIO Port 3 */
<> 150:02e0a0aed4ec 111 .long GPIO_P4_IRQHandler /* 35:20 GPIO Port 4 */
<> 150:02e0a0aed4ec 112 .long GPIO_P5_IRQHandler /* 36:21 GPIO Port 5 */
<> 150:02e0a0aed4ec 113 .long GPIO_P6_IRQHandler /* 37:22 GPIO Port 6 */
<> 150:02e0a0aed4ec 114 .long TMR0_IRQHandler /* 38:23 Timer32-0 */
<> 150:02e0a0aed4ec 115 .long TMR16_0_IRQHandler /* 39:24 Timer16-s0 */
<> 150:02e0a0aed4ec 116 .long TMR1_IRQHandler /* 40:25 Timer32-1 */
<> 150:02e0a0aed4ec 117 .long TMR16_1_IRQHandler /* 41:26 Timer16-s1 */
<> 150:02e0a0aed4ec 118 .long TMR2_IRQHandler /* 42:27 Timer32-2 */
<> 150:02e0a0aed4ec 119 .long TMR16_2_IRQHandler /* 43:28 Timer16-s2 */
<> 150:02e0a0aed4ec 120 .long TMR3_IRQHandler /* 44:29 Timer32-3 */
<> 150:02e0a0aed4ec 121 .long TMR16_3_IRQHandler /* 45:30 Timer16-s3 */
<> 150:02e0a0aed4ec 122 .long TMR4_IRQHandler /* 46:31 Timer32-4 */
<> 150:02e0a0aed4ec 123 .long TMR16_4_IRQHandler /* 47:32 Timer16-s4 */
<> 150:02e0a0aed4ec 124 .long TMR5_IRQHandler /* 48:33 Timer32-5 */
<> 150:02e0a0aed4ec 125 .long TMR16_5_IRQHandler /* 49:34 Timer16-s5 */
<> 150:02e0a0aed4ec 126 .long UART0_IRQHandler /* 50:35 UART0 */
<> 150:02e0a0aed4ec 127 .long UART1_IRQHandler /* 51:36 UART1 */
<> 150:02e0a0aed4ec 128 .long UART2_IRQHandler /* 52:37 UART2 */
<> 150:02e0a0aed4ec 129 .long UART3_IRQHandler /* 53:38 UART3 */
<> 150:02e0a0aed4ec 130 .long PT_IRQHandler /* 54:39 PT */
<> 150:02e0a0aed4ec 131 .long I2CM0_IRQHandler /* 55:40 I2C Master 0 */
<> 150:02e0a0aed4ec 132 .long I2CM1_IRQHandler /* 56:41 I2C Master 1 */
<> 150:02e0a0aed4ec 133 .long I2CM2_IRQHandler /* 57:42 I2C Master 2 */
<> 150:02e0a0aed4ec 134 .long I2CS_IRQHandler /* 58:43 I2C Slave */
<> 150:02e0a0aed4ec 135 .long SPIM0_IRQHandler /* 59:44 SPIM0 */
<> 150:02e0a0aed4ec 136 .long SPIM1_IRQHandler /* 60:45 SPIM1 */
<> 150:02e0a0aed4ec 137 .long SPIM2_IRQHandler /* 61:46 SPIM2 */
<> 150:02e0a0aed4ec 138 .long SPIB_IRQHandler /* 62:47 SPI Bridge */
<> 150:02e0a0aed4ec 139 .long OWM_IRQHandler /* 63:48 One-wire Master */
<> 150:02e0a0aed4ec 140 .long AFE_IRQHandler /* 64:49 AFE */
<> 150:02e0a0aed4ec 141 .long SPIS_IRQHandler /* 65:50 SPI Slave */
<> 150:02e0a0aed4ec 142 .long GPIO_P7_IRQHandler /* 66:51 GPIO Port 7 */
<> 150:02e0a0aed4ec 143 .long GPIO_P8_IRQHandler /* 67:52 GPIO Port 8 */
<> 150:02e0a0aed4ec 144
<> 150:02e0a0aed4ec 145
<> 150:02e0a0aed4ec 146 .text
<> 150:02e0a0aed4ec 147 .thumb
<> 150:02e0a0aed4ec 148 .thumb_func
<> 150:02e0a0aed4ec 149 .align 2
<> 150:02e0a0aed4ec 150 .globl Reset_Handler
<> 150:02e0a0aed4ec 151 .type Reset_Handler, %function
<> 150:02e0a0aed4ec 152 Reset_Handler:
<> 150:02e0a0aed4ec 153 ldr r0, =__StackTop
<> 150:02e0a0aed4ec 154 mov sp, r0
<> 150:02e0a0aed4ec 155
<> 150:02e0a0aed4ec 156 ldr r0, =PreInit
<> 150:02e0a0aed4ec 157 blx r0
<> 150:02e0a0aed4ec 158 cbnz r0, .SKIPRAMINIT
<> 150:02e0a0aed4ec 159
<> 150:02e0a0aed4ec 160 /* Loop to copy data from read only memory to RAM. The ranges
<> 150:02e0a0aed4ec 161 * of copy from/to are specified by following symbols evaluated in
<> 150:02e0a0aed4ec 162 * linker script.
<> 150:02e0a0aed4ec 163 * _etext: End of code section, i.e., begin of data sections to copy from.
<> 150:02e0a0aed4ec 164 * _data /_edata: RAM address range that data should be
<> 150:02e0a0aed4ec 165 * copied to. Both must be aligned to 4 bytes boundary. */
<> 150:02e0a0aed4ec 166
<> 150:02e0a0aed4ec 167 ldr r1, =__etext
<> 150:02e0a0aed4ec 168 ldr r2, =__data_start__
<> 150:02e0a0aed4ec 169 ldr r3, =__data_end__
<> 150:02e0a0aed4ec 170
<> 150:02e0a0aed4ec 171 #if 0
<> 150:02e0a0aed4ec 172 /* Here are two copies of loop implemenations. First one favors code size
<> 150:02e0a0aed4ec 173 * and the second one favors performance. Default uses the first one.
<> 150:02e0a0aed4ec 174 * Change to "#if 0" to use the second one */
<> 150:02e0a0aed4ec 175 .LC0:
<> 150:02e0a0aed4ec 176 cmp r2, r3
<> 150:02e0a0aed4ec 177 ittt lt
<> 150:02e0a0aed4ec 178 ldrlt r0, [r1], #4
<> 150:02e0a0aed4ec 179 strlt r0, [r2], #4
<> 150:02e0a0aed4ec 180 blt .LC0
<> 150:02e0a0aed4ec 181 #else
<> 150:02e0a0aed4ec 182 subs r3, r2
<> 150:02e0a0aed4ec 183 ble .LC1
<> 150:02e0a0aed4ec 184 .LC0:
<> 150:02e0a0aed4ec 185 subs r3, #4
<> 150:02e0a0aed4ec 186 ldr r0, [r1, r3]
<> 150:02e0a0aed4ec 187 str r0, [r2, r3]
<> 150:02e0a0aed4ec 188 bgt .LC0
<> 150:02e0a0aed4ec 189 .LC1:
<> 150:02e0a0aed4ec 190 #endif
<> 150:02e0a0aed4ec 191
<> 150:02e0a0aed4ec 192 /*
<> 150:02e0a0aed4ec 193 * Loop to zero out BSS section, which uses following symbols
<> 150:02e0a0aed4ec 194 * in linker script:
<> 150:02e0a0aed4ec 195 * _bss : start of BSS section. Must align to 4
<> 150:02e0a0aed4ec 196 * _ebss : end of BSS section. Must align to 4
<> 150:02e0a0aed4ec 197 */
<> 150:02e0a0aed4ec 198 ldr r1, =__bss_start__
<> 150:02e0a0aed4ec 199 ldr r2, =__bss_end__
<> 150:02e0a0aed4ec 200
<> 150:02e0a0aed4ec 201 movs r0, 0
<> 150:02e0a0aed4ec 202 .LC2:
<> 150:02e0a0aed4ec 203 cmp r1, r2
<> 150:02e0a0aed4ec 204 itt lt
<> 150:02e0a0aed4ec 205 strlt r0, [r1], #4
<> 150:02e0a0aed4ec 206 blt .LC2
<> 150:02e0a0aed4ec 207
<> 150:02e0a0aed4ec 208 .SKIPRAMINIT:
<> 150:02e0a0aed4ec 209
<> 150:02e0a0aed4ec 210 ldr r0, =SystemInit
<> 150:02e0a0aed4ec 211 blx r0
<> 150:02e0a0aed4ec 212
<> 150:02e0a0aed4ec 213 ldr r0, =_start
<> 150:02e0a0aed4ec 214 blx r0
<> 150:02e0a0aed4ec 215
<> 150:02e0a0aed4ec 216 .SPIN:
<> 150:02e0a0aed4ec 217 /* Enter LP2 if main() ever returns. */
<> 150:02e0a0aed4ec 218 wfi
<> 150:02e0a0aed4ec 219 bl .SPIN
<> 150:02e0a0aed4ec 220
<> 150:02e0a0aed4ec 221 /* Macro to define default handlers. Default handler
<> 150:02e0a0aed4ec 222 * will be weak symbol and just dead loops. They can be
<> 150:02e0a0aed4ec 223 * overwritten by other handlers */
<> 150:02e0a0aed4ec 224 .macro def_irq_handler handler_name
<> 150:02e0a0aed4ec 225 .align 1
<> 150:02e0a0aed4ec 226 .thumb_func
<> 150:02e0a0aed4ec 227 .weak \handler_name
<> 150:02e0a0aed4ec 228 .type \handler_name, %function
<> 150:02e0a0aed4ec 229 \handler_name :
<> 150:02e0a0aed4ec 230 b .
<> 150:02e0a0aed4ec 231 .size \handler_name, . - \handler_name
<> 150:02e0a0aed4ec 232 .endm
<> 150:02e0a0aed4ec 233
<> 150:02e0a0aed4ec 234 def_irq_handler NMI_Handler
<> 150:02e0a0aed4ec 235 def_irq_handler HardFault_Handler
<> 150:02e0a0aed4ec 236 def_irq_handler MemManage_Handler
<> 150:02e0a0aed4ec 237 def_irq_handler BusFault_Handler
<> 150:02e0a0aed4ec 238 def_irq_handler UsageFault_Handler
<> 150:02e0a0aed4ec 239 def_irq_handler SVC_Handler
<> 150:02e0a0aed4ec 240 def_irq_handler DebugMon_Handler
<> 150:02e0a0aed4ec 241 def_irq_handler PendSV_Handler
<> 150:02e0a0aed4ec 242 def_irq_handler SysTick_Handler
<> 150:02e0a0aed4ec 243 def_irq_handler Default_Handler
<> 150:02e0a0aed4ec 244
<> 150:02e0a0aed4ec 245 /* MAX32625 Interrupts */
<> 150:02e0a0aed4ec 246 def_irq_handler CLKMAN_IRQHandler /* 16:01 CLKMAN */
<> 150:02e0a0aed4ec 247 def_irq_handler PWRMAN_IRQHandler /* 17:02 PWRMAN */
<> 150:02e0a0aed4ec 248 def_irq_handler FLC_IRQHandler /* 18:03 Flash Controller */
<> 150:02e0a0aed4ec 249 def_irq_handler RTC0_IRQHandler /* 19:04 RTC INT0 */
<> 150:02e0a0aed4ec 250 def_irq_handler RTC1_IRQHandler /* 20:05 RTC INT1 */
<> 150:02e0a0aed4ec 251 def_irq_handler RTC2_IRQHandler /* 21:06 RTC INT2 */
<> 150:02e0a0aed4ec 252 def_irq_handler RTC3_IRQHandler /* 22:07 RTC INT3 */
<> 150:02e0a0aed4ec 253 def_irq_handler PMU_IRQHandler /* 23:08 PMU */
<> 150:02e0a0aed4ec 254 def_irq_handler USB_IRQHandler /* 24:09 USB */
<> 150:02e0a0aed4ec 255 def_irq_handler AES_IRQHandler /* 25:10 AES */
<> 150:02e0a0aed4ec 256 def_irq_handler MAA_IRQHandler /* 26:11 MAA */
<> 150:02e0a0aed4ec 257 def_irq_handler WDT0_IRQHandler /* 27:12 WATCHDOG0 */
<> 150:02e0a0aed4ec 258 def_irq_handler WDT0_P_IRQHandler /* 28:13 WATCHDOG0 PRE-WINDOW */
<> 150:02e0a0aed4ec 259 def_irq_handler WDT1_IRQHandler /* 29:14 WATCHDOG1 */
<> 150:02e0a0aed4ec 260 def_irq_handler WDT1_P_IRQHandler /* 30:15 WATCHDOG1 PRE-WINDOW */
<> 150:02e0a0aed4ec 261 def_irq_handler GPIO_P0_IRQHandler /* 31:16 GPIO Port 0 */
<> 150:02e0a0aed4ec 262 def_irq_handler GPIO_P1_IRQHandler /* 32:17 GPIO Port 1 */
<> 150:02e0a0aed4ec 263 def_irq_handler GPIO_P2_IRQHandler /* 33:18 GPIO Port 2 */
<> 150:02e0a0aed4ec 264 def_irq_handler GPIO_P3_IRQHandler /* 34:19 GPIO Port 3 */
<> 150:02e0a0aed4ec 265 def_irq_handler GPIO_P4_IRQHandler /* 35:20 GPIO Port 4 */
<> 150:02e0a0aed4ec 266 def_irq_handler GPIO_P5_IRQHandler /* 36:21 GPIO Port 5 */
<> 150:02e0a0aed4ec 267 def_irq_handler GPIO_P6_IRQHandler /* 37:22 GPIO Port 6 */
<> 150:02e0a0aed4ec 268 def_irq_handler TMR0_IRQHandler /* 38:23 Timer32-0 */
<> 150:02e0a0aed4ec 269 def_irq_handler TMR16_0_IRQHandler /* 39:24 Timer16-s0 */
<> 150:02e0a0aed4ec 270 def_irq_handler TMR1_IRQHandler /* 40:25 Timer32-1 */
<> 150:02e0a0aed4ec 271 def_irq_handler TMR16_1_IRQHandler /* 41:26 Timer16-s1 */
<> 150:02e0a0aed4ec 272 def_irq_handler TMR2_IRQHandler /* 42:27 Timer32-2 */
<> 150:02e0a0aed4ec 273 def_irq_handler TMR16_2_IRQHandler /* 43:28 Timer16-s2 */
<> 150:02e0a0aed4ec 274 def_irq_handler TMR3_IRQHandler /* 44:29 Timer32-3 */
<> 150:02e0a0aed4ec 275 def_irq_handler TMR16_3_IRQHandler /* 45:30 Timer16-s3 */
<> 150:02e0a0aed4ec 276 def_irq_handler TMR4_IRQHandler /* 46:31 Timer32-4 */
<> 150:02e0a0aed4ec 277 def_irq_handler TMR16_4_IRQHandler /* 47:32 Timer16-s4 */
<> 150:02e0a0aed4ec 278 def_irq_handler TMR5_IRQHandler /* 48:33 Timer32-5 */
<> 150:02e0a0aed4ec 279 def_irq_handler TMR16_5_IRQHandler /* 49:34 Timer16-s5 */
<> 150:02e0a0aed4ec 280 def_irq_handler PT_IRQHandler /* 50:35 PT */
<> 150:02e0a0aed4ec 281 def_irq_handler UART0_IRQHandler /* 51:36 UART0 */
<> 150:02e0a0aed4ec 282 def_irq_handler UART1_IRQHandler /* 52:37 UART1 */
<> 150:02e0a0aed4ec 283 def_irq_handler UART2_IRQHandler /* 53:38 UART0 */
<> 150:02e0a0aed4ec 284 def_irq_handler UART3_IRQHandler /* 54:39 UART1 */
<> 150:02e0a0aed4ec 285 def_irq_handler I2CM0_IRQHandler /* 55:40 I2C Master 0 */
<> 150:02e0a0aed4ec 286 def_irq_handler I2CM1_IRQHandler /* 56:41 I2C Master 1 */
<> 150:02e0a0aed4ec 287 def_irq_handler I2CM2_IRQHandler /* 57:42 I2C Master 2 */
<> 150:02e0a0aed4ec 288 def_irq_handler I2CS_IRQHandler /* 58:43 I2C Slave */
<> 150:02e0a0aed4ec 289 def_irq_handler SPIM0_IRQHandler /* 59:44 SPIM0 */
<> 150:02e0a0aed4ec 290 def_irq_handler SPIM1_IRQHandler /* 60:45 SPIM1 */
<> 150:02e0a0aed4ec 291 def_irq_handler SPIM2_IRQHandler /* 61:46 SPIM2 */
<> 150:02e0a0aed4ec 292 def_irq_handler SPIB_IRQHandler /* 62:47 SPI Bridge */
<> 150:02e0a0aed4ec 293 def_irq_handler OWM_IRQHandler /* 63:48 SPI Bridge */
<> 150:02e0a0aed4ec 294 def_irq_handler AFE_IRQHandler /* 64:49 AFE */
<> 150:02e0a0aed4ec 295 def_irq_handler SPIS_IRQHandler /* 65:50 SPI Slave */
<> 150:02e0a0aed4ec 296 def_irq_handler GPIO_P7_IRQHandler /* 66:51 GPIO Port 7 */
<> 150:02e0a0aed4ec 297 def_irq_handler GPIO_P8_IRQHandler /* 67:52 GPIO Port 8 */
<> 150:02e0a0aed4ec 298 .end