mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Maxim/TARGET_MAX32620C/mxc/mxc_sys.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 186:707f6e361f3e
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Anna Bridge |
186:707f6e361f3e | 1 | /******************************************************************************* |
Anna Bridge |
186:707f6e361f3e | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
Anna Bridge |
186:707f6e361f3e | 3 | * |
Anna Bridge |
186:707f6e361f3e | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
Anna Bridge |
186:707f6e361f3e | 5 | * copy of this software and associated documentation files (the "Software"), |
Anna Bridge |
186:707f6e361f3e | 6 | * to deal in the Software without restriction, including without limitation |
Anna Bridge |
186:707f6e361f3e | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
Anna Bridge |
186:707f6e361f3e | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
Anna Bridge |
186:707f6e361f3e | 9 | * Software is furnished to do so, subject to the following conditions: |
Anna Bridge |
186:707f6e361f3e | 10 | * |
Anna Bridge |
186:707f6e361f3e | 11 | * The above copyright notice and this permission notice shall be included |
Anna Bridge |
186:707f6e361f3e | 12 | * in all copies or substantial portions of the Software. |
Anna Bridge |
186:707f6e361f3e | 13 | * |
Anna Bridge |
186:707f6e361f3e | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
Anna Bridge |
186:707f6e361f3e | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
Anna Bridge |
186:707f6e361f3e | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
Anna Bridge |
186:707f6e361f3e | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
Anna Bridge |
186:707f6e361f3e | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
Anna Bridge |
186:707f6e361f3e | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
Anna Bridge |
186:707f6e361f3e | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
Anna Bridge |
186:707f6e361f3e | 21 | * |
Anna Bridge |
186:707f6e361f3e | 22 | * Except as contained in this notice, the name of Maxim Integrated |
Anna Bridge |
186:707f6e361f3e | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
Anna Bridge |
186:707f6e361f3e | 24 | * Products, Inc. Branding Policy. |
Anna Bridge |
186:707f6e361f3e | 25 | * |
Anna Bridge |
186:707f6e361f3e | 26 | * The mere transfer of this software does not imply any licenses |
Anna Bridge |
186:707f6e361f3e | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
Anna Bridge |
186:707f6e361f3e | 28 | * trademarks, maskwork rights, or any other form of intellectual |
Anna Bridge |
186:707f6e361f3e | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
Anna Bridge |
186:707f6e361f3e | 30 | * ownership rights. |
Anna Bridge |
186:707f6e361f3e | 31 | * |
Anna Bridge |
186:707f6e361f3e | 32 | * $Date: 2016-06-17 13:07:24 -0500 (Fri, 17 Jun 2016) $ |
Anna Bridge |
186:707f6e361f3e | 33 | * $Revision: 23369 $ |
Anna Bridge |
186:707f6e361f3e | 34 | * |
Anna Bridge |
186:707f6e361f3e | 35 | ******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 36 | |
Anna Bridge |
186:707f6e361f3e | 37 | #include <stddef.h> |
Anna Bridge |
186:707f6e361f3e | 38 | #include "mxc_config.h" |
Anna Bridge |
186:707f6e361f3e | 39 | #include "mxc_assert.h" |
Anna Bridge |
186:707f6e361f3e | 40 | #include "mxc_sys.h" |
Anna Bridge |
186:707f6e361f3e | 41 | #include "ioman.h" |
Anna Bridge |
186:707f6e361f3e | 42 | #include "clkman.h" |
Anna Bridge |
186:707f6e361f3e | 43 | #include "pwrseq_regs.h" |
Anna Bridge |
186:707f6e361f3e | 44 | #include "pwrman_regs.h" |
Anna Bridge |
186:707f6e361f3e | 45 | #include "spix_regs.h" |
Anna Bridge |
186:707f6e361f3e | 46 | #include "trim_regs.h" |
Anna Bridge |
186:707f6e361f3e | 47 | |
Anna Bridge |
186:707f6e361f3e | 48 | /***** Definitions *****/ |
Anna Bridge |
186:707f6e361f3e | 49 | #define SYS_RTC_CLK 32768UL |
Anna Bridge |
186:707f6e361f3e | 50 | |
Anna Bridge |
186:707f6e361f3e | 51 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 52 | uint32_t SYS_GetFreq(uint32_t clk_scale) |
Anna Bridge |
186:707f6e361f3e | 53 | { |
Anna Bridge |
186:707f6e361f3e | 54 | uint32_t freq; |
Anna Bridge |
186:707f6e361f3e | 55 | unsigned int clkdiv; |
Anna Bridge |
186:707f6e361f3e | 56 | |
Anna Bridge |
186:707f6e361f3e | 57 | if (clk_scale == MXC_V_CLKMAN_CLK_SCALE_DISABLED) { |
Anna Bridge |
186:707f6e361f3e | 58 | freq = 0; |
Anna Bridge |
186:707f6e361f3e | 59 | } else { |
Anna Bridge |
186:707f6e361f3e | 60 | clkdiv = 1 << (clk_scale - 1); |
Anna Bridge |
186:707f6e361f3e | 61 | freq = SystemCoreClock / clkdiv; |
Anna Bridge |
186:707f6e361f3e | 62 | } |
Anna Bridge |
186:707f6e361f3e | 63 | |
Anna Bridge |
186:707f6e361f3e | 64 | return freq; |
Anna Bridge |
186:707f6e361f3e | 65 | } |
Anna Bridge |
186:707f6e361f3e | 66 | |
Anna Bridge |
186:707f6e361f3e | 67 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 68 | uint32_t SYS_CPU_GetFreq(void) |
Anna Bridge |
186:707f6e361f3e | 69 | { |
Anna Bridge |
186:707f6e361f3e | 70 | return SYS_GetFreq(CLKMAN_GetClkScale(CLKMAN_CLK_CPU)); |
Anna Bridge |
186:707f6e361f3e | 71 | } |
Anna Bridge |
186:707f6e361f3e | 72 | |
Anna Bridge |
186:707f6e361f3e | 73 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 74 | int SYS_ADC_Init(void) |
Anna Bridge |
186:707f6e361f3e | 75 | { |
Anna Bridge |
186:707f6e361f3e | 76 | /* Power up the ADC AFE, enable clocks */ |
Anna Bridge |
186:707f6e361f3e | 77 | MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED; |
Anna Bridge |
186:707f6e361f3e | 78 | MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_ADC_CLOCK_ENABLE; |
Anna Bridge |
186:707f6e361f3e | 79 | |
Anna Bridge |
186:707f6e361f3e | 80 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 81 | } |
Anna Bridge |
186:707f6e361f3e | 82 | |
Anna Bridge |
186:707f6e361f3e | 83 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 84 | int SYS_AES_Init(void) |
Anna Bridge |
186:707f6e361f3e | 85 | { |
Anna Bridge |
186:707f6e361f3e | 86 | /* Set up clocks for AES block */ |
Anna Bridge |
186:707f6e361f3e | 87 | /* Enable crypto ring oscillator, which is used by all TPU components (AES, uMAA, etc.) */ |
Anna Bridge |
186:707f6e361f3e | 88 | CLKMAN_CryptoClockEnable(1); |
Anna Bridge |
186:707f6e361f3e | 89 | |
Anna Bridge |
186:707f6e361f3e | 90 | /* Change prescaler to /1 */ |
Anna Bridge |
186:707f6e361f3e | 91 | CLKMAN_SetClkScale(CLKMAN_CRYPTO_CLK_AES, CLKMAN_SCALE_DIV_1); |
Anna Bridge |
186:707f6e361f3e | 92 | |
Anna Bridge |
186:707f6e361f3e | 93 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 94 | } |
Anna Bridge |
186:707f6e361f3e | 95 | |
Anna Bridge |
186:707f6e361f3e | 96 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 97 | int SYS_GPIO_Init(void) |
Anna Bridge |
186:707f6e361f3e | 98 | { |
Anna Bridge |
186:707f6e361f3e | 99 | if (CLKMAN_GetClkScale(CLKMAN_CLK_GPIO) == CLKMAN_SCALE_DISABLED) { |
Anna Bridge |
186:707f6e361f3e | 100 | CLKMAN_SetClkScale(CLKMAN_CLK_GPIO, CLKMAN_SCALE_DIV_1); |
Anna Bridge |
186:707f6e361f3e | 101 | } |
Anna Bridge |
186:707f6e361f3e | 102 | |
Anna Bridge |
186:707f6e361f3e | 103 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 104 | } |
Anna Bridge |
186:707f6e361f3e | 105 | |
Anna Bridge |
186:707f6e361f3e | 106 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 107 | int SYS_UART_Init(mxc_uart_regs_t *uart, const uart_cfg_t *uart_cfg, const sys_cfg_uart_t *sys_cfg) |
Anna Bridge |
186:707f6e361f3e | 108 | { |
Anna Bridge |
186:707f6e361f3e | 109 | static int subsequent_call = 0; |
Anna Bridge |
186:707f6e361f3e | 110 | int err, idx; |
Anna Bridge |
186:707f6e361f3e | 111 | clkman_scale_t clk_scale; |
Anna Bridge |
186:707f6e361f3e | 112 | uint32_t min_baud; |
Anna Bridge |
186:707f6e361f3e | 113 | |
Anna Bridge |
186:707f6e361f3e | 114 | if(sys_cfg == NULL) |
Anna Bridge |
186:707f6e361f3e | 115 | return E_NULL_PTR; |
Anna Bridge |
186:707f6e361f3e | 116 | |
Anna Bridge |
186:707f6e361f3e | 117 | if (sys_cfg->clk_scale != CLKMAN_SCALE_AUTO) { |
Anna Bridge |
186:707f6e361f3e | 118 | CLKMAN_SetClkScale(CLKMAN_CLK_UART, sys_cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 119 | } else if (!subsequent_call) { |
Anna Bridge |
186:707f6e361f3e | 120 | /* This clock divider is shared amongst all UARTs. Only change it if it |
Anna Bridge |
186:707f6e361f3e | 121 | * hasn't already been configured. UART_Init() will check for validity |
Anna Bridge |
186:707f6e361f3e | 122 | * for this baudrate. |
Anna Bridge |
186:707f6e361f3e | 123 | */ |
Anna Bridge |
186:707f6e361f3e | 124 | subsequent_call = 1; |
Anna Bridge |
186:707f6e361f3e | 125 | |
Anna Bridge |
186:707f6e361f3e | 126 | /* Setup the clock divider for the given baud rate */ |
Anna Bridge |
186:707f6e361f3e | 127 | clk_scale = CLKMAN_SCALE_DISABLED; |
Anna Bridge |
186:707f6e361f3e | 128 | do { |
Anna Bridge |
186:707f6e361f3e | 129 | min_baud = ((SystemCoreClock >> clk_scale++) / (16 * (MXC_F_UART_BAUD_BAUD_DIVISOR >> MXC_F_UART_BAUD_BAUD_DIVISOR_POS))); |
Anna Bridge |
186:707f6e361f3e | 130 | } while (uart_cfg->baud < min_baud && clk_scale < CLKMAN_SCALE_AUTO); |
Anna Bridge |
186:707f6e361f3e | 131 | |
Anna Bridge |
186:707f6e361f3e | 132 | /* check if baud rate cannot be reached */ |
Anna Bridge |
186:707f6e361f3e | 133 | if(uart_cfg->baud < min_baud) |
Anna Bridge |
186:707f6e361f3e | 134 | return E_BAD_STATE; |
Anna Bridge |
186:707f6e361f3e | 135 | |
Anna Bridge |
186:707f6e361f3e | 136 | CLKMAN_SetClkScale(CLKMAN_CLK_UART, clk_scale); |
Anna Bridge |
186:707f6e361f3e | 137 | } |
Anna Bridge |
186:707f6e361f3e | 138 | |
Anna Bridge |
186:707f6e361f3e | 139 | if ((err = IOMAN_Config(&sys_cfg->io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 140 | return err; |
Anna Bridge |
186:707f6e361f3e | 141 | } |
Anna Bridge |
186:707f6e361f3e | 142 | |
Anna Bridge |
186:707f6e361f3e | 143 | /* Reset the peripheral */ |
Anna Bridge |
186:707f6e361f3e | 144 | idx = MXC_UART_GET_IDX(uart); |
Anna Bridge |
186:707f6e361f3e | 145 | MXC_PWRMAN->peripheral_reset |= (MXC_F_PWRMAN_PERIPHERAL_RESET_UART0 << idx); |
Anna Bridge |
186:707f6e361f3e | 146 | MXC_PWRMAN->peripheral_reset &= ~((MXC_F_PWRMAN_PERIPHERAL_RESET_UART0 << idx)); |
Anna Bridge |
186:707f6e361f3e | 147 | |
Anna Bridge |
186:707f6e361f3e | 148 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 149 | } |
Anna Bridge |
186:707f6e361f3e | 150 | |
Anna Bridge |
186:707f6e361f3e | 151 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 152 | int SYS_UART_Shutdown(mxc_uart_regs_t *uart) |
Anna Bridge |
186:707f6e361f3e | 153 | { |
Anna Bridge |
186:707f6e361f3e | 154 | int err; |
Anna Bridge |
186:707f6e361f3e | 155 | int idx = MXC_UART_GET_IDX(uart); |
Anna Bridge |
186:707f6e361f3e | 156 | ioman_cfg_t io_cfg = (ioman_cfg_t)IOMAN_UART(idx, 0, 0, 0, 0, 0, 0); |
Anna Bridge |
186:707f6e361f3e | 157 | |
Anna Bridge |
186:707f6e361f3e | 158 | if ((err = IOMAN_Config(&io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 159 | return err; |
Anna Bridge |
186:707f6e361f3e | 160 | } |
Anna Bridge |
186:707f6e361f3e | 161 | |
Anna Bridge |
186:707f6e361f3e | 162 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 163 | } |
Anna Bridge |
186:707f6e361f3e | 164 | |
Anna Bridge |
186:707f6e361f3e | 165 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 166 | uint32_t SYS_UART_GetFreq(mxc_uart_regs_t *uart) |
Anna Bridge |
186:707f6e361f3e | 167 | { |
Anna Bridge |
186:707f6e361f3e | 168 | return SYS_GetFreq(CLKMAN_GetClkScale(CLKMAN_CLK_UART)); |
Anna Bridge |
186:707f6e361f3e | 169 | } |
Anna Bridge |
186:707f6e361f3e | 170 | |
Anna Bridge |
186:707f6e361f3e | 171 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 172 | int SYS_I2CM_Init(mxc_i2cm_regs_t *i2cm, const sys_cfg_i2cm_t *cfg) |
Anna Bridge |
186:707f6e361f3e | 173 | { |
Anna Bridge |
186:707f6e361f3e | 174 | int err; |
Anna Bridge |
186:707f6e361f3e | 175 | |
Anna Bridge |
186:707f6e361f3e | 176 | if(cfg == NULL) |
Anna Bridge |
186:707f6e361f3e | 177 | return E_NULL_PTR; |
Anna Bridge |
186:707f6e361f3e | 178 | |
Anna Bridge |
186:707f6e361f3e | 179 | CLKMAN_SetClkScale(CLKMAN_CLK_I2CM, cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 180 | MXC_CLKMAN->i2c_timer_ctrl = 1; |
Anna Bridge |
186:707f6e361f3e | 181 | |
Anna Bridge |
186:707f6e361f3e | 182 | if ((err = IOMAN_Config(&cfg->io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 183 | return err; |
Anna Bridge |
186:707f6e361f3e | 184 | } |
Anna Bridge |
186:707f6e361f3e | 185 | |
Anna Bridge |
186:707f6e361f3e | 186 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 187 | } |
Anna Bridge |
186:707f6e361f3e | 188 | |
Anna Bridge |
186:707f6e361f3e | 189 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 190 | int SYS_I2CM_Shutdown(mxc_i2cm_regs_t *i2cm) |
Anna Bridge |
186:707f6e361f3e | 191 | { |
Anna Bridge |
186:707f6e361f3e | 192 | int err; |
Anna Bridge |
186:707f6e361f3e | 193 | int idx = MXC_I2CM_GET_IDX(i2cm); |
Anna Bridge |
186:707f6e361f3e | 194 | ioman_cfg_t io_cfg; |
Anna Bridge |
186:707f6e361f3e | 195 | |
Anna Bridge |
186:707f6e361f3e | 196 | switch(idx) |
Anna Bridge |
186:707f6e361f3e | 197 | { |
Anna Bridge |
186:707f6e361f3e | 198 | case 0: |
Anna Bridge |
186:707f6e361f3e | 199 | io_cfg = (ioman_cfg_t)IOMAN_I2CM0(0,0); |
Anna Bridge |
186:707f6e361f3e | 200 | break; |
Anna Bridge |
186:707f6e361f3e | 201 | case 1: |
Anna Bridge |
186:707f6e361f3e | 202 | io_cfg = (ioman_cfg_t)IOMAN_I2CM1(0,0); |
Anna Bridge |
186:707f6e361f3e | 203 | break; |
Anna Bridge |
186:707f6e361f3e | 204 | case 2: |
Anna Bridge |
186:707f6e361f3e | 205 | io_cfg = (ioman_cfg_t)IOMAN_I2CM2(0,0); |
Anna Bridge |
186:707f6e361f3e | 206 | break; |
Anna Bridge |
186:707f6e361f3e | 207 | default: |
Anna Bridge |
186:707f6e361f3e | 208 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 209 | } |
Anna Bridge |
186:707f6e361f3e | 210 | |
Anna Bridge |
186:707f6e361f3e | 211 | if ((err = IOMAN_Config(&io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 212 | return err; |
Anna Bridge |
186:707f6e361f3e | 213 | } |
Anna Bridge |
186:707f6e361f3e | 214 | |
Anna Bridge |
186:707f6e361f3e | 215 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 216 | } |
Anna Bridge |
186:707f6e361f3e | 217 | |
Anna Bridge |
186:707f6e361f3e | 218 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 219 | uint32_t SYS_I2CM_GetFreq(mxc_i2cm_regs_t *i2cm) |
Anna Bridge |
186:707f6e361f3e | 220 | { |
Anna Bridge |
186:707f6e361f3e | 221 | return SYS_GetFreq(CLKMAN_GetClkScale(CLKMAN_CLK_I2CM)); |
Anna Bridge |
186:707f6e361f3e | 222 | } |
Anna Bridge |
186:707f6e361f3e | 223 | |
Anna Bridge |
186:707f6e361f3e | 224 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 225 | int SYS_I2CS_Init(mxc_i2cs_regs_t *i2cs, const sys_cfg_i2cs_t *cfg) |
Anna Bridge |
186:707f6e361f3e | 226 | { |
Anna Bridge |
186:707f6e361f3e | 227 | int err; |
Anna Bridge |
186:707f6e361f3e | 228 | |
Anna Bridge |
186:707f6e361f3e | 229 | if(cfg == NULL) |
Anna Bridge |
186:707f6e361f3e | 230 | return E_NULL_PTR; |
Anna Bridge |
186:707f6e361f3e | 231 | |
Anna Bridge |
186:707f6e361f3e | 232 | CLKMAN_SetClkScale(CLKMAN_CLK_I2CS, cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 233 | MXC_CLKMAN->i2c_timer_ctrl = 1; |
Anna Bridge |
186:707f6e361f3e | 234 | |
Anna Bridge |
186:707f6e361f3e | 235 | if ((err = IOMAN_Config(&cfg->io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 236 | return err; |
Anna Bridge |
186:707f6e361f3e | 237 | } |
Anna Bridge |
186:707f6e361f3e | 238 | |
Anna Bridge |
186:707f6e361f3e | 239 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 240 | } |
Anna Bridge |
186:707f6e361f3e | 241 | |
Anna Bridge |
186:707f6e361f3e | 242 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 243 | int SYS_I2CS_Shutdown(mxc_i2cs_regs_t *i2cs) |
Anna Bridge |
186:707f6e361f3e | 244 | { |
Anna Bridge |
186:707f6e361f3e | 245 | int err; |
Anna Bridge |
186:707f6e361f3e | 246 | ioman_cfg_t io_cfg = (ioman_cfg_t)IOMAN_I2CS(0, 0); |
Anna Bridge |
186:707f6e361f3e | 247 | |
Anna Bridge |
186:707f6e361f3e | 248 | if ((err = IOMAN_Config(&io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 249 | return err; |
Anna Bridge |
186:707f6e361f3e | 250 | } |
Anna Bridge |
186:707f6e361f3e | 251 | |
Anna Bridge |
186:707f6e361f3e | 252 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 253 | } |
Anna Bridge |
186:707f6e361f3e | 254 | |
Anna Bridge |
186:707f6e361f3e | 255 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 256 | uint32_t SYS_I2CS_GetFreq(mxc_i2cs_regs_t *i2cs) |
Anna Bridge |
186:707f6e361f3e | 257 | { |
Anna Bridge |
186:707f6e361f3e | 258 | uint32_t freq, clkdiv; |
Anna Bridge |
186:707f6e361f3e | 259 | |
Anna Bridge |
186:707f6e361f3e | 260 | if (CLKMAN_GetClkScale(CLKMAN_CLK_I2CS) == MXC_V_CLKMAN_CLK_SCALE_DISABLED) { |
Anna Bridge |
186:707f6e361f3e | 261 | freq = 0; |
Anna Bridge |
186:707f6e361f3e | 262 | } else { |
Anna Bridge |
186:707f6e361f3e | 263 | clkdiv = 1 << (CLKMAN_GetClkScale(CLKMAN_CLK_I2CS) - 1); |
Anna Bridge |
186:707f6e361f3e | 264 | freq = (SystemCoreClock / clkdiv); |
Anna Bridge |
186:707f6e361f3e | 265 | } |
Anna Bridge |
186:707f6e361f3e | 266 | |
Anna Bridge |
186:707f6e361f3e | 267 | return freq; |
Anna Bridge |
186:707f6e361f3e | 268 | } |
Anna Bridge |
186:707f6e361f3e | 269 | |
Anna Bridge |
186:707f6e361f3e | 270 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 271 | int SYS_SPIM_Init(mxc_spim_regs_t *spim, const spim_cfg_t *spim_cfg, const sys_cfg_spim_t *sys_cfg) |
Anna Bridge |
186:707f6e361f3e | 272 | { |
Anna Bridge |
186:707f6e361f3e | 273 | int err, idx; |
Anna Bridge |
186:707f6e361f3e | 274 | clkman_scale_t clk_scale; |
Anna Bridge |
186:707f6e361f3e | 275 | uint32_t max_baud; |
Anna Bridge |
186:707f6e361f3e | 276 | |
Anna Bridge |
186:707f6e361f3e | 277 | if(sys_cfg == NULL) |
Anna Bridge |
186:707f6e361f3e | 278 | return E_NULL_PTR; |
Anna Bridge |
186:707f6e361f3e | 279 | |
Anna Bridge |
186:707f6e361f3e | 280 | idx = MXC_SPIM_GET_IDX(spim); |
Anna Bridge |
186:707f6e361f3e | 281 | |
Anna Bridge |
186:707f6e361f3e | 282 | if (sys_cfg->clk_scale != CLKMAN_SCALE_AUTO) { |
Anna Bridge |
186:707f6e361f3e | 283 | if(spim_cfg->baud > ((SystemCoreClock >> (sys_cfg->clk_scale - 1))/2)) { |
Anna Bridge |
186:707f6e361f3e | 284 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 285 | } |
Anna Bridge |
186:707f6e361f3e | 286 | CLKMAN_SetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIM0 + idx), sys_cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 287 | } else { |
Anna Bridge |
186:707f6e361f3e | 288 | |
Anna Bridge |
186:707f6e361f3e | 289 | if(spim_cfg->baud > (SystemCoreClock/2)) { |
Anna Bridge |
186:707f6e361f3e | 290 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 291 | } |
Anna Bridge |
186:707f6e361f3e | 292 | |
Anna Bridge |
186:707f6e361f3e | 293 | /* Setup the clock divider for the given baud rate */ |
Anna Bridge |
186:707f6e361f3e | 294 | clk_scale = CLKMAN_SCALE_DISABLED; |
Anna Bridge |
186:707f6e361f3e | 295 | do { |
Anna Bridge |
186:707f6e361f3e | 296 | max_baud = ((SystemCoreClock >> clk_scale++) / 2); |
Anna Bridge |
186:707f6e361f3e | 297 | } while (spim_cfg->baud < max_baud && clk_scale < CLKMAN_SCALE_AUTO); |
Anna Bridge |
186:707f6e361f3e | 298 | |
Anna Bridge |
186:707f6e361f3e | 299 | if(clk_scale == CLKMAN_SCALE_AUTO) { |
Anna Bridge |
186:707f6e361f3e | 300 | clk_scale--; |
Anna Bridge |
186:707f6e361f3e | 301 | } |
Anna Bridge |
186:707f6e361f3e | 302 | |
Anna Bridge |
186:707f6e361f3e | 303 | CLKMAN_SetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIM0 + idx), clk_scale); |
Anna Bridge |
186:707f6e361f3e | 304 | } |
Anna Bridge |
186:707f6e361f3e | 305 | |
Anna Bridge |
186:707f6e361f3e | 306 | if ((err = IOMAN_Config(&sys_cfg->io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 307 | return err; |
Anna Bridge |
186:707f6e361f3e | 308 | } |
Anna Bridge |
186:707f6e361f3e | 309 | |
Anna Bridge |
186:707f6e361f3e | 310 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 311 | } |
Anna Bridge |
186:707f6e361f3e | 312 | |
Anna Bridge |
186:707f6e361f3e | 313 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 314 | int SYS_SPIM_Shutdown(mxc_spim_regs_t *spim) |
Anna Bridge |
186:707f6e361f3e | 315 | { |
Anna Bridge |
186:707f6e361f3e | 316 | int err; |
Anna Bridge |
186:707f6e361f3e | 317 | int idx = MXC_SPIM_GET_IDX(spim); |
Anna Bridge |
186:707f6e361f3e | 318 | ioman_cfg_t io_cfg; |
Anna Bridge |
186:707f6e361f3e | 319 | |
Anna Bridge |
186:707f6e361f3e | 320 | switch(idx) |
Anna Bridge |
186:707f6e361f3e | 321 | { |
Anna Bridge |
186:707f6e361f3e | 322 | case 0: |
Anna Bridge |
186:707f6e361f3e | 323 | io_cfg = (ioman_cfg_t)IOMAN_SPIM0(0, 0, 0, 0, 0, 0, 0, 0); |
Anna Bridge |
186:707f6e361f3e | 324 | break; |
Anna Bridge |
186:707f6e361f3e | 325 | case 1: |
Anna Bridge |
186:707f6e361f3e | 326 | io_cfg = (ioman_cfg_t)IOMAN_SPIM1(0, 0, 0, 0, 0, 0); |
Anna Bridge |
186:707f6e361f3e | 327 | break; |
Anna Bridge |
186:707f6e361f3e | 328 | case 2: |
Anna Bridge |
186:707f6e361f3e | 329 | io_cfg = (ioman_cfg_t)IOMAN_SPIM2(0, 0, 0, 0, 0, 0, 0, 0, 0); |
Anna Bridge |
186:707f6e361f3e | 330 | break; |
Anna Bridge |
186:707f6e361f3e | 331 | default: |
Anna Bridge |
186:707f6e361f3e | 332 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 333 | } |
Anna Bridge |
186:707f6e361f3e | 334 | |
Anna Bridge |
186:707f6e361f3e | 335 | if ((err = IOMAN_Config(&io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 336 | return err; |
Anna Bridge |
186:707f6e361f3e | 337 | } |
Anna Bridge |
186:707f6e361f3e | 338 | |
Anna Bridge |
186:707f6e361f3e | 339 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 340 | } |
Anna Bridge |
186:707f6e361f3e | 341 | |
Anna Bridge |
186:707f6e361f3e | 342 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 343 | uint32_t SYS_SPIM_GetFreq(mxc_spim_regs_t *spim) |
Anna Bridge |
186:707f6e361f3e | 344 | { |
Anna Bridge |
186:707f6e361f3e | 345 | int idx = MXC_SPIM_GET_IDX(spim); |
Anna Bridge |
186:707f6e361f3e | 346 | return SYS_GetFreq(CLKMAN_GetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIM0 + idx))); |
Anna Bridge |
186:707f6e361f3e | 347 | } |
Anna Bridge |
186:707f6e361f3e | 348 | |
Anna Bridge |
186:707f6e361f3e | 349 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 350 | int SYS_SPIX_Init(const sys_cfg_spix_t *sys_cfg, uint32_t baud) |
Anna Bridge |
186:707f6e361f3e | 351 | { |
Anna Bridge |
186:707f6e361f3e | 352 | int err; |
Anna Bridge |
186:707f6e361f3e | 353 | clkman_scale_t clk_scale; |
Anna Bridge |
186:707f6e361f3e | 354 | uint32_t min_baud; |
Anna Bridge |
186:707f6e361f3e | 355 | |
Anna Bridge |
186:707f6e361f3e | 356 | if (sys_cfg->clk_scale != CLKMAN_SCALE_AUTO) { |
Anna Bridge |
186:707f6e361f3e | 357 | CLKMAN_SetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIX), sys_cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 358 | } else { |
Anna Bridge |
186:707f6e361f3e | 359 | /* Setup the clock divider for the given baud rate */ |
Anna Bridge |
186:707f6e361f3e | 360 | clk_scale = CLKMAN_SCALE_DISABLED; |
Anna Bridge |
186:707f6e361f3e | 361 | do { |
Anna Bridge |
186:707f6e361f3e | 362 | min_baud = ((SystemCoreClock >> clk_scale++) / (2 * |
Anna Bridge |
186:707f6e361f3e | 363 | (MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK >> MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK_POS))); |
Anna Bridge |
186:707f6e361f3e | 364 | } while (baud < min_baud && clk_scale < CLKMAN_SCALE_AUTO); |
Anna Bridge |
186:707f6e361f3e | 365 | |
Anna Bridge |
186:707f6e361f3e | 366 | /* check if baud rate cannot be reached */ |
Anna Bridge |
186:707f6e361f3e | 367 | if(baud < min_baud) |
Anna Bridge |
186:707f6e361f3e | 368 | return E_BAD_STATE; |
Anna Bridge |
186:707f6e361f3e | 369 | |
Anna Bridge |
186:707f6e361f3e | 370 | CLKMAN_SetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIX), clk_scale); |
Anna Bridge |
186:707f6e361f3e | 371 | } |
Anna Bridge |
186:707f6e361f3e | 372 | |
Anna Bridge |
186:707f6e361f3e | 373 | if ((err = IOMAN_Config(&sys_cfg->io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 374 | return err; |
Anna Bridge |
186:707f6e361f3e | 375 | } |
Anna Bridge |
186:707f6e361f3e | 376 | |
Anna Bridge |
186:707f6e361f3e | 377 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 378 | } |
Anna Bridge |
186:707f6e361f3e | 379 | |
Anna Bridge |
186:707f6e361f3e | 380 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 381 | int SYS_SPIX_Shutdown() |
Anna Bridge |
186:707f6e361f3e | 382 | { |
Anna Bridge |
186:707f6e361f3e | 383 | int err; |
Anna Bridge |
186:707f6e361f3e | 384 | ioman_cfg_t io_cfg = IOMAN_SPIX(0, 0, 0, 0, 0, 0); |
Anna Bridge |
186:707f6e361f3e | 385 | |
Anna Bridge |
186:707f6e361f3e | 386 | if ((err = IOMAN_Config(&io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 387 | return err; |
Anna Bridge |
186:707f6e361f3e | 388 | } |
Anna Bridge |
186:707f6e361f3e | 389 | |
Anna Bridge |
186:707f6e361f3e | 390 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 391 | } |
Anna Bridge |
186:707f6e361f3e | 392 | |
Anna Bridge |
186:707f6e361f3e | 393 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 394 | uint32_t SYS_SPIX_GetFreq() |
Anna Bridge |
186:707f6e361f3e | 395 | { |
Anna Bridge |
186:707f6e361f3e | 396 | return SYS_GetFreq(CLKMAN_GetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIX))); |
Anna Bridge |
186:707f6e361f3e | 397 | } |
Anna Bridge |
186:707f6e361f3e | 398 | |
Anna Bridge |
186:707f6e361f3e | 399 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 400 | int SYS_SPIS_Init(const sys_cfg_spis_t *sys_cfg) |
Anna Bridge |
186:707f6e361f3e | 401 | { |
Anna Bridge |
186:707f6e361f3e | 402 | int err; |
Anna Bridge |
186:707f6e361f3e | 403 | |
Anna Bridge |
186:707f6e361f3e | 404 | if (sys_cfg->clk_scale != CLKMAN_SCALE_AUTO) { |
Anna Bridge |
186:707f6e361f3e | 405 | CLKMAN_SetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIS), sys_cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 406 | } else { |
Anna Bridge |
186:707f6e361f3e | 407 | CLKMAN_SetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIS), CLKMAN_SCALE_DIV_1); |
Anna Bridge |
186:707f6e361f3e | 408 | } |
Anna Bridge |
186:707f6e361f3e | 409 | |
Anna Bridge |
186:707f6e361f3e | 410 | if ((err = IOMAN_Config(&sys_cfg->io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 411 | return err; |
Anna Bridge |
186:707f6e361f3e | 412 | } |
Anna Bridge |
186:707f6e361f3e | 413 | |
Anna Bridge |
186:707f6e361f3e | 414 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 415 | } |
Anna Bridge |
186:707f6e361f3e | 416 | |
Anna Bridge |
186:707f6e361f3e | 417 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 418 | int SYS_SPIS_Shutdown() |
Anna Bridge |
186:707f6e361f3e | 419 | { |
Anna Bridge |
186:707f6e361f3e | 420 | int err; |
Anna Bridge |
186:707f6e361f3e | 421 | ioman_cfg_t io_cfg = IOMAN_SPIS(0, 0, 0); |
Anna Bridge |
186:707f6e361f3e | 422 | |
Anna Bridge |
186:707f6e361f3e | 423 | if ((err = IOMAN_Config(&io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 424 | return err; |
Anna Bridge |
186:707f6e361f3e | 425 | } |
Anna Bridge |
186:707f6e361f3e | 426 | |
Anna Bridge |
186:707f6e361f3e | 427 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 428 | } |
Anna Bridge |
186:707f6e361f3e | 429 | |
Anna Bridge |
186:707f6e361f3e | 430 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 431 | uint32_t SYS_SPIS_GetFreq() |
Anna Bridge |
186:707f6e361f3e | 432 | { |
Anna Bridge |
186:707f6e361f3e | 433 | return SYS_GetFreq(CLKMAN_GetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIS))); |
Anna Bridge |
186:707f6e361f3e | 434 | } |
Anna Bridge |
186:707f6e361f3e | 435 | |
Anna Bridge |
186:707f6e361f3e | 436 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 437 | int SYS_OWM_Init(mxc_owm_regs_t *owm, const sys_cfg_owm_t *sys_cfg) |
Anna Bridge |
186:707f6e361f3e | 438 | { |
Anna Bridge |
186:707f6e361f3e | 439 | int err; |
Anna Bridge |
186:707f6e361f3e | 440 | |
Anna Bridge |
186:707f6e361f3e | 441 | if(sys_cfg == NULL) |
Anna Bridge |
186:707f6e361f3e | 442 | return E_NULL_PTR; |
Anna Bridge |
186:707f6e361f3e | 443 | |
Anna Bridge |
186:707f6e361f3e | 444 | if (sys_cfg->clk_scale != CLKMAN_SCALE_AUTO) |
Anna Bridge |
186:707f6e361f3e | 445 | { |
Anna Bridge |
186:707f6e361f3e | 446 | CLKMAN_SetClkScale(CLKMAN_CLK_OWM, sys_cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 447 | } |
Anna Bridge |
186:707f6e361f3e | 448 | else |
Anna Bridge |
186:707f6e361f3e | 449 | { |
Anna Bridge |
186:707f6e361f3e | 450 | CLKMAN_SetClkScale(CLKMAN_CLK_OWM, CLKMAN_SCALE_DIV_1); |
Anna Bridge |
186:707f6e361f3e | 451 | } |
Anna Bridge |
186:707f6e361f3e | 452 | |
Anna Bridge |
186:707f6e361f3e | 453 | if ((err = IOMAN_Config(&sys_cfg->io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 454 | return err; |
Anna Bridge |
186:707f6e361f3e | 455 | } |
Anna Bridge |
186:707f6e361f3e | 456 | |
Anna Bridge |
186:707f6e361f3e | 457 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 458 | } |
Anna Bridge |
186:707f6e361f3e | 459 | |
Anna Bridge |
186:707f6e361f3e | 460 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 461 | int SYS_OWM_Shutdown(mxc_owm_regs_t *owm) |
Anna Bridge |
186:707f6e361f3e | 462 | { |
Anna Bridge |
186:707f6e361f3e | 463 | int err; |
Anna Bridge |
186:707f6e361f3e | 464 | |
Anna Bridge |
186:707f6e361f3e | 465 | ioman_cfg_t io_cfg = IOMAN_OWM(0, 0); |
Anna Bridge |
186:707f6e361f3e | 466 | |
Anna Bridge |
186:707f6e361f3e | 467 | if ((err = IOMAN_Config(&io_cfg)) != E_NO_ERROR) { |
Anna Bridge |
186:707f6e361f3e | 468 | return err; |
Anna Bridge |
186:707f6e361f3e | 469 | } |
Anna Bridge |
186:707f6e361f3e | 470 | |
Anna Bridge |
186:707f6e361f3e | 471 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 472 | } |
Anna Bridge |
186:707f6e361f3e | 473 | |
Anna Bridge |
186:707f6e361f3e | 474 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 475 | uint32_t SYS_OWM_GetFreq(mxc_owm_regs_t *owm) |
Anna Bridge |
186:707f6e361f3e | 476 | { |
Anna Bridge |
186:707f6e361f3e | 477 | return SYS_GetFreq(CLKMAN_GetClkScale(CLKMAN_CLK_OWM)); |
Anna Bridge |
186:707f6e361f3e | 478 | } |
Anna Bridge |
186:707f6e361f3e | 479 | |
Anna Bridge |
186:707f6e361f3e | 480 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 481 | uint32_t SYS_TMR_GetFreq(mxc_tmr_regs_t *tmr) |
Anna Bridge |
186:707f6e361f3e | 482 | { |
Anna Bridge |
186:707f6e361f3e | 483 | return SystemCoreClock; |
Anna Bridge |
186:707f6e361f3e | 484 | } |
Anna Bridge |
186:707f6e361f3e | 485 | |
Anna Bridge |
186:707f6e361f3e | 486 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 487 | int SYS_TMR_Init(mxc_tmr_regs_t *tmr, const sys_cfg_tmr_t *cfg) |
Anna Bridge |
186:707f6e361f3e | 488 | { |
Anna Bridge |
186:707f6e361f3e | 489 | int pin, gpio_index, tmr_index; |
Anna Bridge |
186:707f6e361f3e | 490 | |
Anna Bridge |
186:707f6e361f3e | 491 | if (cfg != NULL) |
Anna Bridge |
186:707f6e361f3e | 492 | { |
Anna Bridge |
186:707f6e361f3e | 493 | /* Make sure the given GPIO mapps to the given TMR */ |
Anna Bridge |
186:707f6e361f3e | 494 | for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) |
Anna Bridge |
186:707f6e361f3e | 495 | { |
Anna Bridge |
186:707f6e361f3e | 496 | if(cfg->mask & (1 << pin)) |
Anna Bridge |
186:707f6e361f3e | 497 | { |
Anna Bridge |
186:707f6e361f3e | 498 | gpio_index = (MXC_GPIO_MAX_PINS_PER_PORT * cfg->port) + pin; |
Anna Bridge |
186:707f6e361f3e | 499 | tmr_index = gpio_index % MXC_CFG_TMR_INSTANCES; |
Anna Bridge |
186:707f6e361f3e | 500 | |
Anna Bridge |
186:707f6e361f3e | 501 | if(tmr_index == MXC_TMR_GET_IDX(tmr)) |
Anna Bridge |
186:707f6e361f3e | 502 | return GPIO_Config(cfg); |
Anna Bridge |
186:707f6e361f3e | 503 | else |
Anna Bridge |
186:707f6e361f3e | 504 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 505 | } |
Anna Bridge |
186:707f6e361f3e | 506 | } |
Anna Bridge |
186:707f6e361f3e | 507 | |
Anna Bridge |
186:707f6e361f3e | 508 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 509 | |
Anna Bridge |
186:707f6e361f3e | 510 | } else { |
Anna Bridge |
186:707f6e361f3e | 511 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 512 | } |
Anna Bridge |
186:707f6e361f3e | 513 | } |
Anna Bridge |
186:707f6e361f3e | 514 | |
Anna Bridge |
186:707f6e361f3e | 515 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 516 | uint32_t SYS_SysTick_GetFreq(void) |
Anna Bridge |
186:707f6e361f3e | 517 | { |
Anna Bridge |
186:707f6e361f3e | 518 | /* Determine is using internal (SystemCoreClock) or external (32768) clock */ |
Anna Bridge |
186:707f6e361f3e | 519 | if ( (SysTick->CTRL & SysTick_CTRL_CLKSOURCE_Msk) || !(SysTick->CTRL & SysTick_CTRL_ENABLE_Msk)) { |
Anna Bridge |
186:707f6e361f3e | 520 | return SystemCoreClock; |
Anna Bridge |
186:707f6e361f3e | 521 | } else { |
Anna Bridge |
186:707f6e361f3e | 522 | return SYS_RTC_CLK; |
Anna Bridge |
186:707f6e361f3e | 523 | } |
Anna Bridge |
186:707f6e361f3e | 524 | } |
Anna Bridge |
186:707f6e361f3e | 525 | |
Anna Bridge |
186:707f6e361f3e | 526 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 527 | uint32_t SYS_PT_GetFreq(void) |
Anna Bridge |
186:707f6e361f3e | 528 | { |
Anna Bridge |
186:707f6e361f3e | 529 | return SYS_GetFreq(CLKMAN_GetClkScale(CLKMAN_CLK_PT)); |
Anna Bridge |
186:707f6e361f3e | 530 | } |
Anna Bridge |
186:707f6e361f3e | 531 | |
Anna Bridge |
186:707f6e361f3e | 532 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 533 | void SYS_PT_Init(sys_pt_clk_scale clk_scale) |
Anna Bridge |
186:707f6e361f3e | 534 | { |
Anna Bridge |
186:707f6e361f3e | 535 | /* setup clock divider for pulse train clock */ |
Anna Bridge |
186:707f6e361f3e | 536 | CLKMAN_SetClkScale(CLKMAN_CLK_PT, clk_scale); |
Anna Bridge |
186:707f6e361f3e | 537 | } |
Anna Bridge |
186:707f6e361f3e | 538 | |
Anna Bridge |
186:707f6e361f3e | 539 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 540 | int SYS_PT_Config(mxc_pt_regs_t *pt, const sys_cfg_pt_t *cfg) |
Anna Bridge |
186:707f6e361f3e | 541 | { |
Anna Bridge |
186:707f6e361f3e | 542 | int pt_index; |
Anna Bridge |
186:707f6e361f3e | 543 | |
Anna Bridge |
186:707f6e361f3e | 544 | /* Make sure the given GPIO mapps to the given PT */ |
Anna Bridge |
186:707f6e361f3e | 545 | pt_index = MXC_PT_GET_IDX(pt); |
Anna Bridge |
186:707f6e361f3e | 546 | if(pt_index < 0) { |
Anna Bridge |
186:707f6e361f3e | 547 | return E_NOT_SUPPORTED; |
Anna Bridge |
186:707f6e361f3e | 548 | } |
Anna Bridge |
186:707f6e361f3e | 549 | |
Anna Bridge |
186:707f6e361f3e | 550 | /* Even number port */ |
Anna Bridge |
186:707f6e361f3e | 551 | if(cfg->port%2 == 0) { |
Anna Bridge |
186:707f6e361f3e | 552 | /* Pin number should match PT number */ |
Anna Bridge |
186:707f6e361f3e | 553 | if(!(cfg->mask & (0x1 << pt_index))) { |
Anna Bridge |
186:707f6e361f3e | 554 | return E_NOT_SUPPORTED; |
Anna Bridge |
186:707f6e361f3e | 555 | } |
Anna Bridge |
186:707f6e361f3e | 556 | } else { |
Anna Bridge |
186:707f6e361f3e | 557 | /* Pin number+8 should match PT */ |
Anna Bridge |
186:707f6e361f3e | 558 | if(!((cfg->mask << 8) & (0x1 << pt_index))) { |
Anna Bridge |
186:707f6e361f3e | 559 | return E_NOT_SUPPORTED; |
Anna Bridge |
186:707f6e361f3e | 560 | } |
Anna Bridge |
186:707f6e361f3e | 561 | } |
Anna Bridge |
186:707f6e361f3e | 562 | |
Anna Bridge |
186:707f6e361f3e | 563 | return GPIO_Config(cfg); |
Anna Bridge |
186:707f6e361f3e | 564 | } |
Anna Bridge |
186:707f6e361f3e | 565 | |
Anna Bridge |
186:707f6e361f3e | 566 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 567 | void SYS_USB_Enable(uint8_t enable) |
Anna Bridge |
186:707f6e361f3e | 568 | { |
Anna Bridge |
186:707f6e361f3e | 569 | /* Enable USB clock */ |
Anna Bridge |
186:707f6e361f3e | 570 | CLKMAN_ClockGate(CLKMAN_USB_CLOCK, enable); |
Anna Bridge |
186:707f6e361f3e | 571 | |
Anna Bridge |
186:707f6e361f3e | 572 | if(enable) { |
Anna Bridge |
186:707f6e361f3e | 573 | /* Enable USB Power */ |
Anna Bridge |
186:707f6e361f3e | 574 | MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED; |
Anna Bridge |
186:707f6e361f3e | 575 | } else { |
Anna Bridge |
186:707f6e361f3e | 576 | /* Disable USB Power */ |
Anna Bridge |
186:707f6e361f3e | 577 | MXC_PWRMAN->pwr_rst_ctrl &= ~MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED; |
Anna Bridge |
186:707f6e361f3e | 578 | } |
Anna Bridge |
186:707f6e361f3e | 579 | } |
Anna Bridge |
186:707f6e361f3e | 580 | |
Anna Bridge |
186:707f6e361f3e | 581 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 582 | int SYS_SysTick_Config(uint32_t ticks, int clk_src) |
Anna Bridge |
186:707f6e361f3e | 583 | { |
Anna Bridge |
186:707f6e361f3e | 584 | |
Anna Bridge |
186:707f6e361f3e | 585 | if(ticks == 0) |
Anna Bridge |
186:707f6e361f3e | 586 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 587 | |
Anna Bridge |
186:707f6e361f3e | 588 | /* If SystemClock, call default CMSIS config and return */ |
Anna Bridge |
186:707f6e361f3e | 589 | if (clk_src) { |
Anna Bridge |
186:707f6e361f3e | 590 | return SysTick_Config(ticks); |
Anna Bridge |
186:707f6e361f3e | 591 | } else { /* External clock source requested |
Anna Bridge |
186:707f6e361f3e | 592 | enable RTC clock in run mode*/ |
Anna Bridge |
186:707f6e361f3e | 593 | MXC_PWRSEQ->reg0 |= (MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN); |
Anna Bridge |
186:707f6e361f3e | 594 | |
Anna Bridge |
186:707f6e361f3e | 595 | /* Disable SysTick Timer */ |
Anna Bridge |
186:707f6e361f3e | 596 | SysTick->CTRL = 0; |
Anna Bridge |
186:707f6e361f3e | 597 | /* Check reload value for valid */ |
Anna Bridge |
186:707f6e361f3e | 598 | if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk) { |
Anna Bridge |
186:707f6e361f3e | 599 | /* Reload value impossible */ |
Anna Bridge |
186:707f6e361f3e | 600 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 601 | } |
Anna Bridge |
186:707f6e361f3e | 602 | /* set reload register */ |
Anna Bridge |
186:707f6e361f3e | 603 | SysTick->LOAD = ticks - 1; |
Anna Bridge |
186:707f6e361f3e | 604 | |
Anna Bridge |
186:707f6e361f3e | 605 | /* set Priority for Systick Interrupt */ |
Anna Bridge |
186:707f6e361f3e | 606 | NVIC_SetPriority(SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); |
Anna Bridge |
186:707f6e361f3e | 607 | |
Anna Bridge |
186:707f6e361f3e | 608 | /* Load the SysTick Counter Value */ |
Anna Bridge |
186:707f6e361f3e | 609 | SysTick->VAL = 0; |
Anna Bridge |
186:707f6e361f3e | 610 | |
Anna Bridge |
186:707f6e361f3e | 611 | /* Enable SysTick IRQ and SysTick Timer leaving clock source as external */ |
Anna Bridge |
186:707f6e361f3e | 612 | SysTick->CTRL = SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; |
Anna Bridge |
186:707f6e361f3e | 613 | |
Anna Bridge |
186:707f6e361f3e | 614 | /* Function successful */ |
Anna Bridge |
186:707f6e361f3e | 615 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 616 | } |
Anna Bridge |
186:707f6e361f3e | 617 | } |
Anna Bridge |
186:707f6e361f3e | 618 | |
Anna Bridge |
186:707f6e361f3e | 619 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 620 | int SYS_SysTick_Delay(uint32_t ticks) |
Anna Bridge |
186:707f6e361f3e | 621 | { |
Anna Bridge |
186:707f6e361f3e | 622 | uint32_t cur_ticks, num_full, num_remain, previous_ticks, num_subtract, i; |
Anna Bridge |
186:707f6e361f3e | 623 | uint32_t reload, value, ctrl; /* save/restore variables */ |
Anna Bridge |
186:707f6e361f3e | 624 | |
Anna Bridge |
186:707f6e361f3e | 625 | if(ticks == 0) |
Anna Bridge |
186:707f6e361f3e | 626 | return E_BAD_PARAM; |
Anna Bridge |
186:707f6e361f3e | 627 | |
Anna Bridge |
186:707f6e361f3e | 628 | /* If SysTick is not enabled we can take it for our delay */ |
Anna Bridge |
186:707f6e361f3e | 629 | if (!(SysTick->CTRL & SysTick_CTRL_ENABLE_Msk)) { |
Anna Bridge |
186:707f6e361f3e | 630 | |
Anna Bridge |
186:707f6e361f3e | 631 | /* Save current state in case it's disabled but already configured, restore at return.*/ |
Anna Bridge |
186:707f6e361f3e | 632 | reload = SysTick->LOAD; |
Anna Bridge |
186:707f6e361f3e | 633 | value = SysTick->VAL; |
Anna Bridge |
186:707f6e361f3e | 634 | ctrl = SysTick->CTRL; |
Anna Bridge |
186:707f6e361f3e | 635 | |
Anna Bridge |
186:707f6e361f3e | 636 | /* get the number of ticks less than max RELOAD. */ |
Anna Bridge |
186:707f6e361f3e | 637 | num_remain = ticks % SysTick_LOAD_RELOAD_Msk; |
Anna Bridge |
186:707f6e361f3e | 638 | |
Anna Bridge |
186:707f6e361f3e | 639 | /* if ticks is < Max SysTick Reload num_full will be 0, otherwise it will |
Anna Bridge |
186:707f6e361f3e | 640 | give us the number of max SysTicks cycles required */ |
Anna Bridge |
186:707f6e361f3e | 641 | num_full = (ticks - 1) / SysTick_LOAD_RELOAD_Msk; |
Anna Bridge |
186:707f6e361f3e | 642 | |
Anna Bridge |
186:707f6e361f3e | 643 | /* Do the required full systick countdowns */ |
Anna Bridge |
186:707f6e361f3e | 644 | if (num_full) { |
Anna Bridge |
186:707f6e361f3e | 645 | /* load the max count value into systick */ |
Anna Bridge |
186:707f6e361f3e | 646 | SysTick->LOAD = SysTick_LOAD_RELOAD_Msk; |
Anna Bridge |
186:707f6e361f3e | 647 | /* load the starting value */ |
Anna Bridge |
186:707f6e361f3e | 648 | SysTick->VAL = 0; |
Anna Bridge |
186:707f6e361f3e | 649 | /*enable SysTick counter with SystemClock source internal, immediately forces LOAD register into VAL register */ |
Anna Bridge |
186:707f6e361f3e | 650 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk; |
Anna Bridge |
186:707f6e361f3e | 651 | /* CountFlag will get set when VAL reaches zero */ |
Anna Bridge |
186:707f6e361f3e | 652 | for (i = num_full; i > 0; i--) { |
Anna Bridge |
186:707f6e361f3e | 653 | do { |
Anna Bridge |
186:707f6e361f3e | 654 | cur_ticks = SysTick->CTRL; |
Anna Bridge |
186:707f6e361f3e | 655 | } while (!(cur_ticks & SysTick_CTRL_COUNTFLAG_Msk)); |
Anna Bridge |
186:707f6e361f3e | 656 | } |
Anna Bridge |
186:707f6e361f3e | 657 | /* Disable systick */ |
Anna Bridge |
186:707f6e361f3e | 658 | SysTick->CTRL = 0; |
Anna Bridge |
186:707f6e361f3e | 659 | } |
Anna Bridge |
186:707f6e361f3e | 660 | /* Now handle the remainder of ticks */ |
Anna Bridge |
186:707f6e361f3e | 661 | if (num_remain) { |
Anna Bridge |
186:707f6e361f3e | 662 | SysTick->LOAD = num_remain; |
Anna Bridge |
186:707f6e361f3e | 663 | SysTick->VAL = 0; |
Anna Bridge |
186:707f6e361f3e | 664 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk; |
Anna Bridge |
186:707f6e361f3e | 665 | /* wait for countflag to get set */ |
Anna Bridge |
186:707f6e361f3e | 666 | do { |
Anna Bridge |
186:707f6e361f3e | 667 | cur_ticks = SysTick->CTRL; |
Anna Bridge |
186:707f6e361f3e | 668 | } while (!(cur_ticks & SysTick_CTRL_COUNTFLAG_Msk)); |
Anna Bridge |
186:707f6e361f3e | 669 | /* Disable systick */ |
Anna Bridge |
186:707f6e361f3e | 670 | SysTick->CTRL = 0; |
Anna Bridge |
186:707f6e361f3e | 671 | } |
Anna Bridge |
186:707f6e361f3e | 672 | |
Anna Bridge |
186:707f6e361f3e | 673 | /* restore original state of SysTick and return */ |
Anna Bridge |
186:707f6e361f3e | 674 | SysTick->LOAD = reload; |
Anna Bridge |
186:707f6e361f3e | 675 | SysTick->VAL = value; |
Anna Bridge |
186:707f6e361f3e | 676 | SysTick->CTRL = ctrl; |
Anna Bridge |
186:707f6e361f3e | 677 | |
Anna Bridge |
186:707f6e361f3e | 678 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 679 | |
Anna Bridge |
186:707f6e361f3e | 680 | } else { /* SysTick is enabled |
Anna Bridge |
186:707f6e361f3e | 681 | When SysTick is enabled count flag can not be used |
Anna Bridge |
186:707f6e361f3e | 682 | and the reload can not be changed. |
Anna Bridge |
186:707f6e361f3e | 683 | Do not read the CTRL register -> clears count flag */ |
Anna Bridge |
186:707f6e361f3e | 684 | |
Anna Bridge |
186:707f6e361f3e | 685 | /* Get the reload value for wrap/reload case */ |
Anna Bridge |
186:707f6e361f3e | 686 | reload = SysTick->LOAD; |
Anna Bridge |
186:707f6e361f3e | 687 | |
Anna Bridge |
186:707f6e361f3e | 688 | /* Read the starting systick value */ |
Anna Bridge |
186:707f6e361f3e | 689 | previous_ticks = SysTick->VAL; |
Anna Bridge |
186:707f6e361f3e | 690 | |
Anna Bridge |
186:707f6e361f3e | 691 | do { |
Anna Bridge |
186:707f6e361f3e | 692 | /* get current SysTick value */ |
Anna Bridge |
186:707f6e361f3e | 693 | cur_ticks = SysTick->VAL; |
Anna Bridge |
186:707f6e361f3e | 694 | /* Check for wrap/reload of timer countval */ |
Anna Bridge |
186:707f6e361f3e | 695 | if (cur_ticks > previous_ticks) { |
Anna Bridge |
186:707f6e361f3e | 696 | /* subtract count to 0 (previous_ticks) and wrap (reload value - cur_ticks) */ |
Anna Bridge |
186:707f6e361f3e | 697 | num_subtract = (previous_ticks + (reload - cur_ticks)); |
Anna Bridge |
186:707f6e361f3e | 698 | } else { /* standard case (no wrap) |
Anna Bridge |
186:707f6e361f3e | 699 | subtract off the number of ticks since last pass */ |
Anna Bridge |
186:707f6e361f3e | 700 | num_subtract = (previous_ticks - cur_ticks); |
Anna Bridge |
186:707f6e361f3e | 701 | } |
Anna Bridge |
186:707f6e361f3e | 702 | /* check to see if we are done. */ |
Anna Bridge |
186:707f6e361f3e | 703 | if (num_subtract >= ticks) |
Anna Bridge |
186:707f6e361f3e | 704 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 705 | else |
Anna Bridge |
186:707f6e361f3e | 706 | ticks -= num_subtract; |
Anna Bridge |
186:707f6e361f3e | 707 | /* cur_ticks becomes previous_ticks for next timer read. */ |
Anna Bridge |
186:707f6e361f3e | 708 | previous_ticks = cur_ticks; |
Anna Bridge |
186:707f6e361f3e | 709 | } while (ticks > 0); |
Anna Bridge |
186:707f6e361f3e | 710 | /* Should not ever be reached */ |
Anna Bridge |
186:707f6e361f3e | 711 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 712 | } |
Anna Bridge |
186:707f6e361f3e | 713 | } |
Anna Bridge |
186:707f6e361f3e | 714 | |
Anna Bridge |
186:707f6e361f3e | 715 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 716 | int SYS_RTC_Init(void) |
Anna Bridge |
186:707f6e361f3e | 717 | { |
Anna Bridge |
186:707f6e361f3e | 718 | /* Enable power for RTC for all LPx states */ |
Anna Bridge |
186:707f6e361f3e | 719 | MXC_PWRSEQ->reg0 |= (MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN | |
Anna Bridge |
186:707f6e361f3e | 720 | MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP); |
Anna Bridge |
186:707f6e361f3e | 721 | |
Anna Bridge |
186:707f6e361f3e | 722 | /* Enable clock to synchronizers */ |
Anna Bridge |
186:707f6e361f3e | 723 | CLKMAN_SetClkScale(CLKMAN_CLK_SYNC, CLKMAN_SCALE_DIV_1); |
Anna Bridge |
186:707f6e361f3e | 724 | |
Anna Bridge |
186:707f6e361f3e | 725 | return E_NO_ERROR; |
Anna Bridge |
186:707f6e361f3e | 726 | } |
Anna Bridge |
186:707f6e361f3e | 727 | |
Anna Bridge |
186:707f6e361f3e | 728 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 729 | void SYS_IOMAN_UseVDDIO(const gpio_cfg_t *cfg) |
Anna Bridge |
186:707f6e361f3e | 730 | { |
Anna Bridge |
186:707f6e361f3e | 731 | unsigned int startbit = (cfg->port * 8); |
Anna Bridge |
186:707f6e361f3e | 732 | volatile uint32_t *use_vddioh_reg = &MXC_IOMAN->use_vddioh_0 + (startbit / 32); |
Anna Bridge |
186:707f6e361f3e | 733 | *use_vddioh_reg &= ~cfg->mask << (startbit % 32); |
Anna Bridge |
186:707f6e361f3e | 734 | } |
Anna Bridge |
186:707f6e361f3e | 735 | |
Anna Bridge |
186:707f6e361f3e | 736 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 737 | void SYS_IOMAN_UseVDDIOH(const gpio_cfg_t *cfg) |
Anna Bridge |
186:707f6e361f3e | 738 | { |
Anna Bridge |
186:707f6e361f3e | 739 | unsigned int startbit = (cfg->port * 8); |
Anna Bridge |
186:707f6e361f3e | 740 | volatile uint32_t *use_vddioh_reg = &MXC_IOMAN->use_vddioh_0 + (startbit / 32); |
Anna Bridge |
186:707f6e361f3e | 741 | *use_vddioh_reg |= cfg->mask << (startbit % 32); |
Anna Bridge |
186:707f6e361f3e | 742 | } |
Anna Bridge |
186:707f6e361f3e | 743 | |
Anna Bridge |
186:707f6e361f3e | 744 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 745 | void SYS_WDT_Init(mxc_wdt_regs_t *wdt, const sys_cfg_wdt_t *cfg) |
Anna Bridge |
186:707f6e361f3e | 746 | { |
Anna Bridge |
186:707f6e361f3e | 747 | |
Anna Bridge |
186:707f6e361f3e | 748 | if(cfg->clk == CLKMAN_WDT_SELECT_NANO_RING_OSCILLATOR) |
Anna Bridge |
186:707f6e361f3e | 749 | { |
Anna Bridge |
186:707f6e361f3e | 750 | /*enable nanoring in run mode */ |
Anna Bridge |
186:707f6e361f3e | 751 | MXC_PWRSEQ->reg0 |= (MXC_F_PWRSEQ_REG0_PWR_NREN_RUN); |
Anna Bridge |
186:707f6e361f3e | 752 | } |
Anna Bridge |
186:707f6e361f3e | 753 | else if(cfg->clk == CLKMAN_WDT_SELECT_32KHZ_RTC_OSCILLATOR) |
Anna Bridge |
186:707f6e361f3e | 754 | { |
Anna Bridge |
186:707f6e361f3e | 755 | /*enabled RTC in run mode */ |
Anna Bridge |
186:707f6e361f3e | 756 | MXC_PWRSEQ->reg0 |= (MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN); |
Anna Bridge |
186:707f6e361f3e | 757 | } |
Anna Bridge |
186:707f6e361f3e | 758 | |
Anna Bridge |
186:707f6e361f3e | 759 | if(wdt == MXC_WDT0) { |
Anna Bridge |
186:707f6e361f3e | 760 | /*select clock source */ |
Anna Bridge |
186:707f6e361f3e | 761 | CLKMAN_WdtClkSelect(0, cfg->clk); |
Anna Bridge |
186:707f6e361f3e | 762 | |
Anna Bridge |
186:707f6e361f3e | 763 | /*Set scale of clock (only used for system clock as source) */ |
Anna Bridge |
186:707f6e361f3e | 764 | CLKMAN_SetClkScale(CLKMAN_CLK_WDT0, cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 765 | |
Anna Bridge |
186:707f6e361f3e | 766 | /*Enable clock */ |
Anna Bridge |
186:707f6e361f3e | 767 | CLKMAN_ClockGate(CLKMAN_WDT0_CLOCK, 1); |
Anna Bridge |
186:707f6e361f3e | 768 | } else if (wdt == MXC_WDT1) { |
Anna Bridge |
186:707f6e361f3e | 769 | /*select clock source */ |
Anna Bridge |
186:707f6e361f3e | 770 | CLKMAN_WdtClkSelect(1, cfg->clk); |
Anna Bridge |
186:707f6e361f3e | 771 | |
Anna Bridge |
186:707f6e361f3e | 772 | /*Set scale of clock (only used for system clock as source) */ |
Anna Bridge |
186:707f6e361f3e | 773 | CLKMAN_SetClkScale(CLKMAN_CLK_WDT1, cfg->clk_scale); |
Anna Bridge |
186:707f6e361f3e | 774 | |
Anna Bridge |
186:707f6e361f3e | 775 | /*Enable clock */ |
Anna Bridge |
186:707f6e361f3e | 776 | CLKMAN_ClockGate(CLKMAN_WDT1_CLOCK, 1); |
Anna Bridge |
186:707f6e361f3e | 777 | } |
Anna Bridge |
186:707f6e361f3e | 778 | } |
Anna Bridge |
186:707f6e361f3e | 779 | |
Anna Bridge |
186:707f6e361f3e | 780 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 781 | void SYS_PRNG_Init(void) |
Anna Bridge |
186:707f6e361f3e | 782 | { |
Anna Bridge |
186:707f6e361f3e | 783 | /* Start crypto ring, unconditionally */ |
Anna Bridge |
186:707f6e361f3e | 784 | CLKMAN_CryptoClockEnable(1); |
Anna Bridge |
186:707f6e361f3e | 785 | |
Anna Bridge |
186:707f6e361f3e | 786 | /* If we find the dividers in anything other than off, don't touch them */ |
Anna Bridge |
186:707f6e361f3e | 787 | if (CLKMAN_GetClkScale(CLKMAN_CRYPTO_CLK_PRNG) == CLKMAN_SCALE_DISABLED) { |
Anna Bridge |
186:707f6e361f3e | 788 | /* Div 1 mode */ |
Anna Bridge |
186:707f6e361f3e | 789 | CLKMAN_SetClkScale(CLKMAN_CRYPTO_CLK_PRNG, CLKMAN_SCALE_DIV_1); |
Anna Bridge |
186:707f6e361f3e | 790 | } |
Anna Bridge |
186:707f6e361f3e | 791 | |
Anna Bridge |
186:707f6e361f3e | 792 | if (CLKMAN_GetClkScale(CLKMAN_CLK_PRNG) == CLKMAN_SCALE_DISABLED) { |
Anna Bridge |
186:707f6e361f3e | 793 | /* Div 1 mode */ |
Anna Bridge |
186:707f6e361f3e | 794 | CLKMAN_SetClkScale(CLKMAN_CLK_PRNG, CLKMAN_SCALE_DIV_1); |
Anna Bridge |
186:707f6e361f3e | 795 | } |
Anna Bridge |
186:707f6e361f3e | 796 | } |
Anna Bridge |
186:707f6e361f3e | 797 | |
Anna Bridge |
186:707f6e361f3e | 798 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 799 | void SYS_MAA_Init(void) |
Anna Bridge |
186:707f6e361f3e | 800 | { |
Anna Bridge |
186:707f6e361f3e | 801 | /* Start crypto ring, unconditionally */ |
Anna Bridge |
186:707f6e361f3e | 802 | CLKMAN_CryptoClockEnable(1); |
Anna Bridge |
186:707f6e361f3e | 803 | |
Anna Bridge |
186:707f6e361f3e | 804 | /* If we find the dividers in anything other than off, don't touch them */ |
Anna Bridge |
186:707f6e361f3e | 805 | if (CLKMAN_GetClkScale(CLKMAN_CRYPTO_CLK_MAA) == CLKMAN_SCALE_DISABLED) { |
Anna Bridge |
186:707f6e361f3e | 806 | /* Div 1 mode */ |
Anna Bridge |
186:707f6e361f3e | 807 | CLKMAN_SetClkScale(CLKMAN_CRYPTO_CLK_MAA, CLKMAN_SCALE_DIV_1); |
Anna Bridge |
186:707f6e361f3e | 808 | } |
Anna Bridge |
186:707f6e361f3e | 809 | } |
Anna Bridge |
186:707f6e361f3e | 810 | |
Anna Bridge |
186:707f6e361f3e | 811 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 812 | uint32_t SYS_SRAM_GetSize(void) |
Anna Bridge |
186:707f6e361f3e | 813 | { |
Anna Bridge |
186:707f6e361f3e | 814 | uint32_t memSize; |
Anna Bridge |
186:707f6e361f3e | 815 | |
Anna Bridge |
186:707f6e361f3e | 816 | /* Read TRIM value*/ |
Anna Bridge |
186:707f6e361f3e | 817 | int SRAMtrim = (MXC_TRIM->reg10_mem_size & MXC_F_TRIM_REG10_MEM_SIZE_SRAM) >> MXC_F_TRIM_REG10_MEM_SIZE_SRAM_POS; |
Anna Bridge |
186:707f6e361f3e | 818 | |
Anna Bridge |
186:707f6e361f3e | 819 | /* Decode trim value into memory size in bytes */ |
Anna Bridge |
186:707f6e361f3e | 820 | switch(SRAMtrim) |
Anna Bridge |
186:707f6e361f3e | 821 | { |
Anna Bridge |
186:707f6e361f3e | 822 | case MXC_V_TRIM_REG10_MEM_SRAM_THREE_FOURTHS_SIZE: |
Anna Bridge |
186:707f6e361f3e | 823 | memSize = (MXC_SRAM_FULL_MEM_SIZE >> 2) * 3; |
Anna Bridge |
186:707f6e361f3e | 824 | break; |
Anna Bridge |
186:707f6e361f3e | 825 | |
Anna Bridge |
186:707f6e361f3e | 826 | case MXC_V_TRIM_REG10_MEM_SRAM_HALF_SIZE: |
Anna Bridge |
186:707f6e361f3e | 827 | memSize = MXC_SRAM_FULL_MEM_SIZE >> 1; |
Anna Bridge |
186:707f6e361f3e | 828 | break; |
Anna Bridge |
186:707f6e361f3e | 829 | |
Anna Bridge |
186:707f6e361f3e | 830 | default: /* other values are FULL size */ |
Anna Bridge |
186:707f6e361f3e | 831 | memSize = MXC_SRAM_FULL_MEM_SIZE; |
Anna Bridge |
186:707f6e361f3e | 832 | break; |
Anna Bridge |
186:707f6e361f3e | 833 | } |
Anna Bridge |
186:707f6e361f3e | 834 | |
Anna Bridge |
186:707f6e361f3e | 835 | /* Returns size in bytes */ |
Anna Bridge |
186:707f6e361f3e | 836 | return memSize; |
Anna Bridge |
186:707f6e361f3e | 837 | } |
Anna Bridge |
186:707f6e361f3e | 838 | |
Anna Bridge |
186:707f6e361f3e | 839 | /******************************************************************************/ |
Anna Bridge |
186:707f6e361f3e | 840 | uint32_t SYS_FLASH_GetSize(void) |
Anna Bridge |
186:707f6e361f3e | 841 | { |
Anna Bridge |
186:707f6e361f3e | 842 | uint32_t memSize; |
Anna Bridge |
186:707f6e361f3e | 843 | |
Anna Bridge |
186:707f6e361f3e | 844 | /* Read TRIM value */ |
Anna Bridge |
186:707f6e361f3e | 845 | int FLASHtrim = (MXC_TRIM->reg10_mem_size & MXC_F_TRIM_REG10_MEM_SIZE_FLASH) >> MXC_F_TRIM_REG10_MEM_SIZE_FLASH_POS; |
Anna Bridge |
186:707f6e361f3e | 846 | |
Anna Bridge |
186:707f6e361f3e | 847 | /* Decode trim value into memory size in bytes*/ |
Anna Bridge |
186:707f6e361f3e | 848 | switch(FLASHtrim) |
Anna Bridge |
186:707f6e361f3e | 849 | { |
Anna Bridge |
186:707f6e361f3e | 850 | case MXC_V_TRIM_REG10_MEM_FLASH_THREE_FOURTHS_SIZE: |
Anna Bridge |
186:707f6e361f3e | 851 | memSize = (MXC_FLASH_FULL_MEM_SIZE >> 2) * 3; |
Anna Bridge |
186:707f6e361f3e | 852 | break; |
Anna Bridge |
186:707f6e361f3e | 853 | case MXC_V_TRIM_REG10_MEM_FLASH_HALF_SIZE: |
Anna Bridge |
186:707f6e361f3e | 854 | memSize = (MXC_FLASH_FULL_MEM_SIZE >> 1); |
Anna Bridge |
186:707f6e361f3e | 855 | break; |
Anna Bridge |
186:707f6e361f3e | 856 | case MXC_V_TRIM_REG10_MEM_FLASH_THREE_EIGHTHS_SIZE: |
Anna Bridge |
186:707f6e361f3e | 857 | memSize = (MXC_FLASH_FULL_MEM_SIZE >> 3) * 3; |
Anna Bridge |
186:707f6e361f3e | 858 | break; |
Anna Bridge |
186:707f6e361f3e | 859 | case MXC_V_TRIM_REG10_MEM_FLASH_FOURTH_SIZE: |
Anna Bridge |
186:707f6e361f3e | 860 | memSize = (MXC_FLASH_FULL_MEM_SIZE >> 2); |
Anna Bridge |
186:707f6e361f3e | 861 | break; |
Anna Bridge |
186:707f6e361f3e | 862 | default: /* other values are FULL size */ |
Anna Bridge |
186:707f6e361f3e | 863 | memSize = MXC_FLASH_FULL_MEM_SIZE; |
Anna Bridge |
186:707f6e361f3e | 864 | break; |
Anna Bridge |
186:707f6e361f3e | 865 | } |
Anna Bridge |
186:707f6e361f3e | 866 | |
Anna Bridge |
186:707f6e361f3e | 867 | /* Returns size in bytes */ |
Anna Bridge |
186:707f6e361f3e | 868 | return memSize; |
Anna Bridge |
186:707f6e361f3e | 869 | } |