mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Maxim/TARGET_MAX32620C/device/uart_regs.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
186:707f6e361f3e 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 186:707f6e361f3e 1 /*******************************************************************************
Anna Bridge 186:707f6e361f3e 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
Anna Bridge 186:707f6e361f3e 3 *
Anna Bridge 186:707f6e361f3e 4 * Permission is hereby granted, free of charge, to any person obtaining a
Anna Bridge 186:707f6e361f3e 5 * copy of this software and associated documentation files (the "Software"),
Anna Bridge 186:707f6e361f3e 6 * to deal in the Software without restriction, including without limitation
Anna Bridge 186:707f6e361f3e 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Anna Bridge 186:707f6e361f3e 8 * and/or sell copies of the Software, and to permit persons to whom the
Anna Bridge 186:707f6e361f3e 9 * Software is furnished to do so, subject to the following conditions:
Anna Bridge 186:707f6e361f3e 10 *
Anna Bridge 186:707f6e361f3e 11 * The above copyright notice and this permission notice shall be included
Anna Bridge 186:707f6e361f3e 12 * in all copies or substantial portions of the Software.
Anna Bridge 186:707f6e361f3e 13 *
Anna Bridge 186:707f6e361f3e 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Anna Bridge 186:707f6e361f3e 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Anna Bridge 186:707f6e361f3e 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Anna Bridge 186:707f6e361f3e 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Anna Bridge 186:707f6e361f3e 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Anna Bridge 186:707f6e361f3e 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Anna Bridge 186:707f6e361f3e 20 * OTHER DEALINGS IN THE SOFTWARE.
Anna Bridge 186:707f6e361f3e 21 *
Anna Bridge 186:707f6e361f3e 22 * Except as contained in this notice, the name of Maxim Integrated
Anna Bridge 186:707f6e361f3e 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Anna Bridge 186:707f6e361f3e 24 * Products, Inc. Branding Policy.
Anna Bridge 186:707f6e361f3e 25 *
Anna Bridge 186:707f6e361f3e 26 * The mere transfer of this software does not imply any licenses
Anna Bridge 186:707f6e361f3e 27 * of trade secrets, proprietary technology, copyrights, patents,
Anna Bridge 186:707f6e361f3e 28 * trademarks, maskwork rights, or any other form of intellectual
Anna Bridge 186:707f6e361f3e 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Anna Bridge 186:707f6e361f3e 30 * ownership rights.
Anna Bridge 186:707f6e361f3e 31 *
Anna Bridge 186:707f6e361f3e 32 * $Date: 2016-03-11 11:46:37 -0600 (Fri, 11 Mar 2016) $
Anna Bridge 186:707f6e361f3e 33 * $Revision: 21839 $
Anna Bridge 186:707f6e361f3e 34 *
Anna Bridge 186:707f6e361f3e 35 ******************************************************************************/
Anna Bridge 186:707f6e361f3e 36
Anna Bridge 186:707f6e361f3e 37 #ifndef _MXC_UART_REGS_H_
Anna Bridge 186:707f6e361f3e 38 #define _MXC_UART_REGS_H_
Anna Bridge 186:707f6e361f3e 39
Anna Bridge 186:707f6e361f3e 40 #ifdef __cplusplus
Anna Bridge 186:707f6e361f3e 41 extern "C" {
Anna Bridge 186:707f6e361f3e 42 #endif
Anna Bridge 186:707f6e361f3e 43
Anna Bridge 186:707f6e361f3e 44 #include <stdint.h>
Anna Bridge 186:707f6e361f3e 45
Anna Bridge 186:707f6e361f3e 46 /*
Anna Bridge 186:707f6e361f3e 47 If types are not defined elsewhere (CMSIS) define them here
Anna Bridge 186:707f6e361f3e 48 */
Anna Bridge 186:707f6e361f3e 49 #ifndef __IO
Anna Bridge 186:707f6e361f3e 50 #define __IO volatile
Anna Bridge 186:707f6e361f3e 51 #endif
Anna Bridge 186:707f6e361f3e 52 #ifndef __I
Anna Bridge 186:707f6e361f3e 53 #define __I volatile const
Anna Bridge 186:707f6e361f3e 54 #endif
Anna Bridge 186:707f6e361f3e 55 #ifndef __O
Anna Bridge 186:707f6e361f3e 56 #define __O volatile
Anna Bridge 186:707f6e361f3e 57 #endif
Anna Bridge 186:707f6e361f3e 58 #ifndef __RO
Anna Bridge 186:707f6e361f3e 59 #define __RO volatile const
Anna Bridge 186:707f6e361f3e 60 #endif
Anna Bridge 186:707f6e361f3e 61
Anna Bridge 186:707f6e361f3e 62
Anna Bridge 186:707f6e361f3e 63 /*
Anna Bridge 186:707f6e361f3e 64 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
Anna Bridge 186:707f6e361f3e 65 access to each register in module.
Anna Bridge 186:707f6e361f3e 66 */
Anna Bridge 186:707f6e361f3e 67
Anna Bridge 186:707f6e361f3e 68 /* Offset Register Description
Anna Bridge 186:707f6e361f3e 69 ============= ============================================================================ */
Anna Bridge 186:707f6e361f3e 70 typedef struct {
Anna Bridge 186:707f6e361f3e 71 __IO uint32_t ctrl; /* 0x0000 UART Control Register */
Anna Bridge 186:707f6e361f3e 72 __IO uint32_t baud; /* 0x0004 UART Baud Control Register */
Anna Bridge 186:707f6e361f3e 73 __IO uint32_t tx_fifo_ctrl; /* 0x0008 UART TX FIFO Control Register */
Anna Bridge 186:707f6e361f3e 74 __IO uint32_t rx_fifo_ctrl; /* 0x000C UART RX FIFO Control Register */
Anna Bridge 186:707f6e361f3e 75 __IO uint32_t md_ctrl; /* 0x0010 UART Multidrop Control Register */
Anna Bridge 186:707f6e361f3e 76 __IO uint32_t intfl; /* 0x0014 UART Interrupt Flags */
Anna Bridge 186:707f6e361f3e 77 __IO uint32_t inten; /* 0x0018 UART Interrupt Enable/Disable Controls */
Anna Bridge 186:707f6e361f3e 78 #if (MXC_UART_REV > 0)
Anna Bridge 186:707f6e361f3e 79 __RO uint32_t idle; /* 0x001C UART Idle Status */
Anna Bridge 186:707f6e361f3e 80 #endif
Anna Bridge 186:707f6e361f3e 81 } mxc_uart_regs_t;
Anna Bridge 186:707f6e361f3e 82
Anna Bridge 186:707f6e361f3e 83
Anna Bridge 186:707f6e361f3e 84 /* Offset Register Description
Anna Bridge 186:707f6e361f3e 85 ============= ============================================================================ */
Anna Bridge 186:707f6e361f3e 86 typedef struct {
Anna Bridge 186:707f6e361f3e 87 union { /* 0x0000-0x07FC FIFO Write Point for Data to Transmit */
Anna Bridge 186:707f6e361f3e 88 __IO uint8_t tx;
Anna Bridge 186:707f6e361f3e 89 __IO uint8_t tx_8[2048];
Anna Bridge 186:707f6e361f3e 90 __IO uint16_t tx_16[1024];
Anna Bridge 186:707f6e361f3e 91 __IO uint32_t tx_32[512];
Anna Bridge 186:707f6e361f3e 92 };
Anna Bridge 186:707f6e361f3e 93 union { /* 0x0800-0x0FFC FIFO Read Point for Received Data */
Anna Bridge 186:707f6e361f3e 94 __IO uint8_t rx;
Anna Bridge 186:707f6e361f3e 95 __IO uint8_t rx_8[2048];
Anna Bridge 186:707f6e361f3e 96 __IO uint16_t rx_16[1024];
Anna Bridge 186:707f6e361f3e 97 __IO uint32_t rx_32[512];
Anna Bridge 186:707f6e361f3e 98 };
Anna Bridge 186:707f6e361f3e 99 } mxc_uart_fifo_regs_t;
Anna Bridge 186:707f6e361f3e 100
Anna Bridge 186:707f6e361f3e 101
Anna Bridge 186:707f6e361f3e 102 /*
Anna Bridge 186:707f6e361f3e 103 Register offsets for module UART.
Anna Bridge 186:707f6e361f3e 104 */
Anna Bridge 186:707f6e361f3e 105
Anna Bridge 186:707f6e361f3e 106 #define MXC_R_UART_OFFS_CTRL ((uint32_t)0x00000000UL)
Anna Bridge 186:707f6e361f3e 107 #define MXC_R_UART_OFFS_BAUD ((uint32_t)0x00000004UL)
Anna Bridge 186:707f6e361f3e 108 #define MXC_R_UART_OFFS_TX_FIFO_CTRL ((uint32_t)0x00000008UL)
Anna Bridge 186:707f6e361f3e 109 #define MXC_R_UART_OFFS_RX_FIFO_CTRL ((uint32_t)0x0000000CUL)
Anna Bridge 186:707f6e361f3e 110 #define MXC_R_UART_OFFS_MD_CTRL ((uint32_t)0x00000010UL)
Anna Bridge 186:707f6e361f3e 111 #define MXC_R_UART_OFFS_INTFL ((uint32_t)0x00000014UL)
Anna Bridge 186:707f6e361f3e 112 #define MXC_R_UART_OFFS_INTEN ((uint32_t)0x00000018UL)
Anna Bridge 186:707f6e361f3e 113 #define MXC_R_UART_FIFO_OFFS_TX ((uint32_t)0x00000000UL)
Anna Bridge 186:707f6e361f3e 114 #define MXC_R_UART_FIFO_OFFS_RX ((uint32_t)0x00000800UL)
Anna Bridge 186:707f6e361f3e 115
Anna Bridge 186:707f6e361f3e 116
Anna Bridge 186:707f6e361f3e 117 /*
Anna Bridge 186:707f6e361f3e 118 Field positions and masks for module UART.
Anna Bridge 186:707f6e361f3e 119 */
Anna Bridge 186:707f6e361f3e 120
Anna Bridge 186:707f6e361f3e 121 #define MXC_F_UART_CTRL_UART_EN_POS 0
Anna Bridge 186:707f6e361f3e 122 #define MXC_F_UART_CTRL_UART_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_UART_EN_POS))
Anna Bridge 186:707f6e361f3e 123 #define MXC_F_UART_CTRL_RX_FIFO_EN_POS 1
Anna Bridge 186:707f6e361f3e 124 #define MXC_F_UART_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RX_FIFO_EN_POS))
Anna Bridge 186:707f6e361f3e 125 #define MXC_F_UART_CTRL_TX_FIFO_EN_POS 2
Anna Bridge 186:707f6e361f3e 126 #define MXC_F_UART_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_TX_FIFO_EN_POS))
Anna Bridge 186:707f6e361f3e 127 #define MXC_F_UART_CTRL_DATA_SIZE_POS 4
Anna Bridge 186:707f6e361f3e 128 #define MXC_F_UART_CTRL_DATA_SIZE ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_DATA_SIZE_POS))
Anna Bridge 186:707f6e361f3e 129 #define MXC_F_UART_CTRL_EXTRA_STOP_POS 8
Anna Bridge 186:707f6e361f3e 130 #define MXC_F_UART_CTRL_EXTRA_STOP ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_EXTRA_STOP_POS))
Anna Bridge 186:707f6e361f3e 131 #define MXC_F_UART_CTRL_PARITY_POS 12
Anna Bridge 186:707f6e361f3e 132 #define MXC_F_UART_CTRL_PARITY ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_PARITY_POS))
Anna Bridge 186:707f6e361f3e 133 #define MXC_F_UART_CTRL_CTS_EN_POS 16
Anna Bridge 186:707f6e361f3e 134 #define MXC_F_UART_CTRL_CTS_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_CTS_EN_POS))
Anna Bridge 186:707f6e361f3e 135 #define MXC_F_UART_CTRL_CTS_POLARITY_POS 17
Anna Bridge 186:707f6e361f3e 136 #define MXC_F_UART_CTRL_CTS_POLARITY ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_CTS_POLARITY_POS))
Anna Bridge 186:707f6e361f3e 137 #define MXC_F_UART_CTRL_RTS_EN_POS 18
Anna Bridge 186:707f6e361f3e 138 #define MXC_F_UART_CTRL_RTS_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RTS_EN_POS))
Anna Bridge 186:707f6e361f3e 139 #define MXC_F_UART_CTRL_RTS_POLARITY_POS 19
Anna Bridge 186:707f6e361f3e 140 #define MXC_F_UART_CTRL_RTS_POLARITY ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RTS_POLARITY_POS))
Anna Bridge 186:707f6e361f3e 141 #define MXC_F_UART_CTRL_RTS_LEVEL_POS 20
Anna Bridge 186:707f6e361f3e 142 #define MXC_F_UART_CTRL_RTS_LEVEL ((uint32_t)(0x0000003FUL << MXC_F_UART_CTRL_RTS_LEVEL_POS))
Anna Bridge 186:707f6e361f3e 143
Anna Bridge 186:707f6e361f3e 144 #define MXC_F_UART_BAUD_BAUD_DIVISOR_POS 0
Anna Bridge 186:707f6e361f3e 145 #define MXC_F_UART_BAUD_BAUD_DIVISOR ((uint32_t)(0x000000FFUL << MXC_F_UART_BAUD_BAUD_DIVISOR_POS))
Anna Bridge 186:707f6e361f3e 146 #define MXC_F_UART_BAUD_BAUD_MODE_POS 8
Anna Bridge 186:707f6e361f3e 147 #define MXC_F_UART_BAUD_BAUD_MODE ((uint32_t)(0x00000003UL << MXC_F_UART_BAUD_BAUD_MODE_POS))
Anna Bridge 186:707f6e361f3e 148
Anna Bridge 186:707f6e361f3e 149 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS 0
Anna Bridge 186:707f6e361f3e 150 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY ((uint32_t)(0x0000003FUL << MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS))
Anna Bridge 186:707f6e361f3e 151 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS 16
Anna Bridge 186:707f6e361f3e 152 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL ((uint32_t)(0x0000001FUL << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS))
Anna Bridge 186:707f6e361f3e 153
Anna Bridge 186:707f6e361f3e 154 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY_POS 0
Anna Bridge 186:707f6e361f3e 155 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY ((uint32_t)(0x0000003FUL << MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY_POS))
Anna Bridge 186:707f6e361f3e 156 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL_POS 16
Anna Bridge 186:707f6e361f3e 157 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL ((uint32_t)(0x0000001FUL << MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL_POS))
Anna Bridge 186:707f6e361f3e 158
Anna Bridge 186:707f6e361f3e 159 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_POS 0
Anna Bridge 186:707f6e361f3e 160 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR ((uint32_t)(0x000000FFUL << MXC_F_UART_MD_CTRL_SLAVE_ADDR_POS))
Anna Bridge 186:707f6e361f3e 161 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK_POS 8
Anna Bridge 186:707f6e361f3e 162 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK ((uint32_t)(0x000000FFUL << MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK_POS))
Anna Bridge 186:707f6e361f3e 163 #define MXC_F_UART_MD_CTRL_MD_MSTR_POS 16
Anna Bridge 186:707f6e361f3e 164 #define MXC_F_UART_MD_CTRL_MD_MSTR ((uint32_t)(0x00000001UL << MXC_F_UART_MD_CTRL_MD_MSTR_POS))
Anna Bridge 186:707f6e361f3e 165 #define MXC_F_UART_MD_CTRL_TX_ADDR_MARK_POS 17
Anna Bridge 186:707f6e361f3e 166 #define MXC_F_UART_MD_CTRL_TX_ADDR_MARK ((uint32_t)(0x00000001UL << MXC_F_UART_MD_CTRL_TX_ADDR_MARK_POS))
Anna Bridge 186:707f6e361f3e 167
Anna Bridge 186:707f6e361f3e 168 #define MXC_F_UART_INTFL_TX_DONE_POS 0
Anna Bridge 186:707f6e361f3e 169 #define MXC_F_UART_INTFL_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_DONE_POS))
Anna Bridge 186:707f6e361f3e 170 #define MXC_F_UART_INTFL_TX_UNSTALLED_POS 1
Anna Bridge 186:707f6e361f3e 171 #define MXC_F_UART_INTFL_TX_UNSTALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_UNSTALLED_POS))
Anna Bridge 186:707f6e361f3e 172 #define MXC_F_UART_INTFL_TX_FIFO_AE_POS 2
Anna Bridge 186:707f6e361f3e 173 #define MXC_F_UART_INTFL_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_FIFO_AE_POS))
Anna Bridge 186:707f6e361f3e 174 #define MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY_POS 3
Anna Bridge 186:707f6e361f3e 175 #define MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY_POS))
Anna Bridge 186:707f6e361f3e 176 #define MXC_F_UART_INTFL_RX_STALLED_POS 4
Anna Bridge 186:707f6e361f3e 177 #define MXC_F_UART_INTFL_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_STALLED_POS))
Anna Bridge 186:707f6e361f3e 178 #define MXC_F_UART_INTFL_RX_FIFO_AF_POS 5
Anna Bridge 186:707f6e361f3e 179 #define MXC_F_UART_INTFL_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_AF_POS))
Anna Bridge 186:707f6e361f3e 180 #define MXC_F_UART_INTFL_RX_FIFO_OVERFLOW_POS 6
Anna Bridge 186:707f6e361f3e 181 #define MXC_F_UART_INTFL_RX_FIFO_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_OVERFLOW_POS))
Anna Bridge 186:707f6e361f3e 182 #define MXC_F_UART_INTFL_RX_FRAMING_ERR_POS 7
Anna Bridge 186:707f6e361f3e 183 #define MXC_F_UART_INTFL_RX_FRAMING_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FRAMING_ERR_POS))
Anna Bridge 186:707f6e361f3e 184 #define MXC_F_UART_INTFL_RX_PARITY_ERR_POS 8
Anna Bridge 186:707f6e361f3e 185 #define MXC_F_UART_INTFL_RX_PARITY_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_PARITY_ERR_POS))
Anna Bridge 186:707f6e361f3e 186
Anna Bridge 186:707f6e361f3e 187 #define MXC_F_UART_INTEN_TX_DONE_POS 0
Anna Bridge 186:707f6e361f3e 188 #define MXC_F_UART_INTEN_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_DONE_POS))
Anna Bridge 186:707f6e361f3e 189 #define MXC_F_UART_INTEN_TX_UNSTALLED_POS 1
Anna Bridge 186:707f6e361f3e 190 #define MXC_F_UART_INTEN_TX_UNSTALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_UNSTALLED_POS))
Anna Bridge 186:707f6e361f3e 191 #define MXC_F_UART_INTEN_TX_FIFO_AE_POS 2
Anna Bridge 186:707f6e361f3e 192 #define MXC_F_UART_INTEN_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_FIFO_AE_POS))
Anna Bridge 186:707f6e361f3e 193 #define MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY_POS 3
Anna Bridge 186:707f6e361f3e 194 #define MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY_POS))
Anna Bridge 186:707f6e361f3e 195 #define MXC_F_UART_INTEN_RX_STALLED_POS 4
Anna Bridge 186:707f6e361f3e 196 #define MXC_F_UART_INTEN_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_STALLED_POS))
Anna Bridge 186:707f6e361f3e 197 #define MXC_F_UART_INTEN_RX_FIFO_AF_POS 5
Anna Bridge 186:707f6e361f3e 198 #define MXC_F_UART_INTEN_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_AF_POS))
Anna Bridge 186:707f6e361f3e 199 #define MXC_F_UART_INTEN_RX_FIFO_OVERFLOW_POS 6
Anna Bridge 186:707f6e361f3e 200 #define MXC_F_UART_INTEN_RX_FIFO_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_OVERFLOW_POS))
Anna Bridge 186:707f6e361f3e 201 #define MXC_F_UART_INTEN_RX_FRAMING_ERR_POS 7
Anna Bridge 186:707f6e361f3e 202 #define MXC_F_UART_INTEN_RX_FRAMING_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FRAMING_ERR_POS))
Anna Bridge 186:707f6e361f3e 203 #define MXC_F_UART_INTEN_RX_PARITY_ERR_POS 8
Anna Bridge 186:707f6e361f3e 204 #define MXC_F_UART_INTEN_RX_PARITY_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_PARITY_ERR_POS))
Anna Bridge 186:707f6e361f3e 205
Anna Bridge 186:707f6e361f3e 206 #if (MXC_UART_REV > 0)
Anna Bridge 186:707f6e361f3e 207 #define MXC_F_UART_IDLE_TX_RX_IDLE_POS 0
Anna Bridge 186:707f6e361f3e 208 #define MXC_F_UART_IDLE_TX_RX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_TX_RX_IDLE_POS))
Anna Bridge 186:707f6e361f3e 209 #define MXC_F_UART_IDLE_TX_IDLE_POS 1
Anna Bridge 186:707f6e361f3e 210 #define MXC_F_UART_IDLE_TX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_TX_IDLE_POS))
Anna Bridge 186:707f6e361f3e 211 #define MXC_F_UART_IDLE_RX_IDLE_POS 2
Anna Bridge 186:707f6e361f3e 212 #define MXC_F_UART_IDLE_RX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_RX_IDLE_POS))
Anna Bridge 186:707f6e361f3e 213 #endif
Anna Bridge 186:707f6e361f3e 214
Anna Bridge 186:707f6e361f3e 215 /*
Anna Bridge 186:707f6e361f3e 216 Field values and shifted values for module UART.
Anna Bridge 186:707f6e361f3e 217 */
Anna Bridge 186:707f6e361f3e 218
Anna Bridge 186:707f6e361f3e 219 #define MXC_V_UART_CTRL_DATA_SIZE_5_BITS ((uint32_t)(0x00000000UL))
Anna Bridge 186:707f6e361f3e 220 #define MXC_V_UART_CTRL_DATA_SIZE_6_BITS ((uint32_t)(0x00000001UL))
Anna Bridge 186:707f6e361f3e 221 #define MXC_V_UART_CTRL_DATA_SIZE_7_BITS ((uint32_t)(0x00000002UL))
Anna Bridge 186:707f6e361f3e 222 #define MXC_V_UART_CTRL_DATA_SIZE_8_BITS ((uint32_t)(0x00000003UL))
Anna Bridge 186:707f6e361f3e 223
Anna Bridge 186:707f6e361f3e 224 #define MXC_S_UART_CTRL_DATA_SIZE_5_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_5_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS))
Anna Bridge 186:707f6e361f3e 225 #define MXC_S_UART_CTRL_DATA_SIZE_6_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_6_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS))
Anna Bridge 186:707f6e361f3e 226 #define MXC_S_UART_CTRL_DATA_SIZE_7_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_7_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS))
Anna Bridge 186:707f6e361f3e 227 #define MXC_S_UART_CTRL_DATA_SIZE_8_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_8_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS))
Anna Bridge 186:707f6e361f3e 228
Anna Bridge 186:707f6e361f3e 229 #define MXC_V_UART_CTRL_PARITY_DISABLE ((uint32_t)(0x00000000UL))
Anna Bridge 186:707f6e361f3e 230 #define MXC_V_UART_CTRL_PARITY_ODD ((uint32_t)(0x00000001UL))
Anna Bridge 186:707f6e361f3e 231 #define MXC_V_UART_CTRL_PARITY_EVEN ((uint32_t)(0x00000002UL))
Anna Bridge 186:707f6e361f3e 232 #define MXC_V_UART_CTRL_PARITY_MARK ((uint32_t)(0x00000003UL))
Anna Bridge 186:707f6e361f3e 233
Anna Bridge 186:707f6e361f3e 234 #define MXC_S_UART_CTRL_PARITY_DISABLE ((uint32_t)(MXC_V_UART_CTRL_PARITY_DISABLE << MXC_F_UART_CTRL_PARITY_POS))
Anna Bridge 186:707f6e361f3e 235 #define MXC_S_UART_CTRL_PARITY_ODD ((uint32_t)(MXC_V_UART_CTRL_PARITY_ODD << MXC_F_UART_CTRL_PARITY_POS))
Anna Bridge 186:707f6e361f3e 236 #define MXC_S_UART_CTRL_PARITY_EVEN ((uint32_t)(MXC_V_UART_CTRL_PARITY_EVEN << MXC_F_UART_CTRL_PARITY_POS))
Anna Bridge 186:707f6e361f3e 237 #define MXC_S_UART_CTRL_PARITY_MARK ((uint32_t)(MXC_V_UART_CTRL_PARITY_MARK << MXC_F_UART_CTRL_PARITY_POS))
Anna Bridge 186:707f6e361f3e 238
Anna Bridge 186:707f6e361f3e 239
Anna Bridge 186:707f6e361f3e 240
Anna Bridge 186:707f6e361f3e 241 #ifdef __cplusplus
Anna Bridge 186:707f6e361f3e 242 }
Anna Bridge 186:707f6e361f3e 243 #endif
Anna Bridge 186:707f6e361f3e 244
Anna Bridge 186:707f6e361f3e 245 #endif /* _MXC_UART_REGS_H_ */