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mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Maxim/TARGET_MAX32620C/device/i2cm_regs.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 186:707f6e361f3e
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Anna Bridge |
186:707f6e361f3e | 1 | /******************************************************************************* |
| Anna Bridge |
186:707f6e361f3e | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
| Anna Bridge |
186:707f6e361f3e | 3 | * |
| Anna Bridge |
186:707f6e361f3e | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| Anna Bridge |
186:707f6e361f3e | 5 | * copy of this software and associated documentation files (the "Software"), |
| Anna Bridge |
186:707f6e361f3e | 6 | * to deal in the Software without restriction, including without limitation |
| Anna Bridge |
186:707f6e361f3e | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| Anna Bridge |
186:707f6e361f3e | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| Anna Bridge |
186:707f6e361f3e | 9 | * Software is furnished to do so, subject to the following conditions: |
| Anna Bridge |
186:707f6e361f3e | 10 | * |
| Anna Bridge |
186:707f6e361f3e | 11 | * The above copyright notice and this permission notice shall be included |
| Anna Bridge |
186:707f6e361f3e | 12 | * in all copies or substantial portions of the Software. |
| Anna Bridge |
186:707f6e361f3e | 13 | * |
| Anna Bridge |
186:707f6e361f3e | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| Anna Bridge |
186:707f6e361f3e | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| Anna Bridge |
186:707f6e361f3e | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| Anna Bridge |
186:707f6e361f3e | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
| Anna Bridge |
186:707f6e361f3e | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| Anna Bridge |
186:707f6e361f3e | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| Anna Bridge |
186:707f6e361f3e | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| Anna Bridge |
186:707f6e361f3e | 21 | * |
| Anna Bridge |
186:707f6e361f3e | 22 | * Except as contained in this notice, the name of Maxim Integrated |
| Anna Bridge |
186:707f6e361f3e | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
| Anna Bridge |
186:707f6e361f3e | 24 | * Products, Inc. Branding Policy. |
| Anna Bridge |
186:707f6e361f3e | 25 | * |
| Anna Bridge |
186:707f6e361f3e | 26 | * The mere transfer of this software does not imply any licenses |
| Anna Bridge |
186:707f6e361f3e | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
| Anna Bridge |
186:707f6e361f3e | 28 | * trademarks, maskwork rights, or any other form of intellectual |
| Anna Bridge |
186:707f6e361f3e | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
| Anna Bridge |
186:707f6e361f3e | 30 | * ownership rights. |
| Anna Bridge |
186:707f6e361f3e | 31 | * |
| Anna Bridge |
186:707f6e361f3e | 32 | * $Date: 2016-03-11 11:46:37 -0600 (Fri, 11 Mar 2016) $ |
| Anna Bridge |
186:707f6e361f3e | 33 | * $Revision: 21839 $ |
| Anna Bridge |
186:707f6e361f3e | 34 | * |
| Anna Bridge |
186:707f6e361f3e | 35 | ******************************************************************************/ |
| Anna Bridge |
186:707f6e361f3e | 36 | |
| Anna Bridge |
186:707f6e361f3e | 37 | #ifndef _MXC_I2CM_REGS_H_ |
| Anna Bridge |
186:707f6e361f3e | 38 | #define _MXC_I2CM_REGS_H_ |
| Anna Bridge |
186:707f6e361f3e | 39 | |
| Anna Bridge |
186:707f6e361f3e | 40 | #ifdef __cplusplus |
| Anna Bridge |
186:707f6e361f3e | 41 | extern "C" { |
| Anna Bridge |
186:707f6e361f3e | 42 | #endif |
| Anna Bridge |
186:707f6e361f3e | 43 | |
| Anna Bridge |
186:707f6e361f3e | 44 | #include <stdint.h> |
| Anna Bridge |
186:707f6e361f3e | 45 | |
| Anna Bridge |
186:707f6e361f3e | 46 | /* |
| Anna Bridge |
186:707f6e361f3e | 47 | If types are not defined elsewhere (CMSIS) define them here |
| Anna Bridge |
186:707f6e361f3e | 48 | */ |
| Anna Bridge |
186:707f6e361f3e | 49 | #ifndef __IO |
| Anna Bridge |
186:707f6e361f3e | 50 | #define __IO volatile |
| Anna Bridge |
186:707f6e361f3e | 51 | #endif |
| Anna Bridge |
186:707f6e361f3e | 52 | #ifndef __I |
| Anna Bridge |
186:707f6e361f3e | 53 | #define __I volatile const |
| Anna Bridge |
186:707f6e361f3e | 54 | #endif |
| Anna Bridge |
186:707f6e361f3e | 55 | #ifndef __O |
| Anna Bridge |
186:707f6e361f3e | 56 | #define __O volatile |
| Anna Bridge |
186:707f6e361f3e | 57 | #endif |
| Anna Bridge |
186:707f6e361f3e | 58 | #ifndef __RO |
| Anna Bridge |
186:707f6e361f3e | 59 | #define __RO volatile const |
| Anna Bridge |
186:707f6e361f3e | 60 | #endif |
| Anna Bridge |
186:707f6e361f3e | 61 | |
| Anna Bridge |
186:707f6e361f3e | 62 | |
| Anna Bridge |
186:707f6e361f3e | 63 | #define MXC_S_I2CM_TRANS_TAG_START 0x000 |
| Anna Bridge |
186:707f6e361f3e | 64 | #define MXC_S_I2CM_TRANS_TAG_TXDATA_ACK 0x100 |
| Anna Bridge |
186:707f6e361f3e | 65 | #define MXC_S_I2CM_TRANS_TAG_TXDATA_NACK 0x200 |
| Anna Bridge |
186:707f6e361f3e | 66 | #define MXC_S_I2CM_TRANS_TAG_RXDATA_COUNT 0x400 |
| Anna Bridge |
186:707f6e361f3e | 67 | #define MXC_S_I2CM_TRANS_TAG_RXDATA_NACK 0x500 |
| Anna Bridge |
186:707f6e361f3e | 68 | #define MXC_S_I2CM_TRANS_TAG_STOP 0x700 |
| Anna Bridge |
186:707f6e361f3e | 69 | #define MXC_S_I2CM_RSTLS_TAG_DATA 0x100 |
| Anna Bridge |
186:707f6e361f3e | 70 | #define MXC_S_I2CM_RSTLS_TAG_EMPTY 0x200 |
| Anna Bridge |
186:707f6e361f3e | 71 | |
| Anna Bridge |
186:707f6e361f3e | 72 | /* |
| Anna Bridge |
186:707f6e361f3e | 73 | Typedefed structure(s) for module registers (per instance or section) with direct 32-bit |
| Anna Bridge |
186:707f6e361f3e | 74 | access to each register in module. |
| Anna Bridge |
186:707f6e361f3e | 75 | */ |
| Anna Bridge |
186:707f6e361f3e | 76 | |
| Anna Bridge |
186:707f6e361f3e | 77 | /* Offset Register Description |
| Anna Bridge |
186:707f6e361f3e | 78 | ============= ============================================================================ */ |
| Anna Bridge |
186:707f6e361f3e | 79 | typedef struct { |
| Anna Bridge |
186:707f6e361f3e | 80 | __IO uint32_t fs_clk_div; /* 0x0000 I2C Master Full Speed SCL Clock Settings */ |
| Anna Bridge |
186:707f6e361f3e | 81 | __RO uint32_t rsv004[2]; /* 0x0004-0x0008 */ |
| Anna Bridge |
186:707f6e361f3e | 82 | __IO uint32_t timeout; /* 0x000C I2C Master Timeout and Auto-Stop Settings */ |
| Anna Bridge |
186:707f6e361f3e | 83 | __IO uint32_t ctrl; /* 0x0010 I2C Master Control Register */ |
| Anna Bridge |
186:707f6e361f3e | 84 | __IO uint32_t trans; /* 0x0014 I2C Master Transaction Start and Status Flags */ |
| Anna Bridge |
186:707f6e361f3e | 85 | __IO uint32_t intfl; /* 0x0018 I2C Master Interrupt Flags */ |
| Anna Bridge |
186:707f6e361f3e | 86 | __IO uint32_t inten; /* 0x001C I2C Master Interrupt Enable/Disable Controls */ |
| Anna Bridge |
186:707f6e361f3e | 87 | __RO uint32_t rsv020[2]; /* 0x0020-0x0024 */ |
| Anna Bridge |
186:707f6e361f3e | 88 | __IO uint32_t bb; /* 0x0028 I2C Master Bit-Bang Control Register */ |
| Anna Bridge |
186:707f6e361f3e | 89 | } mxc_i2cm_regs_t; |
| Anna Bridge |
186:707f6e361f3e | 90 | |
| Anna Bridge |
186:707f6e361f3e | 91 | |
| Anna Bridge |
186:707f6e361f3e | 92 | /* Offset Register Description |
| Anna Bridge |
186:707f6e361f3e | 93 | ============= ============================================================================ */ |
| Anna Bridge |
186:707f6e361f3e | 94 | typedef struct { |
| Anna Bridge |
186:707f6e361f3e | 95 | union { /* 0x0000-0x07FC FIFO Write Point for Data to Transmit */ |
| Anna Bridge |
186:707f6e361f3e | 96 | __IO uint16_t tx; |
| Anna Bridge |
186:707f6e361f3e | 97 | __IO uint8_t tx_8[2048]; |
| Anna Bridge |
186:707f6e361f3e | 98 | __IO uint16_t tx_16[1024]; |
| Anna Bridge |
186:707f6e361f3e | 99 | __IO uint32_t tx_32[512]; |
| Anna Bridge |
186:707f6e361f3e | 100 | }; |
| Anna Bridge |
186:707f6e361f3e | 101 | union { /* 0x0800-0x0FFC FIFO Read Point for Received Data */ |
| Anna Bridge |
186:707f6e361f3e | 102 | __IO uint16_t rx; |
| Anna Bridge |
186:707f6e361f3e | 103 | __IO uint8_t rx_8[2048]; |
| Anna Bridge |
186:707f6e361f3e | 104 | __IO uint16_t rx_16[1024]; |
| Anna Bridge |
186:707f6e361f3e | 105 | __IO uint32_t rx_32[512]; |
| Anna Bridge |
186:707f6e361f3e | 106 | }; |
| Anna Bridge |
186:707f6e361f3e | 107 | } mxc_i2cm_fifo_regs_t; |
| Anna Bridge |
186:707f6e361f3e | 108 | |
| Anna Bridge |
186:707f6e361f3e | 109 | |
| Anna Bridge |
186:707f6e361f3e | 110 | /* |
| Anna Bridge |
186:707f6e361f3e | 111 | Register offsets for module I2CM. |
| Anna Bridge |
186:707f6e361f3e | 112 | */ |
| Anna Bridge |
186:707f6e361f3e | 113 | |
| Anna Bridge |
186:707f6e361f3e | 114 | #define MXC_R_I2CM_OFFS_FS_CLK_DIV ((uint32_t)0x00000000UL) |
| Anna Bridge |
186:707f6e361f3e | 115 | #define MXC_R_I2CM_OFFS_TIMEOUT ((uint32_t)0x0000000CUL) |
| Anna Bridge |
186:707f6e361f3e | 116 | #define MXC_R_I2CM_OFFS_CTRL ((uint32_t)0x00000010UL) |
| Anna Bridge |
186:707f6e361f3e | 117 | #define MXC_R_I2CM_OFFS_TRANS ((uint32_t)0x00000014UL) |
| Anna Bridge |
186:707f6e361f3e | 118 | #define MXC_R_I2CM_OFFS_INTFL ((uint32_t)0x00000018UL) |
| Anna Bridge |
186:707f6e361f3e | 119 | #define MXC_R_I2CM_OFFS_INTEN ((uint32_t)0x0000001CUL) |
| Anna Bridge |
186:707f6e361f3e | 120 | #define MXC_R_I2CM_OFFS_BB ((uint32_t)0x00000028UL) |
| Anna Bridge |
186:707f6e361f3e | 121 | #define MXC_R_I2CM_FIFO_OFFS_TRANS ((uint32_t)0x00000000UL) |
| Anna Bridge |
186:707f6e361f3e | 122 | #define MXC_R_I2CM_FIFO_OFFS_RSLTS ((uint32_t)0x00000800UL) |
| Anna Bridge |
186:707f6e361f3e | 123 | |
| Anna Bridge |
186:707f6e361f3e | 124 | |
| Anna Bridge |
186:707f6e361f3e | 125 | /* |
| Anna Bridge |
186:707f6e361f3e | 126 | Field positions and masks for module I2CM. |
| Anna Bridge |
186:707f6e361f3e | 127 | */ |
| Anna Bridge |
186:707f6e361f3e | 128 | |
| Anna Bridge |
186:707f6e361f3e | 129 | #define MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV_POS 0 |
| Anna Bridge |
186:707f6e361f3e | 130 | #define MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV ((uint32_t)(0x000000FFUL << MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV_POS)) |
| Anna Bridge |
186:707f6e361f3e | 131 | #define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT_POS 8 |
| Anna Bridge |
186:707f6e361f3e | 132 | #define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 133 | #define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT_POS 20 |
| Anna Bridge |
186:707f6e361f3e | 134 | #define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 135 | |
| Anna Bridge |
186:707f6e361f3e | 136 | #define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS 16 |
| Anna Bridge |
186:707f6e361f3e | 137 | #define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT ((uint32_t)(0x000000FFUL << MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 138 | #define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS 24 |
| Anna Bridge |
186:707f6e361f3e | 139 | #define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS)) |
| Anna Bridge |
186:707f6e361f3e | 140 | |
| Anna Bridge |
186:707f6e361f3e | 141 | #define MXC_F_I2CM_CTRL_TX_FIFO_EN_POS 2 |
| Anna Bridge |
186:707f6e361f3e | 142 | #define MXC_F_I2CM_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_TX_FIFO_EN_POS)) |
| Anna Bridge |
186:707f6e361f3e | 143 | #define MXC_F_I2CM_CTRL_RX_FIFO_EN_POS 3 |
| Anna Bridge |
186:707f6e361f3e | 144 | #define MXC_F_I2CM_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_RX_FIFO_EN_POS)) |
| Anna Bridge |
186:707f6e361f3e | 145 | #define MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS 7 |
| Anna Bridge |
186:707f6e361f3e | 146 | #define MXC_F_I2CM_CTRL_MSTR_RESET_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS)) |
| Anna Bridge |
186:707f6e361f3e | 147 | |
| Anna Bridge |
186:707f6e361f3e | 148 | #define MXC_F_I2CM_TRANS_TX_START_POS 0 |
| Anna Bridge |
186:707f6e361f3e | 149 | #define MXC_F_I2CM_TRANS_TX_START ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_START_POS)) |
| Anna Bridge |
186:707f6e361f3e | 150 | #define MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS 1 |
| Anna Bridge |
186:707f6e361f3e | 151 | #define MXC_F_I2CM_TRANS_TX_IN_PROGRESS ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS)) |
| Anna Bridge |
186:707f6e361f3e | 152 | #define MXC_F_I2CM_TRANS_TX_DONE_POS 2 |
| Anna Bridge |
186:707f6e361f3e | 153 | #define MXC_F_I2CM_TRANS_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_DONE_POS)) |
| Anna Bridge |
186:707f6e361f3e | 154 | #define MXC_F_I2CM_TRANS_TX_NACKED_POS 3 |
| Anna Bridge |
186:707f6e361f3e | 155 | #define MXC_F_I2CM_TRANS_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_NACKED_POS)) |
| Anna Bridge |
186:707f6e361f3e | 156 | #define MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS 4 |
| Anna Bridge |
186:707f6e361f3e | 157 | #define MXC_F_I2CM_TRANS_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS)) |
| Anna Bridge |
186:707f6e361f3e | 158 | #define MXC_F_I2CM_TRANS_TX_TIMEOUT_POS 5 |
| Anna Bridge |
186:707f6e361f3e | 159 | #define MXC_F_I2CM_TRANS_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_TIMEOUT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 160 | |
| Anna Bridge |
186:707f6e361f3e | 161 | #define MXC_F_I2CM_INTFL_TX_DONE_POS 0 |
| Anna Bridge |
186:707f6e361f3e | 162 | #define MXC_F_I2CM_INTFL_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_DONE_POS)) |
| Anna Bridge |
186:707f6e361f3e | 163 | #define MXC_F_I2CM_INTFL_TX_NACKED_POS 1 |
| Anna Bridge |
186:707f6e361f3e | 164 | #define MXC_F_I2CM_INTFL_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_NACKED_POS)) |
| Anna Bridge |
186:707f6e361f3e | 165 | #define MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS 2 |
| Anna Bridge |
186:707f6e361f3e | 166 | #define MXC_F_I2CM_INTFL_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS)) |
| Anna Bridge |
186:707f6e361f3e | 167 | #define MXC_F_I2CM_INTFL_TX_TIMEOUT_POS 3 |
| Anna Bridge |
186:707f6e361f3e | 168 | #define MXC_F_I2CM_INTFL_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_TIMEOUT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 169 | #define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS 4 |
| Anna Bridge |
186:707f6e361f3e | 170 | #define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS)) |
| Anna Bridge |
186:707f6e361f3e | 171 | #define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS 5 |
| Anna Bridge |
186:707f6e361f3e | 172 | #define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS)) |
| Anna Bridge |
186:707f6e361f3e | 173 | #define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS 6 |
| Anna Bridge |
186:707f6e361f3e | 174 | #define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS)) |
| Anna Bridge |
186:707f6e361f3e | 175 | #define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS 7 |
| Anna Bridge |
186:707f6e361f3e | 176 | #define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS)) |
| Anna Bridge |
186:707f6e361f3e | 177 | #define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS 8 |
| Anna Bridge |
186:707f6e361f3e | 178 | #define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS)) |
| Anna Bridge |
186:707f6e361f3e | 179 | #define MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS 9 |
| Anna Bridge |
186:707f6e361f3e | 180 | #define MXC_F_I2CM_INTFL_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS)) |
| Anna Bridge |
186:707f6e361f3e | 181 | |
| Anna Bridge |
186:707f6e361f3e | 182 | #define MXC_F_I2CM_INTEN_TX_DONE_POS 0 |
| Anna Bridge |
186:707f6e361f3e | 183 | #define MXC_F_I2CM_INTEN_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_DONE_POS)) |
| Anna Bridge |
186:707f6e361f3e | 184 | #define MXC_F_I2CM_INTEN_TX_NACKED_POS 1 |
| Anna Bridge |
186:707f6e361f3e | 185 | #define MXC_F_I2CM_INTEN_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_NACKED_POS)) |
| Anna Bridge |
186:707f6e361f3e | 186 | #define MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS 2 |
| Anna Bridge |
186:707f6e361f3e | 187 | #define MXC_F_I2CM_INTEN_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS)) |
| Anna Bridge |
186:707f6e361f3e | 188 | #define MXC_F_I2CM_INTEN_TX_TIMEOUT_POS 3 |
| Anna Bridge |
186:707f6e361f3e | 189 | #define MXC_F_I2CM_INTEN_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_TIMEOUT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 190 | #define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS 4 |
| Anna Bridge |
186:707f6e361f3e | 191 | #define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS)) |
| Anna Bridge |
186:707f6e361f3e | 192 | #define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS 5 |
| Anna Bridge |
186:707f6e361f3e | 193 | #define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS)) |
| Anna Bridge |
186:707f6e361f3e | 194 | #define MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY_POS 6 |
| Anna Bridge |
186:707f6e361f3e | 195 | #define MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY_POS)) |
| Anna Bridge |
186:707f6e361f3e | 196 | #define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS 7 |
| Anna Bridge |
186:707f6e361f3e | 197 | #define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS)) |
| Anna Bridge |
186:707f6e361f3e | 198 | #define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS 8 |
| Anna Bridge |
186:707f6e361f3e | 199 | #define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS)) |
| Anna Bridge |
186:707f6e361f3e | 200 | #define MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS 9 |
| Anna Bridge |
186:707f6e361f3e | 201 | #define MXC_F_I2CM_INTEN_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS)) |
| Anna Bridge |
186:707f6e361f3e | 202 | |
| Anna Bridge |
186:707f6e361f3e | 203 | #define MXC_F_I2CM_BB_BB_SCL_OUT_POS 0 |
| Anna Bridge |
186:707f6e361f3e | 204 | #define MXC_F_I2CM_BB_BB_SCL_OUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_OUT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 205 | #define MXC_F_I2CM_BB_BB_SDA_OUT_POS 1 |
| Anna Bridge |
186:707f6e361f3e | 206 | #define MXC_F_I2CM_BB_BB_SDA_OUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_OUT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 207 | #define MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS 2 |
| Anna Bridge |
186:707f6e361f3e | 208 | #define MXC_F_I2CM_BB_BB_SCL_IN_VAL ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS)) |
| Anna Bridge |
186:707f6e361f3e | 209 | #define MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS 3 |
| Anna Bridge |
186:707f6e361f3e | 210 | #define MXC_F_I2CM_BB_BB_SDA_IN_VAL ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS)) |
| Anna Bridge |
186:707f6e361f3e | 211 | #define MXC_F_I2CM_BB_RX_FIFO_CNT_POS 16 |
| Anna Bridge |
186:707f6e361f3e | 212 | #define MXC_F_I2CM_BB_RX_FIFO_CNT ((uint32_t)(0x0000001FUL << MXC_F_I2CM_BB_RX_FIFO_CNT_POS)) |
| Anna Bridge |
186:707f6e361f3e | 213 | |
| Anna Bridge |
186:707f6e361f3e | 214 | |
| Anna Bridge |
186:707f6e361f3e | 215 | |
| Anna Bridge |
186:707f6e361f3e | 216 | #ifdef __cplusplus |
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186:707f6e361f3e | 217 | } |
| Anna Bridge |
186:707f6e361f3e | 218 | #endif |
| Anna Bridge |
186:707f6e361f3e | 219 | |
| Anna Bridge |
186:707f6e361f3e | 220 | #endif /* _MXC_I2CM_REGS_H_ */ |
| Anna Bridge |
186:707f6e361f3e | 221 |
