mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_GigaDevice/TARGET_GD32F30X/rtc_api.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 189:f392fc9709a3 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 189:f392fc9709a3 | 2 | * Copyright (c) 2018 GigaDevice Semiconductor Inc. |
AnnaBridge | 189:f392fc9709a3 | 3 | * |
AnnaBridge | 189:f392fc9709a3 | 4 | * SPDX-License-Identifier: Apache-2.0 |
AnnaBridge | 189:f392fc9709a3 | 5 | * |
AnnaBridge | 189:f392fc9709a3 | 6 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 189:f392fc9709a3 | 7 | * you may not use this file except in compliance with the License. |
AnnaBridge | 189:f392fc9709a3 | 8 | * You may obtain a copy of the License at |
AnnaBridge | 189:f392fc9709a3 | 9 | * |
AnnaBridge | 189:f392fc9709a3 | 10 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 189:f392fc9709a3 | 11 | * |
AnnaBridge | 189:f392fc9709a3 | 12 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 189:f392fc9709a3 | 13 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 189:f392fc9709a3 | 14 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 189:f392fc9709a3 | 15 | * See the License for the specific language governing permissions and |
AnnaBridge | 189:f392fc9709a3 | 16 | * limitations under the License. |
AnnaBridge | 189:f392fc9709a3 | 17 | */ |
AnnaBridge | 189:f392fc9709a3 | 18 | #if DEVICE_RTC |
AnnaBridge | 189:f392fc9709a3 | 19 | |
AnnaBridge | 189:f392fc9709a3 | 20 | #include "rtc_api.h" |
AnnaBridge | 189:f392fc9709a3 | 21 | |
AnnaBridge | 189:f392fc9709a3 | 22 | static uint8_t rtc_init_flag = 0; |
AnnaBridge | 189:f392fc9709a3 | 23 | |
AnnaBridge | 189:f392fc9709a3 | 24 | /** Initialize the RTC peripheral |
AnnaBridge | 189:f392fc9709a3 | 25 | * |
AnnaBridge | 189:f392fc9709a3 | 26 | * Powerup the RTC in perpetration for access. This function must be called |
AnnaBridge | 189:f392fc9709a3 | 27 | * before any other RTC functions ares called. This does not change the state |
AnnaBridge | 189:f392fc9709a3 | 28 | * of the RTC. It just enables access to it. |
AnnaBridge | 189:f392fc9709a3 | 29 | * |
AnnaBridge | 189:f392fc9709a3 | 30 | * @note This function is safe to call repeatedly - Tested by ::rtc_init_test |
AnnaBridge | 189:f392fc9709a3 | 31 | */ |
AnnaBridge | 189:f392fc9709a3 | 32 | void rtc_init(void) |
AnnaBridge | 189:f392fc9709a3 | 33 | { |
AnnaBridge | 189:f392fc9709a3 | 34 | /* make sure RTC only init once */ |
AnnaBridge | 189:f392fc9709a3 | 35 | if (rtc_init_flag) { |
AnnaBridge | 189:f392fc9709a3 | 36 | return; |
AnnaBridge | 189:f392fc9709a3 | 37 | } |
AnnaBridge | 189:f392fc9709a3 | 38 | rtc_init_flag = 1; |
AnnaBridge | 189:f392fc9709a3 | 39 | |
AnnaBridge | 189:f392fc9709a3 | 40 | /* enable PMU and BKPI clocks */ |
AnnaBridge | 189:f392fc9709a3 | 41 | rcu_periph_clock_enable(RCU_BKPI); |
AnnaBridge | 189:f392fc9709a3 | 42 | rcu_periph_clock_enable(RCU_PMU); |
AnnaBridge | 189:f392fc9709a3 | 43 | /* allow access to BKP domain */ |
AnnaBridge | 189:f392fc9709a3 | 44 | pmu_backup_write_enable(); |
AnnaBridge | 189:f392fc9709a3 | 45 | /* enable LXTAL */ |
AnnaBridge | 189:f392fc9709a3 | 46 | rcu_osci_on(RCU_LXTAL); |
AnnaBridge | 189:f392fc9709a3 | 47 | /* wait till LXTAL is ready */ |
AnnaBridge | 189:f392fc9709a3 | 48 | rcu_osci_stab_wait(RCU_LXTAL); |
AnnaBridge | 189:f392fc9709a3 | 49 | /* select RCU_LXTAL as RTC clock source */ |
AnnaBridge | 189:f392fc9709a3 | 50 | rcu_rtc_clock_config(RCU_RTCSRC_LXTAL); |
AnnaBridge | 189:f392fc9709a3 | 51 | /* enable RTC Clock */ |
AnnaBridge | 189:f392fc9709a3 | 52 | rcu_periph_clock_enable(RCU_RTC); |
AnnaBridge | 189:f392fc9709a3 | 53 | /* wait for RTC registers synchronization */ |
AnnaBridge | 189:f392fc9709a3 | 54 | rtc_register_sync_wait(); |
AnnaBridge | 189:f392fc9709a3 | 55 | /* wait until last write operation on RTC registers has finished */ |
AnnaBridge | 189:f392fc9709a3 | 56 | rtc_lwoff_wait(); |
AnnaBridge | 189:f392fc9709a3 | 57 | /* set RTC prescaler: set RTC period to 1s */ |
AnnaBridge | 189:f392fc9709a3 | 58 | rtc_prescaler_set(32767); |
AnnaBridge | 189:f392fc9709a3 | 59 | /* wait until last write operation on RTC registers has finished */ |
AnnaBridge | 189:f392fc9709a3 | 60 | rtc_lwoff_wait(); |
AnnaBridge | 189:f392fc9709a3 | 61 | } |
AnnaBridge | 189:f392fc9709a3 | 62 | |
AnnaBridge | 189:f392fc9709a3 | 63 | /** Deinitialize RTC |
AnnaBridge | 189:f392fc9709a3 | 64 | * |
AnnaBridge | 189:f392fc9709a3 | 65 | * Powerdown the RTC in preparation for sleep, powerdown or reset. That should only |
AnnaBridge | 189:f392fc9709a3 | 66 | * affect the CPU domain and not the time keeping logic. |
AnnaBridge | 189:f392fc9709a3 | 67 | * After this function is called no other RTC functions should be called |
AnnaBridge | 189:f392fc9709a3 | 68 | * except for ::rtc_init. |
AnnaBridge | 189:f392fc9709a3 | 69 | */ |
AnnaBridge | 189:f392fc9709a3 | 70 | void rtc_free(void) |
AnnaBridge | 189:f392fc9709a3 | 71 | { |
AnnaBridge | 189:f392fc9709a3 | 72 | } |
AnnaBridge | 189:f392fc9709a3 | 73 | |
AnnaBridge | 189:f392fc9709a3 | 74 | /** Check if the RTC has the time set and is counting |
AnnaBridge | 189:f392fc9709a3 | 75 | * |
AnnaBridge | 189:f392fc9709a3 | 76 | * @retval 0 The time reported by the RTC is not valid |
AnnaBridge | 189:f392fc9709a3 | 77 | * @retval 1 The time has been set the RTC is counting |
AnnaBridge | 189:f392fc9709a3 | 78 | */ |
AnnaBridge | 189:f392fc9709a3 | 79 | int rtc_isenabled(void) |
AnnaBridge | 189:f392fc9709a3 | 80 | { |
AnnaBridge | 189:f392fc9709a3 | 81 | if (RESET == (RTC_CTL & RTC_CTL_RSYNF)) { |
AnnaBridge | 189:f392fc9709a3 | 82 | return 0; |
AnnaBridge | 189:f392fc9709a3 | 83 | } else { |
AnnaBridge | 189:f392fc9709a3 | 84 | return 1; |
AnnaBridge | 189:f392fc9709a3 | 85 | } |
AnnaBridge | 189:f392fc9709a3 | 86 | } |
AnnaBridge | 189:f392fc9709a3 | 87 | |
AnnaBridge | 189:f392fc9709a3 | 88 | /** Get the current time from the RTC peripheral |
AnnaBridge | 189:f392fc9709a3 | 89 | * |
AnnaBridge | 189:f392fc9709a3 | 90 | * @return The current time in seconds |
AnnaBridge | 189:f392fc9709a3 | 91 | * |
AnnaBridge | 189:f392fc9709a3 | 92 | * @note Some RTCs are not synchronized with the main clock. If |
AnnaBridge | 189:f392fc9709a3 | 93 | * this is the case with your RTC then you must read the RTC time |
AnnaBridge | 189:f392fc9709a3 | 94 | * in a loop to prevent reading the wrong time due to a glitch. |
AnnaBridge | 189:f392fc9709a3 | 95 | * The test ::rtc_glitch_test is intended to catch this bug. |
AnnaBridge | 189:f392fc9709a3 | 96 | */ |
AnnaBridge | 189:f392fc9709a3 | 97 | time_t rtc_read(void) |
AnnaBridge | 189:f392fc9709a3 | 98 | { |
AnnaBridge | 189:f392fc9709a3 | 99 | return (rtc_counter_get()); |
AnnaBridge | 189:f392fc9709a3 | 100 | } |
AnnaBridge | 189:f392fc9709a3 | 101 | |
AnnaBridge | 189:f392fc9709a3 | 102 | /** Write the current time in seconds to the RTC peripheral |
AnnaBridge | 189:f392fc9709a3 | 103 | * |
AnnaBridge | 189:f392fc9709a3 | 104 | * @param t The current time to be set in seconds. |
AnnaBridge | 189:f392fc9709a3 | 105 | */ |
AnnaBridge | 189:f392fc9709a3 | 106 | void rtc_write(time_t t) |
AnnaBridge | 189:f392fc9709a3 | 107 | { |
AnnaBridge | 189:f392fc9709a3 | 108 | rtc_counter_set((uint32_t)t); |
AnnaBridge | 189:f392fc9709a3 | 109 | rtc_lwoff_wait(); |
AnnaBridge | 189:f392fc9709a3 | 110 | } |
AnnaBridge | 189:f392fc9709a3 | 111 | |
AnnaBridge | 189:f392fc9709a3 | 112 | #endif /* DEVICE_RTC */ |