mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/spi_api.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
170:19eb464bc2be 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 17 #include "spi_api.h"
<> 144:ef7eb2e8f9f7 18
<> 144:ef7eb2e8f9f7 19 #include <math.h>
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 22 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 23
<> 144:ef7eb2e8f9f7 24 static const PinMap PinMap_SPI_SCLK[] = {
<> 144:ef7eb2e8f9f7 25 {PTA15, SPI_0, 2},
<> 144:ef7eb2e8f9f7 26 {PTB9, SPI_1, 2},
<> 144:ef7eb2e8f9f7 27 {PTB11, SPI_1, 2},
<> 144:ef7eb2e8f9f7 28 {PTC5, SPI_0, 2},
<> 144:ef7eb2e8f9f7 29 {PTD1, SPI_0, 2},
<> 144:ef7eb2e8f9f7 30 {PTD5, SPI_1, 2},
<> 144:ef7eb2e8f9f7 31 {PTE2, SPI_1, 2},
<> 144:ef7eb2e8f9f7 32 {PTE17, SPI_0, 2},
<> 144:ef7eb2e8f9f7 33 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 34 };
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 static const PinMap PinMap_SPI_MOSI[] = {
<> 144:ef7eb2e8f9f7 37 {PTA16, SPI_0, 2},
<> 144:ef7eb2e8f9f7 38 {PTA17, SPI_0, 5},
<> 144:ef7eb2e8f9f7 39 {PTB16, SPI_1, 2},
<> 144:ef7eb2e8f9f7 40 {PTB17, SPI_1, 5},
<> 144:ef7eb2e8f9f7 41 {PTC6, SPI_0, 2},
<> 144:ef7eb2e8f9f7 42 {PTC7, SPI_0, 5},
<> 144:ef7eb2e8f9f7 43 {PTD2, SPI_0, 2},
<> 144:ef7eb2e8f9f7 44 {PTD3, SPI_0, 5},
<> 144:ef7eb2e8f9f7 45 {PTD6, SPI_1, 2},
<> 144:ef7eb2e8f9f7 46 {PTD7, SPI_1, 5},
<> 144:ef7eb2e8f9f7 47 {PTE1, SPI_1, 2},
<> 144:ef7eb2e8f9f7 48 {PTE3, SPI_1, 5},
<> 144:ef7eb2e8f9f7 49 {PTE18, SPI_0, 2},
<> 144:ef7eb2e8f9f7 50 {PTE19, SPI_0, 5},
<> 144:ef7eb2e8f9f7 51 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 52 };
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 static const PinMap PinMap_SPI_MISO[] = {
<> 144:ef7eb2e8f9f7 55 {PTA16, SPI_0, 5},
<> 144:ef7eb2e8f9f7 56 {PTA17, SPI_0, 2},
<> 144:ef7eb2e8f9f7 57 {PTB16, SPI_1, 5},
<> 144:ef7eb2e8f9f7 58 {PTB17, SPI_1, 2},
<> 144:ef7eb2e8f9f7 59 {PTC6, SPI_0, 5},
<> 144:ef7eb2e8f9f7 60 {PTC7, SPI_0, 2},
<> 144:ef7eb2e8f9f7 61 {PTD2, SPI_0, 5},
<> 144:ef7eb2e8f9f7 62 {PTD3, SPI_0, 2},
<> 144:ef7eb2e8f9f7 63 {PTD6, SPI_1, 5},
<> 144:ef7eb2e8f9f7 64 {PTD7, SPI_1, 2},
<> 144:ef7eb2e8f9f7 65 {PTE1, SPI_1, 5},
<> 144:ef7eb2e8f9f7 66 {PTE3, SPI_1, 2},
<> 144:ef7eb2e8f9f7 67 {PTE18, SPI_0, 5},
<> 144:ef7eb2e8f9f7 68 {PTE19, SPI_0, 2},
<> 144:ef7eb2e8f9f7 69 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 70 };
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 static const PinMap PinMap_SPI_SSEL[] = {
<> 144:ef7eb2e8f9f7 73 {PTA14, SPI_0, 2},
<> 144:ef7eb2e8f9f7 74 {PTB10, SPI_1, 2},
<> 144:ef7eb2e8f9f7 75 {PTC4, SPI_0, 2},
<> 144:ef7eb2e8f9f7 76 {PTD0, SPI_0, 2},
<> 144:ef7eb2e8f9f7 77 {PTD4, SPI_1, 2},
<> 144:ef7eb2e8f9f7 78 {PTE4, SPI_1, 2},
<> 144:ef7eb2e8f9f7 79 {PTE16, SPI_0, 2},
<> 144:ef7eb2e8f9f7 80 {NC , NC , 0}
<> 144:ef7eb2e8f9f7 81 };
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
<> 144:ef7eb2e8f9f7 84 // determine the SPI to use
<> 144:ef7eb2e8f9f7 85 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 86 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 87 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 88 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 89 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
<> 144:ef7eb2e8f9f7 90 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 obj->spi = (SPI_Type*)pinmap_merge(spi_data, spi_cntl);
<> 144:ef7eb2e8f9f7 93 MBED_ASSERT((int)obj->spi != NC);
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 // enable power and clocking
<> 144:ef7eb2e8f9f7 96 switch ((int)obj->spi) {
<> 144:ef7eb2e8f9f7 97 case SPI_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 22; break;
<> 144:ef7eb2e8f9f7 98 case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break;
<> 144:ef7eb2e8f9f7 99 }
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 // enable SPI
<> 144:ef7eb2e8f9f7 102 obj->spi->C1 |= SPI_C1_SPE_MASK;
<> 144:ef7eb2e8f9f7 103 obj->spi->C2 &= ~SPI_C2_SPIMODE_MASK; //8bit
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 // pin out the spi pins
<> 144:ef7eb2e8f9f7 106 pinmap_pinout(mosi, PinMap_SPI_MOSI);
<> 144:ef7eb2e8f9f7 107 pinmap_pinout(miso, PinMap_SPI_MISO);
<> 144:ef7eb2e8f9f7 108 pinmap_pinout(sclk, PinMap_SPI_SCLK);
<> 144:ef7eb2e8f9f7 109 if (ssel != NC) {
<> 144:ef7eb2e8f9f7 110 pinmap_pinout(ssel, PinMap_SPI_SSEL);
<> 144:ef7eb2e8f9f7 111 }
<> 144:ef7eb2e8f9f7 112 }
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 void spi_free(spi_t *obj) {
<> 144:ef7eb2e8f9f7 115 // [TODO]
<> 144:ef7eb2e8f9f7 116 }
<> 144:ef7eb2e8f9f7 117 void spi_format(spi_t *obj, int bits, int mode, int slave) {
<> 144:ef7eb2e8f9f7 118 MBED_ASSERT((bits == 8) || (bits == 16));
<> 144:ef7eb2e8f9f7 119 MBED_ASSERT((mode >= 0) && (mode <= 3));
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 uint8_t polarity = (mode & 0x2) ? 1 : 0;
<> 144:ef7eb2e8f9f7 122 uint8_t phase = (mode & 0x1) ? 1 : 0;
<> 144:ef7eb2e8f9f7 123 uint8_t c1_data = ((!slave) << 4) | (polarity << 3) | (phase << 2);
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 // clear MSTR, CPOL and CPHA bits
<> 144:ef7eb2e8f9f7 126 obj->spi->C1 &= ~(0x7 << 2);
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 // write new value
<> 144:ef7eb2e8f9f7 129 obj->spi->C1 |= c1_data;
<> 144:ef7eb2e8f9f7 130 if (bits == 8) {
<> 144:ef7eb2e8f9f7 131 obj->spi->C2 &= ~SPI_C2_SPIMODE_MASK;
<> 144:ef7eb2e8f9f7 132 } else {
<> 144:ef7eb2e8f9f7 133 obj->spi->C2 |= SPI_C2_SPIMODE_MASK;
<> 144:ef7eb2e8f9f7 134 }
<> 144:ef7eb2e8f9f7 135 }
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 void spi_frequency(spi_t *obj, int hz) {
<> 144:ef7eb2e8f9f7 138 uint32_t error = 0;
<> 144:ef7eb2e8f9f7 139 uint32_t p_error = 0xffffffff;
<> 144:ef7eb2e8f9f7 140 uint32_t ref = 0;
<> 144:ef7eb2e8f9f7 141 uint8_t spr = 0;
<> 144:ef7eb2e8f9f7 142 uint8_t ref_spr = 0;
<> 144:ef7eb2e8f9f7 143 uint8_t ref_prescaler = 0;
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 // bus clk
<> 144:ef7eb2e8f9f7 146 uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
<> 144:ef7eb2e8f9f7 147 uint8_t prescaler = 1;
<> 144:ef7eb2e8f9f7 148 uint8_t divisor = 2;
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 for (prescaler = 1; prescaler <= 8; prescaler++) {
<> 144:ef7eb2e8f9f7 151 divisor = 2;
<> 144:ef7eb2e8f9f7 152 for (spr = 0; spr <= 8; spr++, divisor *= 2) {
<> 144:ef7eb2e8f9f7 153 ref = PCLK / (prescaler*divisor);
<> 144:ef7eb2e8f9f7 154 if (ref > (uint32_t)hz)
<> 144:ef7eb2e8f9f7 155 continue;
<> 144:ef7eb2e8f9f7 156 error = hz - ref;
<> 144:ef7eb2e8f9f7 157 if (error < p_error) {
<> 144:ef7eb2e8f9f7 158 ref_spr = spr;
<> 144:ef7eb2e8f9f7 159 ref_prescaler = prescaler - 1;
<> 144:ef7eb2e8f9f7 160 p_error = error;
<> 144:ef7eb2e8f9f7 161 }
<> 144:ef7eb2e8f9f7 162 }
<> 144:ef7eb2e8f9f7 163 }
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 // set SPPR and SPR
<> 144:ef7eb2e8f9f7 166 obj->spi->BR = ((ref_prescaler & 0x7) << 4) | (ref_spr & 0xf);
<> 144:ef7eb2e8f9f7 167 }
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 static inline int spi_writeable(spi_t * obj) {
<> 144:ef7eb2e8f9f7 170 return (obj->spi->S & SPI_S_SPTEF_MASK) ? 1 : 0;
<> 144:ef7eb2e8f9f7 171 }
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 static inline int spi_readable(spi_t * obj) {
<> 144:ef7eb2e8f9f7 174 return (obj->spi->S & SPI_S_SPRF_MASK) ? 1 : 0;
<> 144:ef7eb2e8f9f7 175 }
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 int spi_master_write(spi_t *obj, int value) {
<> 144:ef7eb2e8f9f7 178 int ret;
<> 144:ef7eb2e8f9f7 179 if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) {
<> 144:ef7eb2e8f9f7 180 // 16bit
<> 144:ef7eb2e8f9f7 181 while(!spi_writeable(obj));
<> 144:ef7eb2e8f9f7 182 obj->spi->DL = (value & 0xff);
<> 144:ef7eb2e8f9f7 183 obj->spi->DH = ((value >> 8) & 0xff);
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 // wait rx buffer full
<> 144:ef7eb2e8f9f7 186 while (!spi_readable(obj));
<> 144:ef7eb2e8f9f7 187 ret = obj->spi->DH;
<> 144:ef7eb2e8f9f7 188 ret = (ret << 8) | obj->spi->DL;
<> 144:ef7eb2e8f9f7 189 } else {
<> 144:ef7eb2e8f9f7 190 //8bit
<> 144:ef7eb2e8f9f7 191 while(!spi_writeable(obj));
<> 144:ef7eb2e8f9f7 192 obj->spi->DL = (value & 0xff);
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 // wait rx buffer full
<> 144:ef7eb2e8f9f7 195 while (!spi_readable(obj));
<> 144:ef7eb2e8f9f7 196 ret = (obj->spi->DL & 0xff);
<> 144:ef7eb2e8f9f7 197 }
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 return ret;
<> 144:ef7eb2e8f9f7 200 }
<> 144:ef7eb2e8f9f7 201
Kojto 170:19eb464bc2be 202 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
Kojto 170:19eb464bc2be 203 char *rx_buffer, int rx_length, char write_fill) {
AnnaBridge 167:e84263d55307 204 int total = (tx_length > rx_length) ? tx_length : rx_length;
AnnaBridge 167:e84263d55307 205
AnnaBridge 167:e84263d55307 206 for (int i = 0; i < total; i++) {
Kojto 170:19eb464bc2be 207 char out = (i < tx_length) ? tx_buffer[i] : write_fill;
AnnaBridge 167:e84263d55307 208 char in = spi_master_write(obj, out);
AnnaBridge 167:e84263d55307 209 if (i < rx_length) {
AnnaBridge 167:e84263d55307 210 rx_buffer[i] = in;
AnnaBridge 167:e84263d55307 211 }
AnnaBridge 167:e84263d55307 212 }
AnnaBridge 167:e84263d55307 213
AnnaBridge 167:e84263d55307 214 return total;
AnnaBridge 167:e84263d55307 215 }
AnnaBridge 167:e84263d55307 216
<> 144:ef7eb2e8f9f7 217 int spi_slave_receive(spi_t *obj) {
<> 144:ef7eb2e8f9f7 218 return spi_readable(obj);
<> 144:ef7eb2e8f9f7 219 }
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221 int spi_slave_read(spi_t *obj) {
<> 144:ef7eb2e8f9f7 222 int ret;
<> 144:ef7eb2e8f9f7 223 if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) {
<> 144:ef7eb2e8f9f7 224 ret = obj->spi->DH;
<> 144:ef7eb2e8f9f7 225 ret = ((ret << 8) | obj->spi->DL);
<> 144:ef7eb2e8f9f7 226 } else {
<> 144:ef7eb2e8f9f7 227 ret = obj->spi->DL;
<> 144:ef7eb2e8f9f7 228 }
<> 144:ef7eb2e8f9f7 229 return ret;
<> 144:ef7eb2e8f9f7 230 }
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 void spi_slave_write(spi_t *obj, int value) {
<> 144:ef7eb2e8f9f7 233 while (!spi_writeable(obj));
<> 144:ef7eb2e8f9f7 234 if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) {
<> 144:ef7eb2e8f9f7 235 obj->spi->DL = (value & 0xff);
<> 144:ef7eb2e8f9f7 236 obj->spi->DH = ((value >> 8) & 0xff);
<> 144:ef7eb2e8f9f7 237 } else {
<> 144:ef7eb2e8f9f7 238 obj->spi->DL = value;
<> 144:ef7eb2e8f9f7 239 }
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 }