mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_FUTURE_SEQUANA_M0_PSA/spm_init_api.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 189:f392fc9709a3 | 1 | /* Copyright (c) 2017-2018 ARM Limited |
AnnaBridge | 189:f392fc9709a3 | 2 | * |
AnnaBridge | 189:f392fc9709a3 | 3 | * SPDX-License-Identifier: Apache-2.0 |
AnnaBridge | 189:f392fc9709a3 | 4 | * |
AnnaBridge | 189:f392fc9709a3 | 5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 189:f392fc9709a3 | 6 | * you may not use this file except in compliance with the License. |
AnnaBridge | 189:f392fc9709a3 | 7 | * You may obtain a copy of the License at |
AnnaBridge | 189:f392fc9709a3 | 8 | * |
AnnaBridge | 189:f392fc9709a3 | 9 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 189:f392fc9709a3 | 10 | * |
AnnaBridge | 189:f392fc9709a3 | 11 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 189:f392fc9709a3 | 12 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 189:f392fc9709a3 | 13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 189:f392fc9709a3 | 14 | * See the License for the specific language governing permissions and |
AnnaBridge | 189:f392fc9709a3 | 15 | * limitations under the License. |
AnnaBridge | 189:f392fc9709a3 | 16 | */ |
AnnaBridge | 189:f392fc9709a3 | 17 | |
AnnaBridge | 189:f392fc9709a3 | 18 | |
AnnaBridge | 189:f392fc9709a3 | 19 | /* -------------------------------------- Includes ----------------------------------- */ |
AnnaBridge | 189:f392fc9709a3 | 20 | |
AnnaBridge | 189:f392fc9709a3 | 21 | #include "spm_api.h" |
AnnaBridge | 189:f392fc9709a3 | 22 | |
AnnaBridge | 189:f392fc9709a3 | 23 | #include "cmsis.h" |
AnnaBridge | 189:f392fc9709a3 | 24 | #include "cyip_ipc.h" |
AnnaBridge | 189:f392fc9709a3 | 25 | #include "cy_ipc_drv.h" |
AnnaBridge | 189:f392fc9709a3 | 26 | #include "cy_syslib.h" |
AnnaBridge | 189:f392fc9709a3 | 27 | #include "cy_sysint.h" |
AnnaBridge | 189:f392fc9709a3 | 28 | |
AnnaBridge | 189:f392fc9709a3 | 29 | |
AnnaBridge | 189:f392fc9709a3 | 30 | |
AnnaBridge | 189:f392fc9709a3 | 31 | /* ------------------------------------ Definitions ---------------------------------- */ |
AnnaBridge | 189:f392fc9709a3 | 32 | |
AnnaBridge | 189:f392fc9709a3 | 33 | #define SPM_IPC_CHANNEL 8u |
AnnaBridge | 189:f392fc9709a3 | 34 | #define SPM_IPC_NOTIFY_CM0P_INTR (CY_IPC_INTR_SPARE + 2) // CM4 to CM0+ notify interrupt number |
AnnaBridge | 189:f392fc9709a3 | 35 | #define SPM_IPC_NOTIFY_CM4_INTR (CY_IPC_INTR_SPARE + 1) // CM0+ to CM4 notify interrupt number |
AnnaBridge | 189:f392fc9709a3 | 36 | |
AnnaBridge | 189:f392fc9709a3 | 37 | |
AnnaBridge | 189:f392fc9709a3 | 38 | |
AnnaBridge | 189:f392fc9709a3 | 39 | /* ---------------------------------- Static Globals --------------------------------- */ |
AnnaBridge | 189:f392fc9709a3 | 40 | |
AnnaBridge | 189:f392fc9709a3 | 41 | static IPC_STRUCT_Type *ipc_channel_handle; |
AnnaBridge | 189:f392fc9709a3 | 42 | static IPC_INTR_STRUCT_Type *ipc_interrupt_ptr; |
AnnaBridge | 189:f392fc9709a3 | 43 | |
AnnaBridge | 189:f392fc9709a3 | 44 | |
AnnaBridge | 189:f392fc9709a3 | 45 | |
AnnaBridge | 189:f392fc9709a3 | 46 | /* ------------------------ Platform's Functions Implementation ---------------------- */ |
AnnaBridge | 189:f392fc9709a3 | 47 | |
AnnaBridge | 189:f392fc9709a3 | 48 | void ipc_interrupt_handler(void) |
AnnaBridge | 189:f392fc9709a3 | 49 | { |
AnnaBridge | 189:f392fc9709a3 | 50 | // Call ARM's interrupt handler |
AnnaBridge | 189:f392fc9709a3 | 51 | spm_mailbox_irq_callback(); |
AnnaBridge | 189:f392fc9709a3 | 52 | |
AnnaBridge | 189:f392fc9709a3 | 53 | // Clear the interrupt and make a dummy read to avoid double interrupt occurrence: |
AnnaBridge | 189:f392fc9709a3 | 54 | // - The double interrupt’s triggering is caused by buffered write operations on bus |
AnnaBridge | 189:f392fc9709a3 | 55 | // - The dummy read of the status register is indeed required to make sure previous write completed before leaving ISR |
AnnaBridge | 189:f392fc9709a3 | 56 | // Note: This is a direct clear using the IPC interrupt register and not clear of an NVIC register |
AnnaBridge | 189:f392fc9709a3 | 57 | Cy_IPC_Drv_ClearInterrupt(ipc_interrupt_ptr, CY_IPC_NO_NOTIFICATION, (1uL << SPM_IPC_CHANNEL)); |
AnnaBridge | 189:f392fc9709a3 | 58 | } |
AnnaBridge | 189:f392fc9709a3 | 59 | |
AnnaBridge | 189:f392fc9709a3 | 60 | void mailbox_init(void) |
AnnaBridge | 189:f392fc9709a3 | 61 | { |
AnnaBridge | 189:f392fc9709a3 | 62 | // Interrupts configuration for CM0+ |
AnnaBridge | 189:f392fc9709a3 | 63 | // * See ce216795_common.h for occupied interrupts |
AnnaBridge | 189:f392fc9709a3 | 64 | // ----------------------------------------------- |
AnnaBridge | 189:f392fc9709a3 | 65 | |
AnnaBridge | 189:f392fc9709a3 | 66 | // Configure interrupts ISR / MUX and priority |
AnnaBridge | 189:f392fc9709a3 | 67 | cy_stc_sysint_t ipc_intr_Config; |
AnnaBridge | 189:f392fc9709a3 | 68 | ipc_intr_Config.intrSrc = (IRQn_Type)NvicMux3_IRQn; // Can be any Mux we choose |
AnnaBridge | 189:f392fc9709a3 | 69 | ipc_intr_Config.cm0pSrc = (cy_en_intr_t)cpuss_interrupts_ipc_0_IRQn + SPM_IPC_NOTIFY_CM0P_INTR; // Must match the interrupt we trigger using NOTIFY on CM4 |
AnnaBridge | 189:f392fc9709a3 | 70 | ipc_intr_Config.intrPriority = 1; |
AnnaBridge | 189:f392fc9709a3 | 71 | (void)Cy_SysInt_Init(&ipc_intr_Config, ipc_interrupt_handler); |
AnnaBridge | 189:f392fc9709a3 | 72 | |
AnnaBridge | 189:f392fc9709a3 | 73 | // Set specific NOTIFY interrupt mask only. |
AnnaBridge | 189:f392fc9709a3 | 74 | // Only the interrupt sources with their masks enabled can trigger the interrupt. |
AnnaBridge | 189:f392fc9709a3 | 75 | ipc_interrupt_ptr = Cy_IPC_Drv_GetIntrBaseAddr(SPM_IPC_NOTIFY_CM0P_INTR); |
AnnaBridge | 189:f392fc9709a3 | 76 | CY_ASSERT(ipc_interrupt_ptr != NULL); |
AnnaBridge | 189:f392fc9709a3 | 77 | Cy_IPC_Drv_SetInterruptMask(ipc_interrupt_ptr, 0x0, 1 << SPM_IPC_CHANNEL); |
AnnaBridge | 189:f392fc9709a3 | 78 | |
AnnaBridge | 189:f392fc9709a3 | 79 | // Enable the interrupt |
AnnaBridge | 189:f392fc9709a3 | 80 | NVIC_EnableIRQ(ipc_intr_Config.intrSrc); |
AnnaBridge | 189:f392fc9709a3 | 81 | |
AnnaBridge | 189:f392fc9709a3 | 82 | ipc_channel_handle = Cy_IPC_Drv_GetIpcBaseAddress(SPM_IPC_CHANNEL); |
AnnaBridge | 189:f392fc9709a3 | 83 | CY_ASSERT(ipc_channel_handle != NULL); |
AnnaBridge | 189:f392fc9709a3 | 84 | } |
AnnaBridge | 189:f392fc9709a3 | 85 | |
AnnaBridge | 189:f392fc9709a3 | 86 | |
AnnaBridge | 189:f392fc9709a3 | 87 | |
AnnaBridge | 189:f392fc9709a3 | 88 | /* -------------------------------------- HAL API ------------------------------------ */ |
AnnaBridge | 189:f392fc9709a3 | 89 | |
AnnaBridge | 189:f392fc9709a3 | 90 | void spm_hal_mailbox_notify(void) |
AnnaBridge | 189:f392fc9709a3 | 91 | { |
AnnaBridge | 189:f392fc9709a3 | 92 | CY_ASSERT(ipc_channel_handle != NULL); |
AnnaBridge | 189:f392fc9709a3 | 93 | Cy_IPC_Drv_AcquireNotify(ipc_channel_handle, (1uL << SPM_IPC_NOTIFY_CM4_INTR)); |
AnnaBridge | 189:f392fc9709a3 | 94 | } |