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mbed library sources. Supersedes mbed-src.

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targets/TARGET_Cypress/TARGET_PSOC6/gpio_irq_api.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 188:bcfe06ba3d64 1 /*
AnnaBridge 188:bcfe06ba3d64 2 * mbed Microcontroller Library
AnnaBridge 188:bcfe06ba3d64 3 * Copyright (c) 2017-2018 Future Electronics
AnnaBridge 189:f392fc9709a3 4 * Copyright (c) 2018-2019 Cypress Semiconductor Corporation
AnnaBridge 189:f392fc9709a3 5 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 188:bcfe06ba3d64 6 *
AnnaBridge 188:bcfe06ba3d64 7 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 188:bcfe06ba3d64 8 * you may not use this file except in compliance with the License.
AnnaBridge 188:bcfe06ba3d64 9 * You may obtain a copy of the License at
AnnaBridge 188:bcfe06ba3d64 10 *
AnnaBridge 188:bcfe06ba3d64 11 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 188:bcfe06ba3d64 12 *
AnnaBridge 188:bcfe06ba3d64 13 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 188:bcfe06ba3d64 14 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 188:bcfe06ba3d64 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 188:bcfe06ba3d64 16 * See the License for the specific language governing permissions and
AnnaBridge 188:bcfe06ba3d64 17 * limitations under the License.
AnnaBridge 188:bcfe06ba3d64 18 */
AnnaBridge 188:bcfe06ba3d64 19
AnnaBridge 188:bcfe06ba3d64 20 #include "cmsis.h"
AnnaBridge 188:bcfe06ba3d64 21 #include "device.h"
AnnaBridge 188:bcfe06ba3d64 22 #include "mbed_assert.h"
AnnaBridge 188:bcfe06ba3d64 23 #include "gpio_object.h"
AnnaBridge 188:bcfe06ba3d64 24 #include "gpio_irq_api.h"
AnnaBridge 188:bcfe06ba3d64 25 #include "psoc6_utils.h"
AnnaBridge 188:bcfe06ba3d64 26 #include "cy_sysint.h"
AnnaBridge 188:bcfe06ba3d64 27
AnnaBridge 188:bcfe06ba3d64 28
AnnaBridge 188:bcfe06ba3d64 29 #define NUM_GPIO_PORTS IOSS_GPIO_GPIO_PORT_NR
AnnaBridge 188:bcfe06ba3d64 30 #define NUM_GPIO_PORT_PINS 8
AnnaBridge 188:bcfe06ba3d64 31 #define GPIO_DEFAULT_IRQ_PRIORITY 5
AnnaBridge 188:bcfe06ba3d64 32
AnnaBridge 188:bcfe06ba3d64 33 static gpio_irq_t *irq_objects[NUM_GPIO_PORTS][NUM_GPIO_PORT_PINS] = {NULL};
AnnaBridge 188:bcfe06ba3d64 34
AnnaBridge 188:bcfe06ba3d64 35 typedef struct irq_port_info_s {
AnnaBridge 188:bcfe06ba3d64 36 IRQn_Type irqn;
AnnaBridge 188:bcfe06ba3d64 37 uint32_t pin_mask;
AnnaBridge 188:bcfe06ba3d64 38 } irq_port_info_t;
AnnaBridge 188:bcfe06ba3d64 39
AnnaBridge 188:bcfe06ba3d64 40 static irq_port_info_t irq_port_usage[NUM_GPIO_PORTS] = {{0, 0},};
AnnaBridge 188:bcfe06ba3d64 41
AnnaBridge 188:bcfe06ba3d64 42 static void gpio_irq_dispatcher(uint32_t port_id)
AnnaBridge 188:bcfe06ba3d64 43 {
AnnaBridge 188:bcfe06ba3d64 44 uint32_t pin;
AnnaBridge 188:bcfe06ba3d64 45 gpio_irq_event event;
AnnaBridge 188:bcfe06ba3d64 46 GPIO_PRT_Type *port = Cy_GPIO_PortToAddr(port_id);
AnnaBridge 188:bcfe06ba3d64 47
AnnaBridge 188:bcfe06ba3d64 48 for (pin = 0; pin < NUM_GPIO_PORT_PINS; ++pin) {
AnnaBridge 188:bcfe06ba3d64 49 if (Cy_GPIO_GetInterruptStatusMasked(port, pin)) {
AnnaBridge 188:bcfe06ba3d64 50 gpio_irq_t *obj = irq_objects[port_id][pin];
AnnaBridge 188:bcfe06ba3d64 51 MBED_ASSERT(obj);
AnnaBridge 188:bcfe06ba3d64 52 Cy_GPIO_ClearInterrupt(port, pin);
AnnaBridge 189:f392fc9709a3 53 /* event = (obj->mode == IRQ_FALL)? IRQ_FALL : IRQ_RISE; */
AnnaBridge 189:f392fc9709a3 54
AnnaBridge 189:f392fc9709a3 55 /* Read pin to determine the edge to support "both" mode */
AnnaBridge 189:f392fc9709a3 56 event = (0UL != Cy_GPIO_Read(port, pin)) ? IRQ_RISE : IRQ_FALL;
AnnaBridge 189:f392fc9709a3 57 if (0UL == (obj->mode & event)) {
AnnaBridge 189:f392fc9709a3 58 /* In case of very short pulse, actually both edges are occurred, so indicating only the supported one */
AnnaBridge 189:f392fc9709a3 59 event = obj->mode;
AnnaBridge 189:f392fc9709a3 60 } /* Otherwise the determined edge is supported (0UL != (obj->mode & event)), so indicating it as is */
AnnaBridge 189:f392fc9709a3 61
AnnaBridge 188:bcfe06ba3d64 62 obj->handler(obj->id_arg, event);
AnnaBridge 188:bcfe06ba3d64 63 }
AnnaBridge 188:bcfe06ba3d64 64 }
AnnaBridge 188:bcfe06ba3d64 65 }
AnnaBridge 188:bcfe06ba3d64 66
AnnaBridge 188:bcfe06ba3d64 67 static void gpio_irq_dispatcher_port0(void)
AnnaBridge 188:bcfe06ba3d64 68 {
AnnaBridge 188:bcfe06ba3d64 69 gpio_irq_dispatcher(0);
AnnaBridge 188:bcfe06ba3d64 70 }
AnnaBridge 188:bcfe06ba3d64 71
AnnaBridge 188:bcfe06ba3d64 72 static void gpio_irq_dispatcher_port1(void)
AnnaBridge 188:bcfe06ba3d64 73 {
AnnaBridge 188:bcfe06ba3d64 74 gpio_irq_dispatcher(1);
AnnaBridge 188:bcfe06ba3d64 75 }
AnnaBridge 188:bcfe06ba3d64 76
AnnaBridge 188:bcfe06ba3d64 77 static void gpio_irq_dispatcher_port2(void)
AnnaBridge 188:bcfe06ba3d64 78 {
AnnaBridge 188:bcfe06ba3d64 79 gpio_irq_dispatcher(2);
AnnaBridge 188:bcfe06ba3d64 80 }
AnnaBridge 188:bcfe06ba3d64 81
AnnaBridge 188:bcfe06ba3d64 82 static void gpio_irq_dispatcher_port3(void)
AnnaBridge 188:bcfe06ba3d64 83 {
AnnaBridge 188:bcfe06ba3d64 84 gpio_irq_dispatcher(3);
AnnaBridge 188:bcfe06ba3d64 85 }
AnnaBridge 188:bcfe06ba3d64 86
AnnaBridge 188:bcfe06ba3d64 87 static void gpio_irq_dispatcher_port4(void)
AnnaBridge 188:bcfe06ba3d64 88 {
AnnaBridge 188:bcfe06ba3d64 89 gpio_irq_dispatcher(4);
AnnaBridge 188:bcfe06ba3d64 90 }
AnnaBridge 188:bcfe06ba3d64 91
AnnaBridge 188:bcfe06ba3d64 92 static void gpio_irq_dispatcher_port5(void)
AnnaBridge 188:bcfe06ba3d64 93 {
AnnaBridge 188:bcfe06ba3d64 94 gpio_irq_dispatcher(5);
AnnaBridge 188:bcfe06ba3d64 95 }
AnnaBridge 188:bcfe06ba3d64 96
AnnaBridge 188:bcfe06ba3d64 97 static void gpio_irq_dispatcher_port6(void)
AnnaBridge 188:bcfe06ba3d64 98 {
AnnaBridge 188:bcfe06ba3d64 99 gpio_irq_dispatcher(6);
AnnaBridge 188:bcfe06ba3d64 100 }
AnnaBridge 188:bcfe06ba3d64 101
AnnaBridge 188:bcfe06ba3d64 102 static void gpio_irq_dispatcher_port7(void)
AnnaBridge 188:bcfe06ba3d64 103 {
AnnaBridge 188:bcfe06ba3d64 104 gpio_irq_dispatcher(7);
AnnaBridge 188:bcfe06ba3d64 105 }
AnnaBridge 188:bcfe06ba3d64 106
AnnaBridge 188:bcfe06ba3d64 107 static void gpio_irq_dispatcher_port8(void)
AnnaBridge 188:bcfe06ba3d64 108 {
AnnaBridge 188:bcfe06ba3d64 109 gpio_irq_dispatcher(8);
AnnaBridge 188:bcfe06ba3d64 110 }
AnnaBridge 188:bcfe06ba3d64 111
AnnaBridge 188:bcfe06ba3d64 112 static void gpio_irq_dispatcher_port9(void)
AnnaBridge 188:bcfe06ba3d64 113 {
AnnaBridge 188:bcfe06ba3d64 114 gpio_irq_dispatcher(9);
AnnaBridge 188:bcfe06ba3d64 115 }
AnnaBridge 188:bcfe06ba3d64 116
AnnaBridge 188:bcfe06ba3d64 117 static void gpio_irq_dispatcher_port10(void)
AnnaBridge 188:bcfe06ba3d64 118 {
AnnaBridge 188:bcfe06ba3d64 119 gpio_irq_dispatcher(10);
AnnaBridge 188:bcfe06ba3d64 120 }
AnnaBridge 188:bcfe06ba3d64 121
AnnaBridge 188:bcfe06ba3d64 122 static void gpio_irq_dispatcher_port11(void)
AnnaBridge 188:bcfe06ba3d64 123 {
AnnaBridge 188:bcfe06ba3d64 124 gpio_irq_dispatcher(11);
AnnaBridge 188:bcfe06ba3d64 125 }
AnnaBridge 188:bcfe06ba3d64 126
AnnaBridge 188:bcfe06ba3d64 127 static void gpio_irq_dispatcher_port12(void)
AnnaBridge 188:bcfe06ba3d64 128 {
AnnaBridge 188:bcfe06ba3d64 129 gpio_irq_dispatcher(12);
AnnaBridge 188:bcfe06ba3d64 130 }
AnnaBridge 188:bcfe06ba3d64 131
AnnaBridge 188:bcfe06ba3d64 132 static void gpio_irq_dispatcher_port13(void)
AnnaBridge 188:bcfe06ba3d64 133 {
AnnaBridge 188:bcfe06ba3d64 134 gpio_irq_dispatcher(13);
AnnaBridge 188:bcfe06ba3d64 135 }
AnnaBridge 188:bcfe06ba3d64 136
AnnaBridge 188:bcfe06ba3d64 137 static void gpio_irq_dispatcher_port14(void)
AnnaBridge 188:bcfe06ba3d64 138 {
AnnaBridge 188:bcfe06ba3d64 139 gpio_irq_dispatcher(14);
AnnaBridge 188:bcfe06ba3d64 140 }
AnnaBridge 188:bcfe06ba3d64 141
AnnaBridge 188:bcfe06ba3d64 142 static void (*irq_dispatcher_table[])(void) = {
AnnaBridge 188:bcfe06ba3d64 143 gpio_irq_dispatcher_port0,
AnnaBridge 188:bcfe06ba3d64 144 gpio_irq_dispatcher_port1,
AnnaBridge 188:bcfe06ba3d64 145 gpio_irq_dispatcher_port2,
AnnaBridge 188:bcfe06ba3d64 146 gpio_irq_dispatcher_port3,
AnnaBridge 188:bcfe06ba3d64 147 gpio_irq_dispatcher_port4,
AnnaBridge 188:bcfe06ba3d64 148 gpio_irq_dispatcher_port5,
AnnaBridge 188:bcfe06ba3d64 149 gpio_irq_dispatcher_port6,
AnnaBridge 188:bcfe06ba3d64 150 gpio_irq_dispatcher_port7,
AnnaBridge 188:bcfe06ba3d64 151 gpio_irq_dispatcher_port8,
AnnaBridge 188:bcfe06ba3d64 152 gpio_irq_dispatcher_port9,
AnnaBridge 188:bcfe06ba3d64 153 gpio_irq_dispatcher_port10,
AnnaBridge 188:bcfe06ba3d64 154 gpio_irq_dispatcher_port11,
AnnaBridge 188:bcfe06ba3d64 155 gpio_irq_dispatcher_port12,
AnnaBridge 188:bcfe06ba3d64 156 gpio_irq_dispatcher_port13,
AnnaBridge 188:bcfe06ba3d64 157 gpio_irq_dispatcher_port14
AnnaBridge 188:bcfe06ba3d64 158 };
AnnaBridge 188:bcfe06ba3d64 159
AnnaBridge 188:bcfe06ba3d64 160
AnnaBridge 188:bcfe06ba3d64 161 static IRQn_Type gpio_irq_allocate_channel(gpio_irq_t *obj)
AnnaBridge 188:bcfe06ba3d64 162 {
AnnaBridge 188:bcfe06ba3d64 163 #if defined (TARGET_MCU_PSOC6_M0)
AnnaBridge 188:bcfe06ba3d64 164 obj->cm0p_irq_src = ioss_interrupts_gpio_0_IRQn + obj->port_id;
AnnaBridge 188:bcfe06ba3d64 165 return cy_m0_nvic_allocate_channel(CY_GPIO_IRQN_ID + obj->port_id);
AnnaBridge 188:bcfe06ba3d64 166 #else
AnnaBridge 188:bcfe06ba3d64 167 return (IRQn_Type)(ioss_interrupts_gpio_0_IRQn + obj->port_id);
AnnaBridge 188:bcfe06ba3d64 168 #endif // M0
AnnaBridge 188:bcfe06ba3d64 169 }
AnnaBridge 188:bcfe06ba3d64 170
AnnaBridge 188:bcfe06ba3d64 171 static void gpio_irq_release_channel(IRQn_Type channel, uint32_t port_id)
AnnaBridge 188:bcfe06ba3d64 172 {
AnnaBridge 188:bcfe06ba3d64 173 #if defined (TARGET_MCU_PSOC6_M0)
AnnaBridge 188:bcfe06ba3d64 174 cy_m0_nvic_release_channel(channel, CY_GPIO_IRQN_ID + port_id);
AnnaBridge 188:bcfe06ba3d64 175 #endif //M0
AnnaBridge 188:bcfe06ba3d64 176 }
AnnaBridge 188:bcfe06ba3d64 177
AnnaBridge 188:bcfe06ba3d64 178 static int gpio_irq_setup_channel(gpio_irq_t *obj)
AnnaBridge 188:bcfe06ba3d64 179 {
AnnaBridge 188:bcfe06ba3d64 180 cy_stc_sysint_t irq_config;
AnnaBridge 188:bcfe06ba3d64 181
AnnaBridge 188:bcfe06ba3d64 182 if (irq_port_usage[obj->port_id].pin_mask == 0) {
AnnaBridge 188:bcfe06ba3d64 183 IRQn_Type irqn = gpio_irq_allocate_channel(obj);
AnnaBridge 188:bcfe06ba3d64 184 if (irqn < 0) {
AnnaBridge 188:bcfe06ba3d64 185 return (-1);
AnnaBridge 188:bcfe06ba3d64 186 }
AnnaBridge 188:bcfe06ba3d64 187 irq_port_usage[obj->port_id].irqn = irqn;
AnnaBridge 188:bcfe06ba3d64 188 // Configure NVIC
AnnaBridge 188:bcfe06ba3d64 189 irq_config.intrPriority = GPIO_DEFAULT_IRQ_PRIORITY;
AnnaBridge 188:bcfe06ba3d64 190 irq_config.intrSrc = irqn;
AnnaBridge 188:bcfe06ba3d64 191 #if defined (TARGET_MCU_PSOC6_M0)
AnnaBridge 188:bcfe06ba3d64 192 irq_config.cm0pSrc = obj->cm0p_irq_src;
AnnaBridge 188:bcfe06ba3d64 193 #endif
AnnaBridge 188:bcfe06ba3d64 194 if (Cy_SysInt_Init(&irq_config, irq_dispatcher_table[obj->port_id]) != CY_SYSINT_SUCCESS) {
AnnaBridge 189:f392fc9709a3 195 return (-1);
AnnaBridge 188:bcfe06ba3d64 196 }
AnnaBridge 188:bcfe06ba3d64 197
AnnaBridge 188:bcfe06ba3d64 198 irq_port_usage[obj->port_id].pin_mask |= (1 << obj->pin);
AnnaBridge 189:f392fc9709a3 199 gpio_irq_enable(obj);
AnnaBridge 188:bcfe06ba3d64 200 NVIC_EnableIRQ(irqn);
AnnaBridge 188:bcfe06ba3d64 201 }
AnnaBridge 188:bcfe06ba3d64 202
AnnaBridge 188:bcfe06ba3d64 203 return 0;
AnnaBridge 188:bcfe06ba3d64 204 }
AnnaBridge 188:bcfe06ba3d64 205
AnnaBridge 188:bcfe06ba3d64 206 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
AnnaBridge 188:bcfe06ba3d64 207 {
AnnaBridge 188:bcfe06ba3d64 208 if (pin != NC) {
AnnaBridge 188:bcfe06ba3d64 209 obj->port_id = CY_PORT(pin);
AnnaBridge 188:bcfe06ba3d64 210 obj->port = Cy_GPIO_PortToAddr(obj->port_id);
AnnaBridge 188:bcfe06ba3d64 211 obj->pin = CY_PIN(pin);
AnnaBridge 188:bcfe06ba3d64 212 if (obj->pin > NUM_GPIO_PORT_PINS) {
AnnaBridge 188:bcfe06ba3d64 213 MBED_ASSERT("Invalid pin ID!");
AnnaBridge 188:bcfe06ba3d64 214 return (-1);
AnnaBridge 188:bcfe06ba3d64 215 }
AnnaBridge 188:bcfe06ba3d64 216 obj->handler = handler;
AnnaBridge 188:bcfe06ba3d64 217 obj->id_arg = id;
AnnaBridge 189:f392fc9709a3 218 /* Save reference to current object */
AnnaBridge 189:f392fc9709a3 219 irq_objects[obj->port_id][obj->pin] = obj;
AnnaBridge 189:f392fc9709a3 220
AnnaBridge 188:bcfe06ba3d64 221 return gpio_irq_setup_channel(obj);
AnnaBridge 188:bcfe06ba3d64 222 } else {
AnnaBridge 188:bcfe06ba3d64 223 return (-1);
AnnaBridge 188:bcfe06ba3d64 224 }
AnnaBridge 188:bcfe06ba3d64 225 }
AnnaBridge 188:bcfe06ba3d64 226
AnnaBridge 188:bcfe06ba3d64 227 void gpio_irq_free(gpio_irq_t *obj)
AnnaBridge 188:bcfe06ba3d64 228 {
AnnaBridge 188:bcfe06ba3d64 229 gpio_irq_disable(obj);
AnnaBridge 188:bcfe06ba3d64 230 // TODO: Need atomicity for the following operations.
AnnaBridge 188:bcfe06ba3d64 231 NVIC_DisableIRQ(irq_port_usage[obj->port_id].irqn);
AnnaBridge 188:bcfe06ba3d64 232 irq_port_usage[obj->port_id].pin_mask &= ~(1 << obj->pin);
AnnaBridge 188:bcfe06ba3d64 233 if (irq_port_usage[obj->port_id].pin_mask == 0) {
AnnaBridge 188:bcfe06ba3d64 234 gpio_irq_release_channel(irq_port_usage[obj->port_id].irqn, obj->port_id);
AnnaBridge 188:bcfe06ba3d64 235 return;
AnnaBridge 188:bcfe06ba3d64 236 }
AnnaBridge 188:bcfe06ba3d64 237 NVIC_EnableIRQ(irq_port_usage[obj->port_id].irqn);
AnnaBridge 188:bcfe06ba3d64 238 }
AnnaBridge 188:bcfe06ba3d64 239
AnnaBridge 188:bcfe06ba3d64 240 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
AnnaBridge 188:bcfe06ba3d64 241 {
AnnaBridge 188:bcfe06ba3d64 242 if (enable) {
AnnaBridge 188:bcfe06ba3d64 243 if (event == IRQ_RISE) {
AnnaBridge 188:bcfe06ba3d64 244 if (obj->mode == IRQ_FALL) {
AnnaBridge 188:bcfe06ba3d64 245 obj->mode += IRQ_RISE;
AnnaBridge 188:bcfe06ba3d64 246 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_BOTH);
AnnaBridge 188:bcfe06ba3d64 247 } else {
AnnaBridge 188:bcfe06ba3d64 248 obj->mode = IRQ_RISE;
AnnaBridge 188:bcfe06ba3d64 249 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_RISING);
AnnaBridge 188:bcfe06ba3d64 250 }
AnnaBridge 188:bcfe06ba3d64 251 } else if (event == IRQ_FALL) {
AnnaBridge 188:bcfe06ba3d64 252 if (obj->mode == IRQ_RISE) {
AnnaBridge 188:bcfe06ba3d64 253 obj->mode += IRQ_FALL;
AnnaBridge 188:bcfe06ba3d64 254 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_BOTH);
AnnaBridge 188:bcfe06ba3d64 255 } else {
AnnaBridge 188:bcfe06ba3d64 256 obj->mode = IRQ_FALL;
AnnaBridge 188:bcfe06ba3d64 257 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_FALLING);
AnnaBridge 188:bcfe06ba3d64 258 }
AnnaBridge 188:bcfe06ba3d64 259 } else {
AnnaBridge 188:bcfe06ba3d64 260 obj->mode = IRQ_NONE;
AnnaBridge 188:bcfe06ba3d64 261 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_DISABLE);
AnnaBridge 188:bcfe06ba3d64 262 }
AnnaBridge 188:bcfe06ba3d64 263 } else if (obj->mode != IRQ_NONE) {
AnnaBridge 188:bcfe06ba3d64 264 if (event == IRQ_RISE) {
AnnaBridge 188:bcfe06ba3d64 265 if (obj->mode == IRQ_RISE) {
AnnaBridge 188:bcfe06ba3d64 266 obj->mode = IRQ_NONE;
AnnaBridge 188:bcfe06ba3d64 267 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_DISABLE);
AnnaBridge 188:bcfe06ba3d64 268 } else {
AnnaBridge 188:bcfe06ba3d64 269 obj->mode = IRQ_FALL;
AnnaBridge 188:bcfe06ba3d64 270 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_FALLING);
AnnaBridge 188:bcfe06ba3d64 271 }
AnnaBridge 188:bcfe06ba3d64 272 } else if (event == IRQ_FALL) {
AnnaBridge 188:bcfe06ba3d64 273 if (obj->mode == IRQ_FALL) {
AnnaBridge 188:bcfe06ba3d64 274 obj->mode = IRQ_NONE;
AnnaBridge 188:bcfe06ba3d64 275 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_DISABLE);
AnnaBridge 188:bcfe06ba3d64 276 } else {
AnnaBridge 188:bcfe06ba3d64 277 obj->mode = IRQ_RISE;
AnnaBridge 188:bcfe06ba3d64 278 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_RISING);
AnnaBridge 188:bcfe06ba3d64 279 }
AnnaBridge 188:bcfe06ba3d64 280 } else {
AnnaBridge 188:bcfe06ba3d64 281 obj->mode = IRQ_NONE;
AnnaBridge 188:bcfe06ba3d64 282 Cy_GPIO_SetInterruptEdge(obj->port, obj->pin, CY_GPIO_INTR_DISABLE);
AnnaBridge 188:bcfe06ba3d64 283 }
AnnaBridge 188:bcfe06ba3d64 284 }
AnnaBridge 188:bcfe06ba3d64 285 }
AnnaBridge 188:bcfe06ba3d64 286
AnnaBridge 188:bcfe06ba3d64 287 void gpio_irq_enable(gpio_irq_t *obj)
AnnaBridge 188:bcfe06ba3d64 288 {
AnnaBridge 188:bcfe06ba3d64 289 Cy_GPIO_SetInterruptMask(obj->port, obj->pin, 1);
AnnaBridge 188:bcfe06ba3d64 290 }
AnnaBridge 188:bcfe06ba3d64 291
AnnaBridge 188:bcfe06ba3d64 292 void gpio_irq_disable(gpio_irq_t *obj)
AnnaBridge 188:bcfe06ba3d64 293 {
AnnaBridge 188:bcfe06ba3d64 294 Cy_GPIO_SetInterruptMask(obj->port, obj->pin, 0);
AnnaBridge 188:bcfe06ba3d64 295 }
AnnaBridge 188:bcfe06ba3d64 296