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mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/GeneratedSource/cycfg_pins.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /*******************************************************************************
AnnaBridge 189:f392fc9709a3 2 * File Name: cycfg_pins.c
AnnaBridge 189:f392fc9709a3 3 *
AnnaBridge 189:f392fc9709a3 4 * Description:
AnnaBridge 189:f392fc9709a3 5 * Pin configuration
AnnaBridge 189:f392fc9709a3 6 * This file was automatically generated and should not be modified.
AnnaBridge 189:f392fc9709a3 7 *
AnnaBridge 189:f392fc9709a3 8 ********************************************************************************
AnnaBridge 189:f392fc9709a3 9 * Copyright 2017-2019 Cypress Semiconductor Corporation
AnnaBridge 189:f392fc9709a3 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 189:f392fc9709a3 11 *
AnnaBridge 189:f392fc9709a3 12 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 189:f392fc9709a3 13 * you may not use this file except in compliance with the License.
AnnaBridge 189:f392fc9709a3 14 * You may obtain a copy of the License at
AnnaBridge 189:f392fc9709a3 15 *
AnnaBridge 189:f392fc9709a3 16 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 189:f392fc9709a3 17 *
AnnaBridge 189:f392fc9709a3 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 189:f392fc9709a3 19 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 189:f392fc9709a3 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 189:f392fc9709a3 21 * See the License for the specific language governing permissions and
AnnaBridge 189:f392fc9709a3 22 * limitations under the License.
AnnaBridge 189:f392fc9709a3 23 ********************************************************************************/
AnnaBridge 189:f392fc9709a3 24
AnnaBridge 189:f392fc9709a3 25 #include "cycfg_pins.h"
AnnaBridge 189:f392fc9709a3 26
AnnaBridge 189:f392fc9709a3 27 const cy_stc_gpio_pin_config_t WCO_IN_config =
AnnaBridge 189:f392fc9709a3 28 {
AnnaBridge 189:f392fc9709a3 29 .outVal = 1,
AnnaBridge 189:f392fc9709a3 30 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 31 .hsiom = WCO_IN_HSIOM,
AnnaBridge 189:f392fc9709a3 32 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 33 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 34 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 35 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 36 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 37 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 38 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 39 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 40 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 41 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 42 };
AnnaBridge 189:f392fc9709a3 43 const cy_stc_gpio_pin_config_t WCO_OUT_config =
AnnaBridge 189:f392fc9709a3 44 {
AnnaBridge 189:f392fc9709a3 45 .outVal = 1,
AnnaBridge 189:f392fc9709a3 46 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 47 .hsiom = WCO_OUT_HSIOM,
AnnaBridge 189:f392fc9709a3 48 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 49 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 50 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 51 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 52 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 53 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 54 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 55 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 56 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 57 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 58 };
AnnaBridge 189:f392fc9709a3 59 const cy_stc_gpio_pin_config_t LED_RED_config =
AnnaBridge 189:f392fc9709a3 60 {
AnnaBridge 189:f392fc9709a3 61 .outVal = 1,
AnnaBridge 189:f392fc9709a3 62 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 63 .hsiom = LED_RED_HSIOM,
AnnaBridge 189:f392fc9709a3 64 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 65 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 66 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 67 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 68 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 69 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 70 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 71 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 72 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 73 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 74 };
AnnaBridge 189:f392fc9709a3 75 const cy_stc_gpio_pin_config_t SW2_config =
AnnaBridge 189:f392fc9709a3 76 {
AnnaBridge 189:f392fc9709a3 77 .outVal = 1,
AnnaBridge 189:f392fc9709a3 78 .driveMode = CY_GPIO_DM_PULLUP,
AnnaBridge 189:f392fc9709a3 79 .hsiom = SW2_HSIOM,
AnnaBridge 189:f392fc9709a3 80 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 81 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 82 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 83 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 84 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 85 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 86 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 87 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 88 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 89 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 90 };
AnnaBridge 189:f392fc9709a3 91 const cy_stc_gpio_pin_config_t LED_BLUE_config =
AnnaBridge 189:f392fc9709a3 92 {
AnnaBridge 189:f392fc9709a3 93 .outVal = 1,
AnnaBridge 189:f392fc9709a3 94 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 95 .hsiom = LED_BLUE_HSIOM,
AnnaBridge 189:f392fc9709a3 96 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 97 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 98 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 99 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 100 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 101 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 102 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 103 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 104 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 105 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 106 };
AnnaBridge 189:f392fc9709a3 107 const cy_stc_gpio_pin_config_t QSPI_SS0_config =
AnnaBridge 189:f392fc9709a3 108 {
AnnaBridge 189:f392fc9709a3 109 .outVal = 1,
AnnaBridge 189:f392fc9709a3 110 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 111 .hsiom = QSPI_SS0_HSIOM,
AnnaBridge 189:f392fc9709a3 112 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 113 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 114 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 115 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 116 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 117 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 118 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 119 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 120 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 121 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 122 };
AnnaBridge 189:f392fc9709a3 123 const cy_stc_gpio_pin_config_t QSPI_DATA3_config =
AnnaBridge 189:f392fc9709a3 124 {
AnnaBridge 189:f392fc9709a3 125 .outVal = 1,
AnnaBridge 189:f392fc9709a3 126 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 127 .hsiom = QSPI_DATA3_HSIOM,
AnnaBridge 189:f392fc9709a3 128 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 129 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 130 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 131 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 132 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 133 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 134 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 135 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 136 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 137 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 138 };
AnnaBridge 189:f392fc9709a3 139 const cy_stc_gpio_pin_config_t QSPI_DATA2_config =
AnnaBridge 189:f392fc9709a3 140 {
AnnaBridge 189:f392fc9709a3 141 .outVal = 1,
AnnaBridge 189:f392fc9709a3 142 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 143 .hsiom = QSPI_DATA2_HSIOM,
AnnaBridge 189:f392fc9709a3 144 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 145 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 146 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 147 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 148 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 149 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 150 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 151 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 152 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 153 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 154 };
AnnaBridge 189:f392fc9709a3 155 const cy_stc_gpio_pin_config_t QSPI_DATA1_config =
AnnaBridge 189:f392fc9709a3 156 {
AnnaBridge 189:f392fc9709a3 157 .outVal = 1,
AnnaBridge 189:f392fc9709a3 158 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 159 .hsiom = QSPI_DATA1_HSIOM,
AnnaBridge 189:f392fc9709a3 160 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 161 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 162 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 163 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 164 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 165 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 166 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 167 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 168 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 169 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 170 };
AnnaBridge 189:f392fc9709a3 171 const cy_stc_gpio_pin_config_t QSPI_DATA0_config =
AnnaBridge 189:f392fc9709a3 172 {
AnnaBridge 189:f392fc9709a3 173 .outVal = 1,
AnnaBridge 189:f392fc9709a3 174 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 175 .hsiom = QSPI_DATA0_HSIOM,
AnnaBridge 189:f392fc9709a3 176 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 177 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 178 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 179 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 180 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 181 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 182 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 183 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 184 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 185 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 186 };
AnnaBridge 189:f392fc9709a3 187 const cy_stc_gpio_pin_config_t QSPI_SPI_CLOCK_config =
AnnaBridge 189:f392fc9709a3 188 {
AnnaBridge 189:f392fc9709a3 189 .outVal = 1,
AnnaBridge 189:f392fc9709a3 190 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 191 .hsiom = QSPI_SPI_CLOCK_HSIOM,
AnnaBridge 189:f392fc9709a3 192 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 193 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 194 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 195 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 196 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 197 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 198 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 199 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 200 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 201 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 202 };
AnnaBridge 189:f392fc9709a3 203 const cy_stc_gpio_pin_config_t LED9_config =
AnnaBridge 189:f392fc9709a3 204 {
AnnaBridge 189:f392fc9709a3 205 .outVal = 1,
AnnaBridge 189:f392fc9709a3 206 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 207 .hsiom = LED9_HSIOM,
AnnaBridge 189:f392fc9709a3 208 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 209 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 210 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 211 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 212 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 213 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 214 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 215 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 216 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 217 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 218 };
AnnaBridge 189:f392fc9709a3 219 const cy_stc_gpio_pin_config_t ioss_0_port_14_pin_0_config =
AnnaBridge 189:f392fc9709a3 220 {
AnnaBridge 189:f392fc9709a3 221 .outVal = 1,
AnnaBridge 189:f392fc9709a3 222 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 223 .hsiom = ioss_0_port_14_pin_0_HSIOM,
AnnaBridge 189:f392fc9709a3 224 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 225 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 226 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 227 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 228 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 229 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 230 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 231 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 232 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 233 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 234 };
AnnaBridge 189:f392fc9709a3 235 const cy_stc_gpio_pin_config_t ioss_0_port_14_pin_1_config =
AnnaBridge 189:f392fc9709a3 236 {
AnnaBridge 189:f392fc9709a3 237 .outVal = 1,
AnnaBridge 189:f392fc9709a3 238 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 239 .hsiom = ioss_0_port_14_pin_1_HSIOM,
AnnaBridge 189:f392fc9709a3 240 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 241 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 242 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 243 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 244 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 245 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 246 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 247 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 248 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 249 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 250 };
AnnaBridge 189:f392fc9709a3 251 const cy_stc_gpio_pin_config_t CSD_TX_config =
AnnaBridge 189:f392fc9709a3 252 {
AnnaBridge 189:f392fc9709a3 253 .outVal = 1,
AnnaBridge 189:f392fc9709a3 254 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 255 .hsiom = CSD_TX_HSIOM,
AnnaBridge 189:f392fc9709a3 256 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 257 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 258 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 259 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 260 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 261 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 262 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 263 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 264 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 265 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 266 };
AnnaBridge 189:f392fc9709a3 267 const cy_stc_gpio_pin_config_t LED_GREEN_config =
AnnaBridge 189:f392fc9709a3 268 {
AnnaBridge 189:f392fc9709a3 269 .outVal = 1,
AnnaBridge 189:f392fc9709a3 270 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 271 .hsiom = LED_GREEN_HSIOM,
AnnaBridge 189:f392fc9709a3 272 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 273 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 274 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 275 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 276 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 277 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 278 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 279 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 280 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 281 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 282 };
AnnaBridge 189:f392fc9709a3 283 const cy_stc_gpio_pin_config_t LED8_config =
AnnaBridge 189:f392fc9709a3 284 {
AnnaBridge 189:f392fc9709a3 285 .outVal = 1,
AnnaBridge 189:f392fc9709a3 286 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 287 .hsiom = LED8_HSIOM,
AnnaBridge 189:f392fc9709a3 288 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 289 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 290 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 291 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 292 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 293 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 294 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 295 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 296 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 297 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 298 };
AnnaBridge 189:f392fc9709a3 299 const cy_stc_gpio_pin_config_t SDHC0_DAT0_config =
AnnaBridge 189:f392fc9709a3 300 {
AnnaBridge 189:f392fc9709a3 301 .outVal = 1,
AnnaBridge 189:f392fc9709a3 302 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 303 .hsiom = SDHC0_DAT0_HSIOM,
AnnaBridge 189:f392fc9709a3 304 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 305 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 306 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 307 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 308 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 309 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 310 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 311 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 312 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 313 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 314 };
AnnaBridge 189:f392fc9709a3 315 const cy_stc_gpio_pin_config_t SDHC0_DAT1_config =
AnnaBridge 189:f392fc9709a3 316 {
AnnaBridge 189:f392fc9709a3 317 .outVal = 1,
AnnaBridge 189:f392fc9709a3 318 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 319 .hsiom = SDHC0_DAT1_HSIOM,
AnnaBridge 189:f392fc9709a3 320 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 321 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 322 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 323 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 324 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 325 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 326 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 327 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 328 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 329 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 330 };
AnnaBridge 189:f392fc9709a3 331 const cy_stc_gpio_pin_config_t SDHC0_DAT2_config =
AnnaBridge 189:f392fc9709a3 332 {
AnnaBridge 189:f392fc9709a3 333 .outVal = 1,
AnnaBridge 189:f392fc9709a3 334 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 335 .hsiom = SDHC0_DAT2_HSIOM,
AnnaBridge 189:f392fc9709a3 336 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 337 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 338 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 339 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 340 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 341 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 342 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 343 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 344 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 345 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 346 };
AnnaBridge 189:f392fc9709a3 347 const cy_stc_gpio_pin_config_t SDHC0_DAT3_config =
AnnaBridge 189:f392fc9709a3 348 {
AnnaBridge 189:f392fc9709a3 349 .outVal = 1,
AnnaBridge 189:f392fc9709a3 350 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 351 .hsiom = SDHC0_DAT3_HSIOM,
AnnaBridge 189:f392fc9709a3 352 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 353 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 354 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 355 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 356 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 357 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 358 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 359 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 360 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 361 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 362 };
AnnaBridge 189:f392fc9709a3 363 const cy_stc_gpio_pin_config_t SDHC0_CMD_config =
AnnaBridge 189:f392fc9709a3 364 {
AnnaBridge 189:f392fc9709a3 365 .outVal = 1,
AnnaBridge 189:f392fc9709a3 366 .driveMode = CY_GPIO_DM_STRONG,
AnnaBridge 189:f392fc9709a3 367 .hsiom = SDHC0_CMD_HSIOM,
AnnaBridge 189:f392fc9709a3 368 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 369 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 370 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 371 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 372 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 373 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 374 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 375 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 376 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 377 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 378 };
AnnaBridge 189:f392fc9709a3 379 const cy_stc_gpio_pin_config_t SDHC0_CLK_config =
AnnaBridge 189:f392fc9709a3 380 {
AnnaBridge 189:f392fc9709a3 381 .outVal = 1,
AnnaBridge 189:f392fc9709a3 382 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 383 .hsiom = SDHC0_CLK_HSIOM,
AnnaBridge 189:f392fc9709a3 384 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 385 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 386 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 387 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 388 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 389 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 390 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 391 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 392 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 393 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 394 };
AnnaBridge 189:f392fc9709a3 395 const cy_stc_gpio_pin_config_t ENABLE_WIFI_config =
AnnaBridge 189:f392fc9709a3 396 {
AnnaBridge 189:f392fc9709a3 397 .outVal = 0,
AnnaBridge 189:f392fc9709a3 398 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 399 .hsiom = ENABLE_WIFI_HSIOM,
AnnaBridge 189:f392fc9709a3 400 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 401 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 402 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 403 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 404 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 405 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 406 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 407 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 408 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 409 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 410 };
AnnaBridge 189:f392fc9709a3 411 const cy_stc_gpio_pin_config_t BT_UART_RX_config =
AnnaBridge 189:f392fc9709a3 412 {
AnnaBridge 189:f392fc9709a3 413 .outVal = 1,
AnnaBridge 189:f392fc9709a3 414 .driveMode = CY_GPIO_DM_HIGHZ,
AnnaBridge 189:f392fc9709a3 415 .hsiom = BT_UART_RX_HSIOM,
AnnaBridge 189:f392fc9709a3 416 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 417 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 418 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 419 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 420 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 421 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 422 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 423 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 424 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 425 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 426 };
AnnaBridge 189:f392fc9709a3 427 const cy_stc_gpio_pin_config_t BT_UART_TX_config =
AnnaBridge 189:f392fc9709a3 428 {
AnnaBridge 189:f392fc9709a3 429 .outVal = 1,
AnnaBridge 189:f392fc9709a3 430 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 431 .hsiom = BT_UART_TX_HSIOM,
AnnaBridge 189:f392fc9709a3 432 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 433 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 434 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 435 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 436 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 437 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 438 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 439 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 440 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 441 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 442 };
AnnaBridge 189:f392fc9709a3 443 const cy_stc_gpio_pin_config_t BT_UART_RTS_config =
AnnaBridge 189:f392fc9709a3 444 {
AnnaBridge 189:f392fc9709a3 445 .outVal = 1,
AnnaBridge 189:f392fc9709a3 446 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 447 .hsiom = BT_UART_RTS_HSIOM,
AnnaBridge 189:f392fc9709a3 448 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 449 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 450 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 451 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 452 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 453 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 454 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 455 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 456 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 457 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 458 };
AnnaBridge 189:f392fc9709a3 459 const cy_stc_gpio_pin_config_t BT_UART_CTS_config =
AnnaBridge 189:f392fc9709a3 460 {
AnnaBridge 189:f392fc9709a3 461 .outVal = 1,
AnnaBridge 189:f392fc9709a3 462 .driveMode = CY_GPIO_DM_HIGHZ,
AnnaBridge 189:f392fc9709a3 463 .hsiom = BT_UART_CTS_HSIOM,
AnnaBridge 189:f392fc9709a3 464 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 465 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 466 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 467 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 468 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 469 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 470 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 471 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 472 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 473 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 474 };
AnnaBridge 189:f392fc9709a3 475 const cy_stc_gpio_pin_config_t BT_POWER_config =
AnnaBridge 189:f392fc9709a3 476 {
AnnaBridge 189:f392fc9709a3 477 .outVal = 1,
AnnaBridge 189:f392fc9709a3 478 .driveMode = CY_GPIO_DM_OD_DRIVESHIGH_IN_OFF,
AnnaBridge 189:f392fc9709a3 479 .hsiom = BT_POWER_HSIOM,
AnnaBridge 189:f392fc9709a3 480 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 481 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 482 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 483 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 484 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 485 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 486 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 487 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 488 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 489 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 490 };
AnnaBridge 189:f392fc9709a3 491 const cy_stc_gpio_pin_config_t BT_HOST_WAKE_config =
AnnaBridge 189:f392fc9709a3 492 {
AnnaBridge 189:f392fc9709a3 493 .outVal = 0,
AnnaBridge 189:f392fc9709a3 494 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 495 .hsiom = BT_HOST_WAKE_HSIOM,
AnnaBridge 189:f392fc9709a3 496 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 497 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 498 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 499 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 500 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 501 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 502 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 503 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 504 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 505 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 506 };
AnnaBridge 189:f392fc9709a3 507 const cy_stc_gpio_pin_config_t BT_DEVICE_WAKE_config =
AnnaBridge 189:f392fc9709a3 508 {
AnnaBridge 189:f392fc9709a3 509 .outVal = 0,
AnnaBridge 189:f392fc9709a3 510 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 511 .hsiom = BT_DEVICE_WAKE_HSIOM,
AnnaBridge 189:f392fc9709a3 512 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 513 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 514 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 515 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 516 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 517 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 518 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 519 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 520 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 521 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 522 };
AnnaBridge 189:f392fc9709a3 523 const cy_stc_gpio_pin_config_t UART_RX_config =
AnnaBridge 189:f392fc9709a3 524 {
AnnaBridge 189:f392fc9709a3 525 .outVal = 1,
AnnaBridge 189:f392fc9709a3 526 .driveMode = CY_GPIO_DM_HIGHZ,
AnnaBridge 189:f392fc9709a3 527 .hsiom = UART_RX_HSIOM,
AnnaBridge 189:f392fc9709a3 528 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 529 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 530 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 531 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 532 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 533 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 534 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 535 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 536 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 537 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 538 };
AnnaBridge 189:f392fc9709a3 539 const cy_stc_gpio_pin_config_t UART_TX_config =
AnnaBridge 189:f392fc9709a3 540 {
AnnaBridge 189:f392fc9709a3 541 .outVal = 1,
AnnaBridge 189:f392fc9709a3 542 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 543 .hsiom = UART_TX_HSIOM,
AnnaBridge 189:f392fc9709a3 544 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 545 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 546 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 547 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 548 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 549 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 550 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 551 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 552 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 553 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 554 };
AnnaBridge 189:f392fc9709a3 555 const cy_stc_gpio_pin_config_t EZI2C_SCL_config =
AnnaBridge 189:f392fc9709a3 556 {
AnnaBridge 189:f392fc9709a3 557 .outVal = 1,
AnnaBridge 189:f392fc9709a3 558 .driveMode = CY_GPIO_DM_OD_DRIVESLOW,
AnnaBridge 189:f392fc9709a3 559 .hsiom = EZI2C_SCL_HSIOM,
AnnaBridge 189:f392fc9709a3 560 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 561 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 562 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 563 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 564 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 565 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 566 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 567 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 568 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 569 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 570 };
AnnaBridge 189:f392fc9709a3 571 const cy_stc_gpio_pin_config_t EZI2C_SDA_config =
AnnaBridge 189:f392fc9709a3 572 {
AnnaBridge 189:f392fc9709a3 573 .outVal = 1,
AnnaBridge 189:f392fc9709a3 574 .driveMode = CY_GPIO_DM_OD_DRIVESLOW,
AnnaBridge 189:f392fc9709a3 575 .hsiom = EZI2C_SDA_HSIOM,
AnnaBridge 189:f392fc9709a3 576 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 577 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 578 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 579 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 580 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 581 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 582 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 583 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 584 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 585 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 586 };
AnnaBridge 189:f392fc9709a3 587 const cy_stc_gpio_pin_config_t SWO_config =
AnnaBridge 189:f392fc9709a3 588 {
AnnaBridge 189:f392fc9709a3 589 .outVal = 1,
AnnaBridge 189:f392fc9709a3 590 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
AnnaBridge 189:f392fc9709a3 591 .hsiom = SWO_HSIOM,
AnnaBridge 189:f392fc9709a3 592 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 593 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 594 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 595 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 596 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 597 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 598 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 599 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 600 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 601 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 602 };
AnnaBridge 189:f392fc9709a3 603 const cy_stc_gpio_pin_config_t SWDIO_config =
AnnaBridge 189:f392fc9709a3 604 {
AnnaBridge 189:f392fc9709a3 605 .outVal = 1,
AnnaBridge 189:f392fc9709a3 606 .driveMode = CY_GPIO_DM_PULLUP,
AnnaBridge 189:f392fc9709a3 607 .hsiom = SWDIO_HSIOM,
AnnaBridge 189:f392fc9709a3 608 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 609 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 610 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 611 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 612 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 613 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 614 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 615 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 616 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 617 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 618 };
AnnaBridge 189:f392fc9709a3 619 const cy_stc_gpio_pin_config_t SWDCK_config =
AnnaBridge 189:f392fc9709a3 620 {
AnnaBridge 189:f392fc9709a3 621 .outVal = 1,
AnnaBridge 189:f392fc9709a3 622 .driveMode = CY_GPIO_DM_PULLDOWN,
AnnaBridge 189:f392fc9709a3 623 .hsiom = SWDCK_HSIOM,
AnnaBridge 189:f392fc9709a3 624 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 625 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 626 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 627 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 628 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 629 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 630 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 631 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 632 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 633 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 634 };
AnnaBridge 189:f392fc9709a3 635 const cy_stc_gpio_pin_config_t CINA_config =
AnnaBridge 189:f392fc9709a3 636 {
AnnaBridge 189:f392fc9709a3 637 .outVal = 1,
AnnaBridge 189:f392fc9709a3 638 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 639 .hsiom = CINA_HSIOM,
AnnaBridge 189:f392fc9709a3 640 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 641 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 642 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 643 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 644 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 645 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 646 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 647 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 648 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 649 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 650 };
AnnaBridge 189:f392fc9709a3 651 const cy_stc_gpio_pin_config_t CINB_config =
AnnaBridge 189:f392fc9709a3 652 {
AnnaBridge 189:f392fc9709a3 653 .outVal = 1,
AnnaBridge 189:f392fc9709a3 654 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 655 .hsiom = CINB_HSIOM,
AnnaBridge 189:f392fc9709a3 656 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 657 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 658 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 659 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 660 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 661 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 662 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 663 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 664 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 665 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 666 };
AnnaBridge 189:f392fc9709a3 667 const cy_stc_gpio_pin_config_t CMOD_config =
AnnaBridge 189:f392fc9709a3 668 {
AnnaBridge 189:f392fc9709a3 669 .outVal = 1,
AnnaBridge 189:f392fc9709a3 670 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 671 .hsiom = CMOD_HSIOM,
AnnaBridge 189:f392fc9709a3 672 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 673 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 674 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 675 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 676 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 677 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 678 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 679 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 680 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 681 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 682 };
AnnaBridge 189:f392fc9709a3 683 const cy_stc_gpio_pin_config_t CSD_BTN0_config =
AnnaBridge 189:f392fc9709a3 684 {
AnnaBridge 189:f392fc9709a3 685 .outVal = 1,
AnnaBridge 189:f392fc9709a3 686 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 687 .hsiom = CSD_BTN0_HSIOM,
AnnaBridge 189:f392fc9709a3 688 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 689 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 690 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 691 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 692 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 693 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 694 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 695 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 696 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 697 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 698 };
AnnaBridge 189:f392fc9709a3 699 const cy_stc_gpio_pin_config_t CSD_BTN1_config =
AnnaBridge 189:f392fc9709a3 700 {
AnnaBridge 189:f392fc9709a3 701 .outVal = 1,
AnnaBridge 189:f392fc9709a3 702 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 703 .hsiom = CSD_BTN1_HSIOM,
AnnaBridge 189:f392fc9709a3 704 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 705 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 706 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 707 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 708 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 709 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 710 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 711 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 712 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 713 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 714 };
AnnaBridge 189:f392fc9709a3 715 const cy_stc_gpio_pin_config_t CSD_SLD0_config =
AnnaBridge 189:f392fc9709a3 716 {
AnnaBridge 189:f392fc9709a3 717 .outVal = 1,
AnnaBridge 189:f392fc9709a3 718 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 719 .hsiom = CSD_SLD0_HSIOM,
AnnaBridge 189:f392fc9709a3 720 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 721 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 722 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 723 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 724 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 725 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 726 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 727 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 728 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 729 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 730 };
AnnaBridge 189:f392fc9709a3 731 const cy_stc_gpio_pin_config_t CSD_SLD1_config =
AnnaBridge 189:f392fc9709a3 732 {
AnnaBridge 189:f392fc9709a3 733 .outVal = 1,
AnnaBridge 189:f392fc9709a3 734 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 735 .hsiom = CSD_SLD1_HSIOM,
AnnaBridge 189:f392fc9709a3 736 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 737 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 738 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 739 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 740 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 741 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 742 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 743 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 744 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 745 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 746 };
AnnaBridge 189:f392fc9709a3 747 const cy_stc_gpio_pin_config_t CSD_SLD2_config =
AnnaBridge 189:f392fc9709a3 748 {
AnnaBridge 189:f392fc9709a3 749 .outVal = 1,
AnnaBridge 189:f392fc9709a3 750 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 751 .hsiom = CSD_SLD2_HSIOM,
AnnaBridge 189:f392fc9709a3 752 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 753 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 754 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 755 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 756 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 757 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 758 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 759 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 760 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 761 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 762 };
AnnaBridge 189:f392fc9709a3 763 const cy_stc_gpio_pin_config_t CSD_SLD3_config =
AnnaBridge 189:f392fc9709a3 764 {
AnnaBridge 189:f392fc9709a3 765 .outVal = 1,
AnnaBridge 189:f392fc9709a3 766 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 767 .hsiom = CSD_SLD3_HSIOM,
AnnaBridge 189:f392fc9709a3 768 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 769 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 770 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 771 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 772 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 773 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 774 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 775 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 776 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 777 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 778 };
AnnaBridge 189:f392fc9709a3 779 const cy_stc_gpio_pin_config_t CSD_SLD4_config =
AnnaBridge 189:f392fc9709a3 780 {
AnnaBridge 189:f392fc9709a3 781 .outVal = 1,
AnnaBridge 189:f392fc9709a3 782 .driveMode = CY_GPIO_DM_ANALOG,
AnnaBridge 189:f392fc9709a3 783 .hsiom = CSD_SLD4_HSIOM,
AnnaBridge 189:f392fc9709a3 784 .intEdge = CY_GPIO_INTR_DISABLE,
AnnaBridge 189:f392fc9709a3 785 .intMask = 0UL,
AnnaBridge 189:f392fc9709a3 786 .vtrip = CY_GPIO_VTRIP_CMOS,
AnnaBridge 189:f392fc9709a3 787 .slewRate = CY_GPIO_SLEW_FAST,
AnnaBridge 189:f392fc9709a3 788 .driveSel = CY_GPIO_DRIVE_FULL,
AnnaBridge 189:f392fc9709a3 789 .vregEn = 0UL,
AnnaBridge 189:f392fc9709a3 790 .ibufMode = 0UL,
AnnaBridge 189:f392fc9709a3 791 .vtripSel = 0UL,
AnnaBridge 189:f392fc9709a3 792 .vrefSel = 0UL,
AnnaBridge 189:f392fc9709a3 793 .vohSel = 0UL,
AnnaBridge 189:f392fc9709a3 794 };
AnnaBridge 189:f392fc9709a3 795
AnnaBridge 189:f392fc9709a3 796
AnnaBridge 189:f392fc9709a3 797 void init_cycfg_pins(void)
AnnaBridge 189:f392fc9709a3 798 {
AnnaBridge 189:f392fc9709a3 799 Cy_GPIO_Pin_Init(WCO_IN_PORT, WCO_IN_PIN, &WCO_IN_config);
AnnaBridge 189:f392fc9709a3 800
AnnaBridge 189:f392fc9709a3 801 Cy_GPIO_Pin_Init(WCO_OUT_PORT, WCO_OUT_PIN, &WCO_OUT_config);
AnnaBridge 189:f392fc9709a3 802
AnnaBridge 189:f392fc9709a3 803 Cy_GPIO_Pin_Init(LED_RED_PORT, LED_RED_PIN, &LED_RED_config);
AnnaBridge 189:f392fc9709a3 804
AnnaBridge 189:f392fc9709a3 805 Cy_GPIO_Pin_Init(SW2_PORT, SW2_PIN, &SW2_config);
AnnaBridge 189:f392fc9709a3 806
AnnaBridge 189:f392fc9709a3 807 Cy_GPIO_Pin_Init(LED_BLUE_PORT, LED_BLUE_PIN, &LED_BLUE_config);
AnnaBridge 189:f392fc9709a3 808
AnnaBridge 189:f392fc9709a3 809 Cy_GPIO_Pin_Init(QSPI_SS0_PORT, QSPI_SS0_PIN, &QSPI_SS0_config);
AnnaBridge 189:f392fc9709a3 810
AnnaBridge 189:f392fc9709a3 811 Cy_GPIO_Pin_Init(QSPI_DATA3_PORT, QSPI_DATA3_PIN, &QSPI_DATA3_config);
AnnaBridge 189:f392fc9709a3 812
AnnaBridge 189:f392fc9709a3 813 Cy_GPIO_Pin_Init(QSPI_DATA2_PORT, QSPI_DATA2_PIN, &QSPI_DATA2_config);
AnnaBridge 189:f392fc9709a3 814
AnnaBridge 189:f392fc9709a3 815 Cy_GPIO_Pin_Init(QSPI_DATA1_PORT, QSPI_DATA1_PIN, &QSPI_DATA1_config);
AnnaBridge 189:f392fc9709a3 816
AnnaBridge 189:f392fc9709a3 817 Cy_GPIO_Pin_Init(QSPI_DATA0_PORT, QSPI_DATA0_PIN, &QSPI_DATA0_config);
AnnaBridge 189:f392fc9709a3 818
AnnaBridge 189:f392fc9709a3 819 Cy_GPIO_Pin_Init(QSPI_SPI_CLOCK_PORT, QSPI_SPI_CLOCK_PIN, &QSPI_SPI_CLOCK_config);
AnnaBridge 189:f392fc9709a3 820
AnnaBridge 189:f392fc9709a3 821 Cy_GPIO_Pin_Init(LED9_PORT, LED9_PIN, &LED9_config);
AnnaBridge 189:f392fc9709a3 822
AnnaBridge 189:f392fc9709a3 823 Cy_GPIO_Pin_Init(ioss_0_port_14_pin_0_PORT, ioss_0_port_14_pin_0_PIN, &ioss_0_port_14_pin_0_config);
AnnaBridge 189:f392fc9709a3 824
AnnaBridge 189:f392fc9709a3 825 Cy_GPIO_Pin_Init(ioss_0_port_14_pin_1_PORT, ioss_0_port_14_pin_1_PIN, &ioss_0_port_14_pin_1_config);
AnnaBridge 189:f392fc9709a3 826
AnnaBridge 189:f392fc9709a3 827
AnnaBridge 189:f392fc9709a3 828 Cy_GPIO_Pin_Init(LED_GREEN_PORT, LED_GREEN_PIN, &LED_GREEN_config);
AnnaBridge 189:f392fc9709a3 829
AnnaBridge 189:f392fc9709a3 830 Cy_GPIO_Pin_Init(LED8_PORT, LED8_PIN, &LED8_config);
AnnaBridge 189:f392fc9709a3 831
AnnaBridge 189:f392fc9709a3 832 Cy_GPIO_Pin_Init(SDHC0_DAT0_PORT, SDHC0_DAT0_PIN, &SDHC0_DAT0_config);
AnnaBridge 189:f392fc9709a3 833
AnnaBridge 189:f392fc9709a3 834 Cy_GPIO_Pin_Init(SDHC0_DAT1_PORT, SDHC0_DAT1_PIN, &SDHC0_DAT1_config);
AnnaBridge 189:f392fc9709a3 835
AnnaBridge 189:f392fc9709a3 836 Cy_GPIO_Pin_Init(SDHC0_DAT2_PORT, SDHC0_DAT2_PIN, &SDHC0_DAT2_config);
AnnaBridge 189:f392fc9709a3 837
AnnaBridge 189:f392fc9709a3 838 Cy_GPIO_Pin_Init(SDHC0_DAT3_PORT, SDHC0_DAT3_PIN, &SDHC0_DAT3_config);
AnnaBridge 189:f392fc9709a3 839
AnnaBridge 189:f392fc9709a3 840 Cy_GPIO_Pin_Init(SDHC0_CMD_PORT, SDHC0_CMD_PIN, &SDHC0_CMD_config);
AnnaBridge 189:f392fc9709a3 841
AnnaBridge 189:f392fc9709a3 842 Cy_GPIO_Pin_Init(SDHC0_CLK_PORT, SDHC0_CLK_PIN, &SDHC0_CLK_config);
AnnaBridge 189:f392fc9709a3 843
AnnaBridge 189:f392fc9709a3 844 Cy_GPIO_Pin_Init(ENABLE_WIFI_PORT, ENABLE_WIFI_PIN, &ENABLE_WIFI_config);
AnnaBridge 189:f392fc9709a3 845
AnnaBridge 189:f392fc9709a3 846 Cy_GPIO_Pin_Init(BT_UART_RX_PORT, BT_UART_RX_PIN, &BT_UART_RX_config);
AnnaBridge 189:f392fc9709a3 847
AnnaBridge 189:f392fc9709a3 848 Cy_GPIO_Pin_Init(BT_UART_TX_PORT, BT_UART_TX_PIN, &BT_UART_TX_config);
AnnaBridge 189:f392fc9709a3 849
AnnaBridge 189:f392fc9709a3 850 Cy_GPIO_Pin_Init(BT_UART_RTS_PORT, BT_UART_RTS_PIN, &BT_UART_RTS_config);
AnnaBridge 189:f392fc9709a3 851
AnnaBridge 189:f392fc9709a3 852 Cy_GPIO_Pin_Init(BT_UART_CTS_PORT, BT_UART_CTS_PIN, &BT_UART_CTS_config);
AnnaBridge 189:f392fc9709a3 853
AnnaBridge 189:f392fc9709a3 854 Cy_GPIO_Pin_Init(BT_POWER_PORT, BT_POWER_PIN, &BT_POWER_config);
AnnaBridge 189:f392fc9709a3 855
AnnaBridge 189:f392fc9709a3 856 Cy_GPIO_Pin_Init(BT_HOST_WAKE_PORT, BT_HOST_WAKE_PIN, &BT_HOST_WAKE_config);
AnnaBridge 189:f392fc9709a3 857
AnnaBridge 189:f392fc9709a3 858 Cy_GPIO_Pin_Init(BT_DEVICE_WAKE_PORT, BT_DEVICE_WAKE_PIN, &BT_DEVICE_WAKE_config);
AnnaBridge 189:f392fc9709a3 859
AnnaBridge 189:f392fc9709a3 860 Cy_GPIO_Pin_Init(UART_RX_PORT, UART_RX_PIN, &UART_RX_config);
AnnaBridge 189:f392fc9709a3 861
AnnaBridge 189:f392fc9709a3 862 Cy_GPIO_Pin_Init(UART_TX_PORT, UART_TX_PIN, &UART_TX_config);
AnnaBridge 189:f392fc9709a3 863
AnnaBridge 189:f392fc9709a3 864 Cy_GPIO_Pin_Init(EZI2C_SCL_PORT, EZI2C_SCL_PIN, &EZI2C_SCL_config);
AnnaBridge 189:f392fc9709a3 865
AnnaBridge 189:f392fc9709a3 866 Cy_GPIO_Pin_Init(EZI2C_SDA_PORT, EZI2C_SDA_PIN, &EZI2C_SDA_config);
AnnaBridge 189:f392fc9709a3 867
AnnaBridge 189:f392fc9709a3 868 Cy_GPIO_Pin_Init(SWO_PORT, SWO_PIN, &SWO_config);
AnnaBridge 189:f392fc9709a3 869
AnnaBridge 189:f392fc9709a3 870 Cy_GPIO_Pin_Init(SWDIO_PORT, SWDIO_PIN, &SWDIO_config);
AnnaBridge 189:f392fc9709a3 871
AnnaBridge 189:f392fc9709a3 872 Cy_GPIO_Pin_Init(SWDCK_PORT, SWDCK_PIN, &SWDCK_config);
AnnaBridge 189:f392fc9709a3 873
AnnaBridge 189:f392fc9709a3 874
AnnaBridge 189:f392fc9709a3 875
AnnaBridge 189:f392fc9709a3 876
AnnaBridge 189:f392fc9709a3 877
AnnaBridge 189:f392fc9709a3 878
AnnaBridge 189:f392fc9709a3 879
AnnaBridge 189:f392fc9709a3 880
AnnaBridge 189:f392fc9709a3 881
AnnaBridge 189:f392fc9709a3 882
AnnaBridge 189:f392fc9709a3 883 }