mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/GeneratedSource/cycfg_connectivity.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /*******************************************************************************
AnnaBridge 189:f392fc9709a3 2 * File Name: cycfg_connectivity.h
AnnaBridge 189:f392fc9709a3 3 *
AnnaBridge 189:f392fc9709a3 4 * Description:
AnnaBridge 189:f392fc9709a3 5 * Establishes all necessary connections between hardware elements.
AnnaBridge 189:f392fc9709a3 6 * This file was automatically generated and should not be modified.
AnnaBridge 189:f392fc9709a3 7 *
AnnaBridge 189:f392fc9709a3 8 ********************************************************************************
AnnaBridge 189:f392fc9709a3 9 * Copyright 2017-2019 Cypress Semiconductor Corporation
AnnaBridge 189:f392fc9709a3 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 189:f392fc9709a3 11 *
AnnaBridge 189:f392fc9709a3 12 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 189:f392fc9709a3 13 * you may not use this file except in compliance with the License.
AnnaBridge 189:f392fc9709a3 14 * You may obtain a copy of the License at
AnnaBridge 189:f392fc9709a3 15 *
AnnaBridge 189:f392fc9709a3 16 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 189:f392fc9709a3 17 *
AnnaBridge 189:f392fc9709a3 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 189:f392fc9709a3 19 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 189:f392fc9709a3 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 189:f392fc9709a3 21 * See the License for the specific language governing permissions and
AnnaBridge 189:f392fc9709a3 22 * limitations under the License.
AnnaBridge 189:f392fc9709a3 23 ********************************************************************************/
AnnaBridge 189:f392fc9709a3 24
AnnaBridge 189:f392fc9709a3 25 #if !defined(CYCFG_CONNECTIVITY_H)
AnnaBridge 189:f392fc9709a3 26 #define CYCFG_CONNECTIVITY_H
AnnaBridge 189:f392fc9709a3 27
AnnaBridge 189:f392fc9709a3 28 #if defined(__cplusplus)
AnnaBridge 189:f392fc9709a3 29 extern "C" {
AnnaBridge 189:f392fc9709a3 30 #endif
AnnaBridge 189:f392fc9709a3 31
AnnaBridge 189:f392fc9709a3 32 #include "cycfg_notices.h"
AnnaBridge 189:f392fc9709a3 33 void init_cycfg_connectivity(void);
AnnaBridge 189:f392fc9709a3 34
AnnaBridge 189:f392fc9709a3 35 #define ioss_0_port_11_pin_1_HSIOM P11_1_TCPWM1_LINE_COMPL1
AnnaBridge 189:f392fc9709a3 36 #define ioss_0_port_11_pin_2_HSIOM P11_2_SMIF_SPI_SELECT0
AnnaBridge 189:f392fc9709a3 37 #define ioss_0_port_11_pin_3_HSIOM P11_3_SMIF_SPI_DATA3
AnnaBridge 189:f392fc9709a3 38 #define ioss_0_port_11_pin_4_HSIOM P11_4_SMIF_SPI_DATA2
AnnaBridge 189:f392fc9709a3 39 #define ioss_0_port_11_pin_5_HSIOM P11_5_SMIF_SPI_DATA1
AnnaBridge 189:f392fc9709a3 40 #define ioss_0_port_11_pin_6_HSIOM P11_6_SMIF_SPI_DATA0
AnnaBridge 189:f392fc9709a3 41 #define ioss_0_port_11_pin_7_HSIOM P11_7_SMIF_SPI_CLK
AnnaBridge 189:f392fc9709a3 42 #define ioss_0_port_1_pin_0_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 43 #define ioss_0_port_2_pin_0_HSIOM P2_0_DSI_DSI
AnnaBridge 189:f392fc9709a3 44 #define ioss_0_port_2_pin_1_HSIOM P2_1_DSI_DSI
AnnaBridge 189:f392fc9709a3 45 #define ioss_0_port_2_pin_2_HSIOM P2_2_DSI_DSI
AnnaBridge 189:f392fc9709a3 46 #define ioss_0_port_2_pin_3_HSIOM P2_3_DSI_DSI
AnnaBridge 189:f392fc9709a3 47 #define ioss_0_port_2_pin_4_HSIOM P2_4_DSI_DSI
AnnaBridge 189:f392fc9709a3 48 #define ioss_0_port_2_pin_5_HSIOM P2_5_DSI_GPIO
AnnaBridge 189:f392fc9709a3 49 #define ioss_0_port_3_pin_0_HSIOM P3_0_SCB2_UART_RX
AnnaBridge 189:f392fc9709a3 50 #define ioss_0_port_3_pin_1_HSIOM P3_1_SCB2_UART_TX
AnnaBridge 189:f392fc9709a3 51 #define ioss_0_port_3_pin_2_HSIOM P3_2_SCB2_UART_RTS
AnnaBridge 189:f392fc9709a3 52 #define ioss_0_port_3_pin_3_HSIOM P3_3_SCB2_UART_CTS
AnnaBridge 189:f392fc9709a3 53 #define ioss_0_port_5_pin_0_HSIOM P5_0_SCB5_UART_RX
AnnaBridge 189:f392fc9709a3 54 #define ioss_0_port_5_pin_1_HSIOM P5_1_SCB5_UART_TX
AnnaBridge 189:f392fc9709a3 55 #define ioss_0_port_6_pin_0_HSIOM P6_0_SCB3_I2C_SCL
AnnaBridge 189:f392fc9709a3 56 #define ioss_0_port_6_pin_1_HSIOM P6_1_SCB3_I2C_SDA
AnnaBridge 189:f392fc9709a3 57 #define ioss_0_port_6_pin_4_HSIOM P6_4_CPUSS_SWJ_SWO_TDO
AnnaBridge 189:f392fc9709a3 58 #define ioss_0_port_6_pin_6_HSIOM P6_6_CPUSS_SWJ_SWDIO_TMS
AnnaBridge 189:f392fc9709a3 59 #define ioss_0_port_6_pin_7_HSIOM P6_7_CPUSS_SWJ_SWCLK_TCLK
AnnaBridge 189:f392fc9709a3 60 #define ioss_0_port_7_pin_1_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 61 #define ioss_0_port_7_pin_2_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 62 #define ioss_0_port_7_pin_7_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 63 #define ioss_0_port_8_pin_1_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 64 #define ioss_0_port_8_pin_2_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 65 #define ioss_0_port_8_pin_3_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 66 #define ioss_0_port_8_pin_4_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 67 #define ioss_0_port_8_pin_5_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 68 #define ioss_0_port_8_pin_6_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 69 #define ioss_0_port_8_pin_7_HSIOM HSIOM_SEL_AMUXA
AnnaBridge 189:f392fc9709a3 70
AnnaBridge 189:f392fc9709a3 71 #define cpuss_0_dw0_0_chan_0_tr_in_0_TRIGGER_OUT TRIG0_OUT_CPUSS_DW0_TR_IN0
AnnaBridge 189:f392fc9709a3 72 #define cpuss_0_dw0_0_chan_1_tr_in_0_TRIGGER_OUT TRIG0_OUT_CPUSS_DW0_TR_IN1
AnnaBridge 189:f392fc9709a3 73 #define cpuss_0_dw1_0_chan_1_tr_in_0_TRIGGER_OUT TRIG1_OUT_CPUSS_DW1_TR_IN1
AnnaBridge 189:f392fc9709a3 74 #define cpuss_0_dw1_0_chan_3_tr_in_0_TRIGGER_OUT TRIG1_OUT_CPUSS_DW1_TR_IN3
AnnaBridge 189:f392fc9709a3 75 #define udb_0_out_p_116_TRIGGER_IN_0 TRIG14_IN_UDB_TR_UDB0
AnnaBridge 189:f392fc9709a3 76 #define udb_0_out_p_116_TRIGGER_IN_1 TRIG1_IN_TR_GROUP14_OUTPUT4
AnnaBridge 189:f392fc9709a3 77 #define udb_0_out_p_117_TRIGGER_IN_0 TRIG0_IN_TR_GROUP14_OUTPUT3
AnnaBridge 189:f392fc9709a3 78 #define udb_0_out_p_117_TRIGGER_IN_1 TRIG14_IN_UDB_TR_UDB1
AnnaBridge 189:f392fc9709a3 79 #define udb_0_out_p_119_TRIGGER_IN_0 TRIG0_IN_TR_GROUP14_OUTPUT0
AnnaBridge 189:f392fc9709a3 80 #define udb_0_out_p_119_TRIGGER_IN_1 TRIG14_IN_UDB_TR_UDB3
AnnaBridge 189:f392fc9709a3 81 #define udb_0_out_p_123_TRIGGER_IN_0 TRIG14_IN_UDB_TR_UDB7
AnnaBridge 189:f392fc9709a3 82 #define udb_0_out_p_123_TRIGGER_IN_1 TRIG1_IN_TR_GROUP14_OUTPUT6
AnnaBridge 189:f392fc9709a3 83
AnnaBridge 189:f392fc9709a3 84 #if defined(__cplusplus)
AnnaBridge 189:f392fc9709a3 85 }
AnnaBridge 189:f392fc9709a3 86 #endif
AnnaBridge 189:f392fc9709a3 87
AnnaBridge 189:f392fc9709a3 88
AnnaBridge 189:f392fc9709a3 89 #endif /* CYCFG_CONNECTIVITY_H */