mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/GeneratedSource/cycfg_peripherals.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /*******************************************************************************
AnnaBridge 189:f392fc9709a3 2 * File Name: cycfg_peripherals.h
AnnaBridge 189:f392fc9709a3 3 *
AnnaBridge 189:f392fc9709a3 4 * Description:
AnnaBridge 189:f392fc9709a3 5 * Peripheral Hardware Block configuration
AnnaBridge 189:f392fc9709a3 6 * This file was automatically generated and should not be modified.
AnnaBridge 189:f392fc9709a3 7 *
AnnaBridge 189:f392fc9709a3 8 ********************************************************************************
AnnaBridge 189:f392fc9709a3 9 * Copyright 2017-2019 Cypress Semiconductor Corporation
AnnaBridge 189:f392fc9709a3 10 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 189:f392fc9709a3 11 *
AnnaBridge 189:f392fc9709a3 12 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 189:f392fc9709a3 13 * you may not use this file except in compliance with the License.
AnnaBridge 189:f392fc9709a3 14 * You may obtain a copy of the License at
AnnaBridge 189:f392fc9709a3 15 *
AnnaBridge 189:f392fc9709a3 16 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 189:f392fc9709a3 17 *
AnnaBridge 189:f392fc9709a3 18 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 189:f392fc9709a3 19 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 189:f392fc9709a3 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 189:f392fc9709a3 21 * See the License for the specific language governing permissions and
AnnaBridge 189:f392fc9709a3 22 * limitations under the License.
AnnaBridge 189:f392fc9709a3 23 ********************************************************************************/
AnnaBridge 189:f392fc9709a3 24
AnnaBridge 189:f392fc9709a3 25 #if !defined(CYCFG_PERIPHERALS_H)
AnnaBridge 189:f392fc9709a3 26 #define CYCFG_PERIPHERALS_H
AnnaBridge 189:f392fc9709a3 27
AnnaBridge 189:f392fc9709a3 28 #include "cycfg_notices.h"
AnnaBridge 189:f392fc9709a3 29 #include "cy_sysclk.h"
AnnaBridge 189:f392fc9709a3 30 #include "cy_csd.h"
AnnaBridge 189:f392fc9709a3 31 #include "cy_scb_ezi2c.h"
AnnaBridge 189:f392fc9709a3 32 #include "cy_scb_uart.h"
AnnaBridge 189:f392fc9709a3 33 #include "cy_smif.h"
AnnaBridge 189:f392fc9709a3 34 #include "cy_mcwdt.h"
AnnaBridge 189:f392fc9709a3 35 #include "cy_rtc.h"
AnnaBridge 189:f392fc9709a3 36
AnnaBridge 189:f392fc9709a3 37 #if defined(__cplusplus)
AnnaBridge 189:f392fc9709a3 38 extern "C" {
AnnaBridge 189:f392fc9709a3 39 #endif
AnnaBridge 189:f392fc9709a3 40
AnnaBridge 189:f392fc9709a3 41 #define CY_BLE_CORE_CORTEX_M4 4U
AnnaBridge 189:f392fc9709a3 42 #define CY_BLE_CORE_CORTEX_M0P 0U
AnnaBridge 189:f392fc9709a3 43 #define CY_BLE_CORE_DUAL 255U
AnnaBridge 189:f392fc9709a3 44 #ifndef CY_BLE_CORE
AnnaBridge 189:f392fc9709a3 45 #define CY_BLE_CORE 4U
AnnaBridge 189:f392fc9709a3 46 #endif
AnnaBridge 189:f392fc9709a3 47 #define CY_BLE_IRQ bless_interrupt_IRQn
AnnaBridge 189:f392fc9709a3 48 #define CY_CAPSENSE_CORE 4u
AnnaBridge 189:f392fc9709a3 49 #define CY_CAPSENSE_CPU_CLK 100000000u
AnnaBridge 189:f392fc9709a3 50 #define CY_CAPSENSE_PERI_CLK 50000000u
AnnaBridge 189:f392fc9709a3 51 #define CY_CAPSENSE_VDDA_MV 3300u
AnnaBridge 189:f392fc9709a3 52 #define CY_CAPSENSE_PERI_DIV_TYPE CY_SYSCLK_DIV_8_BIT
AnnaBridge 189:f392fc9709a3 53 #define CY_CAPSENSE_PERI_DIV_INDEX 0u
AnnaBridge 189:f392fc9709a3 54 #define Cmod_PORT GPIO_PRT7
AnnaBridge 189:f392fc9709a3 55 #define CintA_PORT GPIO_PRT7
AnnaBridge 189:f392fc9709a3 56 #define CintB_PORT GPIO_PRT7
AnnaBridge 189:f392fc9709a3 57 #define Button0_Rx0_PORT GPIO_PRT8
AnnaBridge 189:f392fc9709a3 58 #define Button0_Tx_PORT GPIO_PRT1
AnnaBridge 189:f392fc9709a3 59 #define Button1_Rx0_PORT GPIO_PRT8
AnnaBridge 189:f392fc9709a3 60 #define Button1_Tx_PORT GPIO_PRT1
AnnaBridge 189:f392fc9709a3 61 #define LinearSlider0_Sns0_PORT GPIO_PRT8
AnnaBridge 189:f392fc9709a3 62 #define LinearSlider0_Sns1_PORT GPIO_PRT8
AnnaBridge 189:f392fc9709a3 63 #define LinearSlider0_Sns2_PORT GPIO_PRT8
AnnaBridge 189:f392fc9709a3 64 #define LinearSlider0_Sns3_PORT GPIO_PRT8
AnnaBridge 189:f392fc9709a3 65 #define LinearSlider0_Sns4_PORT GPIO_PRT8
AnnaBridge 189:f392fc9709a3 66 #define Cmod_PIN 7u
AnnaBridge 189:f392fc9709a3 67 #define CintA_PIN 1u
AnnaBridge 189:f392fc9709a3 68 #define CintB_PIN 2u
AnnaBridge 189:f392fc9709a3 69 #define Button0_Rx0_PIN 1u
AnnaBridge 189:f392fc9709a3 70 #define Button0_Tx_PIN 0u
AnnaBridge 189:f392fc9709a3 71 #define Button1_Rx0_PIN 2u
AnnaBridge 189:f392fc9709a3 72 #define Button1_Tx_PIN 0u
AnnaBridge 189:f392fc9709a3 73 #define LinearSlider0_Sns0_PIN 3u
AnnaBridge 189:f392fc9709a3 74 #define LinearSlider0_Sns1_PIN 4u
AnnaBridge 189:f392fc9709a3 75 #define LinearSlider0_Sns2_PIN 5u
AnnaBridge 189:f392fc9709a3 76 #define LinearSlider0_Sns3_PIN 6u
AnnaBridge 189:f392fc9709a3 77 #define LinearSlider0_Sns4_PIN 7u
AnnaBridge 189:f392fc9709a3 78 #define Cmod_PORT_NUM 7u
AnnaBridge 189:f392fc9709a3 79 #define CintA_PORT_NUM 7u
AnnaBridge 189:f392fc9709a3 80 #define CintB_PORT_NUM 7u
AnnaBridge 189:f392fc9709a3 81 #define CapSense_HW CSD0
AnnaBridge 189:f392fc9709a3 82 #define CapSense_IRQ csd_interrupt_IRQn
AnnaBridge 189:f392fc9709a3 83 #define CSD_COMM_HW SCB3
AnnaBridge 189:f392fc9709a3 84 #define CSD_COMM_IRQ scb_3_interrupt_IRQn
AnnaBridge 189:f392fc9709a3 85 #define KITPROG_UART_HW SCB5
AnnaBridge 189:f392fc9709a3 86 #define KITPROG_UART_IRQ scb_5_interrupt_IRQn
AnnaBridge 189:f392fc9709a3 87 #define QSPI_HW SMIF0
AnnaBridge 189:f392fc9709a3 88 #define QSPI_IRQ smif_interrupt_IRQn
AnnaBridge 189:f392fc9709a3 89 #define QSPI_MEMORY_MODE_ALIGMENT_ERROR (0UL)
AnnaBridge 189:f392fc9709a3 90 #define QSPI_RX_DATA_FIFO_UNDERFLOW (0UL)
AnnaBridge 189:f392fc9709a3 91 #define QSPI_TX_COMMAND_FIFO_OVERFLOW (0UL)
AnnaBridge 189:f392fc9709a3 92 #define QSPI_TX_DATA_FIFO_OVERFLOW (0UL)
AnnaBridge 189:f392fc9709a3 93 #define QSPI_RX_FIFO_TRIGEER_LEVEL (0UL)
AnnaBridge 189:f392fc9709a3 94 #define QSPI_TX_FIFO_TRIGEER_LEVEL (0UL)
AnnaBridge 189:f392fc9709a3 95 #define QSPI_DATALINES0_1 (1UL)
AnnaBridge 189:f392fc9709a3 96 #define QSPI_DATALINES2_3 (1UL)
AnnaBridge 189:f392fc9709a3 97 #define QSPI_DATALINES4_5 (0UL)
AnnaBridge 189:f392fc9709a3 98 #define QSPI_DATALINES6_7 (0UL)
AnnaBridge 189:f392fc9709a3 99 #define QSPI_SS0 (1UL)
AnnaBridge 189:f392fc9709a3 100 #define QSPI_SS1 (0UL)
AnnaBridge 189:f392fc9709a3 101 #define QSPI_SS2 (0UL)
AnnaBridge 189:f392fc9709a3 102 #define QSPI_SS3 (0UL)
AnnaBridge 189:f392fc9709a3 103 #define QSPI_DESELECT_DELAY 7
AnnaBridge 189:f392fc9709a3 104 #define MCWDT0_HW MCWDT_STRUCT0
AnnaBridge 189:f392fc9709a3 105 #define RTC_10_MONTH_OFFSET (28U)
AnnaBridge 189:f392fc9709a3 106 #define RTC_MONTH_OFFSET (24U)
AnnaBridge 189:f392fc9709a3 107 #define RTC_10_DAY_OFFSET (20U)
AnnaBridge 189:f392fc9709a3 108 #define RTC_DAY_OFFSET (16U)
AnnaBridge 189:f392fc9709a3 109 #define RTC_1000_YEAR_OFFSET (12U)
AnnaBridge 189:f392fc9709a3 110 #define RTC_100_YEAR_OFFSET (8U)
AnnaBridge 189:f392fc9709a3 111 #define RTC_10_YEAR_OFFSET (4U)
AnnaBridge 189:f392fc9709a3 112 #define RTC_YEAR_OFFSET (0U)
AnnaBridge 189:f392fc9709a3 113
AnnaBridge 189:f392fc9709a3 114 extern cy_stc_csd_context_t cy_csd_0_context;
AnnaBridge 189:f392fc9709a3 115 extern const cy_stc_scb_ezi2c_config_t CSD_COMM_config;
AnnaBridge 189:f392fc9709a3 116 extern const cy_stc_scb_uart_config_t KITPROG_UART_config;
AnnaBridge 189:f392fc9709a3 117 extern const cy_stc_smif_config_t QSPI_config;
AnnaBridge 189:f392fc9709a3 118 extern const cy_stc_mcwdt_config_t MCWDT0_config;
AnnaBridge 189:f392fc9709a3 119 extern const cy_stc_rtc_config_t RTC_config;
AnnaBridge 189:f392fc9709a3 120
AnnaBridge 189:f392fc9709a3 121 void init_cycfg_peripherals(void);
AnnaBridge 189:f392fc9709a3 122
AnnaBridge 189:f392fc9709a3 123 #if defined(__cplusplus)
AnnaBridge 189:f392fc9709a3 124 }
AnnaBridge 189:f392fc9709a3 125 #endif
AnnaBridge 189:f392fc9709a3 126
AnnaBridge 189:f392fc9709a3 127
AnnaBridge 189:f392fc9709a3 128 #endif /* CYCFG_PERIPHERALS_H */