mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/api/spi_api.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 180:96ed750bd169
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 178:79309dc6340a | 1 | /******************************************************************************* |
AnnaBridge | 178:79309dc6340a | 2 | * Copyright (c) 2010-2017 Analog Devices, Inc. |
AnnaBridge | 178:79309dc6340a | 3 | * |
AnnaBridge | 178:79309dc6340a | 4 | * All rights reserved. |
AnnaBridge | 178:79309dc6340a | 5 | * |
AnnaBridge | 178:79309dc6340a | 6 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 178:79309dc6340a | 7 | * are permitted provided that the following conditions are met: |
AnnaBridge | 178:79309dc6340a | 8 | * - Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 178:79309dc6340a | 9 | * this list of conditions and the following disclaimer. |
AnnaBridge | 178:79309dc6340a | 10 | * - Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 178:79309dc6340a | 11 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 178:79309dc6340a | 12 | * and/or other materials provided with the distribution. |
AnnaBridge | 178:79309dc6340a | 13 | * - Modified versions of the software must be conspicuously marked as such. |
AnnaBridge | 178:79309dc6340a | 14 | * - This software is licensed solely and exclusively for use with processors |
AnnaBridge | 178:79309dc6340a | 15 | * manufactured by or for Analog Devices, Inc. |
AnnaBridge | 178:79309dc6340a | 16 | * - This software may not be combined or merged with other code in any manner |
AnnaBridge | 178:79309dc6340a | 17 | * that would cause the software to become subject to terms and conditions |
AnnaBridge | 178:79309dc6340a | 18 | * which differ from those listed here. |
AnnaBridge | 178:79309dc6340a | 19 | * - Neither the name of Analog Devices, Inc. nor the names of its |
AnnaBridge | 178:79309dc6340a | 20 | * contributors may be used to endorse or promote products derived |
AnnaBridge | 178:79309dc6340a | 21 | * from this software without specific prior written permission. |
AnnaBridge | 178:79309dc6340a | 22 | * - The use of this software may or may not infringe the patent rights of one |
AnnaBridge | 178:79309dc6340a | 23 | * or more patent holders. This license does not release you from the |
AnnaBridge | 178:79309dc6340a | 24 | * requirement that you obtain separate licenses from these patent holders |
AnnaBridge | 178:79309dc6340a | 25 | * to use this software. |
AnnaBridge | 178:79309dc6340a | 26 | * |
AnnaBridge | 178:79309dc6340a | 27 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" |
AnnaBridge | 178:79309dc6340a | 28 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON- |
AnnaBridge | 178:79309dc6340a | 29 | * INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 178:79309dc6340a | 30 | * DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 178:79309dc6340a | 31 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR |
AnnaBridge | 178:79309dc6340a | 32 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF |
AnnaBridge | 178:79309dc6340a | 33 | * CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF |
AnnaBridge | 178:79309dc6340a | 34 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
AnnaBridge | 178:79309dc6340a | 35 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
AnnaBridge | 178:79309dc6340a | 36 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
AnnaBridge | 178:79309dc6340a | 37 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
AnnaBridge | 178:79309dc6340a | 38 | * POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 178:79309dc6340a | 39 | ******************************************************************************/ |
AnnaBridge | 178:79309dc6340a | 40 | |
AnnaBridge | 178:79309dc6340a | 41 | #include <math.h> |
AnnaBridge | 178:79309dc6340a | 42 | #include "mbed_assert.h" |
AnnaBridge | 178:79309dc6340a | 43 | |
AnnaBridge | 178:79309dc6340a | 44 | #include "spi_api.h" |
AnnaBridge | 178:79309dc6340a | 45 | |
AnnaBridge | 178:79309dc6340a | 46 | #if DEVICE_SPI |
AnnaBridge | 178:79309dc6340a | 47 | |
AnnaBridge | 178:79309dc6340a | 48 | #include "cmsis.h" |
AnnaBridge | 178:79309dc6340a | 49 | #include "pinmap.h" |
AnnaBridge | 178:79309dc6340a | 50 | #include "mbed_error.h" |
AnnaBridge | 178:79309dc6340a | 51 | #include "PeripheralPins.h" |
AnnaBridge | 178:79309dc6340a | 52 | #include "drivers/spi/adi_spi.h" |
AnnaBridge | 178:79309dc6340a | 53 | |
AnnaBridge | 178:79309dc6340a | 54 | |
AnnaBridge | 178:79309dc6340a | 55 | |
AnnaBridge | 178:79309dc6340a | 56 | #if defined(BUILD_SPI_MI_DYNAMIC) |
AnnaBridge | 178:79309dc6340a | 57 | #if defined(ADI_DEBUG) |
AnnaBridge | 178:79309dc6340a | 58 | #warning "BUILD_SPI_MI_DYNAMIC is defined. Memory allocation for SPI will be dynamic" |
AnnaBridge | 178:79309dc6340a | 59 | int adi_spi_memtype = 0; |
AnnaBridge | 178:79309dc6340a | 60 | #endif |
AnnaBridge | 178:79309dc6340a | 61 | #else |
Anna Bridge |
180:96ed750bd169 | 62 | /******************************************************************************* |
Anna Bridge |
180:96ed750bd169 | 63 | ADI_SPI_DEV_DATA_TYPE Instance memory containing memory pointer should |
Anna Bridge |
180:96ed750bd169 | 64 | guarantee 4 byte alignmnet. |
Anna Bridge |
180:96ed750bd169 | 65 | *******************************************************************************/ |
AnnaBridge | 178:79309dc6340a | 66 | ADI_SPI_HANDLE spi_Handle0; |
Anna Bridge |
180:96ed750bd169 | 67 | uint32_t spi_Mem0[(ADI_SPI_MEMORY_SIZE + 3)/4]; |
AnnaBridge | 178:79309dc6340a | 68 | ADI_SPI_HANDLE spi_Handle1; |
Anna Bridge |
180:96ed750bd169 | 69 | uint32_t spi_Mem1[(ADI_SPI_MEMORY_SIZE + 3)/4]; |
AnnaBridge | 178:79309dc6340a | 70 | ADI_SPI_HANDLE spi_Handle2; |
Anna Bridge |
180:96ed750bd169 | 71 | uint32_t spi_Mem2[(ADI_SPI_MEMORY_SIZE + 3)/4]; |
AnnaBridge | 178:79309dc6340a | 72 | #if defined(ADI_DEBUG) |
AnnaBridge | 178:79309dc6340a | 73 | #warning "BUILD_SPI_MI_DYNAMIC is NOT defined. Memory allocation for SPI will be static" |
AnnaBridge | 178:79309dc6340a | 74 | int adi_spi_memtype = 1; |
AnnaBridge | 178:79309dc6340a | 75 | #endif |
AnnaBridge | 178:79309dc6340a | 76 | #endif |
AnnaBridge | 178:79309dc6340a | 77 | |
AnnaBridge | 178:79309dc6340a | 78 | |
AnnaBridge | 178:79309dc6340a | 79 | |
AnnaBridge | 178:79309dc6340a | 80 | /** Initialize the SPI peripheral |
AnnaBridge | 178:79309dc6340a | 81 | * |
AnnaBridge | 178:79309dc6340a | 82 | * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral |
AnnaBridge | 178:79309dc6340a | 83 | * @param[out] obj The SPI object to initialize |
AnnaBridge | 178:79309dc6340a | 84 | * @param[in] mosi The pin to use for MOSI |
AnnaBridge | 178:79309dc6340a | 85 | * @param[in] miso The pin to use for MISO |
AnnaBridge | 178:79309dc6340a | 86 | * @param[in] sclk The pin to use for SCLK |
AnnaBridge | 178:79309dc6340a | 87 | * @param[in] ssel The pin to use for SSEL |
AnnaBridge | 178:79309dc6340a | 88 | */ |
AnnaBridge | 178:79309dc6340a | 89 | void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) |
AnnaBridge | 178:79309dc6340a | 90 | { |
AnnaBridge | 178:79309dc6340a | 91 | // determine the SPI to use |
AnnaBridge | 178:79309dc6340a | 92 | uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI); |
AnnaBridge | 178:79309dc6340a | 93 | uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO); |
AnnaBridge | 178:79309dc6340a | 94 | uint32_t spi_sclk = pinmap_peripheral(sclk, PinMap_SPI_SCLK); |
AnnaBridge | 178:79309dc6340a | 95 | uint32_t spi_ssel = pinmap_peripheral(ssel, PinMap_SPI_SSEL); |
AnnaBridge | 178:79309dc6340a | 96 | uint32_t spi_data = pinmap_merge(spi_mosi, spi_miso); |
AnnaBridge | 178:79309dc6340a | 97 | uint32_t spi_cntl = pinmap_merge(spi_sclk, spi_ssel); |
AnnaBridge | 178:79309dc6340a | 98 | ADI_SPI_HANDLE *pSPI_Handle; |
Anna Bridge |
180:96ed750bd169 | 99 | uint32_t *SPI_Mem; |
AnnaBridge | 178:79309dc6340a | 100 | ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS; |
AnnaBridge | 178:79309dc6340a | 101 | uint32_t nDeviceNum = 0; |
AnnaBridge | 178:79309dc6340a | 102 | ADI_SPI_CHIP_SELECT spi_cs = ADI_SPI_CS_NONE; |
AnnaBridge | 178:79309dc6340a | 103 | |
AnnaBridge | 178:79309dc6340a | 104 | |
AnnaBridge | 178:79309dc6340a | 105 | #if defined(BUILD_SPI_MI_DYNAMIC) |
AnnaBridge | 178:79309dc6340a | 106 | if (mosi == SPI0_MOSI) { |
AnnaBridge | 178:79309dc6340a | 107 | nDeviceNum = SPI_0; |
AnnaBridge | 178:79309dc6340a | 108 | } else if (mosi == SPI1_MOSI) { |
AnnaBridge | 178:79309dc6340a | 109 | nDeviceNum = SPI_1; |
AnnaBridge | 178:79309dc6340a | 110 | } else if (mosi == SPI2_MOSI) { |
AnnaBridge | 178:79309dc6340a | 111 | nDeviceNum = SPI_2; |
AnnaBridge | 178:79309dc6340a | 112 | } |
AnnaBridge | 178:79309dc6340a | 113 | pSPI_Handle = &obj->SPI_Handle; |
AnnaBridge | 178:79309dc6340a | 114 | obj->pSPI_Handle = pSPI_Handle; |
AnnaBridge | 178:79309dc6340a | 115 | SPI_Mem = obj->SPI_Mem; |
AnnaBridge | 178:79309dc6340a | 116 | #else |
AnnaBridge | 178:79309dc6340a | 117 | if (mosi == SPI0_MOSI) { |
AnnaBridge | 178:79309dc6340a | 118 | nDeviceNum = SPI_0; |
AnnaBridge | 178:79309dc6340a | 119 | pSPI_Handle = &spi_Handle0; |
AnnaBridge | 178:79309dc6340a | 120 | SPI_Mem = &spi_Mem0[0]; |
AnnaBridge | 178:79309dc6340a | 121 | } else if (mosi == SPI1_MOSI) { |
AnnaBridge | 178:79309dc6340a | 122 | nDeviceNum = SPI_1; |
AnnaBridge | 178:79309dc6340a | 123 | pSPI_Handle = &spi_Handle1; |
AnnaBridge | 178:79309dc6340a | 124 | SPI_Mem = &spi_Mem1[0]; |
AnnaBridge | 178:79309dc6340a | 125 | } else if (mosi == SPI2_MOSI) { |
AnnaBridge | 178:79309dc6340a | 126 | nDeviceNum = SPI_2; |
AnnaBridge | 178:79309dc6340a | 127 | pSPI_Handle = &spi_Handle2; |
AnnaBridge | 178:79309dc6340a | 128 | SPI_Mem = &spi_Mem2[0]; |
AnnaBridge | 178:79309dc6340a | 129 | } |
AnnaBridge | 178:79309dc6340a | 130 | obj->pSPI_Handle = pSPI_Handle; |
AnnaBridge | 178:79309dc6340a | 131 | #endif |
AnnaBridge | 178:79309dc6340a | 132 | |
AnnaBridge | 178:79309dc6340a | 133 | |
AnnaBridge | 178:79309dc6340a | 134 | obj->instance = pinmap_merge(spi_data, spi_cntl); |
AnnaBridge | 178:79309dc6340a | 135 | MBED_ASSERT((int)obj->instance != NC); |
AnnaBridge | 178:79309dc6340a | 136 | |
AnnaBridge | 178:79309dc6340a | 137 | // pin out the spi pins |
AnnaBridge | 178:79309dc6340a | 138 | pinmap_pinout(mosi, PinMap_SPI_MOSI); |
AnnaBridge | 178:79309dc6340a | 139 | pinmap_pinout(miso, PinMap_SPI_MISO); |
AnnaBridge | 178:79309dc6340a | 140 | pinmap_pinout(sclk, PinMap_SPI_SCLK); |
AnnaBridge | 178:79309dc6340a | 141 | if (ssel != NC) { |
AnnaBridge | 178:79309dc6340a | 142 | pinmap_pinout(ssel, PinMap_SPI_SSEL); |
AnnaBridge | 178:79309dc6340a | 143 | } |
AnnaBridge | 178:79309dc6340a | 144 | |
AnnaBridge | 178:79309dc6340a | 145 | SystemCoreClockUpdate(); |
AnnaBridge | 178:79309dc6340a | 146 | SPI_Return = adi_spi_Open(nDeviceNum, SPI_Mem, ADI_SPI_MEMORY_SIZE, pSPI_Handle); |
AnnaBridge | 178:79309dc6340a | 147 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 148 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 149 | return; |
AnnaBridge | 178:79309dc6340a | 150 | } |
AnnaBridge | 178:79309dc6340a | 151 | |
AnnaBridge | 178:79309dc6340a | 152 | if (ssel != NC) { |
AnnaBridge | 178:79309dc6340a | 153 | if ( (ssel == SPI0_CS0) || (ssel == SPI1_CS0) || (ssel == SPI2_CS0)) { |
AnnaBridge | 178:79309dc6340a | 154 | spi_cs = ADI_SPI_CS0; |
AnnaBridge | 178:79309dc6340a | 155 | } else if ( (ssel == SPI0_CS1) || (ssel == SPI1_CS1) || (ssel == SPI2_CS1)) { |
AnnaBridge | 178:79309dc6340a | 156 | spi_cs = ADI_SPI_CS1; |
AnnaBridge | 178:79309dc6340a | 157 | } else if ( (ssel == SPI0_CS2) || (ssel == SPI1_CS2) || (ssel == SPI2_CS2)) { |
AnnaBridge | 178:79309dc6340a | 158 | spi_cs = ADI_SPI_CS2; |
AnnaBridge | 178:79309dc6340a | 159 | } else if ( (ssel == SPI0_CS3) || (ssel == SPI1_CS3) || (ssel == SPI2_CS3)) { |
AnnaBridge | 178:79309dc6340a | 160 | spi_cs = ADI_SPI_CS3; |
AnnaBridge | 178:79309dc6340a | 161 | } |
AnnaBridge | 178:79309dc6340a | 162 | |
AnnaBridge | 178:79309dc6340a | 163 | SPI_Return = adi_spi_SetChipSelect(*pSPI_Handle, spi_cs); |
AnnaBridge | 178:79309dc6340a | 164 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 165 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 166 | return; |
AnnaBridge | 178:79309dc6340a | 167 | } |
AnnaBridge | 178:79309dc6340a | 168 | } |
AnnaBridge | 178:79309dc6340a | 169 | } |
AnnaBridge | 178:79309dc6340a | 170 | |
AnnaBridge | 178:79309dc6340a | 171 | |
AnnaBridge | 178:79309dc6340a | 172 | /** Release a SPI object |
AnnaBridge | 178:79309dc6340a | 173 | * |
AnnaBridge | 178:79309dc6340a | 174 | * TODO: spi_free is currently unimplemented |
AnnaBridge | 178:79309dc6340a | 175 | * This will require reference counting at the C++ level to be safe |
AnnaBridge | 178:79309dc6340a | 176 | * |
AnnaBridge | 178:79309dc6340a | 177 | * Return the pins owned by the SPI object to their reset state |
AnnaBridge | 178:79309dc6340a | 178 | * Disable the SPI peripheral |
AnnaBridge | 178:79309dc6340a | 179 | * Disable the SPI clock |
AnnaBridge | 178:79309dc6340a | 180 | * @param[in] obj The SPI object to deinitialize |
AnnaBridge | 178:79309dc6340a | 181 | */ |
AnnaBridge | 178:79309dc6340a | 182 | void spi_free(spi_t *obj) |
AnnaBridge | 178:79309dc6340a | 183 | { |
AnnaBridge | 178:79309dc6340a | 184 | ADI_SPI_HANDLE SPI_Handle; |
AnnaBridge | 178:79309dc6340a | 185 | ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS; |
AnnaBridge | 178:79309dc6340a | 186 | |
AnnaBridge | 178:79309dc6340a | 187 | SPI_Handle = *obj->pSPI_Handle; |
AnnaBridge | 178:79309dc6340a | 188 | SPI_Return = adi_spi_Close(SPI_Handle); |
AnnaBridge | 178:79309dc6340a | 189 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 190 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 191 | return; |
AnnaBridge | 178:79309dc6340a | 192 | } |
AnnaBridge | 178:79309dc6340a | 193 | } |
AnnaBridge | 178:79309dc6340a | 194 | |
AnnaBridge | 178:79309dc6340a | 195 | |
AnnaBridge | 178:79309dc6340a | 196 | /** Configure the SPI format |
AnnaBridge | 178:79309dc6340a | 197 | * |
AnnaBridge | 178:79309dc6340a | 198 | * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode. |
AnnaBridge | 178:79309dc6340a | 199 | * The default bit order is MSB. |
AnnaBridge | 178:79309dc6340a | 200 | * @param[in,out] obj The SPI object to configure |
AnnaBridge | 178:79309dc6340a | 201 | * @param[in] bits The number of bits per frame |
AnnaBridge | 178:79309dc6340a | 202 | * @param[in] mode The SPI mode (clock polarity, phase, and shift direction) |
AnnaBridge | 178:79309dc6340a | 203 | * @param[in] slave Zero for master mode or non-zero for slave mode |
AnnaBridge | 178:79309dc6340a | 204 | * |
AnnaBridge | 178:79309dc6340a | 205 | ** Configure the data transmission format |
AnnaBridge | 178:79309dc6340a | 206 | * |
AnnaBridge | 178:79309dc6340a | 207 | * @param bits Number of bits per SPI frame (4 - 16) |
AnnaBridge | 178:79309dc6340a | 208 | * @param mode Clock polarity and phase mode (0 - 3) |
AnnaBridge | 178:79309dc6340a | 209 | * |
AnnaBridge | 178:79309dc6340a | 210 | * @code |
AnnaBridge | 178:79309dc6340a | 211 | * mode | POL PHA |
AnnaBridge | 178:79309dc6340a | 212 | * -----+-------- |
AnnaBridge | 178:79309dc6340a | 213 | * 0 | 0 0 |
AnnaBridge | 178:79309dc6340a | 214 | * 1 | 0 1 |
AnnaBridge | 178:79309dc6340a | 215 | * 2 | 1 0 |
AnnaBridge | 178:79309dc6340a | 216 | * 3 | 1 1 |
AnnaBridge | 178:79309dc6340a | 217 | * @endcode |
AnnaBridge | 178:79309dc6340a | 218 | |
AnnaBridge | 178:79309dc6340a | 219 | bool phase; |
AnnaBridge | 178:79309dc6340a | 220 | true : trailing-edge |
AnnaBridge | 178:79309dc6340a | 221 | false : leading-edge |
AnnaBridge | 178:79309dc6340a | 222 | |
AnnaBridge | 178:79309dc6340a | 223 | bool polarity; |
AnnaBridge | 178:79309dc6340a | 224 | true : CPOL=1 (idle high) polarity |
AnnaBridge | 178:79309dc6340a | 225 | false : CPOL=0 (idle-low) polarity |
AnnaBridge | 178:79309dc6340a | 226 | */ |
AnnaBridge | 178:79309dc6340a | 227 | void spi_format(spi_t *obj, int bits, int mode, int slave) |
AnnaBridge | 178:79309dc6340a | 228 | { |
AnnaBridge | 178:79309dc6340a | 229 | ADI_SPI_HANDLE SPI_Handle; |
AnnaBridge | 178:79309dc6340a | 230 | ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS; |
AnnaBridge | 178:79309dc6340a | 231 | bool phase; |
AnnaBridge | 178:79309dc6340a | 232 | bool polarity; |
AnnaBridge | 178:79309dc6340a | 233 | bool master; |
AnnaBridge | 178:79309dc6340a | 234 | |
AnnaBridge | 178:79309dc6340a | 235 | |
AnnaBridge | 178:79309dc6340a | 236 | SPI_Handle = *obj->pSPI_Handle; |
AnnaBridge | 178:79309dc6340a | 237 | |
AnnaBridge | 178:79309dc6340a | 238 | if ((uint32_t)mode & 0x1) { |
AnnaBridge | 178:79309dc6340a | 239 | phase = true; |
AnnaBridge | 178:79309dc6340a | 240 | } |
AnnaBridge | 178:79309dc6340a | 241 | else { |
AnnaBridge | 178:79309dc6340a | 242 | phase = false; |
AnnaBridge | 178:79309dc6340a | 243 | } |
AnnaBridge | 178:79309dc6340a | 244 | SPI_Return = adi_spi_SetClockPhase(SPI_Handle, phase); |
AnnaBridge | 178:79309dc6340a | 245 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 246 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 247 | return; |
AnnaBridge | 178:79309dc6340a | 248 | } |
AnnaBridge | 178:79309dc6340a | 249 | |
AnnaBridge | 178:79309dc6340a | 250 | if ((uint32_t)mode & 0x2) { |
AnnaBridge | 178:79309dc6340a | 251 | polarity = true; |
AnnaBridge | 178:79309dc6340a | 252 | } |
AnnaBridge | 178:79309dc6340a | 253 | else { |
AnnaBridge | 178:79309dc6340a | 254 | polarity = false; |
AnnaBridge | 178:79309dc6340a | 255 | } |
AnnaBridge | 178:79309dc6340a | 256 | SPI_Return = adi_spi_SetClockPolarity(SPI_Handle, polarity); |
AnnaBridge | 178:79309dc6340a | 257 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 258 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 259 | return; |
AnnaBridge | 178:79309dc6340a | 260 | } |
AnnaBridge | 178:79309dc6340a | 261 | |
AnnaBridge | 178:79309dc6340a | 262 | master = !((bool)slave); |
AnnaBridge | 178:79309dc6340a | 263 | SPI_Return = adi_spi_SetMasterMode(SPI_Handle, master); |
AnnaBridge | 178:79309dc6340a | 264 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 265 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 266 | return; |
AnnaBridge | 178:79309dc6340a | 267 | } |
AnnaBridge | 178:79309dc6340a | 268 | } |
AnnaBridge | 178:79309dc6340a | 269 | |
AnnaBridge | 178:79309dc6340a | 270 | |
AnnaBridge | 178:79309dc6340a | 271 | /** Set the SPI baud rate |
AnnaBridge | 178:79309dc6340a | 272 | * |
AnnaBridge | 178:79309dc6340a | 273 | * Actual frequency may differ from the desired frequency due to available dividers and bus clock |
AnnaBridge | 178:79309dc6340a | 274 | * Configures the SPI peripheral's baud rate |
AnnaBridge | 178:79309dc6340a | 275 | * @param[in,out] obj The SPI object to configure |
AnnaBridge | 178:79309dc6340a | 276 | * @param[in] hz The baud rate in Hz |
AnnaBridge | 178:79309dc6340a | 277 | */ |
AnnaBridge | 178:79309dc6340a | 278 | void spi_frequency(spi_t *obj, int hz) |
AnnaBridge | 178:79309dc6340a | 279 | { |
AnnaBridge | 178:79309dc6340a | 280 | ADI_SPI_HANDLE SPI_Handle; |
AnnaBridge | 178:79309dc6340a | 281 | ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS; |
AnnaBridge | 178:79309dc6340a | 282 | |
AnnaBridge | 178:79309dc6340a | 283 | SPI_Handle = *obj->pSPI_Handle; |
AnnaBridge | 178:79309dc6340a | 284 | SPI_Return = adi_spi_SetBitrate(SPI_Handle, (uint32_t) hz); |
AnnaBridge | 178:79309dc6340a | 285 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 286 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 287 | return; |
AnnaBridge | 178:79309dc6340a | 288 | } |
AnnaBridge | 178:79309dc6340a | 289 | } |
AnnaBridge | 178:79309dc6340a | 290 | |
AnnaBridge | 178:79309dc6340a | 291 | |
AnnaBridge | 178:79309dc6340a | 292 | /** Write a byte out in master mode and receive a value |
AnnaBridge | 178:79309dc6340a | 293 | * |
AnnaBridge | 178:79309dc6340a | 294 | * @param[in] obj The SPI peripheral to use for sending |
AnnaBridge | 178:79309dc6340a | 295 | * @param[in] value The value to send |
AnnaBridge | 178:79309dc6340a | 296 | * @return Returns the value received during send |
AnnaBridge | 178:79309dc6340a | 297 | */ |
AnnaBridge | 178:79309dc6340a | 298 | int spi_master_write(spi_t *obj, int value) |
AnnaBridge | 178:79309dc6340a | 299 | { |
AnnaBridge | 178:79309dc6340a | 300 | ADI_SPI_TRANSCEIVER transceive; |
AnnaBridge | 178:79309dc6340a | 301 | uint8_t TxBuf; |
AnnaBridge | 178:79309dc6340a | 302 | uint8_t RxBuf; |
AnnaBridge | 178:79309dc6340a | 303 | ADI_SPI_HANDLE SPI_Handle; |
AnnaBridge | 178:79309dc6340a | 304 | ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS; |
AnnaBridge | 178:79309dc6340a | 305 | |
AnnaBridge | 178:79309dc6340a | 306 | TxBuf = (uint8_t)value; |
AnnaBridge | 178:79309dc6340a | 307 | |
AnnaBridge | 178:79309dc6340a | 308 | transceive.pReceiver = &RxBuf; |
AnnaBridge | 178:79309dc6340a | 309 | transceive.ReceiverBytes = 1; /* link transceive data size to the remaining count */ |
AnnaBridge | 178:79309dc6340a | 310 | transceive.nRxIncrement = 1; /* auto increment buffer */ |
AnnaBridge | 178:79309dc6340a | 311 | transceive.pTransmitter = &TxBuf; /* initialize data attributes */ |
AnnaBridge | 178:79309dc6340a | 312 | transceive.TransmitterBytes = 1; /* link transceive data size to the remaining count */ |
AnnaBridge | 178:79309dc6340a | 313 | transceive.nTxIncrement = 1; /* auto increment buffer */ |
AnnaBridge | 178:79309dc6340a | 314 | |
AnnaBridge | 178:79309dc6340a | 315 | transceive.bDMA = false; |
AnnaBridge | 178:79309dc6340a | 316 | transceive.bRD_CTL = false; |
AnnaBridge | 178:79309dc6340a | 317 | SPI_Handle = *obj->pSPI_Handle; |
AnnaBridge | 178:79309dc6340a | 318 | SPI_Return = adi_spi_MasterReadWrite(SPI_Handle, &transceive); |
AnnaBridge | 178:79309dc6340a | 319 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 320 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 321 | return 1; |
AnnaBridge | 178:79309dc6340a | 322 | } |
AnnaBridge | 178:79309dc6340a | 323 | |
AnnaBridge | 178:79309dc6340a | 324 | return((int)RxBuf); |
AnnaBridge | 178:79309dc6340a | 325 | } |
AnnaBridge | 178:79309dc6340a | 326 | |
AnnaBridge | 178:79309dc6340a | 327 | |
AnnaBridge | 178:79309dc6340a | 328 | /** Write a block out in master mode and receive a value |
AnnaBridge | 178:79309dc6340a | 329 | * |
AnnaBridge | 178:79309dc6340a | 330 | * The total number of bytes sent and recieved will be the maximum of |
AnnaBridge | 178:79309dc6340a | 331 | * tx_length and rx_length. The bytes written will be padded with the |
AnnaBridge | 178:79309dc6340a | 332 | * value 0xff. |
AnnaBridge | 178:79309dc6340a | 333 | * |
AnnaBridge | 178:79309dc6340a | 334 | * @param[in] obj The SPI peripheral to use for sending |
AnnaBridge | 178:79309dc6340a | 335 | * @param[in] tx_buffer Pointer to the byte-array of data to write to the device |
AnnaBridge | 178:79309dc6340a | 336 | * @param[in] tx_length Number of bytes to write, may be zero |
AnnaBridge | 178:79309dc6340a | 337 | * @param[in] rx_buffer Pointer to the byte-array of data to read from the device |
AnnaBridge | 178:79309dc6340a | 338 | * @param[in] rx_length Number of bytes to read, may be zero |
AnnaBridge | 178:79309dc6340a | 339 | * @param[in] write_fill Default data transmitted while performing a read |
AnnaBridge | 178:79309dc6340a | 340 | * @returns |
AnnaBridge | 178:79309dc6340a | 341 | * The number of bytes written and read from the device. This is |
AnnaBridge | 178:79309dc6340a | 342 | * maximum of tx_length and rx_length. |
AnnaBridge | 178:79309dc6340a | 343 | */ |
AnnaBridge | 178:79309dc6340a | 344 | int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill) |
AnnaBridge | 178:79309dc6340a | 345 | { |
AnnaBridge | 178:79309dc6340a | 346 | ADI_SPI_TRANSCEIVER transceive; |
AnnaBridge | 178:79309dc6340a | 347 | ADI_SPI_HANDLE SPI_Handle; |
AnnaBridge | 178:79309dc6340a | 348 | ADI_SPI_RESULT SPI_Return = ADI_SPI_SUCCESS; |
AnnaBridge | 178:79309dc6340a | 349 | |
AnnaBridge | 178:79309dc6340a | 350 | transceive.pReceiver = (uint8_t*)rx_buffer; |
AnnaBridge | 178:79309dc6340a | 351 | transceive.ReceiverBytes = rx_length; /* link transceive data size to the remaining count */ |
AnnaBridge | 178:79309dc6340a | 352 | transceive.nRxIncrement = 1; /* auto increment buffer */ |
AnnaBridge | 178:79309dc6340a | 353 | transceive.pTransmitter = (uint8_t*)tx_buffer; /* initialize data attributes */ |
AnnaBridge | 178:79309dc6340a | 354 | transceive.TransmitterBytes = tx_length; /* link transceive data size to the remaining count */ |
AnnaBridge | 178:79309dc6340a | 355 | transceive.nTxIncrement = 1; /* auto increment buffer */ |
AnnaBridge | 178:79309dc6340a | 356 | |
AnnaBridge | 178:79309dc6340a | 357 | transceive.bDMA = false; |
AnnaBridge | 178:79309dc6340a | 358 | transceive.bRD_CTL = false; |
AnnaBridge | 178:79309dc6340a | 359 | SPI_Handle = *obj->pSPI_Handle; |
AnnaBridge | 178:79309dc6340a | 360 | SPI_Return = adi_spi_MasterReadWrite(SPI_Handle, &transceive); |
AnnaBridge | 178:79309dc6340a | 361 | if (SPI_Return) { |
AnnaBridge | 178:79309dc6340a | 362 | obj->error = SPI_EVENT_ERROR; |
AnnaBridge | 178:79309dc6340a | 363 | return -1; |
AnnaBridge | 178:79309dc6340a | 364 | } |
AnnaBridge | 178:79309dc6340a | 365 | else { |
AnnaBridge | 178:79309dc6340a | 366 | return((int)tx_length); |
AnnaBridge | 178:79309dc6340a | 367 | } |
AnnaBridge | 178:79309dc6340a | 368 | } |
AnnaBridge | 178:79309dc6340a | 369 | |
AnnaBridge | 178:79309dc6340a | 370 | #endif |