mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/api/gpio_irq_api.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 180:96ed750bd169
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 178:79309dc6340a | 1 | /******************************************************************************* |
AnnaBridge | 178:79309dc6340a | 2 | * Copyright (c) 2010-2017 Analog Devices, Inc. |
AnnaBridge | 178:79309dc6340a | 3 | * |
AnnaBridge | 178:79309dc6340a | 4 | * All rights reserved. |
AnnaBridge | 178:79309dc6340a | 5 | * |
AnnaBridge | 178:79309dc6340a | 6 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 178:79309dc6340a | 7 | * are permitted provided that the following conditions are met: |
AnnaBridge | 178:79309dc6340a | 8 | * - Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 178:79309dc6340a | 9 | * this list of conditions and the following disclaimer. |
AnnaBridge | 178:79309dc6340a | 10 | * - Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 178:79309dc6340a | 11 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 178:79309dc6340a | 12 | * and/or other materials provided with the distribution. |
AnnaBridge | 178:79309dc6340a | 13 | * - Modified versions of the software must be conspicuously marked as such. |
AnnaBridge | 178:79309dc6340a | 14 | * - This software is licensed solely and exclusively for use with processors |
AnnaBridge | 178:79309dc6340a | 15 | * manufactured by or for Analog Devices, Inc. |
AnnaBridge | 178:79309dc6340a | 16 | * - This software may not be combined or merged with other code in any manner |
AnnaBridge | 178:79309dc6340a | 17 | * that would cause the software to become subject to terms and conditions |
AnnaBridge | 178:79309dc6340a | 18 | * which differ from those listed here. |
AnnaBridge | 178:79309dc6340a | 19 | * - Neither the name of Analog Devices, Inc. nor the names of its |
AnnaBridge | 178:79309dc6340a | 20 | * contributors may be used to endorse or promote products derived |
AnnaBridge | 178:79309dc6340a | 21 | * from this software without specific prior written permission. |
AnnaBridge | 178:79309dc6340a | 22 | * - The use of this software may or may not infringe the patent rights of one |
AnnaBridge | 178:79309dc6340a | 23 | * or more patent holders. This license does not release you from the |
AnnaBridge | 178:79309dc6340a | 24 | * requirement that you obtain separate licenses from these patent holders |
AnnaBridge | 178:79309dc6340a | 25 | * to use this software. |
AnnaBridge | 178:79309dc6340a | 26 | * |
AnnaBridge | 178:79309dc6340a | 27 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" |
AnnaBridge | 178:79309dc6340a | 28 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON- |
AnnaBridge | 178:79309dc6340a | 29 | * INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 178:79309dc6340a | 30 | * DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 178:79309dc6340a | 31 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR |
AnnaBridge | 178:79309dc6340a | 32 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF |
AnnaBridge | 178:79309dc6340a | 33 | * CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF |
AnnaBridge | 178:79309dc6340a | 34 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
AnnaBridge | 178:79309dc6340a | 35 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
AnnaBridge | 178:79309dc6340a | 36 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
AnnaBridge | 178:79309dc6340a | 37 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
AnnaBridge | 178:79309dc6340a | 38 | * POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 178:79309dc6340a | 39 | ******************************************************************************/ |
AnnaBridge | 178:79309dc6340a | 40 | |
AnnaBridge | 178:79309dc6340a | 41 | #include "gpio_irq_api.h" |
AnnaBridge | 178:79309dc6340a | 42 | #include "adi_gpio.h" |
AnnaBridge | 178:79309dc6340a | 43 | #include "adi_gpio_def.h" |
AnnaBridge | 178:79309dc6340a | 44 | #include "ADuCM302x_device.h" |
AnnaBridge | 178:79309dc6340a | 45 | |
AnnaBridge | 189:f392fc9709a3 | 46 | #if DEVICE_INTERRUPTIN |
AnnaBridge | 178:79309dc6340a | 47 | |
AnnaBridge | 178:79309dc6340a | 48 | #define MAX_GPIO_LINES 16 |
AnnaBridge | 178:79309dc6340a | 49 | #define MAX_GPIO_PORTS ADI_GPIO_NUM_PORTS |
AnnaBridge | 178:79309dc6340a | 50 | |
AnnaBridge | 178:79309dc6340a | 51 | typedef struct { |
AnnaBridge | 178:79309dc6340a | 52 | unsigned int id; |
AnnaBridge | 178:79309dc6340a | 53 | gpio_irq_event event; |
AnnaBridge | 178:79309dc6340a | 54 | uint8_t int_enable; |
AnnaBridge | 178:79309dc6340a | 55 | } gpio_chan_info_t; |
Anna Bridge |
180:96ed750bd169 | 56 | /******************************************************************************* |
Anna Bridge |
180:96ed750bd169 | 57 | ADI_GPIO_DEV_DATA Instance memory containing memory pointer should |
Anna Bridge |
180:96ed750bd169 | 58 | guarantee 4 byte alignmnet. |
Anna Bridge |
180:96ed750bd169 | 59 | *******************************************************************************/ |
Anna Bridge |
180:96ed750bd169 | 60 | extern uint32_t gpioMemory[(ADI_GPIO_MEMORY_SIZE + 3)/4]; |
Anna Bridge |
180:96ed750bd169 | 61 | extern uint8_t gpio_initialized; |
AnnaBridge | 178:79309dc6340a | 62 | static gpio_chan_info_t channel_ids[MAX_GPIO_PORTS][MAX_GPIO_LINES]; |
AnnaBridge | 178:79309dc6340a | 63 | static gpio_irq_handler irq_handler = NULL; |
AnnaBridge | 178:79309dc6340a | 64 | |
AnnaBridge | 178:79309dc6340a | 65 | |
AnnaBridge | 178:79309dc6340a | 66 | /** Local interrupt callback routine. |
AnnaBridge | 178:79309dc6340a | 67 | */ |
AnnaBridge | 178:79309dc6340a | 68 | static void gpio_irq_callback(void *pCBParam, uint32_t Event, void *pArg) |
AnnaBridge | 178:79309dc6340a | 69 | { |
AnnaBridge | 178:79309dc6340a | 70 | uint16_t pin = *(ADI_GPIO_DATA*)pArg; |
AnnaBridge | 178:79309dc6340a | 71 | int index = 0; |
AnnaBridge | 178:79309dc6340a | 72 | |
AnnaBridge | 178:79309dc6340a | 73 | // determine the index of the pin that caused the interrupt |
AnnaBridge | 178:79309dc6340a | 74 | while (pin) { |
AnnaBridge | 178:79309dc6340a | 75 | if (pin & 0x01) { |
AnnaBridge | 178:79309dc6340a | 76 | // call the user ISR. The argument Event is the port number of the GPIO line. |
AnnaBridge | 178:79309dc6340a | 77 | if (irq_handler != NULL) |
AnnaBridge | 178:79309dc6340a | 78 | irq_handler((uint32_t)channel_ids[Event][index].id, channel_ids[Event][index].event); |
AnnaBridge | 178:79309dc6340a | 79 | } |
AnnaBridge | 178:79309dc6340a | 80 | index++; |
AnnaBridge | 178:79309dc6340a | 81 | pin >>= 1; |
AnnaBridge | 178:79309dc6340a | 82 | } |
AnnaBridge | 178:79309dc6340a | 83 | } |
AnnaBridge | 178:79309dc6340a | 84 | |
AnnaBridge | 178:79309dc6340a | 85 | |
AnnaBridge | 178:79309dc6340a | 86 | /** Function to get the IENA and IENB register values. |
AnnaBridge | 178:79309dc6340a | 87 | * Added here temporarily until these are available in the BSP |
AnnaBridge | 178:79309dc6340a | 88 | */ |
AnnaBridge | 178:79309dc6340a | 89 | static ADI_GPIO_RESULT adi_gpio_GetGroupInterruptPins(const ADI_GPIO_PORT Port, const IRQn_Type eIrq, |
AnnaBridge | 178:79309dc6340a | 90 | const ADI_GPIO_DATA Pins, uint16_t* const pValue) |
AnnaBridge | 178:79309dc6340a | 91 | { |
AnnaBridge | 178:79309dc6340a | 92 | ADI_GPIO_TypeDef *pReg[MAX_GPIO_PORTS] = {pADI_GPIO0, pADI_GPIO1, pADI_GPIO2}; |
AnnaBridge | 178:79309dc6340a | 93 | ADI_GPIO_TypeDef *pPort; /* pointer to port registers */ |
AnnaBridge | 178:79309dc6340a | 94 | uint16_t Value = 0u; |
AnnaBridge | 178:79309dc6340a | 95 | |
AnnaBridge | 178:79309dc6340a | 96 | pPort = pReg[Port]; |
AnnaBridge | 178:79309dc6340a | 97 | |
AnnaBridge | 178:79309dc6340a | 98 | switch (eIrq) { |
AnnaBridge | 178:79309dc6340a | 99 | case SYS_GPIO_INTA_IRQn: |
AnnaBridge | 178:79309dc6340a | 100 | Value = pPort->IENA; |
AnnaBridge | 178:79309dc6340a | 101 | break; |
AnnaBridge | 178:79309dc6340a | 102 | case SYS_GPIO_INTB_IRQn: |
AnnaBridge | 178:79309dc6340a | 103 | Value = pPort->IENB; |
AnnaBridge | 178:79309dc6340a | 104 | break; |
AnnaBridge | 178:79309dc6340a | 105 | default: |
AnnaBridge | 178:79309dc6340a | 106 | break; /* This shall never reach */ |
AnnaBridge | 178:79309dc6340a | 107 | } |
AnnaBridge | 178:79309dc6340a | 108 | |
AnnaBridge | 178:79309dc6340a | 109 | *pValue = (Value & Pins); |
AnnaBridge | 178:79309dc6340a | 110 | return (ADI_GPIO_SUCCESS); |
AnnaBridge | 178:79309dc6340a | 111 | } |
AnnaBridge | 178:79309dc6340a | 112 | |
AnnaBridge | 178:79309dc6340a | 113 | |
AnnaBridge | 178:79309dc6340a | 114 | /** Function to get the interrupt polarity register content. |
AnnaBridge | 178:79309dc6340a | 115 | * Added here temporarily until these are available in the BSP |
AnnaBridge | 178:79309dc6340a | 116 | */ |
AnnaBridge | 178:79309dc6340a | 117 | static ADI_GPIO_RESULT adi_gpio_GetGroupInterruptPolarity(const ADI_GPIO_PORT Port, const ADI_GPIO_DATA Pins, |
AnnaBridge | 178:79309dc6340a | 118 | uint16_t* const pValue) |
AnnaBridge | 178:79309dc6340a | 119 | { |
AnnaBridge | 178:79309dc6340a | 120 | ADI_GPIO_TypeDef *pPort; /* pointer to port registers */ |
AnnaBridge | 178:79309dc6340a | 121 | ADI_GPIO_TypeDef *pReg[MAX_GPIO_PORTS] = {pADI_GPIO0, pADI_GPIO1, pADI_GPIO2}; |
AnnaBridge | 178:79309dc6340a | 122 | |
AnnaBridge | 178:79309dc6340a | 123 | pPort = pReg[Port]; |
AnnaBridge | 178:79309dc6340a | 124 | |
AnnaBridge | 178:79309dc6340a | 125 | *pValue = (pPort->POL & Pins); |
AnnaBridge | 178:79309dc6340a | 126 | |
AnnaBridge | 178:79309dc6340a | 127 | return (ADI_GPIO_SUCCESS); |
AnnaBridge | 178:79309dc6340a | 128 | } |
AnnaBridge | 178:79309dc6340a | 129 | |
AnnaBridge | 178:79309dc6340a | 130 | |
AnnaBridge | 178:79309dc6340a | 131 | /** Function to clear the relevant interrupt enable bits in both the IENA and IENB registers |
AnnaBridge | 178:79309dc6340a | 132 | * for the given GPIO pin. |
AnnaBridge | 178:79309dc6340a | 133 | */ |
AnnaBridge | 178:79309dc6340a | 134 | static void disable_pin_interrupt(ADI_GPIO_PORT port, uint32_t pin_number) |
AnnaBridge | 178:79309dc6340a | 135 | { |
AnnaBridge | 178:79309dc6340a | 136 | uint16_t int_reg_val; |
AnnaBridge | 178:79309dc6340a | 137 | |
AnnaBridge | 178:79309dc6340a | 138 | // Read the current content of the IENA register |
AnnaBridge | 178:79309dc6340a | 139 | adi_gpio_GetGroupInterruptPins(port, SYS_GPIO_INTA_IRQn, 1 << pin_number, &int_reg_val); |
AnnaBridge | 178:79309dc6340a | 140 | |
AnnaBridge | 178:79309dc6340a | 141 | // clear the bit for the pin |
AnnaBridge | 178:79309dc6340a | 142 | int_reg_val &= ~(1 << pin_number); |
AnnaBridge | 178:79309dc6340a | 143 | |
AnnaBridge | 178:79309dc6340a | 144 | // write the interrupt register |
AnnaBridge | 178:79309dc6340a | 145 | adi_gpio_SetGroupInterruptPins(port, SYS_GPIO_INTA_IRQn, int_reg_val); |
AnnaBridge | 178:79309dc6340a | 146 | |
AnnaBridge | 178:79309dc6340a | 147 | // Do the same to IENB |
AnnaBridge | 178:79309dc6340a | 148 | adi_gpio_GetGroupInterruptPins(port, SYS_GPIO_INTB_IRQn, 1 << pin_number, &int_reg_val); |
AnnaBridge | 178:79309dc6340a | 149 | |
AnnaBridge | 178:79309dc6340a | 150 | // clear the bit for the pin |
AnnaBridge | 178:79309dc6340a | 151 | int_reg_val &= ~(1 << pin_number); |
AnnaBridge | 178:79309dc6340a | 152 | |
AnnaBridge | 178:79309dc6340a | 153 | // write the interrupt register |
AnnaBridge | 178:79309dc6340a | 154 | adi_gpio_SetGroupInterruptPins(port, SYS_GPIO_INTB_IRQn, int_reg_val); |
AnnaBridge | 178:79309dc6340a | 155 | } |
AnnaBridge | 178:79309dc6340a | 156 | |
AnnaBridge | 178:79309dc6340a | 157 | |
AnnaBridge | 178:79309dc6340a | 158 | /** Function to set the relevant interrupt enable bits in either the IENA and IENB registers |
AnnaBridge | 178:79309dc6340a | 159 | * for the given GPIO pin. |
AnnaBridge | 178:79309dc6340a | 160 | */ |
AnnaBridge | 178:79309dc6340a | 161 | static void enable_pin_interrupt(ADI_GPIO_PORT port, uint32_t pin_number, IRQn_Type eIrq) |
AnnaBridge | 178:79309dc6340a | 162 | { |
AnnaBridge | 178:79309dc6340a | 163 | uint16_t int_reg_val; |
AnnaBridge | 178:79309dc6340a | 164 | |
AnnaBridge | 178:79309dc6340a | 165 | // Read the current interrupt enable register content |
AnnaBridge | 178:79309dc6340a | 166 | adi_gpio_GetGroupInterruptPins(port, eIrq, 1 << pin_number, &int_reg_val); |
AnnaBridge | 178:79309dc6340a | 167 | |
AnnaBridge | 178:79309dc6340a | 168 | // set the bit for the pin |
AnnaBridge | 178:79309dc6340a | 169 | int_reg_val |= (1 << pin_number); |
AnnaBridge | 178:79309dc6340a | 170 | |
AnnaBridge | 178:79309dc6340a | 171 | // write the interrupt register |
AnnaBridge | 178:79309dc6340a | 172 | adi_gpio_SetGroupInterruptPins(port, eIrq, int_reg_val); |
AnnaBridge | 178:79309dc6340a | 173 | } |
AnnaBridge | 178:79309dc6340a | 174 | |
AnnaBridge | 178:79309dc6340a | 175 | |
AnnaBridge | 178:79309dc6340a | 176 | /** Initialize the GPIO IRQ pin |
AnnaBridge | 178:79309dc6340a | 177 | * |
AnnaBridge | 178:79309dc6340a | 178 | * @param obj The GPIO object to initialize |
AnnaBridge | 178:79309dc6340a | 179 | * @param pin The GPIO pin name |
AnnaBridge | 178:79309dc6340a | 180 | * @param handler The handler to be attached to GPIO IRQ |
AnnaBridge | 178:79309dc6340a | 181 | * @param id The object ID (id != 0, 0 is reserved) |
AnnaBridge | 178:79309dc6340a | 182 | * @return -1 if pin is NC, 0 otherwise |
AnnaBridge | 178:79309dc6340a | 183 | */ |
AnnaBridge | 178:79309dc6340a | 184 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) |
AnnaBridge | 178:79309dc6340a | 185 | { |
AnnaBridge | 178:79309dc6340a | 186 | uint32_t port = pin >> GPIO_PORT_SHIFT; |
AnnaBridge | 178:79309dc6340a | 187 | uint32_t pin_num = pin & 0xFF; |
AnnaBridge | 178:79309dc6340a | 188 | |
AnnaBridge | 178:79309dc6340a | 189 | // check for valid pin and ID |
AnnaBridge | 178:79309dc6340a | 190 | if ((pin == NC) || (id == 0)) { |
AnnaBridge | 178:79309dc6340a | 191 | return -1; |
AnnaBridge | 178:79309dc6340a | 192 | } |
AnnaBridge | 178:79309dc6340a | 193 | |
AnnaBridge | 178:79309dc6340a | 194 | // make sure gpio driver has been initialized |
AnnaBridge | 178:79309dc6340a | 195 | if (!gpio_initialized) { |
AnnaBridge | 178:79309dc6340a | 196 | adi_gpio_Init(gpioMemory,ADI_GPIO_MEMORY_SIZE); |
AnnaBridge | 178:79309dc6340a | 197 | gpio_initialized = 1; |
AnnaBridge | 178:79309dc6340a | 198 | } |
AnnaBridge | 178:79309dc6340a | 199 | |
AnnaBridge | 178:79309dc6340a | 200 | // save the handler |
AnnaBridge | 178:79309dc6340a | 201 | if (handler) { |
AnnaBridge | 178:79309dc6340a | 202 | irq_handler = handler; |
AnnaBridge | 178:79309dc6340a | 203 | } |
AnnaBridge | 178:79309dc6340a | 204 | |
AnnaBridge | 178:79309dc6340a | 205 | // disable the interrupt for the given pin |
AnnaBridge | 178:79309dc6340a | 206 | disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num); |
AnnaBridge | 178:79309dc6340a | 207 | |
AnnaBridge | 178:79309dc6340a | 208 | // set the port pin as input |
AnnaBridge | 178:79309dc6340a | 209 | adi_gpio_InputEnable(port, 1 << pin_num, true); |
AnnaBridge | 178:79309dc6340a | 210 | |
AnnaBridge | 178:79309dc6340a | 211 | // save the ID for future reference |
AnnaBridge | 178:79309dc6340a | 212 | channel_ids[port][pin_num].id = (uint32_t)id; |
AnnaBridge | 178:79309dc6340a | 213 | channel_ids[port][pin_num].event = IRQ_NONE; |
AnnaBridge | 178:79309dc6340a | 214 | channel_ids[port][pin_num].int_enable = 0; |
AnnaBridge | 178:79309dc6340a | 215 | obj->id = id; |
AnnaBridge | 178:79309dc6340a | 216 | obj->pinname = pin; |
AnnaBridge | 178:79309dc6340a | 217 | |
AnnaBridge | 178:79309dc6340a | 218 | return 0; |
AnnaBridge | 178:79309dc6340a | 219 | } |
AnnaBridge | 178:79309dc6340a | 220 | |
AnnaBridge | 178:79309dc6340a | 221 | /** Release the GPIO IRQ PIN |
AnnaBridge | 178:79309dc6340a | 222 | * |
AnnaBridge | 178:79309dc6340a | 223 | * @param obj The gpio object |
AnnaBridge | 178:79309dc6340a | 224 | */ |
AnnaBridge | 178:79309dc6340a | 225 | void gpio_irq_free(gpio_irq_t *obj) |
AnnaBridge | 178:79309dc6340a | 226 | { |
AnnaBridge | 178:79309dc6340a | 227 | uint32_t port = obj->pinname >> GPIO_PORT_SHIFT; |
AnnaBridge | 178:79309dc6340a | 228 | uint32_t pin_num = obj->pinname & 0xFF; |
AnnaBridge | 178:79309dc6340a | 229 | |
AnnaBridge | 178:79309dc6340a | 230 | // disable interrupt for the given pin |
AnnaBridge | 178:79309dc6340a | 231 | gpio_irq_disable(obj); |
AnnaBridge | 178:79309dc6340a | 232 | |
AnnaBridge | 178:79309dc6340a | 233 | // clear the status table |
AnnaBridge | 178:79309dc6340a | 234 | channel_ids[port][pin_num].id = (uint32_t)0; |
AnnaBridge | 178:79309dc6340a | 235 | channel_ids[port][pin_num].event = IRQ_NONE; |
AnnaBridge | 178:79309dc6340a | 236 | channel_ids[port][pin_num].int_enable = 0; |
AnnaBridge | 178:79309dc6340a | 237 | } |
AnnaBridge | 178:79309dc6340a | 238 | |
AnnaBridge | 178:79309dc6340a | 239 | /** Enable/disable pin IRQ event |
AnnaBridge | 178:79309dc6340a | 240 | * |
AnnaBridge | 178:79309dc6340a | 241 | * @param obj The GPIO object |
AnnaBridge | 178:79309dc6340a | 242 | * @param event The GPIO IRQ event |
AnnaBridge | 178:79309dc6340a | 243 | * @param enable The enable flag |
AnnaBridge | 178:79309dc6340a | 244 | */ |
AnnaBridge | 178:79309dc6340a | 245 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) |
AnnaBridge | 178:79309dc6340a | 246 | { |
AnnaBridge | 178:79309dc6340a | 247 | uint16_t int_polarity_reg; |
AnnaBridge | 178:79309dc6340a | 248 | uint32_t port = obj->pinname >> GPIO_PORT_SHIFT; |
AnnaBridge | 178:79309dc6340a | 249 | uint32_t pin_num = obj->pinname & 0xFF; |
AnnaBridge | 178:79309dc6340a | 250 | |
AnnaBridge | 178:79309dc6340a | 251 | if (event == IRQ_NONE) { |
AnnaBridge | 178:79309dc6340a | 252 | return; |
AnnaBridge | 178:79309dc6340a | 253 | } |
AnnaBridge | 178:79309dc6340a | 254 | |
AnnaBridge | 178:79309dc6340a | 255 | // read the current polarity register |
AnnaBridge | 178:79309dc6340a | 256 | adi_gpio_GetGroupInterruptPolarity((ADI_GPIO_PORT)port, 1 << pin_num, &int_polarity_reg); |
AnnaBridge | 178:79309dc6340a | 257 | |
AnnaBridge | 178:79309dc6340a | 258 | if (event == IRQ_RISE) { |
AnnaBridge | 178:79309dc6340a | 259 | int_polarity_reg |= (1 << pin_num); |
AnnaBridge | 178:79309dc6340a | 260 | } else { |
AnnaBridge | 178:79309dc6340a | 261 | int_polarity_reg &= ~(1 << pin_num); |
AnnaBridge | 178:79309dc6340a | 262 | } |
AnnaBridge | 178:79309dc6340a | 263 | |
AnnaBridge | 178:79309dc6340a | 264 | // set the polarity register |
AnnaBridge | 178:79309dc6340a | 265 | adi_gpio_SetGroupInterruptPolarity((ADI_GPIO_PORT)port, int_polarity_reg); |
AnnaBridge | 178:79309dc6340a | 266 | |
AnnaBridge | 178:79309dc6340a | 267 | channel_ids[port][pin_num].event = event; |
AnnaBridge | 178:79309dc6340a | 268 | |
AnnaBridge | 178:79309dc6340a | 269 | // enable interrupt for this pin if enable flag is set |
AnnaBridge | 178:79309dc6340a | 270 | if (enable) { |
AnnaBridge | 178:79309dc6340a | 271 | gpio_irq_enable(obj); |
AnnaBridge | 178:79309dc6340a | 272 | } else { |
AnnaBridge | 178:79309dc6340a | 273 | gpio_irq_disable(obj); |
AnnaBridge | 178:79309dc6340a | 274 | } |
AnnaBridge | 178:79309dc6340a | 275 | } |
AnnaBridge | 178:79309dc6340a | 276 | |
AnnaBridge | 178:79309dc6340a | 277 | /** Enable GPIO IRQ |
AnnaBridge | 178:79309dc6340a | 278 | * |
AnnaBridge | 178:79309dc6340a | 279 | * This is target dependent, as it might enable the entire port or just a pin |
AnnaBridge | 178:79309dc6340a | 280 | * @param obj The GPIO object |
AnnaBridge | 178:79309dc6340a | 281 | */ |
AnnaBridge | 178:79309dc6340a | 282 | void gpio_irq_enable(gpio_irq_t *obj) |
AnnaBridge | 178:79309dc6340a | 283 | { |
AnnaBridge | 178:79309dc6340a | 284 | uint32_t port = obj->pinname >> GPIO_PORT_SHIFT; |
AnnaBridge | 178:79309dc6340a | 285 | uint32_t pin_num = obj->pinname & 0xFF; |
AnnaBridge | 178:79309dc6340a | 286 | |
AnnaBridge | 178:79309dc6340a | 287 | if (channel_ids[port][pin_num].event == IRQ_NONE) { |
AnnaBridge | 178:79309dc6340a | 288 | return; |
AnnaBridge | 178:79309dc6340a | 289 | } |
AnnaBridge | 178:79309dc6340a | 290 | |
AnnaBridge | 178:79309dc6340a | 291 | // Group all RISE interrupts in INTA and FALL interrupts in INTB |
AnnaBridge | 178:79309dc6340a | 292 | if (channel_ids[port][pin_num].event == IRQ_RISE) { |
AnnaBridge | 178:79309dc6340a | 293 | // set the callback routine |
AnnaBridge | 178:79309dc6340a | 294 | adi_gpio_RegisterCallback(SYS_GPIO_INTA_IRQn, gpio_irq_callback, obj); |
AnnaBridge | 178:79309dc6340a | 295 | enable_pin_interrupt((ADI_GPIO_PORT)port, pin_num, SYS_GPIO_INTA_IRQn); |
AnnaBridge | 178:79309dc6340a | 296 | } else if (channel_ids[port][pin_num].event == IRQ_FALL) { |
AnnaBridge | 178:79309dc6340a | 297 | // set the callback routine |
AnnaBridge | 178:79309dc6340a | 298 | adi_gpio_RegisterCallback(SYS_GPIO_INTB_IRQn, gpio_irq_callback, obj); |
AnnaBridge | 178:79309dc6340a | 299 | enable_pin_interrupt((ADI_GPIO_PORT)port, pin_num, SYS_GPIO_INTB_IRQn); |
AnnaBridge | 178:79309dc6340a | 300 | } |
AnnaBridge | 178:79309dc6340a | 301 | |
AnnaBridge | 178:79309dc6340a | 302 | channel_ids[port][pin_num].int_enable = 1; |
AnnaBridge | 178:79309dc6340a | 303 | } |
AnnaBridge | 178:79309dc6340a | 304 | |
AnnaBridge | 178:79309dc6340a | 305 | /** Disable GPIO IRQ |
AnnaBridge | 178:79309dc6340a | 306 | * |
AnnaBridge | 178:79309dc6340a | 307 | * This is target dependent, as it might disable the entire port or just a pin |
AnnaBridge | 178:79309dc6340a | 308 | * @param obj The GPIO object |
AnnaBridge | 178:79309dc6340a | 309 | */ |
AnnaBridge | 178:79309dc6340a | 310 | void gpio_irq_disable(gpio_irq_t *obj) |
AnnaBridge | 178:79309dc6340a | 311 | { |
AnnaBridge | 178:79309dc6340a | 312 | uint32_t port = obj->pinname >> GPIO_PORT_SHIFT; |
AnnaBridge | 178:79309dc6340a | 313 | uint32_t pin_num = obj->pinname & 0xFF; |
AnnaBridge | 178:79309dc6340a | 314 | |
AnnaBridge | 178:79309dc6340a | 315 | if (channel_ids[port][pin_num].event == IRQ_NONE) { |
AnnaBridge | 178:79309dc6340a | 316 | return; |
AnnaBridge | 178:79309dc6340a | 317 | } |
AnnaBridge | 178:79309dc6340a | 318 | |
AnnaBridge | 178:79309dc6340a | 319 | // Group all RISE interrupts in INTA and FALL interrupts in INTB |
AnnaBridge | 178:79309dc6340a | 320 | if (channel_ids[port][pin_num].event == IRQ_RISE) { |
AnnaBridge | 178:79309dc6340a | 321 | disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num); |
AnnaBridge | 178:79309dc6340a | 322 | } |
AnnaBridge | 178:79309dc6340a | 323 | else if (channel_ids[port][pin_num].event == IRQ_FALL) { |
AnnaBridge | 178:79309dc6340a | 324 | disable_pin_interrupt((ADI_GPIO_PORT)port, pin_num); |
AnnaBridge | 178:79309dc6340a | 325 | } |
AnnaBridge | 178:79309dc6340a | 326 | |
AnnaBridge | 178:79309dc6340a | 327 | channel_ids[port][pin_num].int_enable = 0; |
AnnaBridge | 178:79309dc6340a | 328 | } |
AnnaBridge | 178:79309dc6340a | 329 | |
AnnaBridge | 189:f392fc9709a3 | 330 | #endif // #if DEVICE_INTERRUPTIN |