mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
149:156823d33999
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 80:bdf1132a57cf 1 /* mbed Microcontroller Library
mbed_official 80:bdf1132a57cf 2 * Copyright (c) 2006-2015 ARM Limited
mbed_official 80:bdf1132a57cf 3 *
mbed_official 80:bdf1132a57cf 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 80:bdf1132a57cf 5 * you may not use this file except in compliance with the License.
mbed_official 80:bdf1132a57cf 6 * You may obtain a copy of the License at
mbed_official 80:bdf1132a57cf 7 *
mbed_official 80:bdf1132a57cf 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 80:bdf1132a57cf 9 *
mbed_official 80:bdf1132a57cf 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 80:bdf1132a57cf 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 80:bdf1132a57cf 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 80:bdf1132a57cf 13 * See the License for the specific language governing permissions and
mbed_official 80:bdf1132a57cf 14 * limitations under the License.
mbed_official 80:bdf1132a57cf 15 */
mbed_official 80:bdf1132a57cf 16 #include <stddef.h>
mbed_official 80:bdf1132a57cf 17 #include "cmsis.h"
mbed_official 80:bdf1132a57cf 18 #include "gpio_irq_api.h"
mbed_official 80:bdf1132a57cf 19 #include "mbed_error.h"
mbed_official 80:bdf1132a57cf 20
mbed_official 80:bdf1132a57cf 21 #define CHANNEL_NUM 32
mbed_official 80:bdf1132a57cf 22 #define CMSDK_GPIO_0 CMSDK_GPIO0
mbed_official 80:bdf1132a57cf 23 #define CMSDK_GPIO_1 CMSDK_GPIO1
mbed_official 80:bdf1132a57cf 24 #define PININT_IRQ 0
mbed_official 80:bdf1132a57cf 25
mbed_official 80:bdf1132a57cf 26 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 80:bdf1132a57cf 27 static gpio_irq_handler irq_handler;
mbed_official 80:bdf1132a57cf 28
mbed_official 80:bdf1132a57cf 29 static inline void handle_interrupt_in(uint32_t channel) {
mbed_official 80:bdf1132a57cf 30 uint32_t ch_bit = (1 << channel);
mbed_official 80:bdf1132a57cf 31 // Return immediately if:
mbed_official 80:bdf1132a57cf 32 // * The interrupt was already served
mbed_official 80:bdf1132a57cf 33 // * There is no user handler
mbed_official 80:bdf1132a57cf 34 // * It is a level interrupt, not an edge interrupt
mbed_official 80:bdf1132a57cf 35 if (ch_bit <16){
mbed_official 80:bdf1132a57cf 36 if ( ((CMSDK_GPIO_0->INTSTATUS) == 0) || (channel_ids[channel] == 0) || ((CMSDK_GPIO_0->INTTYPESET) == 0) ) return;
mbed_official 80:bdf1132a57cf 37
mbed_official 80:bdf1132a57cf 38 if ((CMSDK_GPIO_0->INTTYPESET & ch_bit) && (CMSDK_GPIO_0->INTPOLSET & ch_bit)) {
mbed_official 80:bdf1132a57cf 39 irq_handler(channel_ids[channel], IRQ_RISE);
mbed_official 80:bdf1132a57cf 40 CMSDK_GPIO_0->INTPOLSET = ch_bit;
mbed_official 80:bdf1132a57cf 41 }
mbed_official 80:bdf1132a57cf 42 if ((CMSDK_GPIO_0->INTTYPESET & ch_bit) && ~(CMSDK_GPIO_0->INTPOLSET & ch_bit)) {
mbed_official 80:bdf1132a57cf 43 irq_handler(channel_ids[channel], IRQ_FALL);
mbed_official 80:bdf1132a57cf 44 }
mbed_official 80:bdf1132a57cf 45 CMSDK_GPIO_0->INTCLEAR = ch_bit;
mbed_official 80:bdf1132a57cf 46 }
mbed_official 80:bdf1132a57cf 47
mbed_official 80:bdf1132a57cf 48 if (ch_bit>=16) {
mbed_official 80:bdf1132a57cf 49 if ( ((CMSDK_GPIO_1->INTSTATUS) == 0) || (channel_ids[channel] == 0) || ((CMSDK_GPIO_1->INTTYPESET) == 0) ) return;
mbed_official 80:bdf1132a57cf 50
mbed_official 80:bdf1132a57cf 51 if ((CMSDK_GPIO_1->INTTYPESET & ch_bit) && (CMSDK_GPIO_1->INTPOLSET & ch_bit)) {
mbed_official 80:bdf1132a57cf 52 irq_handler(channel_ids[channel], IRQ_RISE);
mbed_official 80:bdf1132a57cf 53 CMSDK_GPIO_1->INTPOLSET = ch_bit;
mbed_official 80:bdf1132a57cf 54 }
mbed_official 80:bdf1132a57cf 55 if ((CMSDK_GPIO_1->INTTYPESET & ch_bit) && ~(CMSDK_GPIO_1->INTPOLSET & ch_bit)) {
mbed_official 80:bdf1132a57cf 56 irq_handler(channel_ids[channel], IRQ_FALL);
mbed_official 80:bdf1132a57cf 57 }
mbed_official 80:bdf1132a57cf 58 CMSDK_GPIO_1->INTCLEAR = ch_bit;
mbed_official 80:bdf1132a57cf 59 }
mbed_official 80:bdf1132a57cf 60 }
mbed_official 80:bdf1132a57cf 61
mbed_official 80:bdf1132a57cf 62 void gpio0_irq0(void) {handle_interrupt_in(0);}
mbed_official 80:bdf1132a57cf 63 void gpio0_irq1(void) {handle_interrupt_in(1);}
mbed_official 80:bdf1132a57cf 64 void gpio0_irq2(void) {handle_interrupt_in(2);}
mbed_official 80:bdf1132a57cf 65 void gpio0_irq3(void) {handle_interrupt_in(3);}
mbed_official 80:bdf1132a57cf 66 void gpio0_irq4(void) {handle_interrupt_in(4);}
mbed_official 80:bdf1132a57cf 67 void gpio0_irq5(void) {handle_interrupt_in(5);}
mbed_official 80:bdf1132a57cf 68 void gpio0_irq6(void) {handle_interrupt_in(6);}
mbed_official 80:bdf1132a57cf 69 void gpio0_irq7(void) {handle_interrupt_in(7);}
mbed_official 80:bdf1132a57cf 70 void gpio0_irq8(void) {handle_interrupt_in(8);}
mbed_official 80:bdf1132a57cf 71 void gpio0_irq9(void) {handle_interrupt_in(9);}
mbed_official 80:bdf1132a57cf 72 void gpio0_irq10(void) {handle_interrupt_in(10);}
mbed_official 80:bdf1132a57cf 73 void gpio0_irq11(void) {handle_interrupt_in(11);}
mbed_official 80:bdf1132a57cf 74 void gpio0_irq12(void) {handle_interrupt_in(12);}
mbed_official 80:bdf1132a57cf 75 void gpio0_irq13(void) {handle_interrupt_in(13);}
mbed_official 80:bdf1132a57cf 76 void gpio0_irq14(void) {handle_interrupt_in(14);}
mbed_official 80:bdf1132a57cf 77 void gpio0_irq15(void) {handle_interrupt_in(15);}
mbed_official 80:bdf1132a57cf 78 void gpio1_irq0(void) {handle_interrupt_in(16);}
mbed_official 80:bdf1132a57cf 79 void gpio1_irq1(void) {handle_interrupt_in(17);}
mbed_official 80:bdf1132a57cf 80 void gpio1_irq2(void) {handle_interrupt_in(18);}
mbed_official 80:bdf1132a57cf 81 void gpio1_irq3(void) {handle_interrupt_in(19);}
mbed_official 80:bdf1132a57cf 82 void gpio1_irq4(void) {handle_interrupt_in(20);}
mbed_official 80:bdf1132a57cf 83 void gpio1_irq5(void) {handle_interrupt_in(21);}
mbed_official 80:bdf1132a57cf 84 void gpio1_irq6(void) {handle_interrupt_in(22);}
mbed_official 80:bdf1132a57cf 85 void gpio1_irq7(void) {handle_interrupt_in(23);}
mbed_official 80:bdf1132a57cf 86 void gpio1_irq8(void) {handle_interrupt_in(24);}
mbed_official 80:bdf1132a57cf 87 void gpio1_irq9(void) {handle_interrupt_in(25);}
mbed_official 80:bdf1132a57cf 88 void gpio1_irq10(void) {handle_interrupt_in(26);}
mbed_official 80:bdf1132a57cf 89 void gpio1_irq11(void) {handle_interrupt_in(27);}
mbed_official 80:bdf1132a57cf 90 void gpio1_irq12(void) {handle_interrupt_in(28);}
mbed_official 80:bdf1132a57cf 91 void gpio1_irq13(void) {handle_interrupt_in(29);}
mbed_official 80:bdf1132a57cf 92 void gpio1_irq14(void) {handle_interrupt_in(30);}
mbed_official 80:bdf1132a57cf 93 void gpio1_irq15(void) {handle_interrupt_in(31);}
mbed_official 80:bdf1132a57cf 94
mbed_official 80:bdf1132a57cf 95
mbed_official 80:bdf1132a57cf 96 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 80:bdf1132a57cf 97 if (pin == NC) {return -1;}
mbed_official 80:bdf1132a57cf 98 else {
mbed_official 80:bdf1132a57cf 99
mbed_official 80:bdf1132a57cf 100 irq_handler = handler;
mbed_official 80:bdf1132a57cf 101
mbed_official 80:bdf1132a57cf 102 int found_free_channel = 0;
mbed_official 80:bdf1132a57cf 103 int i = 0;
mbed_official 80:bdf1132a57cf 104 for (i=0; i<CHANNEL_NUM; i++) {
mbed_official 80:bdf1132a57cf 105 if (channel_ids[i] == 0) {
mbed_official 80:bdf1132a57cf 106 channel_ids[i] = id;
mbed_official 80:bdf1132a57cf 107 obj->ch = i;
mbed_official 80:bdf1132a57cf 108 found_free_channel = 1;
mbed_official 80:bdf1132a57cf 109 break;
mbed_official 80:bdf1132a57cf 110 }
mbed_official 80:bdf1132a57cf 111 }
mbed_official 80:bdf1132a57cf 112 if (!found_free_channel) return -1;
mbed_official 80:bdf1132a57cf 113
mbed_official 80:bdf1132a57cf 114
mbed_official 80:bdf1132a57cf 115 /* To select a pin for any of the eight pin interrupts, write the pin number
mbed_official 80:bdf1132a57cf 116 * as 0 to 23 for pins PIO0_0 to PIO0_23 and 24 to 55.
mbed_official 80:bdf1132a57cf 117 * @see: mbed_capi/PinNames.h
mbed_official 80:bdf1132a57cf 118 */
mbed_official 80:bdf1132a57cf 119 if (pin <16)
mbed_official 80:bdf1132a57cf 120 {
mbed_official 80:bdf1132a57cf 121 CMSDK_GPIO_0->INTENSET |= (0x1 << pin);
mbed_official 80:bdf1132a57cf 122 }
mbed_official 80:bdf1132a57cf 123
mbed_official 80:bdf1132a57cf 124 if (pin >= 16)
mbed_official 80:bdf1132a57cf 125 {
mbed_official 80:bdf1132a57cf 126 CMSDK_GPIO_1->INTENSET |= (0x1 << pin);
mbed_official 80:bdf1132a57cf 127 }
mbed_official 80:bdf1132a57cf 128
mbed_official 80:bdf1132a57cf 129 void (*channels_irq)(void) = NULL;
mbed_official 80:bdf1132a57cf 130 switch (obj->ch) {
mbed_official 80:bdf1132a57cf 131 case 0: channels_irq = &gpio0_irq0; break;
mbed_official 80:bdf1132a57cf 132 case 1: channels_irq = &gpio0_irq1; break;
mbed_official 80:bdf1132a57cf 133 case 2: channels_irq = &gpio0_irq2; break;
mbed_official 80:bdf1132a57cf 134 case 3: channels_irq = &gpio0_irq3; break;
mbed_official 80:bdf1132a57cf 135 case 4: channels_irq = &gpio0_irq4; break;
mbed_official 80:bdf1132a57cf 136 case 5: channels_irq = &gpio0_irq5; break;
mbed_official 80:bdf1132a57cf 137 case 6: channels_irq = &gpio0_irq6; break;
mbed_official 80:bdf1132a57cf 138 case 7: channels_irq = &gpio0_irq7; break;
mbed_official 80:bdf1132a57cf 139 case 8: channels_irq = &gpio0_irq8; break;
mbed_official 80:bdf1132a57cf 140 case 9: channels_irq = &gpio0_irq9; break;
mbed_official 80:bdf1132a57cf 141 case 10: channels_irq = &gpio0_irq10; break;
mbed_official 80:bdf1132a57cf 142 case 11: channels_irq = &gpio0_irq11; break;
mbed_official 80:bdf1132a57cf 143 case 12: channels_irq = &gpio0_irq12; break;
mbed_official 80:bdf1132a57cf 144 case 13: channels_irq = &gpio0_irq13; break;
mbed_official 80:bdf1132a57cf 145 case 14: channels_irq = &gpio0_irq14; break;
mbed_official 80:bdf1132a57cf 146 case 15: channels_irq = &gpio0_irq15; break;
mbed_official 80:bdf1132a57cf 147 case 16: channels_irq = &gpio1_irq0; break;
mbed_official 80:bdf1132a57cf 148 case 17: channels_irq = &gpio1_irq1; break;
mbed_official 80:bdf1132a57cf 149 case 18: channels_irq = &gpio1_irq2; break;
mbed_official 80:bdf1132a57cf 150 case 19: channels_irq = &gpio1_irq3; break;
mbed_official 80:bdf1132a57cf 151 case 20: channels_irq = &gpio1_irq4; break;
mbed_official 80:bdf1132a57cf 152 case 21: channels_irq = &gpio1_irq5; break;
mbed_official 80:bdf1132a57cf 153 case 22: channels_irq = &gpio1_irq6; break;
mbed_official 80:bdf1132a57cf 154 case 23: channels_irq = &gpio1_irq7; break;
mbed_official 80:bdf1132a57cf 155 case 24: channels_irq = &gpio1_irq8; break;
mbed_official 80:bdf1132a57cf 156 case 25: channels_irq = &gpio1_irq9; break;
mbed_official 80:bdf1132a57cf 157 case 26: channels_irq = &gpio1_irq10; break;
mbed_official 80:bdf1132a57cf 158 case 27: channels_irq = &gpio1_irq11; break;
mbed_official 80:bdf1132a57cf 159 case 28: channels_irq = &gpio1_irq12; break;
mbed_official 80:bdf1132a57cf 160 case 29: channels_irq = &gpio1_irq13; break;
mbed_official 80:bdf1132a57cf 161 case 30: channels_irq = &gpio1_irq14; break;
mbed_official 80:bdf1132a57cf 162 case 31: channels_irq = &gpio1_irq15; break;
mbed_official 80:bdf1132a57cf 163
mbed_official 80:bdf1132a57cf 164 }
mbed_official 80:bdf1132a57cf 165 NVIC_SetVector((IRQn_Type)(PININT_IRQ + obj->ch), (uint32_t)channels_irq);
mbed_official 80:bdf1132a57cf 166 NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
mbed_official 80:bdf1132a57cf 167
mbed_official 80:bdf1132a57cf 168 return 0;
mbed_official 80:bdf1132a57cf 169 }
mbed_official 80:bdf1132a57cf 170 }
mbed_official 80:bdf1132a57cf 171
mbed_official 80:bdf1132a57cf 172 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 80:bdf1132a57cf 173 }
mbed_official 80:bdf1132a57cf 174
mbed_official 80:bdf1132a57cf 175 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 80:bdf1132a57cf 176 unsigned int ch_bit = (1 << obj->ch);
mbed_official 80:bdf1132a57cf 177
mbed_official 80:bdf1132a57cf 178 // Clear interrupt
mbed_official 80:bdf1132a57cf 179 if (obj->ch <16)
mbed_official 80:bdf1132a57cf 180 {
mbed_official 80:bdf1132a57cf 181 if (!(CMSDK_GPIO_0->INTTYPESET & ch_bit))
mbed_official 80:bdf1132a57cf 182 {
mbed_official 80:bdf1132a57cf 183 CMSDK_GPIO_0->INTCLEAR = ch_bit;
mbed_official 80:bdf1132a57cf 184 }
mbed_official 80:bdf1132a57cf 185 }
mbed_official 80:bdf1132a57cf 186 if (obj->ch >= 16)
mbed_official 80:bdf1132a57cf 187 {
mbed_official 80:bdf1132a57cf 188 if (!(CMSDK_GPIO_1->INTTYPESET & ch_bit))
mbed_official 80:bdf1132a57cf 189 {
mbed_official 80:bdf1132a57cf 190 CMSDK_GPIO_1->INTCLEAR = ch_bit;
mbed_official 80:bdf1132a57cf 191 }
mbed_official 80:bdf1132a57cf 192 }
mbed_official 80:bdf1132a57cf 193
mbed_official 80:bdf1132a57cf 194 // Edge trigger
mbed_official 80:bdf1132a57cf 195 if (obj->ch <16)
mbed_official 80:bdf1132a57cf 196 {
mbed_official 80:bdf1132a57cf 197 CMSDK_GPIO_0->INTTYPESET &= ch_bit;
mbed_official 80:bdf1132a57cf 198 if (event == IRQ_RISE) {
mbed_official 80:bdf1132a57cf 199 CMSDK_GPIO_0->INTPOLSET |= ch_bit;
mbed_official 80:bdf1132a57cf 200 if (enable) {
mbed_official 80:bdf1132a57cf 201 CMSDK_GPIO_0->INTENSET |= ch_bit;
mbed_official 80:bdf1132a57cf 202 } else {
mbed_official 80:bdf1132a57cf 203 CMSDK_GPIO_0->INTENCLR |= ch_bit;
mbed_official 80:bdf1132a57cf 204 }
mbed_official 80:bdf1132a57cf 205 } else {
mbed_official 80:bdf1132a57cf 206 CMSDK_GPIO_0->INTPOLCLR |= ch_bit;
mbed_official 80:bdf1132a57cf 207 if (enable) {
mbed_official 80:bdf1132a57cf 208 CMSDK_GPIO_0->INTENSET |= ch_bit;
mbed_official 80:bdf1132a57cf 209 } else {
mbed_official 80:bdf1132a57cf 210 CMSDK_GPIO_0->INTENCLR |= ch_bit;
mbed_official 80:bdf1132a57cf 211 }
mbed_official 80:bdf1132a57cf 212 }
mbed_official 80:bdf1132a57cf 213 }
mbed_official 80:bdf1132a57cf 214 if (obj->ch >= 16)
mbed_official 80:bdf1132a57cf 215 {
mbed_official 80:bdf1132a57cf 216 CMSDK_GPIO_1->INTTYPESET &= ch_bit;
mbed_official 80:bdf1132a57cf 217 if (event == IRQ_RISE) {
mbed_official 80:bdf1132a57cf 218 CMSDK_GPIO_1->INTPOLSET |= ch_bit;
mbed_official 80:bdf1132a57cf 219 if (enable) {
mbed_official 80:bdf1132a57cf 220 CMSDK_GPIO_1->INTENSET |= ch_bit;
mbed_official 80:bdf1132a57cf 221 } else {
mbed_official 80:bdf1132a57cf 222 CMSDK_GPIO_1->INTENCLR |= ch_bit;
mbed_official 80:bdf1132a57cf 223 }
mbed_official 80:bdf1132a57cf 224 } else {
mbed_official 80:bdf1132a57cf 225 CMSDK_GPIO_1->INTPOLCLR |= ch_bit;
mbed_official 80:bdf1132a57cf 226 if (enable) {
mbed_official 80:bdf1132a57cf 227 CMSDK_GPIO_1->INTENSET |= ch_bit;
mbed_official 80:bdf1132a57cf 228 } else {
mbed_official 80:bdf1132a57cf 229 CMSDK_GPIO_1->INTENCLR |= ch_bit;
mbed_official 80:bdf1132a57cf 230 }
mbed_official 80:bdf1132a57cf 231 }
mbed_official 80:bdf1132a57cf 232 }
mbed_official 80:bdf1132a57cf 233 }
mbed_official 80:bdf1132a57cf 234
mbed_official 80:bdf1132a57cf 235 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 80:bdf1132a57cf 236 NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
mbed_official 80:bdf1132a57cf 237 }
mbed_official 80:bdf1132a57cf 238
mbed_official 80:bdf1132a57cf 239 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 80:bdf1132a57cf 240 NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
mbed_official 80:bdf1132a57cf 241 }