mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/gpio_irq_api.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 186:707f6e361f3e
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Anna Bridge |
186:707f6e361f3e | 1 | /* mbed Microcontroller Library |
Anna Bridge |
186:707f6e361f3e | 2 | * Copyright (c) 2006-2018 ARM Limited |
Anna Bridge |
186:707f6e361f3e | 3 | * |
Anna Bridge |
186:707f6e361f3e | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
Anna Bridge |
186:707f6e361f3e | 5 | * you may not use this file except in compliance with the License. |
Anna Bridge |
186:707f6e361f3e | 6 | * You may obtain a copy of the License at |
Anna Bridge |
186:707f6e361f3e | 7 | * |
Anna Bridge |
186:707f6e361f3e | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
Anna Bridge |
186:707f6e361f3e | 9 | * |
Anna Bridge |
186:707f6e361f3e | 10 | * Unless required by applicable law or agreed to in writing, software |
Anna Bridge |
186:707f6e361f3e | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
Anna Bridge |
186:707f6e361f3e | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
Anna Bridge |
186:707f6e361f3e | 13 | * See the License for the specific language governing permissions and |
Anna Bridge |
186:707f6e361f3e | 14 | * limitations under the License. |
Anna Bridge |
186:707f6e361f3e | 15 | */ |
Anna Bridge |
186:707f6e361f3e | 16 | #include <stddef.h> |
Anna Bridge |
186:707f6e361f3e | 17 | #include "cmsis.h" |
Anna Bridge |
186:707f6e361f3e | 18 | #include "gpio_irq_api.h" |
Anna Bridge |
186:707f6e361f3e | 19 | #include "mbed_error.h" |
Anna Bridge |
186:707f6e361f3e | 20 | |
Anna Bridge |
186:707f6e361f3e | 21 | #define CHANNEL_NUM 32 |
Anna Bridge |
186:707f6e361f3e | 22 | #define CMSDK_GPIO_0 CMSDK_GPIO0 |
Anna Bridge |
186:707f6e361f3e | 23 | #define CMSDK_GPIO_1 CMSDK_GPIO1 |
Anna Bridge |
186:707f6e361f3e | 24 | #define PININT_IRQ 0 |
Anna Bridge |
186:707f6e361f3e | 25 | |
Anna Bridge |
186:707f6e361f3e | 26 | static uint32_t channel_ids[CHANNEL_NUM] = {0}; |
Anna Bridge |
186:707f6e361f3e | 27 | static gpio_irq_handler irq_handler; |
Anna Bridge |
186:707f6e361f3e | 28 | |
Anna Bridge |
186:707f6e361f3e | 29 | static inline void handle_interrupt_in(uint32_t channel) |
Anna Bridge |
186:707f6e361f3e | 30 | { |
Anna Bridge |
186:707f6e361f3e | 31 | uint32_t ch_bit = (1 << channel); |
Anna Bridge |
186:707f6e361f3e | 32 | // Return immediately if: |
Anna Bridge |
186:707f6e361f3e | 33 | // * The interrupt was already served |
Anna Bridge |
186:707f6e361f3e | 34 | // * There is no user handler |
Anna Bridge |
186:707f6e361f3e | 35 | // * It is a level interrupt, not an edge interrupt |
Anna Bridge |
186:707f6e361f3e | 36 | if (ch_bit < 16) { |
Anna Bridge |
186:707f6e361f3e | 37 | if (((CMSDK_GPIO_0->INTSTATUS) == 0) || (channel_ids[channel] == 0) || ((CMSDK_GPIO_0->INTTYPESET) == 0)) { |
Anna Bridge |
186:707f6e361f3e | 38 | return; |
Anna Bridge |
186:707f6e361f3e | 39 | } |
Anna Bridge |
186:707f6e361f3e | 40 | |
Anna Bridge |
186:707f6e361f3e | 41 | if ((CMSDK_GPIO_0->INTTYPESET & ch_bit) && (CMSDK_GPIO_0->INTPOLSET & ch_bit)) { |
Anna Bridge |
186:707f6e361f3e | 42 | irq_handler(channel_ids[channel], IRQ_RISE); |
Anna Bridge |
186:707f6e361f3e | 43 | CMSDK_GPIO_0->INTPOLSET = ch_bit; |
Anna Bridge |
186:707f6e361f3e | 44 | } |
Anna Bridge |
186:707f6e361f3e | 45 | if ((CMSDK_GPIO_0->INTTYPESET & ch_bit) && ~(CMSDK_GPIO_0->INTPOLSET & ch_bit)) { |
Anna Bridge |
186:707f6e361f3e | 46 | irq_handler(channel_ids[channel], IRQ_FALL); |
Anna Bridge |
186:707f6e361f3e | 47 | } |
Anna Bridge |
186:707f6e361f3e | 48 | CMSDK_GPIO_0->INTCLEAR = ch_bit; |
Anna Bridge |
186:707f6e361f3e | 49 | } |
Anna Bridge |
186:707f6e361f3e | 50 | |
Anna Bridge |
186:707f6e361f3e | 51 | if (ch_bit >= 16) { |
Anna Bridge |
186:707f6e361f3e | 52 | if (((CMSDK_GPIO_1->INTSTATUS) == 0) || (channel_ids[channel] == 0) || ((CMSDK_GPIO_1->INTTYPESET) == 0)) { |
Anna Bridge |
186:707f6e361f3e | 53 | return; |
Anna Bridge |
186:707f6e361f3e | 54 | } |
Anna Bridge |
186:707f6e361f3e | 55 | |
Anna Bridge |
186:707f6e361f3e | 56 | if ((CMSDK_GPIO_1->INTTYPESET & ch_bit) && (CMSDK_GPIO_1->INTPOLSET & ch_bit)) { |
Anna Bridge |
186:707f6e361f3e | 57 | irq_handler(channel_ids[channel], IRQ_RISE); |
Anna Bridge |
186:707f6e361f3e | 58 | CMSDK_GPIO_1->INTPOLSET = ch_bit; |
Anna Bridge |
186:707f6e361f3e | 59 | } |
Anna Bridge |
186:707f6e361f3e | 60 | if ((CMSDK_GPIO_1->INTTYPESET & ch_bit) && ~(CMSDK_GPIO_1->INTPOLSET & ch_bit)) { |
Anna Bridge |
186:707f6e361f3e | 61 | irq_handler(channel_ids[channel], IRQ_FALL); |
Anna Bridge |
186:707f6e361f3e | 62 | } |
Anna Bridge |
186:707f6e361f3e | 63 | CMSDK_GPIO_1->INTCLEAR = ch_bit; |
Anna Bridge |
186:707f6e361f3e | 64 | } |
Anna Bridge |
186:707f6e361f3e | 65 | } |
Anna Bridge |
186:707f6e361f3e | 66 | |
Anna Bridge |
186:707f6e361f3e | 67 | void gpio0_irq0(void) |
Anna Bridge |
186:707f6e361f3e | 68 | { |
Anna Bridge |
186:707f6e361f3e | 69 | handle_interrupt_in(0); |
Anna Bridge |
186:707f6e361f3e | 70 | } |
Anna Bridge |
186:707f6e361f3e | 71 | void gpio0_irq1(void) |
Anna Bridge |
186:707f6e361f3e | 72 | { |
Anna Bridge |
186:707f6e361f3e | 73 | handle_interrupt_in(1); |
Anna Bridge |
186:707f6e361f3e | 74 | } |
Anna Bridge |
186:707f6e361f3e | 75 | void gpio0_irq2(void) |
Anna Bridge |
186:707f6e361f3e | 76 | { |
Anna Bridge |
186:707f6e361f3e | 77 | handle_interrupt_in(2); |
Anna Bridge |
186:707f6e361f3e | 78 | } |
Anna Bridge |
186:707f6e361f3e | 79 | void gpio0_irq3(void) |
Anna Bridge |
186:707f6e361f3e | 80 | { |
Anna Bridge |
186:707f6e361f3e | 81 | handle_interrupt_in(3); |
Anna Bridge |
186:707f6e361f3e | 82 | } |
Anna Bridge |
186:707f6e361f3e | 83 | void gpio0_irq4(void) |
Anna Bridge |
186:707f6e361f3e | 84 | { |
Anna Bridge |
186:707f6e361f3e | 85 | handle_interrupt_in(4); |
Anna Bridge |
186:707f6e361f3e | 86 | } |
Anna Bridge |
186:707f6e361f3e | 87 | void gpio0_irq5(void) |
Anna Bridge |
186:707f6e361f3e | 88 | { |
Anna Bridge |
186:707f6e361f3e | 89 | handle_interrupt_in(5); |
Anna Bridge |
186:707f6e361f3e | 90 | } |
Anna Bridge |
186:707f6e361f3e | 91 | void gpio0_irq6(void) |
Anna Bridge |
186:707f6e361f3e | 92 | { |
Anna Bridge |
186:707f6e361f3e | 93 | handle_interrupt_in(6); |
Anna Bridge |
186:707f6e361f3e | 94 | } |
Anna Bridge |
186:707f6e361f3e | 95 | void gpio0_irq7(void) |
Anna Bridge |
186:707f6e361f3e | 96 | { |
Anna Bridge |
186:707f6e361f3e | 97 | handle_interrupt_in(7); |
Anna Bridge |
186:707f6e361f3e | 98 | } |
Anna Bridge |
186:707f6e361f3e | 99 | void gpio0_irq8(void) |
Anna Bridge |
186:707f6e361f3e | 100 | { |
Anna Bridge |
186:707f6e361f3e | 101 | handle_interrupt_in(8); |
Anna Bridge |
186:707f6e361f3e | 102 | } |
Anna Bridge |
186:707f6e361f3e | 103 | void gpio0_irq9(void) |
Anna Bridge |
186:707f6e361f3e | 104 | { |
Anna Bridge |
186:707f6e361f3e | 105 | handle_interrupt_in(9); |
Anna Bridge |
186:707f6e361f3e | 106 | } |
Anna Bridge |
186:707f6e361f3e | 107 | void gpio0_irq10(void) |
Anna Bridge |
186:707f6e361f3e | 108 | { |
Anna Bridge |
186:707f6e361f3e | 109 | handle_interrupt_in(10); |
Anna Bridge |
186:707f6e361f3e | 110 | } |
Anna Bridge |
186:707f6e361f3e | 111 | void gpio0_irq11(void) |
Anna Bridge |
186:707f6e361f3e | 112 | { |
Anna Bridge |
186:707f6e361f3e | 113 | handle_interrupt_in(11); |
Anna Bridge |
186:707f6e361f3e | 114 | } |
Anna Bridge |
186:707f6e361f3e | 115 | void gpio0_irq12(void) |
Anna Bridge |
186:707f6e361f3e | 116 | { |
Anna Bridge |
186:707f6e361f3e | 117 | handle_interrupt_in(12); |
Anna Bridge |
186:707f6e361f3e | 118 | } |
Anna Bridge |
186:707f6e361f3e | 119 | void gpio0_irq13(void) |
Anna Bridge |
186:707f6e361f3e | 120 | { |
Anna Bridge |
186:707f6e361f3e | 121 | handle_interrupt_in(13); |
Anna Bridge |
186:707f6e361f3e | 122 | } |
Anna Bridge |
186:707f6e361f3e | 123 | void gpio0_irq14(void) |
Anna Bridge |
186:707f6e361f3e | 124 | { |
Anna Bridge |
186:707f6e361f3e | 125 | handle_interrupt_in(14); |
Anna Bridge |
186:707f6e361f3e | 126 | } |
Anna Bridge |
186:707f6e361f3e | 127 | void gpio0_irq15(void) |
Anna Bridge |
186:707f6e361f3e | 128 | { |
Anna Bridge |
186:707f6e361f3e | 129 | handle_interrupt_in(15); |
Anna Bridge |
186:707f6e361f3e | 130 | } |
Anna Bridge |
186:707f6e361f3e | 131 | void gpio1_irq0(void) |
Anna Bridge |
186:707f6e361f3e | 132 | { |
Anna Bridge |
186:707f6e361f3e | 133 | handle_interrupt_in(16); |
Anna Bridge |
186:707f6e361f3e | 134 | } |
Anna Bridge |
186:707f6e361f3e | 135 | void gpio1_irq1(void) |
Anna Bridge |
186:707f6e361f3e | 136 | { |
Anna Bridge |
186:707f6e361f3e | 137 | handle_interrupt_in(17); |
Anna Bridge |
186:707f6e361f3e | 138 | } |
Anna Bridge |
186:707f6e361f3e | 139 | void gpio1_irq2(void) |
Anna Bridge |
186:707f6e361f3e | 140 | { |
Anna Bridge |
186:707f6e361f3e | 141 | handle_interrupt_in(18); |
Anna Bridge |
186:707f6e361f3e | 142 | } |
Anna Bridge |
186:707f6e361f3e | 143 | void gpio1_irq3(void) |
Anna Bridge |
186:707f6e361f3e | 144 | { |
Anna Bridge |
186:707f6e361f3e | 145 | handle_interrupt_in(19); |
Anna Bridge |
186:707f6e361f3e | 146 | } |
Anna Bridge |
186:707f6e361f3e | 147 | void gpio1_irq4(void) |
Anna Bridge |
186:707f6e361f3e | 148 | { |
Anna Bridge |
186:707f6e361f3e | 149 | handle_interrupt_in(20); |
Anna Bridge |
186:707f6e361f3e | 150 | } |
Anna Bridge |
186:707f6e361f3e | 151 | void gpio1_irq5(void) |
Anna Bridge |
186:707f6e361f3e | 152 | { |
Anna Bridge |
186:707f6e361f3e | 153 | handle_interrupt_in(21); |
Anna Bridge |
186:707f6e361f3e | 154 | } |
Anna Bridge |
186:707f6e361f3e | 155 | void gpio1_irq6(void) |
Anna Bridge |
186:707f6e361f3e | 156 | { |
Anna Bridge |
186:707f6e361f3e | 157 | handle_interrupt_in(22); |
Anna Bridge |
186:707f6e361f3e | 158 | } |
Anna Bridge |
186:707f6e361f3e | 159 | void gpio1_irq7(void) |
Anna Bridge |
186:707f6e361f3e | 160 | { |
Anna Bridge |
186:707f6e361f3e | 161 | handle_interrupt_in(23); |
Anna Bridge |
186:707f6e361f3e | 162 | } |
Anna Bridge |
186:707f6e361f3e | 163 | void gpio1_irq8(void) |
Anna Bridge |
186:707f6e361f3e | 164 | { |
Anna Bridge |
186:707f6e361f3e | 165 | handle_interrupt_in(24); |
Anna Bridge |
186:707f6e361f3e | 166 | } |
Anna Bridge |
186:707f6e361f3e | 167 | void gpio1_irq9(void) |
Anna Bridge |
186:707f6e361f3e | 168 | { |
Anna Bridge |
186:707f6e361f3e | 169 | handle_interrupt_in(25); |
Anna Bridge |
186:707f6e361f3e | 170 | } |
Anna Bridge |
186:707f6e361f3e | 171 | void gpio1_irq10(void) |
Anna Bridge |
186:707f6e361f3e | 172 | { |
Anna Bridge |
186:707f6e361f3e | 173 | handle_interrupt_in(26); |
Anna Bridge |
186:707f6e361f3e | 174 | } |
Anna Bridge |
186:707f6e361f3e | 175 | void gpio1_irq11(void) |
Anna Bridge |
186:707f6e361f3e | 176 | { |
Anna Bridge |
186:707f6e361f3e | 177 | handle_interrupt_in(27); |
Anna Bridge |
186:707f6e361f3e | 178 | } |
Anna Bridge |
186:707f6e361f3e | 179 | void gpio1_irq12(void) |
Anna Bridge |
186:707f6e361f3e | 180 | { |
Anna Bridge |
186:707f6e361f3e | 181 | handle_interrupt_in(28); |
Anna Bridge |
186:707f6e361f3e | 182 | } |
Anna Bridge |
186:707f6e361f3e | 183 | void gpio1_irq13(void) |
Anna Bridge |
186:707f6e361f3e | 184 | { |
Anna Bridge |
186:707f6e361f3e | 185 | handle_interrupt_in(29); |
Anna Bridge |
186:707f6e361f3e | 186 | } |
Anna Bridge |
186:707f6e361f3e | 187 | void gpio1_irq14(void) |
Anna Bridge |
186:707f6e361f3e | 188 | { |
Anna Bridge |
186:707f6e361f3e | 189 | handle_interrupt_in(30); |
Anna Bridge |
186:707f6e361f3e | 190 | } |
Anna Bridge |
186:707f6e361f3e | 191 | void gpio1_irq15(void) |
Anna Bridge |
186:707f6e361f3e | 192 | { |
Anna Bridge |
186:707f6e361f3e | 193 | handle_interrupt_in(31); |
Anna Bridge |
186:707f6e361f3e | 194 | } |
Anna Bridge |
186:707f6e361f3e | 195 | |
Anna Bridge |
186:707f6e361f3e | 196 | |
Anna Bridge |
186:707f6e361f3e | 197 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) |
Anna Bridge |
186:707f6e361f3e | 198 | { |
Anna Bridge |
186:707f6e361f3e | 199 | if (pin == NC) { |
Anna Bridge |
186:707f6e361f3e | 200 | return -1; |
Anna Bridge |
186:707f6e361f3e | 201 | } else { |
Anna Bridge |
186:707f6e361f3e | 202 | |
Anna Bridge |
186:707f6e361f3e | 203 | irq_handler = handler; |
Anna Bridge |
186:707f6e361f3e | 204 | |
Anna Bridge |
186:707f6e361f3e | 205 | int found_free_channel = 0; |
Anna Bridge |
186:707f6e361f3e | 206 | int i = 0; |
Anna Bridge |
186:707f6e361f3e | 207 | for (i = 0; i < CHANNEL_NUM; i++) { |
Anna Bridge |
186:707f6e361f3e | 208 | if (channel_ids[i] == 0) { |
Anna Bridge |
186:707f6e361f3e | 209 | channel_ids[i] = id; |
Anna Bridge |
186:707f6e361f3e | 210 | obj->ch = i; |
Anna Bridge |
186:707f6e361f3e | 211 | found_free_channel = 1; |
Anna Bridge |
186:707f6e361f3e | 212 | break; |
Anna Bridge |
186:707f6e361f3e | 213 | } |
Anna Bridge |
186:707f6e361f3e | 214 | } |
Anna Bridge |
186:707f6e361f3e | 215 | if (!found_free_channel) { |
Anna Bridge |
186:707f6e361f3e | 216 | return -1; |
Anna Bridge |
186:707f6e361f3e | 217 | } |
Anna Bridge |
186:707f6e361f3e | 218 | |
Anna Bridge |
186:707f6e361f3e | 219 | |
Anna Bridge |
186:707f6e361f3e | 220 | /* To select a pin for any of the eight pin interrupts, write the pin number |
Anna Bridge |
186:707f6e361f3e | 221 | * as 0 to 23 for pins PIO0_0 to PIO0_23 and 24 to 55. |
Anna Bridge |
186:707f6e361f3e | 222 | * @see: mbed_capi/PinNames.h |
Anna Bridge |
186:707f6e361f3e | 223 | */ |
Anna Bridge |
186:707f6e361f3e | 224 | if (pin < 16) { |
Anna Bridge |
186:707f6e361f3e | 225 | CMSDK_GPIO_0->INTENSET |= (0x1 << pin); |
Anna Bridge |
186:707f6e361f3e | 226 | } |
Anna Bridge |
186:707f6e361f3e | 227 | |
Anna Bridge |
186:707f6e361f3e | 228 | if (pin >= 16) { |
Anna Bridge |
186:707f6e361f3e | 229 | CMSDK_GPIO_1->INTENSET |= (0x1 << pin); |
Anna Bridge |
186:707f6e361f3e | 230 | } |
Anna Bridge |
186:707f6e361f3e | 231 | |
Anna Bridge |
186:707f6e361f3e | 232 | void (*channels_irq)(void) = NULL; |
Anna Bridge |
186:707f6e361f3e | 233 | switch (obj->ch) { |
Anna Bridge |
186:707f6e361f3e | 234 | case 0: |
Anna Bridge |
186:707f6e361f3e | 235 | channels_irq = &gpio0_irq0; |
Anna Bridge |
186:707f6e361f3e | 236 | break; |
Anna Bridge |
186:707f6e361f3e | 237 | case 1: |
Anna Bridge |
186:707f6e361f3e | 238 | channels_irq = &gpio0_irq1; |
Anna Bridge |
186:707f6e361f3e | 239 | break; |
Anna Bridge |
186:707f6e361f3e | 240 | case 2: |
Anna Bridge |
186:707f6e361f3e | 241 | channels_irq = &gpio0_irq2; |
Anna Bridge |
186:707f6e361f3e | 242 | break; |
Anna Bridge |
186:707f6e361f3e | 243 | case 3: |
Anna Bridge |
186:707f6e361f3e | 244 | channels_irq = &gpio0_irq3; |
Anna Bridge |
186:707f6e361f3e | 245 | break; |
Anna Bridge |
186:707f6e361f3e | 246 | case 4: |
Anna Bridge |
186:707f6e361f3e | 247 | channels_irq = &gpio0_irq4; |
Anna Bridge |
186:707f6e361f3e | 248 | break; |
Anna Bridge |
186:707f6e361f3e | 249 | case 5: |
Anna Bridge |
186:707f6e361f3e | 250 | channels_irq = &gpio0_irq5; |
Anna Bridge |
186:707f6e361f3e | 251 | break; |
Anna Bridge |
186:707f6e361f3e | 252 | case 6: |
Anna Bridge |
186:707f6e361f3e | 253 | channels_irq = &gpio0_irq6; |
Anna Bridge |
186:707f6e361f3e | 254 | break; |
Anna Bridge |
186:707f6e361f3e | 255 | case 7: |
Anna Bridge |
186:707f6e361f3e | 256 | channels_irq = &gpio0_irq7; |
Anna Bridge |
186:707f6e361f3e | 257 | break; |
Anna Bridge |
186:707f6e361f3e | 258 | case 8: |
Anna Bridge |
186:707f6e361f3e | 259 | channels_irq = &gpio0_irq8; |
Anna Bridge |
186:707f6e361f3e | 260 | break; |
Anna Bridge |
186:707f6e361f3e | 261 | case 9: |
Anna Bridge |
186:707f6e361f3e | 262 | channels_irq = &gpio0_irq9; |
Anna Bridge |
186:707f6e361f3e | 263 | break; |
Anna Bridge |
186:707f6e361f3e | 264 | case 10: |
Anna Bridge |
186:707f6e361f3e | 265 | channels_irq = &gpio0_irq10; |
Anna Bridge |
186:707f6e361f3e | 266 | break; |
Anna Bridge |
186:707f6e361f3e | 267 | case 11: |
Anna Bridge |
186:707f6e361f3e | 268 | channels_irq = &gpio0_irq11; |
Anna Bridge |
186:707f6e361f3e | 269 | break; |
Anna Bridge |
186:707f6e361f3e | 270 | case 12: |
Anna Bridge |
186:707f6e361f3e | 271 | channels_irq = &gpio0_irq12; |
Anna Bridge |
186:707f6e361f3e | 272 | break; |
Anna Bridge |
186:707f6e361f3e | 273 | case 13: |
Anna Bridge |
186:707f6e361f3e | 274 | channels_irq = &gpio0_irq13; |
Anna Bridge |
186:707f6e361f3e | 275 | break; |
Anna Bridge |
186:707f6e361f3e | 276 | case 14: |
Anna Bridge |
186:707f6e361f3e | 277 | channels_irq = &gpio0_irq14; |
Anna Bridge |
186:707f6e361f3e | 278 | break; |
Anna Bridge |
186:707f6e361f3e | 279 | case 15: |
Anna Bridge |
186:707f6e361f3e | 280 | channels_irq = &gpio0_irq15; |
Anna Bridge |
186:707f6e361f3e | 281 | break; |
Anna Bridge |
186:707f6e361f3e | 282 | case 16: |
Anna Bridge |
186:707f6e361f3e | 283 | channels_irq = &gpio1_irq0; |
Anna Bridge |
186:707f6e361f3e | 284 | break; |
Anna Bridge |
186:707f6e361f3e | 285 | case 17: |
Anna Bridge |
186:707f6e361f3e | 286 | channels_irq = &gpio1_irq1; |
Anna Bridge |
186:707f6e361f3e | 287 | break; |
Anna Bridge |
186:707f6e361f3e | 288 | case 18: |
Anna Bridge |
186:707f6e361f3e | 289 | channels_irq = &gpio1_irq2; |
Anna Bridge |
186:707f6e361f3e | 290 | break; |
Anna Bridge |
186:707f6e361f3e | 291 | case 19: |
Anna Bridge |
186:707f6e361f3e | 292 | channels_irq = &gpio1_irq3; |
Anna Bridge |
186:707f6e361f3e | 293 | break; |
Anna Bridge |
186:707f6e361f3e | 294 | case 20: |
Anna Bridge |
186:707f6e361f3e | 295 | channels_irq = &gpio1_irq4; |
Anna Bridge |
186:707f6e361f3e | 296 | break; |
Anna Bridge |
186:707f6e361f3e | 297 | case 21: |
Anna Bridge |
186:707f6e361f3e | 298 | channels_irq = &gpio1_irq5; |
Anna Bridge |
186:707f6e361f3e | 299 | break; |
Anna Bridge |
186:707f6e361f3e | 300 | case 22: |
Anna Bridge |
186:707f6e361f3e | 301 | channels_irq = &gpio1_irq6; |
Anna Bridge |
186:707f6e361f3e | 302 | break; |
Anna Bridge |
186:707f6e361f3e | 303 | case 23: |
Anna Bridge |
186:707f6e361f3e | 304 | channels_irq = &gpio1_irq7; |
Anna Bridge |
186:707f6e361f3e | 305 | break; |
Anna Bridge |
186:707f6e361f3e | 306 | case 24: |
Anna Bridge |
186:707f6e361f3e | 307 | channels_irq = &gpio1_irq8; |
Anna Bridge |
186:707f6e361f3e | 308 | break; |
Anna Bridge |
186:707f6e361f3e | 309 | case 25: |
Anna Bridge |
186:707f6e361f3e | 310 | channels_irq = &gpio1_irq9; |
Anna Bridge |
186:707f6e361f3e | 311 | break; |
Anna Bridge |
186:707f6e361f3e | 312 | case 26: |
Anna Bridge |
186:707f6e361f3e | 313 | channels_irq = &gpio1_irq10; |
Anna Bridge |
186:707f6e361f3e | 314 | break; |
Anna Bridge |
186:707f6e361f3e | 315 | case 27: |
Anna Bridge |
186:707f6e361f3e | 316 | channels_irq = &gpio1_irq11; |
Anna Bridge |
186:707f6e361f3e | 317 | break; |
Anna Bridge |
186:707f6e361f3e | 318 | case 28: |
Anna Bridge |
186:707f6e361f3e | 319 | channels_irq = &gpio1_irq12; |
Anna Bridge |
186:707f6e361f3e | 320 | break; |
Anna Bridge |
186:707f6e361f3e | 321 | case 29: |
Anna Bridge |
186:707f6e361f3e | 322 | channels_irq = &gpio1_irq13; |
Anna Bridge |
186:707f6e361f3e | 323 | break; |
Anna Bridge |
186:707f6e361f3e | 324 | case 30: |
Anna Bridge |
186:707f6e361f3e | 325 | channels_irq = &gpio1_irq14; |
Anna Bridge |
186:707f6e361f3e | 326 | break; |
Anna Bridge |
186:707f6e361f3e | 327 | case 31: |
Anna Bridge |
186:707f6e361f3e | 328 | channels_irq = &gpio1_irq15; |
Anna Bridge |
186:707f6e361f3e | 329 | break; |
Anna Bridge |
186:707f6e361f3e | 330 | |
Anna Bridge |
186:707f6e361f3e | 331 | } |
Anna Bridge |
186:707f6e361f3e | 332 | NVIC_SetVector((IRQn_Type)(PININT_IRQ + obj->ch), (uint32_t)channels_irq); |
Anna Bridge |
186:707f6e361f3e | 333 | NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); |
Anna Bridge |
186:707f6e361f3e | 334 | |
Anna Bridge |
186:707f6e361f3e | 335 | return 0; |
Anna Bridge |
186:707f6e361f3e | 336 | } |
Anna Bridge |
186:707f6e361f3e | 337 | } |
Anna Bridge |
186:707f6e361f3e | 338 | |
Anna Bridge |
186:707f6e361f3e | 339 | void gpio_irq_free(gpio_irq_t *obj) |
Anna Bridge |
186:707f6e361f3e | 340 | { |
Anna Bridge |
186:707f6e361f3e | 341 | } |
Anna Bridge |
186:707f6e361f3e | 342 | |
Anna Bridge |
186:707f6e361f3e | 343 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) |
Anna Bridge |
186:707f6e361f3e | 344 | { |
Anna Bridge |
186:707f6e361f3e | 345 | unsigned int ch_bit = (1 << obj->ch); |
Anna Bridge |
186:707f6e361f3e | 346 | |
Anna Bridge |
186:707f6e361f3e | 347 | // Clear interrupt |
Anna Bridge |
186:707f6e361f3e | 348 | if (obj->ch < 16) { |
Anna Bridge |
186:707f6e361f3e | 349 | if (!(CMSDK_GPIO_0->INTTYPESET & ch_bit)) { |
Anna Bridge |
186:707f6e361f3e | 350 | CMSDK_GPIO_0->INTCLEAR = ch_bit; |
Anna Bridge |
186:707f6e361f3e | 351 | } |
Anna Bridge |
186:707f6e361f3e | 352 | } |
Anna Bridge |
186:707f6e361f3e | 353 | if (obj->ch >= 16) { |
Anna Bridge |
186:707f6e361f3e | 354 | if (!(CMSDK_GPIO_1->INTTYPESET & ch_bit)) { |
Anna Bridge |
186:707f6e361f3e | 355 | CMSDK_GPIO_1->INTCLEAR = ch_bit; |
Anna Bridge |
186:707f6e361f3e | 356 | } |
Anna Bridge |
186:707f6e361f3e | 357 | } |
Anna Bridge |
186:707f6e361f3e | 358 | |
Anna Bridge |
186:707f6e361f3e | 359 | // Edge trigger |
Anna Bridge |
186:707f6e361f3e | 360 | if (obj->ch < 16) { |
Anna Bridge |
186:707f6e361f3e | 361 | CMSDK_GPIO_0->INTTYPESET &= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 362 | if (event == IRQ_RISE) { |
Anna Bridge |
186:707f6e361f3e | 363 | CMSDK_GPIO_0->INTPOLSET |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 364 | if (enable) { |
Anna Bridge |
186:707f6e361f3e | 365 | CMSDK_GPIO_0->INTENSET |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 366 | } else { |
Anna Bridge |
186:707f6e361f3e | 367 | CMSDK_GPIO_0->INTENCLR |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 368 | } |
Anna Bridge |
186:707f6e361f3e | 369 | } else { |
Anna Bridge |
186:707f6e361f3e | 370 | CMSDK_GPIO_0->INTPOLCLR |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 371 | if (enable) { |
Anna Bridge |
186:707f6e361f3e | 372 | CMSDK_GPIO_0->INTENSET |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 373 | } else { |
Anna Bridge |
186:707f6e361f3e | 374 | CMSDK_GPIO_0->INTENCLR |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 375 | } |
Anna Bridge |
186:707f6e361f3e | 376 | } |
Anna Bridge |
186:707f6e361f3e | 377 | } |
Anna Bridge |
186:707f6e361f3e | 378 | if (obj->ch >= 16) { |
Anna Bridge |
186:707f6e361f3e | 379 | CMSDK_GPIO_1->INTTYPESET &= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 380 | if (event == IRQ_RISE) { |
Anna Bridge |
186:707f6e361f3e | 381 | CMSDK_GPIO_1->INTPOLSET |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 382 | if (enable) { |
Anna Bridge |
186:707f6e361f3e | 383 | CMSDK_GPIO_1->INTENSET |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 384 | } else { |
Anna Bridge |
186:707f6e361f3e | 385 | CMSDK_GPIO_1->INTENCLR |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 386 | } |
Anna Bridge |
186:707f6e361f3e | 387 | } else { |
Anna Bridge |
186:707f6e361f3e | 388 | CMSDK_GPIO_1->INTPOLCLR |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 389 | if (enable) { |
Anna Bridge |
186:707f6e361f3e | 390 | CMSDK_GPIO_1->INTENSET |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 391 | } else { |
Anna Bridge |
186:707f6e361f3e | 392 | CMSDK_GPIO_1->INTENCLR |= ch_bit; |
Anna Bridge |
186:707f6e361f3e | 393 | } |
Anna Bridge |
186:707f6e361f3e | 394 | } |
Anna Bridge |
186:707f6e361f3e | 395 | } |
Anna Bridge |
186:707f6e361f3e | 396 | } |
Anna Bridge |
186:707f6e361f3e | 397 | |
Anna Bridge |
186:707f6e361f3e | 398 | void gpio_irq_enable(gpio_irq_t *obj) |
Anna Bridge |
186:707f6e361f3e | 399 | { |
Anna Bridge |
186:707f6e361f3e | 400 | NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); |
Anna Bridge |
186:707f6e361f3e | 401 | } |
Anna Bridge |
186:707f6e361f3e | 402 | |
Anna Bridge |
186:707f6e361f3e | 403 | void gpio_irq_disable(gpio_irq_t *obj) |
Anna Bridge |
186:707f6e361f3e | 404 | { |
Anna Bridge |
186:707f6e361f3e | 405 | NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); |
Anna Bridge |
186:707f6e361f3e | 406 | } |