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cmsis/BUILD/mbed/TARGET_K82F/TOOLCHAIN_IAR/fsl_rcm.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /* |
| AnnaBridge | 189:f392fc9709a3 | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
| AnnaBridge | 189:f392fc9709a3 | 3 | * All rights reserved. |
| AnnaBridge | 189:f392fc9709a3 | 4 | * |
| AnnaBridge | 189:f392fc9709a3 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 6 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 7 | * |
| AnnaBridge | 189:f392fc9709a3 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
| AnnaBridge | 189:f392fc9709a3 | 9 | * of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
| AnnaBridge | 189:f392fc9709a3 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
| AnnaBridge | 189:f392fc9709a3 | 13 | * other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 14 | * |
| AnnaBridge | 189:f392fc9709a3 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
| AnnaBridge | 189:f392fc9709a3 | 16 | * contributors may be used to endorse or promote products derived from this |
| AnnaBridge | 189:f392fc9709a3 | 17 | * software without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * |
| AnnaBridge | 189:f392fc9709a3 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| AnnaBridge | 189:f392fc9709a3 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| AnnaBridge | 189:f392fc9709a3 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
| AnnaBridge | 189:f392fc9709a3 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| AnnaBridge | 189:f392fc9709a3 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| AnnaBridge | 189:f392fc9709a3 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| AnnaBridge | 189:f392fc9709a3 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| AnnaBridge | 189:f392fc9709a3 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 29 | */ |
| AnnaBridge | 189:f392fc9709a3 | 30 | #ifndef _FSL_RCM_H_ |
| AnnaBridge | 189:f392fc9709a3 | 31 | #define _FSL_RCM_H_ |
| AnnaBridge | 189:f392fc9709a3 | 32 | |
| AnnaBridge | 189:f392fc9709a3 | 33 | #include "fsl_common.h" |
| AnnaBridge | 189:f392fc9709a3 | 34 | |
| AnnaBridge | 189:f392fc9709a3 | 35 | /*! @addtogroup rcm */ |
| AnnaBridge | 189:f392fc9709a3 | 36 | /*! @{*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | |
| AnnaBridge | 189:f392fc9709a3 | 38 | |
| AnnaBridge | 189:f392fc9709a3 | 39 | /******************************************************************************* |
| AnnaBridge | 189:f392fc9709a3 | 40 | * Definitions |
| AnnaBridge | 189:f392fc9709a3 | 41 | ******************************************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 42 | |
| AnnaBridge | 189:f392fc9709a3 | 43 | /*! @name Driver version */ |
| AnnaBridge | 189:f392fc9709a3 | 44 | /*@{*/ |
| AnnaBridge | 189:f392fc9709a3 | 45 | /*! @brief RCM driver version 2.0.1. */ |
| AnnaBridge | 189:f392fc9709a3 | 46 | #define FSL_RCM_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) |
| AnnaBridge | 189:f392fc9709a3 | 47 | /*@}*/ |
| AnnaBridge | 189:f392fc9709a3 | 48 | |
| AnnaBridge | 189:f392fc9709a3 | 49 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 50 | * @brief System Reset Source Name definitions |
| AnnaBridge | 189:f392fc9709a3 | 51 | */ |
| AnnaBridge | 189:f392fc9709a3 | 52 | typedef enum _rcm_reset_source |
| AnnaBridge | 189:f392fc9709a3 | 53 | { |
| AnnaBridge | 189:f392fc9709a3 | 54 | #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32)) |
| AnnaBridge | 189:f392fc9709a3 | 55 | /* RCM register bit width is 32. */ |
| AnnaBridge | 189:f392fc9709a3 | 56 | #if (defined(FSL_FEATURE_RCM_HAS_WAKEUP) && FSL_FEATURE_RCM_HAS_WAKEUP) |
| AnnaBridge | 189:f392fc9709a3 | 57 | kRCM_SourceWakeup = RCM_SRS_WAKEUP_MASK, /*!< Low-leakage wakeup reset */ |
| AnnaBridge | 189:f392fc9709a3 | 58 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 59 | kRCM_SourceLvd = RCM_SRS_LVD_MASK, /*!< Low-voltage detect reset */ |
| AnnaBridge | 189:f392fc9709a3 | 60 | #if (defined(FSL_FEATURE_RCM_HAS_LOC) && FSL_FEATURE_RCM_HAS_LOC) |
| AnnaBridge | 189:f392fc9709a3 | 61 | kRCM_SourceLoc = RCM_SRS_LOC_MASK, /*!< Loss of clock reset */ |
| AnnaBridge | 189:f392fc9709a3 | 62 | #endif /* FSL_FEATURE_RCM_HAS_LOC */ |
| AnnaBridge | 189:f392fc9709a3 | 63 | #if (defined(FSL_FEATURE_RCM_HAS_LOL) && FSL_FEATURE_RCM_HAS_LOL) |
| AnnaBridge | 189:f392fc9709a3 | 64 | kRCM_SourceLol = RCM_SRS_LOL_MASK, /*!< Loss of lock reset */ |
| AnnaBridge | 189:f392fc9709a3 | 65 | #endif /* FSL_FEATURE_RCM_HAS_LOL */ |
| AnnaBridge | 189:f392fc9709a3 | 66 | kRCM_SourceWdog = RCM_SRS_WDOG_MASK, /*!< Watchdog reset */ |
| AnnaBridge | 189:f392fc9709a3 | 67 | kRCM_SourcePin = RCM_SRS_PIN_MASK, /*!< External pin reset */ |
| AnnaBridge | 189:f392fc9709a3 | 68 | kRCM_SourcePor = RCM_SRS_POR_MASK, /*!< Power on reset */ |
| AnnaBridge | 189:f392fc9709a3 | 69 | #if (defined(FSL_FEATURE_RCM_HAS_JTAG) && FSL_FEATURE_RCM_HAS_JTAG) |
| AnnaBridge | 189:f392fc9709a3 | 70 | kRCM_SourceJtag = RCM_SRS_JTAG_MASK, /*!< JTAG generated reset */ |
| AnnaBridge | 189:f392fc9709a3 | 71 | #endif /* FSL_FEATURE_RCM_HAS_JTAG */ |
| AnnaBridge | 189:f392fc9709a3 | 72 | kRCM_SourceLockup = RCM_SRS_LOCKUP_MASK, /*!< Core lock up reset */ |
| AnnaBridge | 189:f392fc9709a3 | 73 | kRCM_SourceSw = RCM_SRS_SW_MASK, /*!< Software reset */ |
| AnnaBridge | 189:f392fc9709a3 | 74 | #if (defined(FSL_FEATURE_RCM_HAS_MDM_AP) && FSL_FEATURE_RCM_HAS_MDM_AP) |
| AnnaBridge | 189:f392fc9709a3 | 75 | kRCM_SourceMdmap = RCM_SRS_MDM_AP_MASK, /*!< MDM-AP system reset */ |
| AnnaBridge | 189:f392fc9709a3 | 76 | #endif /* FSL_FEATURE_RCM_HAS_MDM_AP */ |
| AnnaBridge | 189:f392fc9709a3 | 77 | #if (defined(FSL_FEATURE_RCM_HAS_EZPORT) && FSL_FEATURE_RCM_HAS_EZPORT) |
| AnnaBridge | 189:f392fc9709a3 | 78 | kRCM_SourceEzpt = RCM_SRS_EZPT_MASK, /*!< EzPort reset */ |
| AnnaBridge | 189:f392fc9709a3 | 79 | #endif /* FSL_FEATURE_RCM_HAS_EZPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 80 | kRCM_SourceSackerr = RCM_SRS_SACKERR_MASK, /*!< Parameter could get all reset flags */ |
| AnnaBridge | 189:f392fc9709a3 | 81 | |
| AnnaBridge | 189:f392fc9709a3 | 82 | #else /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */ |
| AnnaBridge | 189:f392fc9709a3 | 83 | /* RCM register bit width is 8. */ |
| AnnaBridge | 189:f392fc9709a3 | 84 | #if (defined(FSL_FEATURE_RCM_HAS_WAKEUP) && FSL_FEATURE_RCM_HAS_WAKEUP) |
| AnnaBridge | 189:f392fc9709a3 | 85 | kRCM_SourceWakeup = RCM_SRS0_WAKEUP_MASK, /*!< Low-leakage wakeup reset */ |
| AnnaBridge | 189:f392fc9709a3 | 86 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 87 | kRCM_SourceLvd = RCM_SRS0_LVD_MASK, /*!< Low-voltage detect reset */ |
| AnnaBridge | 189:f392fc9709a3 | 88 | #if (defined(FSL_FEATURE_RCM_HAS_LOC) && FSL_FEATURE_RCM_HAS_LOC) |
| AnnaBridge | 189:f392fc9709a3 | 89 | kRCM_SourceLoc = RCM_SRS0_LOC_MASK, /*!< Loss of clock reset */ |
| AnnaBridge | 189:f392fc9709a3 | 90 | #endif /* FSL_FEATURE_RCM_HAS_LOC */ |
| AnnaBridge | 189:f392fc9709a3 | 91 | #if (defined(FSL_FEATURE_RCM_HAS_LOL) && FSL_FEATURE_RCM_HAS_LOL) |
| AnnaBridge | 189:f392fc9709a3 | 92 | kRCM_SourceLol = RCM_SRS0_LOL_MASK, /*!< Loss of lock reset */ |
| AnnaBridge | 189:f392fc9709a3 | 93 | #endif /* FSL_FEATURE_RCM_HAS_LOL */ |
| AnnaBridge | 189:f392fc9709a3 | 94 | kRCM_SourceWdog = RCM_SRS0_WDOG_MASK, /*!< Watchdog reset */ |
| AnnaBridge | 189:f392fc9709a3 | 95 | kRCM_SourcePin = RCM_SRS0_PIN_MASK, /*!< External pin reset */ |
| AnnaBridge | 189:f392fc9709a3 | 96 | kRCM_SourcePor = RCM_SRS0_POR_MASK, /*!< Power on reset */ |
| AnnaBridge | 189:f392fc9709a3 | 97 | #if (defined(FSL_FEATURE_RCM_HAS_JTAG) && FSL_FEATURE_RCM_HAS_JTAG) |
| AnnaBridge | 189:f392fc9709a3 | 98 | kRCM_SourceJtag = RCM_SRS1_JTAG_MASK << 8U, /*!< JTAG generated reset */ |
| AnnaBridge | 189:f392fc9709a3 | 99 | #endif /* FSL_FEATURE_RCM_HAS_JTAG */ |
| AnnaBridge | 189:f392fc9709a3 | 100 | kRCM_SourceLockup = RCM_SRS1_LOCKUP_MASK << 8U, /*!< Core lock up reset */ |
| AnnaBridge | 189:f392fc9709a3 | 101 | kRCM_SourceSw = RCM_SRS1_SW_MASK << 8U, /*!< Software reset */ |
| AnnaBridge | 189:f392fc9709a3 | 102 | #if (defined(FSL_FEATURE_RCM_HAS_MDM_AP) && FSL_FEATURE_RCM_HAS_MDM_AP) |
| AnnaBridge | 189:f392fc9709a3 | 103 | kRCM_SourceMdmap = RCM_SRS1_MDM_AP_MASK << 8U, /*!< MDM-AP system reset */ |
| AnnaBridge | 189:f392fc9709a3 | 104 | #endif /* FSL_FEATURE_RCM_HAS_MDM_AP */ |
| AnnaBridge | 189:f392fc9709a3 | 105 | #if (defined(FSL_FEATURE_RCM_HAS_EZPORT) && FSL_FEATURE_RCM_HAS_EZPORT) |
| AnnaBridge | 189:f392fc9709a3 | 106 | kRCM_SourceEzpt = RCM_SRS1_EZPT_MASK << 8U, /*!< EzPort reset */ |
| AnnaBridge | 189:f392fc9709a3 | 107 | #endif /* FSL_FEATURE_RCM_HAS_EZPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 108 | kRCM_SourceSackerr = RCM_SRS1_SACKERR_MASK << 8U, /*!< Parameter could get all reset flags */ |
| AnnaBridge | 189:f392fc9709a3 | 109 | #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */ |
| AnnaBridge | 189:f392fc9709a3 | 110 | kRCM_SourceAll = 0xffffffffU, |
| AnnaBridge | 189:f392fc9709a3 | 111 | } rcm_reset_source_t; |
| AnnaBridge | 189:f392fc9709a3 | 112 | |
| AnnaBridge | 189:f392fc9709a3 | 113 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 114 | * @brief Reset pin filter select in Run and Wait modes. |
| AnnaBridge | 189:f392fc9709a3 | 115 | */ |
| AnnaBridge | 189:f392fc9709a3 | 116 | typedef enum _rcm_run_wait_filter_mode |
| AnnaBridge | 189:f392fc9709a3 | 117 | { |
| AnnaBridge | 189:f392fc9709a3 | 118 | kRCM_FilterDisable = 0U, /*!< All filtering disabled */ |
| AnnaBridge | 189:f392fc9709a3 | 119 | kRCM_FilterBusClock = 1U, /*!< Bus clock filter enabled */ |
| AnnaBridge | 189:f392fc9709a3 | 120 | kRCM_FilterLpoClock = 2U /*!< LPO clock filter enabled */ |
| AnnaBridge | 189:f392fc9709a3 | 121 | } rcm_run_wait_filter_mode_t; |
| AnnaBridge | 189:f392fc9709a3 | 122 | |
| AnnaBridge | 189:f392fc9709a3 | 123 | #if (defined(FSL_FEATURE_RCM_HAS_BOOTROM) && FSL_FEATURE_RCM_HAS_BOOTROM) |
| AnnaBridge | 189:f392fc9709a3 | 124 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 125 | * @brief Boot from ROM configuration. |
| AnnaBridge | 189:f392fc9709a3 | 126 | */ |
| AnnaBridge | 189:f392fc9709a3 | 127 | typedef enum _rcm_boot_rom_config |
| AnnaBridge | 189:f392fc9709a3 | 128 | { |
| AnnaBridge | 189:f392fc9709a3 | 129 | kRCM_BootFlash = 0U, /*!< Boot from flash */ |
| AnnaBridge | 189:f392fc9709a3 | 130 | kRCM_BootRomCfg0 = 1U, /*!< Boot from boot ROM due to BOOTCFG0 */ |
| AnnaBridge | 189:f392fc9709a3 | 131 | kRCM_BootRomFopt = 2U, /*!< Boot from boot ROM due to FOPT[7] */ |
| AnnaBridge | 189:f392fc9709a3 | 132 | kRCM_BootRomBoth = 3U /*!< Boot from boot ROM due to both BOOTCFG0 and FOPT[7] */ |
| AnnaBridge | 189:f392fc9709a3 | 133 | } rcm_boot_rom_config_t; |
| AnnaBridge | 189:f392fc9709a3 | 134 | #endif /* FSL_FEATURE_RCM_HAS_BOOTROM */ |
| AnnaBridge | 189:f392fc9709a3 | 135 | |
| AnnaBridge | 189:f392fc9709a3 | 136 | #if (defined(FSL_FEATURE_RCM_HAS_SRIE) && FSL_FEATURE_RCM_HAS_SRIE) |
| AnnaBridge | 189:f392fc9709a3 | 137 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 138 | * @brief Maximum delay time from interrupt asserts to system reset. |
| AnnaBridge | 189:f392fc9709a3 | 139 | */ |
| AnnaBridge | 189:f392fc9709a3 | 140 | typedef enum _rcm_reset_delay |
| AnnaBridge | 189:f392fc9709a3 | 141 | { |
| AnnaBridge | 189:f392fc9709a3 | 142 | kRCM_ResetDelay8Lpo = 0U, /*!< Delay 8 LPO cycles. */ |
| AnnaBridge | 189:f392fc9709a3 | 143 | kRCM_ResetDelay32Lpo = 1U, /*!< Delay 32 LPO cycles. */ |
| AnnaBridge | 189:f392fc9709a3 | 144 | kRCM_ResetDelay128Lpo = 2U, /*!< Delay 128 LPO cycles. */ |
| AnnaBridge | 189:f392fc9709a3 | 145 | kRCM_ResetDelay512Lpo = 3U /*!< Delay 512 LPO cycles. */ |
| AnnaBridge | 189:f392fc9709a3 | 146 | } rcm_reset_delay_t; |
| AnnaBridge | 189:f392fc9709a3 | 147 | |
| AnnaBridge | 189:f392fc9709a3 | 148 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 149 | * @brief System reset interrupt enable bit definitions. |
| AnnaBridge | 189:f392fc9709a3 | 150 | */ |
| AnnaBridge | 189:f392fc9709a3 | 151 | typedef enum _rcm_interrupt_enable |
| AnnaBridge | 189:f392fc9709a3 | 152 | { |
| AnnaBridge | 189:f392fc9709a3 | 153 | kRCM_IntNone = 0U, /*!< No interrupt enabled. */ |
| AnnaBridge | 189:f392fc9709a3 | 154 | kRCM_IntLossOfClk = RCM_SRIE_LOC_MASK, /*!< Loss of clock interrupt. */ |
| AnnaBridge | 189:f392fc9709a3 | 155 | kRCM_IntLossOfLock = RCM_SRIE_LOL_MASK, /*!< Loss of lock interrupt. */ |
| AnnaBridge | 189:f392fc9709a3 | 156 | kRCM_IntWatchDog = RCM_SRIE_WDOG_MASK, /*!< Watch dog interrupt. */ |
| AnnaBridge | 189:f392fc9709a3 | 157 | kRCM_IntExternalPin = RCM_SRIE_PIN_MASK, /*!< External pin interrupt. */ |
| AnnaBridge | 189:f392fc9709a3 | 158 | kRCM_IntGlobal = RCM_SRIE_GIE_MASK, /*!< Global interrupts. */ |
| AnnaBridge | 189:f392fc9709a3 | 159 | kRCM_IntCoreLockup = RCM_SRIE_LOCKUP_MASK, /*!< Core lock up interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 160 | kRCM_IntSoftware = RCM_SRIE_SW_MASK, /*!< software interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 161 | kRCM_IntStopModeAckErr = RCM_SRIE_SACKERR_MASK, /*!< Stop mode ACK error interrupt. */ |
| AnnaBridge | 189:f392fc9709a3 | 162 | #if (defined(FSL_FEATURE_RCM_HAS_CORE1) && FSL_FEATURE_RCM_HAS_CORE1) |
| AnnaBridge | 189:f392fc9709a3 | 163 | kRCM_IntCore1 = RCM_SRIE_CORE1_MASK, /*!< Core 1 interrupt. */ |
| AnnaBridge | 189:f392fc9709a3 | 164 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 165 | kRCM_IntAll = RCM_SRIE_LOC_MASK /*!< Enable all interrupts. */ |
| AnnaBridge | 189:f392fc9709a3 | 166 | | |
| AnnaBridge | 189:f392fc9709a3 | 167 | RCM_SRIE_LOL_MASK | RCM_SRIE_WDOG_MASK | RCM_SRIE_PIN_MASK | RCM_SRIE_GIE_MASK | |
| AnnaBridge | 189:f392fc9709a3 | 168 | RCM_SRIE_LOCKUP_MASK | RCM_SRIE_SW_MASK | RCM_SRIE_SACKERR_MASK |
| AnnaBridge | 189:f392fc9709a3 | 169 | #if (defined(FSL_FEATURE_RCM_HAS_CORE1) && FSL_FEATURE_RCM_HAS_CORE1) |
| AnnaBridge | 189:f392fc9709a3 | 170 | | |
| AnnaBridge | 189:f392fc9709a3 | 171 | RCM_SRIE_CORE1_MASK |
| AnnaBridge | 189:f392fc9709a3 | 172 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 173 | } rcm_interrupt_enable_t; |
| AnnaBridge | 189:f392fc9709a3 | 174 | #endif /* FSL_FEATURE_RCM_HAS_SRIE */ |
| AnnaBridge | 189:f392fc9709a3 | 175 | |
| AnnaBridge | 189:f392fc9709a3 | 176 | #if (defined(FSL_FEATURE_RCM_HAS_VERID) && FSL_FEATURE_RCM_HAS_VERID) |
| AnnaBridge | 189:f392fc9709a3 | 177 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 178 | * @brief IP version ID definition. |
| AnnaBridge | 189:f392fc9709a3 | 179 | */ |
| AnnaBridge | 189:f392fc9709a3 | 180 | typedef struct _rcm_version_id |
| AnnaBridge | 189:f392fc9709a3 | 181 | { |
| AnnaBridge | 189:f392fc9709a3 | 182 | uint16_t feature; /*!< Feature Specification Number. */ |
| AnnaBridge | 189:f392fc9709a3 | 183 | uint8_t minor; /*!< Minor version number. */ |
| AnnaBridge | 189:f392fc9709a3 | 184 | uint8_t major; /*!< Major version number. */ |
| AnnaBridge | 189:f392fc9709a3 | 185 | } rcm_version_id_t; |
| AnnaBridge | 189:f392fc9709a3 | 186 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 187 | |
| AnnaBridge | 189:f392fc9709a3 | 188 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 189 | * @brief Reset pin filter configuration. |
| AnnaBridge | 189:f392fc9709a3 | 190 | */ |
| AnnaBridge | 189:f392fc9709a3 | 191 | typedef struct _rcm_reset_pin_filter_config |
| AnnaBridge | 189:f392fc9709a3 | 192 | { |
| AnnaBridge | 189:f392fc9709a3 | 193 | bool enableFilterInStop; /*!< Reset pin filter select in stop mode. */ |
| AnnaBridge | 189:f392fc9709a3 | 194 | rcm_run_wait_filter_mode_t filterInRunWait; /*!< Reset pin filter in run/wait mode. */ |
| AnnaBridge | 189:f392fc9709a3 | 195 | uint8_t busClockFilterCount; /*!< Reset pin bus clock filter width. */ |
| AnnaBridge | 189:f392fc9709a3 | 196 | } rcm_reset_pin_filter_config_t; |
| AnnaBridge | 189:f392fc9709a3 | 197 | |
| AnnaBridge | 189:f392fc9709a3 | 198 | /******************************************************************************* |
| AnnaBridge | 189:f392fc9709a3 | 199 | * API |
| AnnaBridge | 189:f392fc9709a3 | 200 | ******************************************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 201 | #if defined(__cplusplus) |
| AnnaBridge | 189:f392fc9709a3 | 202 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 203 | #endif /* __cplusplus*/ |
| AnnaBridge | 189:f392fc9709a3 | 204 | |
| AnnaBridge | 189:f392fc9709a3 | 205 | /*! @name Reset Control Module APIs*/ |
| AnnaBridge | 189:f392fc9709a3 | 206 | /*@{*/ |
| AnnaBridge | 189:f392fc9709a3 | 207 | |
| AnnaBridge | 189:f392fc9709a3 | 208 | #if (defined(FSL_FEATURE_RCM_HAS_VERID) && FSL_FEATURE_RCM_HAS_VERID) |
| AnnaBridge | 189:f392fc9709a3 | 209 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 210 | * @brief Gets the RCM version ID. |
| AnnaBridge | 189:f392fc9709a3 | 211 | * |
| AnnaBridge | 189:f392fc9709a3 | 212 | * This function gets the RCM version ID including the major version number, |
| AnnaBridge | 189:f392fc9709a3 | 213 | * the minor version number, and the feature specification number. |
| AnnaBridge | 189:f392fc9709a3 | 214 | * |
| AnnaBridge | 189:f392fc9709a3 | 215 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 216 | * @param versionId Pointer to the version ID structure. |
| AnnaBridge | 189:f392fc9709a3 | 217 | */ |
| AnnaBridge | 189:f392fc9709a3 | 218 | static inline void RCM_GetVersionId(RCM_Type *base, rcm_version_id_t *versionId) |
| AnnaBridge | 189:f392fc9709a3 | 219 | { |
| AnnaBridge | 189:f392fc9709a3 | 220 | *((uint32_t *)versionId) = base->VERID; |
| AnnaBridge | 189:f392fc9709a3 | 221 | } |
| AnnaBridge | 189:f392fc9709a3 | 222 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 223 | |
| AnnaBridge | 189:f392fc9709a3 | 224 | #if (defined(FSL_FEATURE_RCM_HAS_PARAM) && FSL_FEATURE_RCM_HAS_PARAM) |
| AnnaBridge | 189:f392fc9709a3 | 225 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 226 | * @brief Gets the reset source implemented status. |
| AnnaBridge | 189:f392fc9709a3 | 227 | * |
| AnnaBridge | 189:f392fc9709a3 | 228 | * This function gets the RCM parameter that indicates whether the corresponding reset source is implemented. |
| AnnaBridge | 189:f392fc9709a3 | 229 | * Use source masks defined in the rcm_reset_source_t to get the desired source status. |
| AnnaBridge | 189:f392fc9709a3 | 230 | * |
| AnnaBridge | 189:f392fc9709a3 | 231 | * This is an example. |
| AnnaBridge | 189:f392fc9709a3 | 232 | @code |
| AnnaBridge | 189:f392fc9709a3 | 233 | uint32_t status; |
| AnnaBridge | 189:f392fc9709a3 | 234 | |
| AnnaBridge | 189:f392fc9709a3 | 235 | // To test whether the MCU is reset using Watchdog. |
| AnnaBridge | 189:f392fc9709a3 | 236 | status = RCM_GetResetSourceImplementedStatus(RCM) & (kRCM_SourceWdog | kRCM_SourcePin); |
| AnnaBridge | 189:f392fc9709a3 | 237 | @endcode |
| AnnaBridge | 189:f392fc9709a3 | 238 | * |
| AnnaBridge | 189:f392fc9709a3 | 239 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 240 | * @return All reset source implemented status bit map. |
| AnnaBridge | 189:f392fc9709a3 | 241 | */ |
| AnnaBridge | 189:f392fc9709a3 | 242 | static inline uint32_t RCM_GetResetSourceImplementedStatus(RCM_Type *base) |
| AnnaBridge | 189:f392fc9709a3 | 243 | { |
| AnnaBridge | 189:f392fc9709a3 | 244 | return base->PARAM; |
| AnnaBridge | 189:f392fc9709a3 | 245 | } |
| AnnaBridge | 189:f392fc9709a3 | 246 | #endif /* FSL_FEATURE_RCM_HAS_PARAM */ |
| AnnaBridge | 189:f392fc9709a3 | 247 | |
| AnnaBridge | 189:f392fc9709a3 | 248 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 249 | * @brief Gets the reset source status which caused a previous reset. |
| AnnaBridge | 189:f392fc9709a3 | 250 | * |
| AnnaBridge | 189:f392fc9709a3 | 251 | * This function gets the current reset source status. Use source masks |
| AnnaBridge | 189:f392fc9709a3 | 252 | * defined in the rcm_reset_source_t to get the desired source status. |
| AnnaBridge | 189:f392fc9709a3 | 253 | * |
| AnnaBridge | 189:f392fc9709a3 | 254 | * This is an example. |
| AnnaBridge | 189:f392fc9709a3 | 255 | @code |
| AnnaBridge | 189:f392fc9709a3 | 256 | uint32_t resetStatus; |
| AnnaBridge | 189:f392fc9709a3 | 257 | |
| AnnaBridge | 189:f392fc9709a3 | 258 | // To get all reset source statuses. |
| AnnaBridge | 189:f392fc9709a3 | 259 | resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceAll; |
| AnnaBridge | 189:f392fc9709a3 | 260 | |
| AnnaBridge | 189:f392fc9709a3 | 261 | // To test whether the MCU is reset using Watchdog. |
| AnnaBridge | 189:f392fc9709a3 | 262 | resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceWdog; |
| AnnaBridge | 189:f392fc9709a3 | 263 | |
| AnnaBridge | 189:f392fc9709a3 | 264 | // To test multiple reset sources. |
| AnnaBridge | 189:f392fc9709a3 | 265 | resetStatus = RCM_GetPreviousResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin); |
| AnnaBridge | 189:f392fc9709a3 | 266 | @endcode |
| AnnaBridge | 189:f392fc9709a3 | 267 | * |
| AnnaBridge | 189:f392fc9709a3 | 268 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 269 | * @return All reset source status bit map. |
| AnnaBridge | 189:f392fc9709a3 | 270 | */ |
| AnnaBridge | 189:f392fc9709a3 | 271 | static inline uint32_t RCM_GetPreviousResetSources(RCM_Type *base) |
| AnnaBridge | 189:f392fc9709a3 | 272 | { |
| AnnaBridge | 189:f392fc9709a3 | 273 | #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32)) |
| AnnaBridge | 189:f392fc9709a3 | 274 | return base->SRS; |
| AnnaBridge | 189:f392fc9709a3 | 275 | #else |
| AnnaBridge | 189:f392fc9709a3 | 276 | return (uint32_t)((uint32_t)base->SRS0 | ((uint32_t)base->SRS1 << 8U)); |
| AnnaBridge | 189:f392fc9709a3 | 277 | #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */ |
| AnnaBridge | 189:f392fc9709a3 | 278 | } |
| AnnaBridge | 189:f392fc9709a3 | 279 | |
| AnnaBridge | 189:f392fc9709a3 | 280 | #if (defined(FSL_FEATURE_RCM_HAS_SSRS) && FSL_FEATURE_RCM_HAS_SSRS) |
| AnnaBridge | 189:f392fc9709a3 | 281 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 282 | * @brief Gets the sticky reset source status. |
| AnnaBridge | 189:f392fc9709a3 | 283 | * |
| AnnaBridge | 189:f392fc9709a3 | 284 | * This function gets the current reset source status that has not been cleared |
| AnnaBridge | 189:f392fc9709a3 | 285 | * by software for a specific source. |
| AnnaBridge | 189:f392fc9709a3 | 286 | * |
| AnnaBridge | 189:f392fc9709a3 | 287 | * This is an example. |
| AnnaBridge | 189:f392fc9709a3 | 288 | @code |
| AnnaBridge | 189:f392fc9709a3 | 289 | uint32_t resetStatus; |
| AnnaBridge | 189:f392fc9709a3 | 290 | |
| AnnaBridge | 189:f392fc9709a3 | 291 | // To get all reset source statuses. |
| AnnaBridge | 189:f392fc9709a3 | 292 | resetStatus = RCM_GetStickyResetSources(RCM) & kRCM_SourceAll; |
| AnnaBridge | 189:f392fc9709a3 | 293 | |
| AnnaBridge | 189:f392fc9709a3 | 294 | // To test whether the MCU is reset using Watchdog. |
| AnnaBridge | 189:f392fc9709a3 | 295 | resetStatus = RCM_GetStickyResetSources(RCM) & kRCM_SourceWdog; |
| AnnaBridge | 189:f392fc9709a3 | 296 | |
| AnnaBridge | 189:f392fc9709a3 | 297 | // To test multiple reset sources. |
| AnnaBridge | 189:f392fc9709a3 | 298 | resetStatus = RCM_GetStickyResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin); |
| AnnaBridge | 189:f392fc9709a3 | 299 | @endcode |
| AnnaBridge | 189:f392fc9709a3 | 300 | * |
| AnnaBridge | 189:f392fc9709a3 | 301 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 302 | * @return All reset source status bit map. |
| AnnaBridge | 189:f392fc9709a3 | 303 | */ |
| AnnaBridge | 189:f392fc9709a3 | 304 | static inline uint32_t RCM_GetStickyResetSources(RCM_Type *base) |
| AnnaBridge | 189:f392fc9709a3 | 305 | { |
| AnnaBridge | 189:f392fc9709a3 | 306 | #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32)) |
| AnnaBridge | 189:f392fc9709a3 | 307 | return base->SSRS; |
| AnnaBridge | 189:f392fc9709a3 | 308 | #else |
| AnnaBridge | 189:f392fc9709a3 | 309 | return (base->SSRS0 | ((uint32_t)base->SSRS1 << 8U)); |
| AnnaBridge | 189:f392fc9709a3 | 310 | #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */ |
| AnnaBridge | 189:f392fc9709a3 | 311 | } |
| AnnaBridge | 189:f392fc9709a3 | 312 | |
| AnnaBridge | 189:f392fc9709a3 | 313 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 314 | * @brief Clears the sticky reset source status. |
| AnnaBridge | 189:f392fc9709a3 | 315 | * |
| AnnaBridge | 189:f392fc9709a3 | 316 | * This function clears the sticky system reset flags indicated by source masks. |
| AnnaBridge | 189:f392fc9709a3 | 317 | * |
| AnnaBridge | 189:f392fc9709a3 | 318 | * This is an example. |
| AnnaBridge | 189:f392fc9709a3 | 319 | @code |
| AnnaBridge | 189:f392fc9709a3 | 320 | // Clears multiple reset sources. |
| AnnaBridge | 189:f392fc9709a3 | 321 | RCM_ClearStickyResetSources(kRCM_SourceWdog | kRCM_SourcePin); |
| AnnaBridge | 189:f392fc9709a3 | 322 | @endcode |
| AnnaBridge | 189:f392fc9709a3 | 323 | * |
| AnnaBridge | 189:f392fc9709a3 | 324 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 325 | * @param sourceMasks reset source status bit map |
| AnnaBridge | 189:f392fc9709a3 | 326 | */ |
| AnnaBridge | 189:f392fc9709a3 | 327 | static inline void RCM_ClearStickyResetSources(RCM_Type *base, uint32_t sourceMasks) |
| AnnaBridge | 189:f392fc9709a3 | 328 | { |
| AnnaBridge | 189:f392fc9709a3 | 329 | #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32)) |
| AnnaBridge | 189:f392fc9709a3 | 330 | base->SSRS = sourceMasks; |
| AnnaBridge | 189:f392fc9709a3 | 331 | #else |
| AnnaBridge | 189:f392fc9709a3 | 332 | base->SSRS0 = (sourceMasks & 0xffU); |
| AnnaBridge | 189:f392fc9709a3 | 333 | base->SSRS1 = ((sourceMasks >> 8U) & 0xffU); |
| AnnaBridge | 189:f392fc9709a3 | 334 | #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */ |
| AnnaBridge | 189:f392fc9709a3 | 335 | } |
| AnnaBridge | 189:f392fc9709a3 | 336 | #endif /* FSL_FEATURE_RCM_HAS_SSRS */ |
| AnnaBridge | 189:f392fc9709a3 | 337 | |
| AnnaBridge | 189:f392fc9709a3 | 338 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 339 | * @brief Configures the reset pin filter. |
| AnnaBridge | 189:f392fc9709a3 | 340 | * |
| AnnaBridge | 189:f392fc9709a3 | 341 | * This function sets the reset pin filter including the filter source, filter |
| AnnaBridge | 189:f392fc9709a3 | 342 | * width, and so on. |
| AnnaBridge | 189:f392fc9709a3 | 343 | * |
| AnnaBridge | 189:f392fc9709a3 | 344 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 345 | * @param config Pointer to the configuration structure. |
| AnnaBridge | 189:f392fc9709a3 | 346 | */ |
| AnnaBridge | 189:f392fc9709a3 | 347 | void RCM_ConfigureResetPinFilter(RCM_Type *base, const rcm_reset_pin_filter_config_t *config); |
| AnnaBridge | 189:f392fc9709a3 | 348 | |
| AnnaBridge | 189:f392fc9709a3 | 349 | #if (defined(FSL_FEATURE_RCM_HAS_EZPMS) && FSL_FEATURE_RCM_HAS_EZPMS) |
| AnnaBridge | 189:f392fc9709a3 | 350 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 351 | * @brief Gets the EZP_MS_B pin assert status. |
| AnnaBridge | 189:f392fc9709a3 | 352 | * |
| AnnaBridge | 189:f392fc9709a3 | 353 | * This function gets the easy port mode status (EZP_MS_B) pin assert status. |
| AnnaBridge | 189:f392fc9709a3 | 354 | * |
| AnnaBridge | 189:f392fc9709a3 | 355 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 356 | * @return status true - asserted, false - reasserted |
| AnnaBridge | 189:f392fc9709a3 | 357 | */ |
| AnnaBridge | 189:f392fc9709a3 | 358 | static inline bool RCM_GetEasyPortModePinStatus(RCM_Type *base) |
| AnnaBridge | 189:f392fc9709a3 | 359 | { |
| AnnaBridge | 189:f392fc9709a3 | 360 | return (bool)(base->MR & RCM_MR_EZP_MS_MASK); |
| AnnaBridge | 189:f392fc9709a3 | 361 | } |
| AnnaBridge | 189:f392fc9709a3 | 362 | #endif /* FSL_FEATURE_RCM_HAS_EZPMS */ |
| AnnaBridge | 189:f392fc9709a3 | 363 | |
| AnnaBridge | 189:f392fc9709a3 | 364 | #if (defined(FSL_FEATURE_RCM_HAS_BOOTROM) && FSL_FEATURE_RCM_HAS_BOOTROM) |
| AnnaBridge | 189:f392fc9709a3 | 365 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 366 | * @brief Gets the ROM boot source. |
| AnnaBridge | 189:f392fc9709a3 | 367 | * |
| AnnaBridge | 189:f392fc9709a3 | 368 | * This function gets the ROM boot source during the last chip reset. |
| AnnaBridge | 189:f392fc9709a3 | 369 | * |
| AnnaBridge | 189:f392fc9709a3 | 370 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 371 | * @return The ROM boot source. |
| AnnaBridge | 189:f392fc9709a3 | 372 | */ |
| AnnaBridge | 189:f392fc9709a3 | 373 | static inline rcm_boot_rom_config_t RCM_GetBootRomSource(RCM_Type *base) |
| AnnaBridge | 189:f392fc9709a3 | 374 | { |
| AnnaBridge | 189:f392fc9709a3 | 375 | return (rcm_boot_rom_config_t)((base->MR & RCM_MR_BOOTROM_MASK) >> RCM_MR_BOOTROM_SHIFT); |
| AnnaBridge | 189:f392fc9709a3 | 376 | } |
| AnnaBridge | 189:f392fc9709a3 | 377 | |
| AnnaBridge | 189:f392fc9709a3 | 378 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 379 | * @brief Clears the ROM boot source flag. |
| AnnaBridge | 189:f392fc9709a3 | 380 | * |
| AnnaBridge | 189:f392fc9709a3 | 381 | * This function clears the ROM boot source flag. |
| AnnaBridge | 189:f392fc9709a3 | 382 | * |
| AnnaBridge | 189:f392fc9709a3 | 383 | * @param base Register base address of RCM |
| AnnaBridge | 189:f392fc9709a3 | 384 | */ |
| AnnaBridge | 189:f392fc9709a3 | 385 | static inline void RCM_ClearBootRomSource(RCM_Type *base) |
| AnnaBridge | 189:f392fc9709a3 | 386 | { |
| AnnaBridge | 189:f392fc9709a3 | 387 | base->MR |= RCM_MR_BOOTROM_MASK; |
| AnnaBridge | 189:f392fc9709a3 | 388 | } |
| AnnaBridge | 189:f392fc9709a3 | 389 | |
| AnnaBridge | 189:f392fc9709a3 | 390 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 391 | * @brief Forces the boot from ROM. |
| AnnaBridge | 189:f392fc9709a3 | 392 | * |
| AnnaBridge | 189:f392fc9709a3 | 393 | * This function forces booting from ROM during all subsequent system resets. |
| AnnaBridge | 189:f392fc9709a3 | 394 | * |
| AnnaBridge | 189:f392fc9709a3 | 395 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 396 | * @param config Boot configuration. |
| AnnaBridge | 189:f392fc9709a3 | 397 | */ |
| AnnaBridge | 189:f392fc9709a3 | 398 | void RCM_SetForceBootRomSource(RCM_Type *base, rcm_boot_rom_config_t config); |
| AnnaBridge | 189:f392fc9709a3 | 399 | #endif /* FSL_FEATURE_RCM_HAS_BOOTROM */ |
| AnnaBridge | 189:f392fc9709a3 | 400 | |
| AnnaBridge | 189:f392fc9709a3 | 401 | #if (defined(FSL_FEATURE_RCM_HAS_SRIE) && FSL_FEATURE_RCM_HAS_SRIE) |
| AnnaBridge | 189:f392fc9709a3 | 402 | /*! |
| AnnaBridge | 189:f392fc9709a3 | 403 | * @brief Sets the system reset interrupt configuration. |
| AnnaBridge | 189:f392fc9709a3 | 404 | * |
| AnnaBridge | 189:f392fc9709a3 | 405 | * For a graceful shut down, the RCM supports delaying the assertion of the system |
| AnnaBridge | 189:f392fc9709a3 | 406 | * reset for a period of time when the reset interrupt is generated. This function |
| AnnaBridge | 189:f392fc9709a3 | 407 | * can be used to enable the interrupt and the delay period. The interrupts |
| AnnaBridge | 189:f392fc9709a3 | 408 | * are passed in as bit mask. See rcm_int_t for details. For example, to |
| AnnaBridge | 189:f392fc9709a3 | 409 | * delay a reset for 512 LPO cycles after the WDOG timeout or loss-of-clock occurs, |
| AnnaBridge | 189:f392fc9709a3 | 410 | * configure as follows: |
| AnnaBridge | 189:f392fc9709a3 | 411 | * RCM_SetSystemResetInterruptConfig(kRCM_IntWatchDog | kRCM_IntLossOfClk, kRCM_ResetDelay512Lpo); |
| AnnaBridge | 189:f392fc9709a3 | 412 | * |
| AnnaBridge | 189:f392fc9709a3 | 413 | * @param base RCM peripheral base address. |
| AnnaBridge | 189:f392fc9709a3 | 414 | * @param intMask Bit mask of the system reset interrupts to enable. See |
| AnnaBridge | 189:f392fc9709a3 | 415 | * rcm_interrupt_enable_t for details. |
| AnnaBridge | 189:f392fc9709a3 | 416 | * @param Delay Bit mask of the system reset interrupts to enable. |
| AnnaBridge | 189:f392fc9709a3 | 417 | */ |
| AnnaBridge | 189:f392fc9709a3 | 418 | static inline void RCM_SetSystemResetInterruptConfig(RCM_Type *base, uint32_t intMask, rcm_reset_delay_t delay) |
| AnnaBridge | 189:f392fc9709a3 | 419 | { |
| AnnaBridge | 189:f392fc9709a3 | 420 | base->SRIE = (intMask | delay); |
| AnnaBridge | 189:f392fc9709a3 | 421 | } |
| AnnaBridge | 189:f392fc9709a3 | 422 | #endif /* FSL_FEATURE_RCM_HAS_SRIE */ |
| AnnaBridge | 189:f392fc9709a3 | 423 | /*@}*/ |
| AnnaBridge | 189:f392fc9709a3 | 424 | |
| AnnaBridge | 189:f392fc9709a3 | 425 | #if defined(__cplusplus) |
| AnnaBridge | 189:f392fc9709a3 | 426 | } |
| AnnaBridge | 189:f392fc9709a3 | 427 | #endif /* __cplusplus*/ |
| AnnaBridge | 189:f392fc9709a3 | 428 | |
| AnnaBridge | 189:f392fc9709a3 | 429 | /*! @}*/ |
| AnnaBridge | 189:f392fc9709a3 | 430 | |
| AnnaBridge | 189:f392fc9709a3 | 431 | #endif /* _FSL_RCM_H_ */ |
