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cmsis/BUILD/mbed/TARGET_K82F/TOOLCHAIN_IAR/fsl_lptmr.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

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AnnaBridge 189:f392fc9709a3 1 /*
AnnaBridge 189:f392fc9709a3 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 189:f392fc9709a3 3 * All rights reserved.
AnnaBridge 189:f392fc9709a3 4 *
AnnaBridge 189:f392fc9709a3 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 6 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 7 *
AnnaBridge 189:f392fc9709a3 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 189:f392fc9709a3 9 * of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 10 *
AnnaBridge 189:f392fc9709a3 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 189:f392fc9709a3 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 189:f392fc9709a3 13 * other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 14 *
AnnaBridge 189:f392fc9709a3 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 189:f392fc9709a3 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 189:f392fc9709a3 17 * software without specific prior written permission.
AnnaBridge 189:f392fc9709a3 18 *
AnnaBridge 189:f392fc9709a3 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 189:f392fc9709a3 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 189:f392fc9709a3 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 189:f392fc9709a3 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 189:f392fc9709a3 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 189:f392fc9709a3 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 189:f392fc9709a3 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 189:f392fc9709a3 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 189:f392fc9709a3 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 29 */
AnnaBridge 189:f392fc9709a3 30 #ifndef _FSL_LPTMR_H_
AnnaBridge 189:f392fc9709a3 31 #define _FSL_LPTMR_H_
AnnaBridge 189:f392fc9709a3 32
AnnaBridge 189:f392fc9709a3 33 #include "fsl_common.h"
AnnaBridge 189:f392fc9709a3 34
AnnaBridge 189:f392fc9709a3 35 /*!
AnnaBridge 189:f392fc9709a3 36 * @addtogroup lptmr
AnnaBridge 189:f392fc9709a3 37 * @{
AnnaBridge 189:f392fc9709a3 38 */
AnnaBridge 189:f392fc9709a3 39
AnnaBridge 189:f392fc9709a3 40 /*******************************************************************************
AnnaBridge 189:f392fc9709a3 41 * Definitions
AnnaBridge 189:f392fc9709a3 42 ******************************************************************************/
AnnaBridge 189:f392fc9709a3 43
AnnaBridge 189:f392fc9709a3 44 /*! @name Driver version */
AnnaBridge 189:f392fc9709a3 45 /*@{*/
AnnaBridge 189:f392fc9709a3 46 #define FSL_LPTMR_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0 */
AnnaBridge 189:f392fc9709a3 47 /*@}*/
AnnaBridge 189:f392fc9709a3 48
AnnaBridge 189:f392fc9709a3 49 /*! @brief LPTMR pin selection used in pulse counter mode.*/
AnnaBridge 189:f392fc9709a3 50 typedef enum _lptmr_pin_select
AnnaBridge 189:f392fc9709a3 51 {
AnnaBridge 189:f392fc9709a3 52 kLPTMR_PinSelectInput_0 = 0x0U, /*!< Pulse counter input 0 is selected */
AnnaBridge 189:f392fc9709a3 53 kLPTMR_PinSelectInput_1 = 0x1U, /*!< Pulse counter input 1 is selected */
AnnaBridge 189:f392fc9709a3 54 kLPTMR_PinSelectInput_2 = 0x2U, /*!< Pulse counter input 2 is selected */
AnnaBridge 189:f392fc9709a3 55 kLPTMR_PinSelectInput_3 = 0x3U /*!< Pulse counter input 3 is selected */
AnnaBridge 189:f392fc9709a3 56 } lptmr_pin_select_t;
AnnaBridge 189:f392fc9709a3 57
AnnaBridge 189:f392fc9709a3 58 /*! @brief LPTMR pin polarity used in pulse counter mode.*/
AnnaBridge 189:f392fc9709a3 59 typedef enum _lptmr_pin_polarity
AnnaBridge 189:f392fc9709a3 60 {
AnnaBridge 189:f392fc9709a3 61 kLPTMR_PinPolarityActiveHigh = 0x0U, /*!< Pulse Counter input source is active-high */
AnnaBridge 189:f392fc9709a3 62 kLPTMR_PinPolarityActiveLow = 0x1U /*!< Pulse Counter input source is active-low */
AnnaBridge 189:f392fc9709a3 63 } lptmr_pin_polarity_t;
AnnaBridge 189:f392fc9709a3 64
AnnaBridge 189:f392fc9709a3 65 /*! @brief LPTMR timer mode selection.*/
AnnaBridge 189:f392fc9709a3 66 typedef enum _lptmr_timer_mode
AnnaBridge 189:f392fc9709a3 67 {
AnnaBridge 189:f392fc9709a3 68 kLPTMR_TimerModeTimeCounter = 0x0U, /*!< Time Counter mode */
AnnaBridge 189:f392fc9709a3 69 kLPTMR_TimerModePulseCounter = 0x1U /*!< Pulse Counter mode */
AnnaBridge 189:f392fc9709a3 70 } lptmr_timer_mode_t;
AnnaBridge 189:f392fc9709a3 71
AnnaBridge 189:f392fc9709a3 72 /*! @brief LPTMR prescaler/glitch filter values*/
AnnaBridge 189:f392fc9709a3 73 typedef enum _lptmr_prescaler_glitch_value
AnnaBridge 189:f392fc9709a3 74 {
AnnaBridge 189:f392fc9709a3 75 kLPTMR_Prescale_Glitch_0 = 0x0U, /*!< Prescaler divide 2, glitch filter does not support this setting */
AnnaBridge 189:f392fc9709a3 76 kLPTMR_Prescale_Glitch_1 = 0x1U, /*!< Prescaler divide 4, glitch filter 2 */
AnnaBridge 189:f392fc9709a3 77 kLPTMR_Prescale_Glitch_2 = 0x2U, /*!< Prescaler divide 8, glitch filter 4 */
AnnaBridge 189:f392fc9709a3 78 kLPTMR_Prescale_Glitch_3 = 0x3U, /*!< Prescaler divide 16, glitch filter 8 */
AnnaBridge 189:f392fc9709a3 79 kLPTMR_Prescale_Glitch_4 = 0x4U, /*!< Prescaler divide 32, glitch filter 16 */
AnnaBridge 189:f392fc9709a3 80 kLPTMR_Prescale_Glitch_5 = 0x5U, /*!< Prescaler divide 64, glitch filter 32 */
AnnaBridge 189:f392fc9709a3 81 kLPTMR_Prescale_Glitch_6 = 0x6U, /*!< Prescaler divide 128, glitch filter 64 */
AnnaBridge 189:f392fc9709a3 82 kLPTMR_Prescale_Glitch_7 = 0x7U, /*!< Prescaler divide 256, glitch filter 128 */
AnnaBridge 189:f392fc9709a3 83 kLPTMR_Prescale_Glitch_8 = 0x8U, /*!< Prescaler divide 512, glitch filter 256 */
AnnaBridge 189:f392fc9709a3 84 kLPTMR_Prescale_Glitch_9 = 0x9U, /*!< Prescaler divide 1024, glitch filter 512*/
AnnaBridge 189:f392fc9709a3 85 kLPTMR_Prescale_Glitch_10 = 0xAU, /*!< Prescaler divide 2048 glitch filter 1024 */
AnnaBridge 189:f392fc9709a3 86 kLPTMR_Prescale_Glitch_11 = 0xBU, /*!< Prescaler divide 4096, glitch filter 2048 */
AnnaBridge 189:f392fc9709a3 87 kLPTMR_Prescale_Glitch_12 = 0xCU, /*!< Prescaler divide 8192, glitch filter 4096 */
AnnaBridge 189:f392fc9709a3 88 kLPTMR_Prescale_Glitch_13 = 0xDU, /*!< Prescaler divide 16384, glitch filter 8192 */
AnnaBridge 189:f392fc9709a3 89 kLPTMR_Prescale_Glitch_14 = 0xEU, /*!< Prescaler divide 32768, glitch filter 16384 */
AnnaBridge 189:f392fc9709a3 90 kLPTMR_Prescale_Glitch_15 = 0xFU /*!< Prescaler divide 65536, glitch filter 32768 */
AnnaBridge 189:f392fc9709a3 91 } lptmr_prescaler_glitch_value_t;
AnnaBridge 189:f392fc9709a3 92
AnnaBridge 189:f392fc9709a3 93 /*!
AnnaBridge 189:f392fc9709a3 94 * @brief LPTMR prescaler/glitch filter clock select.
AnnaBridge 189:f392fc9709a3 95 * @note Clock connections are SoC-specific
AnnaBridge 189:f392fc9709a3 96 */
AnnaBridge 189:f392fc9709a3 97 typedef enum _lptmr_prescaler_clock_select
AnnaBridge 189:f392fc9709a3 98 {
AnnaBridge 189:f392fc9709a3 99 kLPTMR_PrescalerClock_0 = 0x0U, /*!< Prescaler/glitch filter clock 0 selected. */
AnnaBridge 189:f392fc9709a3 100 kLPTMR_PrescalerClock_1 = 0x1U, /*!< Prescaler/glitch filter clock 1 selected. */
AnnaBridge 189:f392fc9709a3 101 kLPTMR_PrescalerClock_2 = 0x2U, /*!< Prescaler/glitch filter clock 2 selected. */
AnnaBridge 189:f392fc9709a3 102 kLPTMR_PrescalerClock_3 = 0x3U, /*!< Prescaler/glitch filter clock 3 selected. */
AnnaBridge 189:f392fc9709a3 103 } lptmr_prescaler_clock_select_t;
AnnaBridge 189:f392fc9709a3 104
AnnaBridge 189:f392fc9709a3 105 /*! @brief List of the LPTMR interrupts */
AnnaBridge 189:f392fc9709a3 106 typedef enum _lptmr_interrupt_enable
AnnaBridge 189:f392fc9709a3 107 {
AnnaBridge 189:f392fc9709a3 108 kLPTMR_TimerInterruptEnable = LPTMR_CSR_TIE_MASK, /*!< Timer interrupt enable */
AnnaBridge 189:f392fc9709a3 109 } lptmr_interrupt_enable_t;
AnnaBridge 189:f392fc9709a3 110
AnnaBridge 189:f392fc9709a3 111 /*! @brief List of the LPTMR status flags */
AnnaBridge 189:f392fc9709a3 112 typedef enum _lptmr_status_flags
AnnaBridge 189:f392fc9709a3 113 {
AnnaBridge 189:f392fc9709a3 114 kLPTMR_TimerCompareFlag = LPTMR_CSR_TCF_MASK, /*!< Timer compare flag */
AnnaBridge 189:f392fc9709a3 115 } lptmr_status_flags_t;
AnnaBridge 189:f392fc9709a3 116
AnnaBridge 189:f392fc9709a3 117 /*!
AnnaBridge 189:f392fc9709a3 118 * @brief LPTMR config structure
AnnaBridge 189:f392fc9709a3 119 *
AnnaBridge 189:f392fc9709a3 120 * This structure holds the configuration settings for the LPTMR peripheral. To initialize this
AnnaBridge 189:f392fc9709a3 121 * structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a
AnnaBridge 189:f392fc9709a3 122 * pointer to your configuration structure instance.
AnnaBridge 189:f392fc9709a3 123 *
AnnaBridge 189:f392fc9709a3 124 * The configuration struct can be made constant so it resides in flash.
AnnaBridge 189:f392fc9709a3 125 */
AnnaBridge 189:f392fc9709a3 126 typedef struct _lptmr_config
AnnaBridge 189:f392fc9709a3 127 {
AnnaBridge 189:f392fc9709a3 128 lptmr_timer_mode_t timerMode; /*!< Time counter mode or pulse counter mode */
AnnaBridge 189:f392fc9709a3 129 lptmr_pin_select_t pinSelect; /*!< LPTMR pulse input pin select; used only in pulse counter mode */
AnnaBridge 189:f392fc9709a3 130 lptmr_pin_polarity_t pinPolarity; /*!< LPTMR pulse input pin polarity; used only in pulse counter mode */
AnnaBridge 189:f392fc9709a3 131 bool enableFreeRunning; /*!< True: enable free running, counter is reset on overflow
AnnaBridge 189:f392fc9709a3 132 False: counter is reset when the compare flag is set */
AnnaBridge 189:f392fc9709a3 133 bool bypassPrescaler; /*!< True: bypass prescaler; false: use clock from prescaler */
AnnaBridge 189:f392fc9709a3 134 lptmr_prescaler_clock_select_t prescalerClockSource; /*!< LPTMR clock source */
AnnaBridge 189:f392fc9709a3 135 lptmr_prescaler_glitch_value_t value; /*!< Prescaler or glitch filter value */
AnnaBridge 189:f392fc9709a3 136 } lptmr_config_t;
AnnaBridge 189:f392fc9709a3 137
AnnaBridge 189:f392fc9709a3 138 /*******************************************************************************
AnnaBridge 189:f392fc9709a3 139 * API
AnnaBridge 189:f392fc9709a3 140 ******************************************************************************/
AnnaBridge 189:f392fc9709a3 141
AnnaBridge 189:f392fc9709a3 142 #if defined(__cplusplus)
AnnaBridge 189:f392fc9709a3 143 extern "C" {
AnnaBridge 189:f392fc9709a3 144 #endif
AnnaBridge 189:f392fc9709a3 145
AnnaBridge 189:f392fc9709a3 146 /*!
AnnaBridge 189:f392fc9709a3 147 * @name Initialization and deinitialization
AnnaBridge 189:f392fc9709a3 148 * @{
AnnaBridge 189:f392fc9709a3 149 */
AnnaBridge 189:f392fc9709a3 150
AnnaBridge 189:f392fc9709a3 151 /*!
AnnaBridge 189:f392fc9709a3 152 * @brief Ungates the LPTMR clock and configures the peripheral for a basic operation.
AnnaBridge 189:f392fc9709a3 153 *
AnnaBridge 189:f392fc9709a3 154 * @note This API should be called at the beginning of the application using the LPTMR driver.
AnnaBridge 189:f392fc9709a3 155 *
AnnaBridge 189:f392fc9709a3 156 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 157 * @param config A pointer to the LPTMR configuration structure.
AnnaBridge 189:f392fc9709a3 158 */
AnnaBridge 189:f392fc9709a3 159 void LPTMR_Init(LPTMR_Type* base, const lptmr_config_t* config);
AnnaBridge 189:f392fc9709a3 160
AnnaBridge 189:f392fc9709a3 161 /*!
AnnaBridge 189:f392fc9709a3 162 * @brief Gates the LPTMR clock.
AnnaBridge 189:f392fc9709a3 163 *
AnnaBridge 189:f392fc9709a3 164 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 165 */
AnnaBridge 189:f392fc9709a3 166 void LPTMR_Deinit(LPTMR_Type* base);
AnnaBridge 189:f392fc9709a3 167
AnnaBridge 189:f392fc9709a3 168 /*!
AnnaBridge 189:f392fc9709a3 169 * @brief Fills in the LPTMR configuration structure with default settings.
AnnaBridge 189:f392fc9709a3 170 *
AnnaBridge 189:f392fc9709a3 171 * The default values are as follows.
AnnaBridge 189:f392fc9709a3 172 * @code
AnnaBridge 189:f392fc9709a3 173 * config->timerMode = kLPTMR_TimerModeTimeCounter;
AnnaBridge 189:f392fc9709a3 174 * config->pinSelect = kLPTMR_PinSelectInput_0;
AnnaBridge 189:f392fc9709a3 175 * config->pinPolarity = kLPTMR_PinPolarityActiveHigh;
AnnaBridge 189:f392fc9709a3 176 * config->enableFreeRunning = false;
AnnaBridge 189:f392fc9709a3 177 * config->bypassPrescaler = true;
AnnaBridge 189:f392fc9709a3 178 * config->prescalerClockSource = kLPTMR_PrescalerClock_1;
AnnaBridge 189:f392fc9709a3 179 * config->value = kLPTMR_Prescale_Glitch_0;
AnnaBridge 189:f392fc9709a3 180 * @endcode
AnnaBridge 189:f392fc9709a3 181 * @param config A pointer to the LPTMR configuration structure.
AnnaBridge 189:f392fc9709a3 182 */
AnnaBridge 189:f392fc9709a3 183 void LPTMR_GetDefaultConfig(lptmr_config_t* config);
AnnaBridge 189:f392fc9709a3 184
AnnaBridge 189:f392fc9709a3 185 /*! @}*/
AnnaBridge 189:f392fc9709a3 186
AnnaBridge 189:f392fc9709a3 187 /*!
AnnaBridge 189:f392fc9709a3 188 * @name Interrupt Interface
AnnaBridge 189:f392fc9709a3 189 * @{
AnnaBridge 189:f392fc9709a3 190 */
AnnaBridge 189:f392fc9709a3 191
AnnaBridge 189:f392fc9709a3 192 /*!
AnnaBridge 189:f392fc9709a3 193 * @brief Enables the selected LPTMR interrupts.
AnnaBridge 189:f392fc9709a3 194 *
AnnaBridge 189:f392fc9709a3 195 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 196 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 189:f392fc9709a3 197 * enumeration ::lptmr_interrupt_enable_t
AnnaBridge 189:f392fc9709a3 198 */
AnnaBridge 189:f392fc9709a3 199 static inline void LPTMR_EnableInterrupts(LPTMR_Type* base, uint32_t mask)
AnnaBridge 189:f392fc9709a3 200 {
AnnaBridge 189:f392fc9709a3 201 uint32_t reg = base->CSR;
AnnaBridge 189:f392fc9709a3 202
AnnaBridge 189:f392fc9709a3 203 /* Clear the TCF bit so that we don't clear this w1c bit when writing back */
AnnaBridge 189:f392fc9709a3 204 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 189:f392fc9709a3 205 reg |= mask;
AnnaBridge 189:f392fc9709a3 206 base->CSR = reg;
AnnaBridge 189:f392fc9709a3 207 }
AnnaBridge 189:f392fc9709a3 208
AnnaBridge 189:f392fc9709a3 209 /*!
AnnaBridge 189:f392fc9709a3 210 * @brief Disables the selected LPTMR interrupts.
AnnaBridge 189:f392fc9709a3 211 *
AnnaBridge 189:f392fc9709a3 212 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 213 * @param mask The interrupts to disable. This is a logical OR of members of the
AnnaBridge 189:f392fc9709a3 214 * enumeration ::lptmr_interrupt_enable_t.
AnnaBridge 189:f392fc9709a3 215 */
AnnaBridge 189:f392fc9709a3 216 static inline void LPTMR_DisableInterrupts(LPTMR_Type* base, uint32_t mask)
AnnaBridge 189:f392fc9709a3 217 {
AnnaBridge 189:f392fc9709a3 218 uint32_t reg = base->CSR;
AnnaBridge 189:f392fc9709a3 219
AnnaBridge 189:f392fc9709a3 220 /* Clear the TCF bit so that we don't clear this w1c bit when writing back */
AnnaBridge 189:f392fc9709a3 221 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 189:f392fc9709a3 222 reg &= ~mask;
AnnaBridge 189:f392fc9709a3 223 base->CSR = reg;
AnnaBridge 189:f392fc9709a3 224 }
AnnaBridge 189:f392fc9709a3 225
AnnaBridge 189:f392fc9709a3 226 /*!
AnnaBridge 189:f392fc9709a3 227 * @brief Gets the enabled LPTMR interrupts.
AnnaBridge 189:f392fc9709a3 228 *
AnnaBridge 189:f392fc9709a3 229 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 230 *
AnnaBridge 189:f392fc9709a3 231 * @return The enabled interrupts. This is the logical OR of members of the
AnnaBridge 189:f392fc9709a3 232 * enumeration ::lptmr_interrupt_enable_t
AnnaBridge 189:f392fc9709a3 233 */
AnnaBridge 189:f392fc9709a3 234 static inline uint32_t LPTMR_GetEnabledInterrupts(LPTMR_Type* base)
AnnaBridge 189:f392fc9709a3 235 {
AnnaBridge 189:f392fc9709a3 236 return (base->CSR & LPTMR_CSR_TIE_MASK);
AnnaBridge 189:f392fc9709a3 237 }
AnnaBridge 189:f392fc9709a3 238
AnnaBridge 189:f392fc9709a3 239 /*! @}*/
AnnaBridge 189:f392fc9709a3 240
AnnaBridge 189:f392fc9709a3 241 /*!
AnnaBridge 189:f392fc9709a3 242 * @name Status Interface
AnnaBridge 189:f392fc9709a3 243 * @{
AnnaBridge 189:f392fc9709a3 244 */
AnnaBridge 189:f392fc9709a3 245
AnnaBridge 189:f392fc9709a3 246 /*!
AnnaBridge 189:f392fc9709a3 247 * @brief Gets the LPTMR status flags.
AnnaBridge 189:f392fc9709a3 248 *
AnnaBridge 189:f392fc9709a3 249 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 250 *
AnnaBridge 189:f392fc9709a3 251 * @return The status flags. This is the logical OR of members of the
AnnaBridge 189:f392fc9709a3 252 * enumeration ::lptmr_status_flags_t
AnnaBridge 189:f392fc9709a3 253 */
AnnaBridge 189:f392fc9709a3 254 static inline uint32_t LPTMR_GetStatusFlags(LPTMR_Type* base)
AnnaBridge 189:f392fc9709a3 255 {
AnnaBridge 189:f392fc9709a3 256 return (base->CSR & LPTMR_CSR_TCF_MASK);
AnnaBridge 189:f392fc9709a3 257 }
AnnaBridge 189:f392fc9709a3 258
AnnaBridge 189:f392fc9709a3 259 /*!
AnnaBridge 189:f392fc9709a3 260 * @brief Clears the LPTMR status flags.
AnnaBridge 189:f392fc9709a3 261 *
AnnaBridge 189:f392fc9709a3 262 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 263 * @param mask The status flags to clear. This is a logical OR of members of the
AnnaBridge 189:f392fc9709a3 264 * enumeration ::lptmr_status_flags_t.
AnnaBridge 189:f392fc9709a3 265 */
AnnaBridge 189:f392fc9709a3 266 static inline void LPTMR_ClearStatusFlags(LPTMR_Type* base, uint32_t mask)
AnnaBridge 189:f392fc9709a3 267 {
AnnaBridge 189:f392fc9709a3 268 base->CSR |= mask;
AnnaBridge 189:f392fc9709a3 269 }
AnnaBridge 189:f392fc9709a3 270
AnnaBridge 189:f392fc9709a3 271 /*! @}*/
AnnaBridge 189:f392fc9709a3 272
AnnaBridge 189:f392fc9709a3 273 /*!
AnnaBridge 189:f392fc9709a3 274 * @name Read and write the timer period
AnnaBridge 189:f392fc9709a3 275 * @{
AnnaBridge 189:f392fc9709a3 276 */
AnnaBridge 189:f392fc9709a3 277
AnnaBridge 189:f392fc9709a3 278 /*!
AnnaBridge 189:f392fc9709a3 279 * @brief Sets the timer period in units of count.
AnnaBridge 189:f392fc9709a3 280 *
AnnaBridge 189:f392fc9709a3 281 * Timers counts from 0 until it equals the count value set here. The count value is written to
AnnaBridge 189:f392fc9709a3 282 * the CMR register.
AnnaBridge 189:f392fc9709a3 283 *
AnnaBridge 189:f392fc9709a3 284 * @note
AnnaBridge 189:f392fc9709a3 285 * 1. The TCF flag is set with the CNR equals the count provided here and then increments.
AnnaBridge 189:f392fc9709a3 286 * 2. Call the utility macros provided in the fsl_common.h to convert to ticks.
AnnaBridge 189:f392fc9709a3 287 *
AnnaBridge 189:f392fc9709a3 288 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 289 * @param ticks A timer period in units of ticks, which should be equal or greater than 1.
AnnaBridge 189:f392fc9709a3 290 */
AnnaBridge 189:f392fc9709a3 291 static inline void LPTMR_SetTimerPeriod(LPTMR_Type* base, uint16_t ticks)
AnnaBridge 189:f392fc9709a3 292 {
AnnaBridge 189:f392fc9709a3 293 base->CMR = ticks - 1;
AnnaBridge 189:f392fc9709a3 294 }
AnnaBridge 189:f392fc9709a3 295
AnnaBridge 189:f392fc9709a3 296 /*!
AnnaBridge 189:f392fc9709a3 297 * @brief Reads the current timer counting value.
AnnaBridge 189:f392fc9709a3 298 *
AnnaBridge 189:f392fc9709a3 299 * This function returns the real-time timer counting value in a range from 0 to a
AnnaBridge 189:f392fc9709a3 300 * timer period.
AnnaBridge 189:f392fc9709a3 301 *
AnnaBridge 189:f392fc9709a3 302 * @note Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.
AnnaBridge 189:f392fc9709a3 303 *
AnnaBridge 189:f392fc9709a3 304 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 305 *
AnnaBridge 189:f392fc9709a3 306 * @return The current counter value in ticks
AnnaBridge 189:f392fc9709a3 307 */
AnnaBridge 189:f392fc9709a3 308 static inline uint16_t LPTMR_GetCurrentTimerCount(LPTMR_Type* base)
AnnaBridge 189:f392fc9709a3 309 {
AnnaBridge 189:f392fc9709a3 310 /* Must first write any value to the CNR. This synchronizes and registers the current value
AnnaBridge 189:f392fc9709a3 311 * of the CNR into a temporary register which can then be read
AnnaBridge 189:f392fc9709a3 312 */
AnnaBridge 189:f392fc9709a3 313 base->CNR = 0U;
AnnaBridge 189:f392fc9709a3 314 return (uint16_t)base->CNR;
AnnaBridge 189:f392fc9709a3 315 }
AnnaBridge 189:f392fc9709a3 316
AnnaBridge 189:f392fc9709a3 317 /*! @}*/
AnnaBridge 189:f392fc9709a3 318
AnnaBridge 189:f392fc9709a3 319 /*!
AnnaBridge 189:f392fc9709a3 320 * @name Timer Start and Stop
AnnaBridge 189:f392fc9709a3 321 * @{
AnnaBridge 189:f392fc9709a3 322 */
AnnaBridge 189:f392fc9709a3 323
AnnaBridge 189:f392fc9709a3 324 /*!
AnnaBridge 189:f392fc9709a3 325 * @brief Starts the timer.
AnnaBridge 189:f392fc9709a3 326 *
AnnaBridge 189:f392fc9709a3 327 * After calling this function, the timer counts up to the CMR register value.
AnnaBridge 189:f392fc9709a3 328 * Each time the timer reaches the CMR value and then increments, it generates a
AnnaBridge 189:f392fc9709a3 329 * trigger pulse and sets the timeout interrupt flag. An interrupt is also
AnnaBridge 189:f392fc9709a3 330 * triggered if the timer interrupt is enabled.
AnnaBridge 189:f392fc9709a3 331 *
AnnaBridge 189:f392fc9709a3 332 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 333 */
AnnaBridge 189:f392fc9709a3 334 static inline void LPTMR_StartTimer(LPTMR_Type* base)
AnnaBridge 189:f392fc9709a3 335 {
AnnaBridge 189:f392fc9709a3 336 uint32_t reg = base->CSR;
AnnaBridge 189:f392fc9709a3 337
AnnaBridge 189:f392fc9709a3 338 /* Clear the TCF bit to avoid clearing the w1c bit when writing back. */
AnnaBridge 189:f392fc9709a3 339 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 189:f392fc9709a3 340 reg |= LPTMR_CSR_TEN_MASK;
AnnaBridge 189:f392fc9709a3 341 base->CSR = reg;
AnnaBridge 189:f392fc9709a3 342 }
AnnaBridge 189:f392fc9709a3 343
AnnaBridge 189:f392fc9709a3 344 /*!
AnnaBridge 189:f392fc9709a3 345 * @brief Stops the timer.
AnnaBridge 189:f392fc9709a3 346 *
AnnaBridge 189:f392fc9709a3 347 * This function stops the timer and resets the timer's counter register.
AnnaBridge 189:f392fc9709a3 348 *
AnnaBridge 189:f392fc9709a3 349 * @param base LPTMR peripheral base address
AnnaBridge 189:f392fc9709a3 350 */
AnnaBridge 189:f392fc9709a3 351 static inline void LPTMR_StopTimer(LPTMR_Type* base)
AnnaBridge 189:f392fc9709a3 352 {
AnnaBridge 189:f392fc9709a3 353 uint32_t reg = base->CSR;
AnnaBridge 189:f392fc9709a3 354
AnnaBridge 189:f392fc9709a3 355 /* Clear the TCF bit to avoid clearing the w1c bit when writing back. */
AnnaBridge 189:f392fc9709a3 356 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 189:f392fc9709a3 357 reg &= ~LPTMR_CSR_TEN_MASK;
AnnaBridge 189:f392fc9709a3 358 base->CSR = reg;
AnnaBridge 189:f392fc9709a3 359 }
AnnaBridge 189:f392fc9709a3 360
AnnaBridge 189:f392fc9709a3 361 /*! @}*/
AnnaBridge 189:f392fc9709a3 362
AnnaBridge 189:f392fc9709a3 363 #if defined(__cplusplus)
AnnaBridge 189:f392fc9709a3 364 }
AnnaBridge 189:f392fc9709a3 365 #endif
AnnaBridge 189:f392fc9709a3 366
AnnaBridge 189:f392fc9709a3 367 /*! @}*/
AnnaBridge 189:f392fc9709a3 368
AnnaBridge 189:f392fc9709a3 369 #endif /* _FSL_LPTMR_H_ */