mbed official
mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
cmsis/BUILD/mbed/TARGET_K82F/TOOLCHAIN_IAR/cmsis_iccarm.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /**************************************************************************//** |
| AnnaBridge | 189:f392fc9709a3 | 2 | * @file cmsis_iccarm.h |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @version V5.0.7 |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @date 19. June 2018 |
| AnnaBridge | 189:f392fc9709a3 | 6 | ******************************************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 7 | |
| AnnaBridge | 189:f392fc9709a3 | 8 | //------------------------------------------------------------------------------ |
| AnnaBridge | 189:f392fc9709a3 | 9 | // |
| AnnaBridge | 189:f392fc9709a3 | 10 | // Copyright (c) 2017-2018 IAR Systems |
| AnnaBridge | 189:f392fc9709a3 | 11 | // |
| AnnaBridge | 189:f392fc9709a3 | 12 | // Licensed under the Apache License, Version 2.0 (the "License") |
| AnnaBridge | 189:f392fc9709a3 | 13 | // you may not use this file except in compliance with the License. |
| AnnaBridge | 189:f392fc9709a3 | 14 | // You may obtain a copy of the License at |
| AnnaBridge | 189:f392fc9709a3 | 15 | // http://www.apache.org/licenses/LICENSE-2.0 |
| AnnaBridge | 189:f392fc9709a3 | 16 | // |
| AnnaBridge | 189:f392fc9709a3 | 17 | // Unless required by applicable law or agreed to in writing, software |
| AnnaBridge | 189:f392fc9709a3 | 18 | // distributed under the License is distributed on an "AS IS" BASIS, |
| AnnaBridge | 189:f392fc9709a3 | 19 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| AnnaBridge | 189:f392fc9709a3 | 20 | // See the License for the specific language governing permissions and |
| AnnaBridge | 189:f392fc9709a3 | 21 | // limitations under the License. |
| AnnaBridge | 189:f392fc9709a3 | 22 | // |
| AnnaBridge | 189:f392fc9709a3 | 23 | //------------------------------------------------------------------------------ |
| AnnaBridge | 189:f392fc9709a3 | 24 | |
| AnnaBridge | 189:f392fc9709a3 | 25 | |
| AnnaBridge | 189:f392fc9709a3 | 26 | #ifndef __CMSIS_ICCARM_H__ |
| AnnaBridge | 189:f392fc9709a3 | 27 | #define __CMSIS_ICCARM_H__ |
| AnnaBridge | 189:f392fc9709a3 | 28 | |
| AnnaBridge | 189:f392fc9709a3 | 29 | #ifndef __ICCARM__ |
| AnnaBridge | 189:f392fc9709a3 | 30 | #error This file should only be compiled by ICCARM |
| AnnaBridge | 189:f392fc9709a3 | 31 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 32 | |
| AnnaBridge | 189:f392fc9709a3 | 33 | #pragma system_include |
| AnnaBridge | 189:f392fc9709a3 | 34 | |
| AnnaBridge | 189:f392fc9709a3 | 35 | #define __IAR_FT _Pragma("inline=forced") __intrinsic |
| AnnaBridge | 189:f392fc9709a3 | 36 | |
| AnnaBridge | 189:f392fc9709a3 | 37 | #if (__VER__ >= 8000000) |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __ICCARM_V8 1 |
| AnnaBridge | 189:f392fc9709a3 | 39 | #else |
| AnnaBridge | 189:f392fc9709a3 | 40 | #define __ICCARM_V8 0 |
| AnnaBridge | 189:f392fc9709a3 | 41 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 42 | |
| AnnaBridge | 189:f392fc9709a3 | 43 | #ifndef __ALIGNED |
| AnnaBridge | 189:f392fc9709a3 | 44 | #if __ICCARM_V8 |
| AnnaBridge | 189:f392fc9709a3 | 45 | #define __ALIGNED(x) __attribute__((aligned(x))) |
| AnnaBridge | 189:f392fc9709a3 | 46 | #elif (__VER__ >= 7080000) |
| AnnaBridge | 189:f392fc9709a3 | 47 | /* Needs IAR language extensions */ |
| AnnaBridge | 189:f392fc9709a3 | 48 | #define __ALIGNED(x) __attribute__((aligned(x))) |
| AnnaBridge | 189:f392fc9709a3 | 49 | #else |
| AnnaBridge | 189:f392fc9709a3 | 50 | #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. |
| AnnaBridge | 189:f392fc9709a3 | 51 | #define __ALIGNED(x) |
| AnnaBridge | 189:f392fc9709a3 | 52 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 53 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 54 | |
| AnnaBridge | 189:f392fc9709a3 | 55 | |
| AnnaBridge | 189:f392fc9709a3 | 56 | /* Define compiler macros for CPU architecture, used in CMSIS 5. |
| AnnaBridge | 189:f392fc9709a3 | 57 | */ |
| AnnaBridge | 189:f392fc9709a3 | 58 | #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__ |
| AnnaBridge | 189:f392fc9709a3 | 59 | /* Macros already defined */ |
| AnnaBridge | 189:f392fc9709a3 | 60 | #else |
| AnnaBridge | 189:f392fc9709a3 | 61 | #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) |
| AnnaBridge | 189:f392fc9709a3 | 62 | #define __ARM_ARCH_8M_MAIN__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 63 | #elif defined(__ARM8M_BASELINE__) |
| AnnaBridge | 189:f392fc9709a3 | 64 | #define __ARM_ARCH_8M_BASE__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 65 | #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M' |
| AnnaBridge | 189:f392fc9709a3 | 66 | #if __ARM_ARCH == 6 |
| AnnaBridge | 189:f392fc9709a3 | 67 | #define __ARM_ARCH_6M__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 68 | #elif __ARM_ARCH == 7 |
| AnnaBridge | 189:f392fc9709a3 | 69 | #if __ARM_FEATURE_DSP |
| AnnaBridge | 189:f392fc9709a3 | 70 | #define __ARM_ARCH_7EM__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 71 | #else |
| AnnaBridge | 189:f392fc9709a3 | 72 | #define __ARM_ARCH_7M__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 73 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 74 | #endif /* __ARM_ARCH */ |
| AnnaBridge | 189:f392fc9709a3 | 75 | #endif /* __ARM_ARCH_PROFILE == 'M' */ |
| AnnaBridge | 189:f392fc9709a3 | 76 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 77 | |
| AnnaBridge | 189:f392fc9709a3 | 78 | /* Alternativ core deduction for older ICCARM's */ |
| AnnaBridge | 189:f392fc9709a3 | 79 | #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \ |
| AnnaBridge | 189:f392fc9709a3 | 80 | !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__) |
| AnnaBridge | 189:f392fc9709a3 | 81 | #if defined(__ARM6M__) && (__CORE__ == __ARM6M__) |
| AnnaBridge | 189:f392fc9709a3 | 82 | #define __ARM_ARCH_6M__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 83 | #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__) |
| AnnaBridge | 189:f392fc9709a3 | 84 | #define __ARM_ARCH_7M__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 85 | #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) |
| AnnaBridge | 189:f392fc9709a3 | 86 | #define __ARM_ARCH_7EM__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 87 | #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__) |
| AnnaBridge | 189:f392fc9709a3 | 88 | #define __ARM_ARCH_8M_BASE__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 89 | #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__) |
| AnnaBridge | 189:f392fc9709a3 | 90 | #define __ARM_ARCH_8M_MAIN__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 91 | #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__) |
| AnnaBridge | 189:f392fc9709a3 | 92 | #define __ARM_ARCH_8M_MAIN__ 1 |
| AnnaBridge | 189:f392fc9709a3 | 93 | #else |
| AnnaBridge | 189:f392fc9709a3 | 94 | #error "Unknown target." |
| AnnaBridge | 189:f392fc9709a3 | 95 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 96 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 97 | |
| AnnaBridge | 189:f392fc9709a3 | 98 | |
| AnnaBridge | 189:f392fc9709a3 | 99 | |
| AnnaBridge | 189:f392fc9709a3 | 100 | #if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1 |
| AnnaBridge | 189:f392fc9709a3 | 101 | #define __IAR_M0_FAMILY 1 |
| AnnaBridge | 189:f392fc9709a3 | 102 | #elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1 |
| AnnaBridge | 189:f392fc9709a3 | 103 | #define __IAR_M0_FAMILY 1 |
| AnnaBridge | 189:f392fc9709a3 | 104 | #else |
| AnnaBridge | 189:f392fc9709a3 | 105 | #define __IAR_M0_FAMILY 0 |
| AnnaBridge | 189:f392fc9709a3 | 106 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 107 | |
| AnnaBridge | 189:f392fc9709a3 | 108 | |
| AnnaBridge | 189:f392fc9709a3 | 109 | #ifndef __ASM |
| AnnaBridge | 189:f392fc9709a3 | 110 | #define __ASM __asm |
| AnnaBridge | 189:f392fc9709a3 | 111 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 112 | |
| AnnaBridge | 189:f392fc9709a3 | 113 | #ifndef __INLINE |
| AnnaBridge | 189:f392fc9709a3 | 114 | #define __INLINE inline |
| AnnaBridge | 189:f392fc9709a3 | 115 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 116 | |
| AnnaBridge | 189:f392fc9709a3 | 117 | #ifndef __NO_RETURN |
| AnnaBridge | 189:f392fc9709a3 | 118 | #if __ICCARM_V8 |
| AnnaBridge | 189:f392fc9709a3 | 119 | #define __NO_RETURN __attribute__((__noreturn__)) |
| AnnaBridge | 189:f392fc9709a3 | 120 | #else |
| AnnaBridge | 189:f392fc9709a3 | 121 | #define __NO_RETURN _Pragma("object_attribute=__noreturn") |
| AnnaBridge | 189:f392fc9709a3 | 122 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 123 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 124 | |
| AnnaBridge | 189:f392fc9709a3 | 125 | #ifndef __PACKED |
| AnnaBridge | 189:f392fc9709a3 | 126 | #if __ICCARM_V8 |
| AnnaBridge | 189:f392fc9709a3 | 127 | #define __PACKED __attribute__((packed, aligned(1))) |
| AnnaBridge | 189:f392fc9709a3 | 128 | #else |
| AnnaBridge | 189:f392fc9709a3 | 129 | /* Needs IAR language extensions */ |
| AnnaBridge | 189:f392fc9709a3 | 130 | #define __PACKED __packed |
| AnnaBridge | 189:f392fc9709a3 | 131 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 132 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 133 | |
| AnnaBridge | 189:f392fc9709a3 | 134 | #ifndef __PACKED_STRUCT |
| AnnaBridge | 189:f392fc9709a3 | 135 | #if __ICCARM_V8 |
| AnnaBridge | 189:f392fc9709a3 | 136 | #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) |
| AnnaBridge | 189:f392fc9709a3 | 137 | #else |
| AnnaBridge | 189:f392fc9709a3 | 138 | /* Needs IAR language extensions */ |
| AnnaBridge | 189:f392fc9709a3 | 139 | #define __PACKED_STRUCT __packed struct |
| AnnaBridge | 189:f392fc9709a3 | 140 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 141 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 142 | |
| AnnaBridge | 189:f392fc9709a3 | 143 | #ifndef __PACKED_UNION |
| AnnaBridge | 189:f392fc9709a3 | 144 | #if __ICCARM_V8 |
| AnnaBridge | 189:f392fc9709a3 | 145 | #define __PACKED_UNION union __attribute__((packed, aligned(1))) |
| AnnaBridge | 189:f392fc9709a3 | 146 | #else |
| AnnaBridge | 189:f392fc9709a3 | 147 | /* Needs IAR language extensions */ |
| AnnaBridge | 189:f392fc9709a3 | 148 | #define __PACKED_UNION __packed union |
| AnnaBridge | 189:f392fc9709a3 | 149 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 150 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 151 | |
| AnnaBridge | 189:f392fc9709a3 | 152 | #ifndef __RESTRICT |
| AnnaBridge | 189:f392fc9709a3 | 153 | #define __RESTRICT restrict |
| AnnaBridge | 189:f392fc9709a3 | 154 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 155 | |
| AnnaBridge | 189:f392fc9709a3 | 156 | #ifndef __STATIC_INLINE |
| AnnaBridge | 189:f392fc9709a3 | 157 | #define __STATIC_INLINE static inline |
| AnnaBridge | 189:f392fc9709a3 | 158 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 159 | |
| AnnaBridge | 189:f392fc9709a3 | 160 | #ifndef __FORCEINLINE |
| AnnaBridge | 189:f392fc9709a3 | 161 | #define __FORCEINLINE _Pragma("inline=forced") |
| AnnaBridge | 189:f392fc9709a3 | 162 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 163 | |
| AnnaBridge | 189:f392fc9709a3 | 164 | #ifndef __STATIC_FORCEINLINE |
| AnnaBridge | 189:f392fc9709a3 | 165 | #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE |
| AnnaBridge | 189:f392fc9709a3 | 166 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 167 | |
| AnnaBridge | 189:f392fc9709a3 | 168 | #ifndef __UNALIGNED_UINT16_READ |
| AnnaBridge | 189:f392fc9709a3 | 169 | #pragma language=save |
| AnnaBridge | 189:f392fc9709a3 | 170 | #pragma language=extended |
| AnnaBridge | 189:f392fc9709a3 | 171 | __IAR_FT uint16_t __iar_uint16_read(void const *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 172 | { |
| AnnaBridge | 189:f392fc9709a3 | 173 | return *(__packed uint16_t*)(ptr); |
| AnnaBridge | 189:f392fc9709a3 | 174 | } |
| AnnaBridge | 189:f392fc9709a3 | 175 | #pragma language=restore |
| AnnaBridge | 189:f392fc9709a3 | 176 | #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR) |
| AnnaBridge | 189:f392fc9709a3 | 177 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 178 | |
| AnnaBridge | 189:f392fc9709a3 | 179 | |
| AnnaBridge | 189:f392fc9709a3 | 180 | #ifndef __UNALIGNED_UINT16_WRITE |
| AnnaBridge | 189:f392fc9709a3 | 181 | #pragma language=save |
| AnnaBridge | 189:f392fc9709a3 | 182 | #pragma language=extended |
| AnnaBridge | 189:f392fc9709a3 | 183 | __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) |
| AnnaBridge | 189:f392fc9709a3 | 184 | { |
| AnnaBridge | 189:f392fc9709a3 | 185 | *(__packed uint16_t*)(ptr) = val;; |
| AnnaBridge | 189:f392fc9709a3 | 186 | } |
| AnnaBridge | 189:f392fc9709a3 | 187 | #pragma language=restore |
| AnnaBridge | 189:f392fc9709a3 | 188 | #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL) |
| AnnaBridge | 189:f392fc9709a3 | 189 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 190 | |
| AnnaBridge | 189:f392fc9709a3 | 191 | #ifndef __UNALIGNED_UINT32_READ |
| AnnaBridge | 189:f392fc9709a3 | 192 | #pragma language=save |
| AnnaBridge | 189:f392fc9709a3 | 193 | #pragma language=extended |
| AnnaBridge | 189:f392fc9709a3 | 194 | __IAR_FT uint32_t __iar_uint32_read(void const *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 195 | { |
| AnnaBridge | 189:f392fc9709a3 | 196 | return *(__packed uint32_t*)(ptr); |
| AnnaBridge | 189:f392fc9709a3 | 197 | } |
| AnnaBridge | 189:f392fc9709a3 | 198 | #pragma language=restore |
| AnnaBridge | 189:f392fc9709a3 | 199 | #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR) |
| AnnaBridge | 189:f392fc9709a3 | 200 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 201 | |
| AnnaBridge | 189:f392fc9709a3 | 202 | #ifndef __UNALIGNED_UINT32_WRITE |
| AnnaBridge | 189:f392fc9709a3 | 203 | #pragma language=save |
| AnnaBridge | 189:f392fc9709a3 | 204 | #pragma language=extended |
| AnnaBridge | 189:f392fc9709a3 | 205 | __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) |
| AnnaBridge | 189:f392fc9709a3 | 206 | { |
| AnnaBridge | 189:f392fc9709a3 | 207 | *(__packed uint32_t*)(ptr) = val;; |
| AnnaBridge | 189:f392fc9709a3 | 208 | } |
| AnnaBridge | 189:f392fc9709a3 | 209 | #pragma language=restore |
| AnnaBridge | 189:f392fc9709a3 | 210 | #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL) |
| AnnaBridge | 189:f392fc9709a3 | 211 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 212 | |
| AnnaBridge | 189:f392fc9709a3 | 213 | #ifndef __UNALIGNED_UINT32 /* deprecated */ |
| AnnaBridge | 189:f392fc9709a3 | 214 | #pragma language=save |
| AnnaBridge | 189:f392fc9709a3 | 215 | #pragma language=extended |
| AnnaBridge | 189:f392fc9709a3 | 216 | __packed struct __iar_u32 { uint32_t v; }; |
| AnnaBridge | 189:f392fc9709a3 | 217 | #pragma language=restore |
| AnnaBridge | 189:f392fc9709a3 | 218 | #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v) |
| AnnaBridge | 189:f392fc9709a3 | 219 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 220 | |
| AnnaBridge | 189:f392fc9709a3 | 221 | #ifndef __USED |
| AnnaBridge | 189:f392fc9709a3 | 222 | #if __ICCARM_V8 |
| AnnaBridge | 189:f392fc9709a3 | 223 | #define __USED __attribute__((used)) |
| AnnaBridge | 189:f392fc9709a3 | 224 | #else |
| AnnaBridge | 189:f392fc9709a3 | 225 | #define __USED _Pragma("__root") |
| AnnaBridge | 189:f392fc9709a3 | 226 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 227 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 228 | |
| AnnaBridge | 189:f392fc9709a3 | 229 | #ifndef __WEAK |
| AnnaBridge | 189:f392fc9709a3 | 230 | #if __ICCARM_V8 |
| AnnaBridge | 189:f392fc9709a3 | 231 | #define __WEAK __attribute__((weak)) |
| AnnaBridge | 189:f392fc9709a3 | 232 | #else |
| AnnaBridge | 189:f392fc9709a3 | 233 | #define __WEAK _Pragma("__weak") |
| AnnaBridge | 189:f392fc9709a3 | 234 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 235 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 236 | |
| AnnaBridge | 189:f392fc9709a3 | 237 | |
| AnnaBridge | 189:f392fc9709a3 | 238 | #ifndef __ICCARM_INTRINSICS_VERSION__ |
| AnnaBridge | 189:f392fc9709a3 | 239 | #define __ICCARM_INTRINSICS_VERSION__ 0 |
| AnnaBridge | 189:f392fc9709a3 | 240 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 241 | |
| AnnaBridge | 189:f392fc9709a3 | 242 | #if __ICCARM_INTRINSICS_VERSION__ == 2 |
| AnnaBridge | 189:f392fc9709a3 | 243 | |
| AnnaBridge | 189:f392fc9709a3 | 244 | #if defined(__CLZ) |
| AnnaBridge | 189:f392fc9709a3 | 245 | #undef __CLZ |
| AnnaBridge | 189:f392fc9709a3 | 246 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 247 | #if defined(__REVSH) |
| AnnaBridge | 189:f392fc9709a3 | 248 | #undef __REVSH |
| AnnaBridge | 189:f392fc9709a3 | 249 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 250 | #if defined(__RBIT) |
| AnnaBridge | 189:f392fc9709a3 | 251 | #undef __RBIT |
| AnnaBridge | 189:f392fc9709a3 | 252 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 253 | #if defined(__SSAT) |
| AnnaBridge | 189:f392fc9709a3 | 254 | #undef __SSAT |
| AnnaBridge | 189:f392fc9709a3 | 255 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 256 | #if defined(__USAT) |
| AnnaBridge | 189:f392fc9709a3 | 257 | #undef __USAT |
| AnnaBridge | 189:f392fc9709a3 | 258 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 259 | |
| AnnaBridge | 189:f392fc9709a3 | 260 | #include "iccarm_builtin.h" |
| AnnaBridge | 189:f392fc9709a3 | 261 | |
| AnnaBridge | 189:f392fc9709a3 | 262 | #define __disable_fault_irq __iar_builtin_disable_fiq |
| AnnaBridge | 189:f392fc9709a3 | 263 | #define __disable_irq __iar_builtin_disable_interrupt |
| AnnaBridge | 189:f392fc9709a3 | 264 | #define __enable_fault_irq __iar_builtin_enable_fiq |
| AnnaBridge | 189:f392fc9709a3 | 265 | #define __enable_irq __iar_builtin_enable_interrupt |
| AnnaBridge | 189:f392fc9709a3 | 266 | #define __arm_rsr __iar_builtin_rsr |
| AnnaBridge | 189:f392fc9709a3 | 267 | #define __arm_wsr __iar_builtin_wsr |
| AnnaBridge | 189:f392fc9709a3 | 268 | |
| AnnaBridge | 189:f392fc9709a3 | 269 | |
| AnnaBridge | 189:f392fc9709a3 | 270 | #define __get_APSR() (__arm_rsr("APSR")) |
| AnnaBridge | 189:f392fc9709a3 | 271 | #define __get_BASEPRI() (__arm_rsr("BASEPRI")) |
| AnnaBridge | 189:f392fc9709a3 | 272 | #define __get_CONTROL() (__arm_rsr("CONTROL")) |
| AnnaBridge | 189:f392fc9709a3 | 273 | #define __get_FAULTMASK() (__arm_rsr("FAULTMASK")) |
| AnnaBridge | 189:f392fc9709a3 | 274 | |
| AnnaBridge | 189:f392fc9709a3 | 275 | #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 276 | (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) |
| AnnaBridge | 189:f392fc9709a3 | 277 | #define __get_FPSCR() (__arm_rsr("FPSCR")) |
| AnnaBridge | 189:f392fc9709a3 | 278 | #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 279 | #else |
| AnnaBridge | 189:f392fc9709a3 | 280 | #define __get_FPSCR() ( 0 ) |
| AnnaBridge | 189:f392fc9709a3 | 281 | #define __set_FPSCR(VALUE) ((void)VALUE) |
| AnnaBridge | 189:f392fc9709a3 | 282 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 283 | |
| AnnaBridge | 189:f392fc9709a3 | 284 | #define __get_IPSR() (__arm_rsr("IPSR")) |
| AnnaBridge | 189:f392fc9709a3 | 285 | #define __get_MSP() (__arm_rsr("MSP")) |
| AnnaBridge | 189:f392fc9709a3 | 286 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 287 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 288 | // without main extensions, the non-secure MSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 289 | #define __get_MSPLIM() (0U) |
| AnnaBridge | 189:f392fc9709a3 | 290 | #else |
| AnnaBridge | 189:f392fc9709a3 | 291 | #define __get_MSPLIM() (__arm_rsr("MSPLIM")) |
| AnnaBridge | 189:f392fc9709a3 | 292 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 293 | #define __get_PRIMASK() (__arm_rsr("PRIMASK")) |
| AnnaBridge | 189:f392fc9709a3 | 294 | #define __get_PSP() (__arm_rsr("PSP")) |
| AnnaBridge | 189:f392fc9709a3 | 295 | |
| AnnaBridge | 189:f392fc9709a3 | 296 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 297 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 298 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 299 | #define __get_PSPLIM() (0U) |
| AnnaBridge | 189:f392fc9709a3 | 300 | #else |
| AnnaBridge | 189:f392fc9709a3 | 301 | #define __get_PSPLIM() (__arm_rsr("PSPLIM")) |
| AnnaBridge | 189:f392fc9709a3 | 302 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 303 | |
| AnnaBridge | 189:f392fc9709a3 | 304 | #define __get_xPSR() (__arm_rsr("xPSR")) |
| AnnaBridge | 189:f392fc9709a3 | 305 | |
| AnnaBridge | 189:f392fc9709a3 | 306 | #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 307 | #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 308 | #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 309 | #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 310 | #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 311 | |
| AnnaBridge | 189:f392fc9709a3 | 312 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 313 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 314 | // without main extensions, the non-secure MSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 315 | #define __set_MSPLIM(VALUE) ((void)(VALUE)) |
| AnnaBridge | 189:f392fc9709a3 | 316 | #else |
| AnnaBridge | 189:f392fc9709a3 | 317 | #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 318 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 319 | #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 320 | #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 321 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 322 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 323 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 324 | #define __set_PSPLIM(VALUE) ((void)(VALUE)) |
| AnnaBridge | 189:f392fc9709a3 | 325 | #else |
| AnnaBridge | 189:f392fc9709a3 | 326 | #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 327 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 328 | |
| AnnaBridge | 189:f392fc9709a3 | 329 | #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 330 | #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 331 | #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 332 | #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 333 | #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 334 | #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 335 | #define __TZ_get_SP_NS() (__arm_rsr("SP_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 336 | #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 337 | #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 338 | #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 339 | #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 340 | #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 341 | #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 342 | #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 343 | |
| AnnaBridge | 189:f392fc9709a3 | 344 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 345 | (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 346 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 347 | #define __TZ_get_PSPLIM_NS() (0U) |
| AnnaBridge | 189:f392fc9709a3 | 348 | #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) |
| AnnaBridge | 189:f392fc9709a3 | 349 | #else |
| AnnaBridge | 189:f392fc9709a3 | 350 | #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 351 | #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 352 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 353 | |
| AnnaBridge | 189:f392fc9709a3 | 354 | #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS")) |
| AnnaBridge | 189:f392fc9709a3 | 355 | #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE))) |
| AnnaBridge | 189:f392fc9709a3 | 356 | |
| AnnaBridge | 189:f392fc9709a3 | 357 | #define __NOP __iar_builtin_no_operation |
| AnnaBridge | 189:f392fc9709a3 | 358 | |
| AnnaBridge | 189:f392fc9709a3 | 359 | #define __CLZ __iar_builtin_CLZ |
| AnnaBridge | 189:f392fc9709a3 | 360 | #define __CLREX __iar_builtin_CLREX |
| AnnaBridge | 189:f392fc9709a3 | 361 | |
| AnnaBridge | 189:f392fc9709a3 | 362 | #define __DMB __iar_builtin_DMB |
| AnnaBridge | 189:f392fc9709a3 | 363 | #define __DSB __iar_builtin_DSB |
| AnnaBridge | 189:f392fc9709a3 | 364 | #define __ISB __iar_builtin_ISB |
| AnnaBridge | 189:f392fc9709a3 | 365 | |
| AnnaBridge | 189:f392fc9709a3 | 366 | #define __LDREXB __iar_builtin_LDREXB |
| AnnaBridge | 189:f392fc9709a3 | 367 | #define __LDREXH __iar_builtin_LDREXH |
| AnnaBridge | 189:f392fc9709a3 | 368 | #define __LDREXW __iar_builtin_LDREX |
| AnnaBridge | 189:f392fc9709a3 | 369 | |
| AnnaBridge | 189:f392fc9709a3 | 370 | #define __RBIT __iar_builtin_RBIT |
| AnnaBridge | 189:f392fc9709a3 | 371 | #define __REV __iar_builtin_REV |
| AnnaBridge | 189:f392fc9709a3 | 372 | #define __REV16 __iar_builtin_REV16 |
| AnnaBridge | 189:f392fc9709a3 | 373 | |
| AnnaBridge | 189:f392fc9709a3 | 374 | __IAR_FT int16_t __REVSH(int16_t val) |
| AnnaBridge | 189:f392fc9709a3 | 375 | { |
| AnnaBridge | 189:f392fc9709a3 | 376 | return (int16_t) __iar_builtin_REVSH(val); |
| AnnaBridge | 189:f392fc9709a3 | 377 | } |
| AnnaBridge | 189:f392fc9709a3 | 378 | |
| AnnaBridge | 189:f392fc9709a3 | 379 | #define __ROR __iar_builtin_ROR |
| AnnaBridge | 189:f392fc9709a3 | 380 | #define __RRX __iar_builtin_RRX |
| AnnaBridge | 189:f392fc9709a3 | 381 | |
| AnnaBridge | 189:f392fc9709a3 | 382 | #define __SEV __iar_builtin_SEV |
| AnnaBridge | 189:f392fc9709a3 | 383 | |
| AnnaBridge | 189:f392fc9709a3 | 384 | #if !__IAR_M0_FAMILY |
| AnnaBridge | 189:f392fc9709a3 | 385 | #define __SSAT __iar_builtin_SSAT |
| AnnaBridge | 189:f392fc9709a3 | 386 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 387 | |
| AnnaBridge | 189:f392fc9709a3 | 388 | #define __STREXB __iar_builtin_STREXB |
| AnnaBridge | 189:f392fc9709a3 | 389 | #define __STREXH __iar_builtin_STREXH |
| AnnaBridge | 189:f392fc9709a3 | 390 | #define __STREXW __iar_builtin_STREX |
| AnnaBridge | 189:f392fc9709a3 | 391 | |
| AnnaBridge | 189:f392fc9709a3 | 392 | #if !__IAR_M0_FAMILY |
| AnnaBridge | 189:f392fc9709a3 | 393 | #define __USAT __iar_builtin_USAT |
| AnnaBridge | 189:f392fc9709a3 | 394 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 395 | |
| AnnaBridge | 189:f392fc9709a3 | 396 | #define __WFE __iar_builtin_WFE |
| AnnaBridge | 189:f392fc9709a3 | 397 | #define __WFI __iar_builtin_WFI |
| AnnaBridge | 189:f392fc9709a3 | 398 | |
| AnnaBridge | 189:f392fc9709a3 | 399 | #if __ARM_MEDIA__ |
| AnnaBridge | 189:f392fc9709a3 | 400 | #define __SADD8 __iar_builtin_SADD8 |
| AnnaBridge | 189:f392fc9709a3 | 401 | #define __QADD8 __iar_builtin_QADD8 |
| AnnaBridge | 189:f392fc9709a3 | 402 | #define __SHADD8 __iar_builtin_SHADD8 |
| AnnaBridge | 189:f392fc9709a3 | 403 | #define __UADD8 __iar_builtin_UADD8 |
| AnnaBridge | 189:f392fc9709a3 | 404 | #define __UQADD8 __iar_builtin_UQADD8 |
| AnnaBridge | 189:f392fc9709a3 | 405 | #define __UHADD8 __iar_builtin_UHADD8 |
| AnnaBridge | 189:f392fc9709a3 | 406 | #define __SSUB8 __iar_builtin_SSUB8 |
| AnnaBridge | 189:f392fc9709a3 | 407 | #define __QSUB8 __iar_builtin_QSUB8 |
| AnnaBridge | 189:f392fc9709a3 | 408 | #define __SHSUB8 __iar_builtin_SHSUB8 |
| AnnaBridge | 189:f392fc9709a3 | 409 | #define __USUB8 __iar_builtin_USUB8 |
| AnnaBridge | 189:f392fc9709a3 | 410 | #define __UQSUB8 __iar_builtin_UQSUB8 |
| AnnaBridge | 189:f392fc9709a3 | 411 | #define __UHSUB8 __iar_builtin_UHSUB8 |
| AnnaBridge | 189:f392fc9709a3 | 412 | #define __SADD16 __iar_builtin_SADD16 |
| AnnaBridge | 189:f392fc9709a3 | 413 | #define __QADD16 __iar_builtin_QADD16 |
| AnnaBridge | 189:f392fc9709a3 | 414 | #define __SHADD16 __iar_builtin_SHADD16 |
| AnnaBridge | 189:f392fc9709a3 | 415 | #define __UADD16 __iar_builtin_UADD16 |
| AnnaBridge | 189:f392fc9709a3 | 416 | #define __UQADD16 __iar_builtin_UQADD16 |
| AnnaBridge | 189:f392fc9709a3 | 417 | #define __UHADD16 __iar_builtin_UHADD16 |
| AnnaBridge | 189:f392fc9709a3 | 418 | #define __SSUB16 __iar_builtin_SSUB16 |
| AnnaBridge | 189:f392fc9709a3 | 419 | #define __QSUB16 __iar_builtin_QSUB16 |
| AnnaBridge | 189:f392fc9709a3 | 420 | #define __SHSUB16 __iar_builtin_SHSUB16 |
| AnnaBridge | 189:f392fc9709a3 | 421 | #define __USUB16 __iar_builtin_USUB16 |
| AnnaBridge | 189:f392fc9709a3 | 422 | #define __UQSUB16 __iar_builtin_UQSUB16 |
| AnnaBridge | 189:f392fc9709a3 | 423 | #define __UHSUB16 __iar_builtin_UHSUB16 |
| AnnaBridge | 189:f392fc9709a3 | 424 | #define __SASX __iar_builtin_SASX |
| AnnaBridge | 189:f392fc9709a3 | 425 | #define __QASX __iar_builtin_QASX |
| AnnaBridge | 189:f392fc9709a3 | 426 | #define __SHASX __iar_builtin_SHASX |
| AnnaBridge | 189:f392fc9709a3 | 427 | #define __UASX __iar_builtin_UASX |
| AnnaBridge | 189:f392fc9709a3 | 428 | #define __UQASX __iar_builtin_UQASX |
| AnnaBridge | 189:f392fc9709a3 | 429 | #define __UHASX __iar_builtin_UHASX |
| AnnaBridge | 189:f392fc9709a3 | 430 | #define __SSAX __iar_builtin_SSAX |
| AnnaBridge | 189:f392fc9709a3 | 431 | #define __QSAX __iar_builtin_QSAX |
| AnnaBridge | 189:f392fc9709a3 | 432 | #define __SHSAX __iar_builtin_SHSAX |
| AnnaBridge | 189:f392fc9709a3 | 433 | #define __USAX __iar_builtin_USAX |
| AnnaBridge | 189:f392fc9709a3 | 434 | #define __UQSAX __iar_builtin_UQSAX |
| AnnaBridge | 189:f392fc9709a3 | 435 | #define __UHSAX __iar_builtin_UHSAX |
| AnnaBridge | 189:f392fc9709a3 | 436 | #define __USAD8 __iar_builtin_USAD8 |
| AnnaBridge | 189:f392fc9709a3 | 437 | #define __USADA8 __iar_builtin_USADA8 |
| AnnaBridge | 189:f392fc9709a3 | 438 | #define __SSAT16 __iar_builtin_SSAT16 |
| AnnaBridge | 189:f392fc9709a3 | 439 | #define __USAT16 __iar_builtin_USAT16 |
| AnnaBridge | 189:f392fc9709a3 | 440 | #define __UXTB16 __iar_builtin_UXTB16 |
| AnnaBridge | 189:f392fc9709a3 | 441 | #define __UXTAB16 __iar_builtin_UXTAB16 |
| AnnaBridge | 189:f392fc9709a3 | 442 | #define __SXTB16 __iar_builtin_SXTB16 |
| AnnaBridge | 189:f392fc9709a3 | 443 | #define __SXTAB16 __iar_builtin_SXTAB16 |
| AnnaBridge | 189:f392fc9709a3 | 444 | #define __SMUAD __iar_builtin_SMUAD |
| AnnaBridge | 189:f392fc9709a3 | 445 | #define __SMUADX __iar_builtin_SMUADX |
| AnnaBridge | 189:f392fc9709a3 | 446 | #define __SMMLA __iar_builtin_SMMLA |
| AnnaBridge | 189:f392fc9709a3 | 447 | #define __SMLAD __iar_builtin_SMLAD |
| AnnaBridge | 189:f392fc9709a3 | 448 | #define __SMLADX __iar_builtin_SMLADX |
| AnnaBridge | 189:f392fc9709a3 | 449 | #define __SMLALD __iar_builtin_SMLALD |
| AnnaBridge | 189:f392fc9709a3 | 450 | #define __SMLALDX __iar_builtin_SMLALDX |
| AnnaBridge | 189:f392fc9709a3 | 451 | #define __SMUSD __iar_builtin_SMUSD |
| AnnaBridge | 189:f392fc9709a3 | 452 | #define __SMUSDX __iar_builtin_SMUSDX |
| AnnaBridge | 189:f392fc9709a3 | 453 | #define __SMLSD __iar_builtin_SMLSD |
| AnnaBridge | 189:f392fc9709a3 | 454 | #define __SMLSDX __iar_builtin_SMLSDX |
| AnnaBridge | 189:f392fc9709a3 | 455 | #define __SMLSLD __iar_builtin_SMLSLD |
| AnnaBridge | 189:f392fc9709a3 | 456 | #define __SMLSLDX __iar_builtin_SMLSLDX |
| AnnaBridge | 189:f392fc9709a3 | 457 | #define __SEL __iar_builtin_SEL |
| AnnaBridge | 189:f392fc9709a3 | 458 | #define __QADD __iar_builtin_QADD |
| AnnaBridge | 189:f392fc9709a3 | 459 | #define __QSUB __iar_builtin_QSUB |
| AnnaBridge | 189:f392fc9709a3 | 460 | #define __PKHBT __iar_builtin_PKHBT |
| AnnaBridge | 189:f392fc9709a3 | 461 | #define __PKHTB __iar_builtin_PKHTB |
| AnnaBridge | 189:f392fc9709a3 | 462 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 463 | |
| AnnaBridge | 189:f392fc9709a3 | 464 | #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */ |
| AnnaBridge | 189:f392fc9709a3 | 465 | |
| AnnaBridge | 189:f392fc9709a3 | 466 | #if __IAR_M0_FAMILY |
| AnnaBridge | 189:f392fc9709a3 | 467 | /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ |
| AnnaBridge | 189:f392fc9709a3 | 468 | #define __CLZ __cmsis_iar_clz_not_active |
| AnnaBridge | 189:f392fc9709a3 | 469 | #define __SSAT __cmsis_iar_ssat_not_active |
| AnnaBridge | 189:f392fc9709a3 | 470 | #define __USAT __cmsis_iar_usat_not_active |
| AnnaBridge | 189:f392fc9709a3 | 471 | #define __RBIT __cmsis_iar_rbit_not_active |
| AnnaBridge | 189:f392fc9709a3 | 472 | #define __get_APSR __cmsis_iar_get_APSR_not_active |
| AnnaBridge | 189:f392fc9709a3 | 473 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 474 | |
| AnnaBridge | 189:f392fc9709a3 | 475 | |
| AnnaBridge | 189:f392fc9709a3 | 476 | #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 477 | (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) |
| AnnaBridge | 189:f392fc9709a3 | 478 | #define __get_FPSCR __cmsis_iar_get_FPSR_not_active |
| AnnaBridge | 189:f392fc9709a3 | 479 | #define __set_FPSCR __cmsis_iar_set_FPSR_not_active |
| AnnaBridge | 189:f392fc9709a3 | 480 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 481 | |
| AnnaBridge | 189:f392fc9709a3 | 482 | #ifdef __INTRINSICS_INCLUDED |
| AnnaBridge | 189:f392fc9709a3 | 483 | #error intrinsics.h is already included previously! |
| AnnaBridge | 189:f392fc9709a3 | 484 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 485 | |
| AnnaBridge | 189:f392fc9709a3 | 486 | #include <intrinsics.h> |
| AnnaBridge | 189:f392fc9709a3 | 487 | |
| AnnaBridge | 189:f392fc9709a3 | 488 | #if __IAR_M0_FAMILY |
| AnnaBridge | 189:f392fc9709a3 | 489 | /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ |
| AnnaBridge | 189:f392fc9709a3 | 490 | #undef __CLZ |
| AnnaBridge | 189:f392fc9709a3 | 491 | #undef __SSAT |
| AnnaBridge | 189:f392fc9709a3 | 492 | #undef __USAT |
| AnnaBridge | 189:f392fc9709a3 | 493 | #undef __RBIT |
| AnnaBridge | 189:f392fc9709a3 | 494 | #undef __get_APSR |
| AnnaBridge | 189:f392fc9709a3 | 495 | |
| AnnaBridge | 189:f392fc9709a3 | 496 | __STATIC_INLINE uint8_t __CLZ(uint32_t data) |
| AnnaBridge | 189:f392fc9709a3 | 497 | { |
| AnnaBridge | 189:f392fc9709a3 | 498 | if (data == 0U) { return 32U; } |
| AnnaBridge | 189:f392fc9709a3 | 499 | |
| AnnaBridge | 189:f392fc9709a3 | 500 | uint32_t count = 0U; |
| AnnaBridge | 189:f392fc9709a3 | 501 | uint32_t mask = 0x80000000U; |
| AnnaBridge | 189:f392fc9709a3 | 502 | |
| AnnaBridge | 189:f392fc9709a3 | 503 | while ((data & mask) == 0U) |
| AnnaBridge | 189:f392fc9709a3 | 504 | { |
| AnnaBridge | 189:f392fc9709a3 | 505 | count += 1U; |
| AnnaBridge | 189:f392fc9709a3 | 506 | mask = mask >> 1U; |
| AnnaBridge | 189:f392fc9709a3 | 507 | } |
| AnnaBridge | 189:f392fc9709a3 | 508 | return count; |
| AnnaBridge | 189:f392fc9709a3 | 509 | } |
| AnnaBridge | 189:f392fc9709a3 | 510 | |
| AnnaBridge | 189:f392fc9709a3 | 511 | __STATIC_INLINE uint32_t __RBIT(uint32_t v) |
| AnnaBridge | 189:f392fc9709a3 | 512 | { |
| AnnaBridge | 189:f392fc9709a3 | 513 | uint8_t sc = 31U; |
| AnnaBridge | 189:f392fc9709a3 | 514 | uint32_t r = v; |
| AnnaBridge | 189:f392fc9709a3 | 515 | for (v >>= 1U; v; v >>= 1U) |
| AnnaBridge | 189:f392fc9709a3 | 516 | { |
| AnnaBridge | 189:f392fc9709a3 | 517 | r <<= 1U; |
| AnnaBridge | 189:f392fc9709a3 | 518 | r |= v & 1U; |
| AnnaBridge | 189:f392fc9709a3 | 519 | sc--; |
| AnnaBridge | 189:f392fc9709a3 | 520 | } |
| AnnaBridge | 189:f392fc9709a3 | 521 | return (r << sc); |
| AnnaBridge | 189:f392fc9709a3 | 522 | } |
| AnnaBridge | 189:f392fc9709a3 | 523 | |
| AnnaBridge | 189:f392fc9709a3 | 524 | __STATIC_INLINE uint32_t __get_APSR(void) |
| AnnaBridge | 189:f392fc9709a3 | 525 | { |
| AnnaBridge | 189:f392fc9709a3 | 526 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 527 | __asm("MRS %0,APSR" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 528 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 529 | } |
| AnnaBridge | 189:f392fc9709a3 | 530 | |
| AnnaBridge | 189:f392fc9709a3 | 531 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 532 | |
| AnnaBridge | 189:f392fc9709a3 | 533 | #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 534 | (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) |
| AnnaBridge | 189:f392fc9709a3 | 535 | #undef __get_FPSCR |
| AnnaBridge | 189:f392fc9709a3 | 536 | #undef __set_FPSCR |
| AnnaBridge | 189:f392fc9709a3 | 537 | #define __get_FPSCR() (0) |
| AnnaBridge | 189:f392fc9709a3 | 538 | #define __set_FPSCR(VALUE) ((void)VALUE) |
| AnnaBridge | 189:f392fc9709a3 | 539 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 540 | |
| AnnaBridge | 189:f392fc9709a3 | 541 | #pragma diag_suppress=Pe940 |
| AnnaBridge | 189:f392fc9709a3 | 542 | #pragma diag_suppress=Pe177 |
| AnnaBridge | 189:f392fc9709a3 | 543 | |
| AnnaBridge | 189:f392fc9709a3 | 544 | #define __enable_irq __enable_interrupt |
| AnnaBridge | 189:f392fc9709a3 | 545 | #define __disable_irq __disable_interrupt |
| AnnaBridge | 189:f392fc9709a3 | 546 | #define __NOP __no_operation |
| AnnaBridge | 189:f392fc9709a3 | 547 | |
| AnnaBridge | 189:f392fc9709a3 | 548 | #define __get_xPSR __get_PSR |
| AnnaBridge | 189:f392fc9709a3 | 549 | |
| AnnaBridge | 189:f392fc9709a3 | 550 | #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0) |
| AnnaBridge | 189:f392fc9709a3 | 551 | |
| AnnaBridge | 189:f392fc9709a3 | 552 | __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 553 | { |
| AnnaBridge | 189:f392fc9709a3 | 554 | return __LDREX((unsigned long *)ptr); |
| AnnaBridge | 189:f392fc9709a3 | 555 | } |
| AnnaBridge | 189:f392fc9709a3 | 556 | |
| AnnaBridge | 189:f392fc9709a3 | 557 | __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 558 | { |
| AnnaBridge | 189:f392fc9709a3 | 559 | return __STREX(value, (unsigned long *)ptr); |
| AnnaBridge | 189:f392fc9709a3 | 560 | } |
| AnnaBridge | 189:f392fc9709a3 | 561 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 562 | |
| AnnaBridge | 189:f392fc9709a3 | 563 | |
| AnnaBridge | 189:f392fc9709a3 | 564 | /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ |
| AnnaBridge | 189:f392fc9709a3 | 565 | #if (__CORTEX_M >= 0x03) |
| AnnaBridge | 189:f392fc9709a3 | 566 | |
| AnnaBridge | 189:f392fc9709a3 | 567 | __IAR_FT uint32_t __RRX(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 568 | { |
| AnnaBridge | 189:f392fc9709a3 | 569 | uint32_t result; |
| AnnaBridge | 189:f392fc9709a3 | 570 | __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc"); |
| AnnaBridge | 189:f392fc9709a3 | 571 | return(result); |
| AnnaBridge | 189:f392fc9709a3 | 572 | } |
| AnnaBridge | 189:f392fc9709a3 | 573 | |
| AnnaBridge | 189:f392fc9709a3 | 574 | __IAR_FT void __set_BASEPRI_MAX(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 575 | { |
| AnnaBridge | 189:f392fc9709a3 | 576 | __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 577 | } |
| AnnaBridge | 189:f392fc9709a3 | 578 | |
| AnnaBridge | 189:f392fc9709a3 | 579 | |
| AnnaBridge | 189:f392fc9709a3 | 580 | #define __enable_fault_irq __enable_fiq |
| AnnaBridge | 189:f392fc9709a3 | 581 | #define __disable_fault_irq __disable_fiq |
| AnnaBridge | 189:f392fc9709a3 | 582 | |
| AnnaBridge | 189:f392fc9709a3 | 583 | |
| AnnaBridge | 189:f392fc9709a3 | 584 | #endif /* (__CORTEX_M >= 0x03) */ |
| AnnaBridge | 189:f392fc9709a3 | 585 | |
| AnnaBridge | 189:f392fc9709a3 | 586 | __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) |
| AnnaBridge | 189:f392fc9709a3 | 587 | { |
| AnnaBridge | 189:f392fc9709a3 | 588 | return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); |
| AnnaBridge | 189:f392fc9709a3 | 589 | } |
| AnnaBridge | 189:f392fc9709a3 | 590 | |
| AnnaBridge | 189:f392fc9709a3 | 591 | #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ |
| AnnaBridge | 189:f392fc9709a3 | 592 | (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) |
| AnnaBridge | 189:f392fc9709a3 | 593 | |
| AnnaBridge | 189:f392fc9709a3 | 594 | __IAR_FT uint32_t __get_MSPLIM(void) |
| AnnaBridge | 189:f392fc9709a3 | 595 | { |
| AnnaBridge | 189:f392fc9709a3 | 596 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 597 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 598 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 599 | // without main extensions, the non-secure MSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 600 | res = 0U; |
| AnnaBridge | 189:f392fc9709a3 | 601 | #else |
| AnnaBridge | 189:f392fc9709a3 | 602 | __asm volatile("MRS %0,MSPLIM" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 603 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 604 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 605 | } |
| AnnaBridge | 189:f392fc9709a3 | 606 | |
| AnnaBridge | 189:f392fc9709a3 | 607 | __IAR_FT void __set_MSPLIM(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 608 | { |
| AnnaBridge | 189:f392fc9709a3 | 609 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 610 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 611 | // without main extensions, the non-secure MSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 612 | (void)value; |
| AnnaBridge | 189:f392fc9709a3 | 613 | #else |
| AnnaBridge | 189:f392fc9709a3 | 614 | __asm volatile("MSR MSPLIM,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 615 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 616 | } |
| AnnaBridge | 189:f392fc9709a3 | 617 | |
| AnnaBridge | 189:f392fc9709a3 | 618 | __IAR_FT uint32_t __get_PSPLIM(void) |
| AnnaBridge | 189:f392fc9709a3 | 619 | { |
| AnnaBridge | 189:f392fc9709a3 | 620 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 621 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 622 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 623 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 624 | res = 0U; |
| AnnaBridge | 189:f392fc9709a3 | 625 | #else |
| AnnaBridge | 189:f392fc9709a3 | 626 | __asm volatile("MRS %0,PSPLIM" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 627 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 628 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 629 | } |
| AnnaBridge | 189:f392fc9709a3 | 630 | |
| AnnaBridge | 189:f392fc9709a3 | 631 | __IAR_FT void __set_PSPLIM(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 632 | { |
| AnnaBridge | 189:f392fc9709a3 | 633 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 634 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 635 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 636 | (void)value; |
| AnnaBridge | 189:f392fc9709a3 | 637 | #else |
| AnnaBridge | 189:f392fc9709a3 | 638 | __asm volatile("MSR PSPLIM,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 639 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 640 | } |
| AnnaBridge | 189:f392fc9709a3 | 641 | |
| AnnaBridge | 189:f392fc9709a3 | 642 | __IAR_FT uint32_t __TZ_get_CONTROL_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 643 | { |
| AnnaBridge | 189:f392fc9709a3 | 644 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 645 | __asm volatile("MRS %0,CONTROL_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 646 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 647 | } |
| AnnaBridge | 189:f392fc9709a3 | 648 | |
| AnnaBridge | 189:f392fc9709a3 | 649 | __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 650 | { |
| AnnaBridge | 189:f392fc9709a3 | 651 | __asm volatile("MSR CONTROL_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 652 | } |
| AnnaBridge | 189:f392fc9709a3 | 653 | |
| AnnaBridge | 189:f392fc9709a3 | 654 | __IAR_FT uint32_t __TZ_get_PSP_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 655 | { |
| AnnaBridge | 189:f392fc9709a3 | 656 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 657 | __asm volatile("MRS %0,PSP_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 658 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 659 | } |
| AnnaBridge | 189:f392fc9709a3 | 660 | |
| AnnaBridge | 189:f392fc9709a3 | 661 | __IAR_FT void __TZ_set_PSP_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 662 | { |
| AnnaBridge | 189:f392fc9709a3 | 663 | __asm volatile("MSR PSP_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 664 | } |
| AnnaBridge | 189:f392fc9709a3 | 665 | |
| AnnaBridge | 189:f392fc9709a3 | 666 | __IAR_FT uint32_t __TZ_get_MSP_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 667 | { |
| AnnaBridge | 189:f392fc9709a3 | 668 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 669 | __asm volatile("MRS %0,MSP_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 670 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 671 | } |
| AnnaBridge | 189:f392fc9709a3 | 672 | |
| AnnaBridge | 189:f392fc9709a3 | 673 | __IAR_FT void __TZ_set_MSP_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 674 | { |
| AnnaBridge | 189:f392fc9709a3 | 675 | __asm volatile("MSR MSP_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 676 | } |
| AnnaBridge | 189:f392fc9709a3 | 677 | |
| AnnaBridge | 189:f392fc9709a3 | 678 | __IAR_FT uint32_t __TZ_get_SP_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 679 | { |
| AnnaBridge | 189:f392fc9709a3 | 680 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 681 | __asm volatile("MRS %0,SP_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 682 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 683 | } |
| AnnaBridge | 189:f392fc9709a3 | 684 | __IAR_FT void __TZ_set_SP_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 685 | { |
| AnnaBridge | 189:f392fc9709a3 | 686 | __asm volatile("MSR SP_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 687 | } |
| AnnaBridge | 189:f392fc9709a3 | 688 | |
| AnnaBridge | 189:f392fc9709a3 | 689 | __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 690 | { |
| AnnaBridge | 189:f392fc9709a3 | 691 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 692 | __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 693 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 694 | } |
| AnnaBridge | 189:f392fc9709a3 | 695 | |
| AnnaBridge | 189:f392fc9709a3 | 696 | __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 697 | { |
| AnnaBridge | 189:f392fc9709a3 | 698 | __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 699 | } |
| AnnaBridge | 189:f392fc9709a3 | 700 | |
| AnnaBridge | 189:f392fc9709a3 | 701 | __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 702 | { |
| AnnaBridge | 189:f392fc9709a3 | 703 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 704 | __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 705 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 706 | } |
| AnnaBridge | 189:f392fc9709a3 | 707 | |
| AnnaBridge | 189:f392fc9709a3 | 708 | __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 709 | { |
| AnnaBridge | 189:f392fc9709a3 | 710 | __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 711 | } |
| AnnaBridge | 189:f392fc9709a3 | 712 | |
| AnnaBridge | 189:f392fc9709a3 | 713 | __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 714 | { |
| AnnaBridge | 189:f392fc9709a3 | 715 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 716 | __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 717 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 718 | } |
| AnnaBridge | 189:f392fc9709a3 | 719 | |
| AnnaBridge | 189:f392fc9709a3 | 720 | __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 721 | { |
| AnnaBridge | 189:f392fc9709a3 | 722 | __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 723 | } |
| AnnaBridge | 189:f392fc9709a3 | 724 | |
| AnnaBridge | 189:f392fc9709a3 | 725 | __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 726 | { |
| AnnaBridge | 189:f392fc9709a3 | 727 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 728 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 729 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 730 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 731 | res = 0U; |
| AnnaBridge | 189:f392fc9709a3 | 732 | #else |
| AnnaBridge | 189:f392fc9709a3 | 733 | __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 734 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 735 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 736 | } |
| AnnaBridge | 189:f392fc9709a3 | 737 | |
| AnnaBridge | 189:f392fc9709a3 | 738 | __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 739 | { |
| AnnaBridge | 189:f392fc9709a3 | 740 | #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ |
| AnnaBridge | 189:f392fc9709a3 | 741 | (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) |
| AnnaBridge | 189:f392fc9709a3 | 742 | // without main extensions, the non-secure PSPLIM is RAZ/WI |
| AnnaBridge | 189:f392fc9709a3 | 743 | (void)value; |
| AnnaBridge | 189:f392fc9709a3 | 744 | #else |
| AnnaBridge | 189:f392fc9709a3 | 745 | __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 746 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 747 | } |
| AnnaBridge | 189:f392fc9709a3 | 748 | |
| AnnaBridge | 189:f392fc9709a3 | 749 | __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void) |
| AnnaBridge | 189:f392fc9709a3 | 750 | { |
| AnnaBridge | 189:f392fc9709a3 | 751 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 752 | __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res)); |
| AnnaBridge | 189:f392fc9709a3 | 753 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 754 | } |
| AnnaBridge | 189:f392fc9709a3 | 755 | |
| AnnaBridge | 189:f392fc9709a3 | 756 | __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value) |
| AnnaBridge | 189:f392fc9709a3 | 757 | { |
| AnnaBridge | 189:f392fc9709a3 | 758 | __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value)); |
| AnnaBridge | 189:f392fc9709a3 | 759 | } |
| AnnaBridge | 189:f392fc9709a3 | 760 | |
| AnnaBridge | 189:f392fc9709a3 | 761 | #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ |
| AnnaBridge | 189:f392fc9709a3 | 762 | |
| AnnaBridge | 189:f392fc9709a3 | 763 | #endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */ |
| AnnaBridge | 189:f392fc9709a3 | 764 | |
| AnnaBridge | 189:f392fc9709a3 | 765 | #define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value)) |
| AnnaBridge | 189:f392fc9709a3 | 766 | |
| AnnaBridge | 189:f392fc9709a3 | 767 | #if __IAR_M0_FAMILY |
| AnnaBridge | 189:f392fc9709a3 | 768 | __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) |
| AnnaBridge | 189:f392fc9709a3 | 769 | { |
| AnnaBridge | 189:f392fc9709a3 | 770 | if ((sat >= 1U) && (sat <= 32U)) |
| AnnaBridge | 189:f392fc9709a3 | 771 | { |
| AnnaBridge | 189:f392fc9709a3 | 772 | const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); |
| AnnaBridge | 189:f392fc9709a3 | 773 | const int32_t min = -1 - max ; |
| AnnaBridge | 189:f392fc9709a3 | 774 | if (val > max) |
| AnnaBridge | 189:f392fc9709a3 | 775 | { |
| AnnaBridge | 189:f392fc9709a3 | 776 | return max; |
| AnnaBridge | 189:f392fc9709a3 | 777 | } |
| AnnaBridge | 189:f392fc9709a3 | 778 | else if (val < min) |
| AnnaBridge | 189:f392fc9709a3 | 779 | { |
| AnnaBridge | 189:f392fc9709a3 | 780 | return min; |
| AnnaBridge | 189:f392fc9709a3 | 781 | } |
| AnnaBridge | 189:f392fc9709a3 | 782 | } |
| AnnaBridge | 189:f392fc9709a3 | 783 | return val; |
| AnnaBridge | 189:f392fc9709a3 | 784 | } |
| AnnaBridge | 189:f392fc9709a3 | 785 | |
| AnnaBridge | 189:f392fc9709a3 | 786 | __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) |
| AnnaBridge | 189:f392fc9709a3 | 787 | { |
| AnnaBridge | 189:f392fc9709a3 | 788 | if (sat <= 31U) |
| AnnaBridge | 189:f392fc9709a3 | 789 | { |
| AnnaBridge | 189:f392fc9709a3 | 790 | const uint32_t max = ((1U << sat) - 1U); |
| AnnaBridge | 189:f392fc9709a3 | 791 | if (val > (int32_t)max) |
| AnnaBridge | 189:f392fc9709a3 | 792 | { |
| AnnaBridge | 189:f392fc9709a3 | 793 | return max; |
| AnnaBridge | 189:f392fc9709a3 | 794 | } |
| AnnaBridge | 189:f392fc9709a3 | 795 | else if (val < 0) |
| AnnaBridge | 189:f392fc9709a3 | 796 | { |
| AnnaBridge | 189:f392fc9709a3 | 797 | return 0U; |
| AnnaBridge | 189:f392fc9709a3 | 798 | } |
| AnnaBridge | 189:f392fc9709a3 | 799 | } |
| AnnaBridge | 189:f392fc9709a3 | 800 | return (uint32_t)val; |
| AnnaBridge | 189:f392fc9709a3 | 801 | } |
| AnnaBridge | 189:f392fc9709a3 | 802 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 803 | |
| AnnaBridge | 189:f392fc9709a3 | 804 | #if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ |
| AnnaBridge | 189:f392fc9709a3 | 805 | |
| AnnaBridge | 189:f392fc9709a3 | 806 | __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr) |
| AnnaBridge | 189:f392fc9709a3 | 807 | { |
| AnnaBridge | 189:f392fc9709a3 | 808 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 809 | __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 810 | return ((uint8_t)res); |
| AnnaBridge | 189:f392fc9709a3 | 811 | } |
| AnnaBridge | 189:f392fc9709a3 | 812 | |
| AnnaBridge | 189:f392fc9709a3 | 813 | __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr) |
| AnnaBridge | 189:f392fc9709a3 | 814 | { |
| AnnaBridge | 189:f392fc9709a3 | 815 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 816 | __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 817 | return ((uint16_t)res); |
| AnnaBridge | 189:f392fc9709a3 | 818 | } |
| AnnaBridge | 189:f392fc9709a3 | 819 | |
| AnnaBridge | 189:f392fc9709a3 | 820 | __IAR_FT uint32_t __LDRT(volatile uint32_t *addr) |
| AnnaBridge | 189:f392fc9709a3 | 821 | { |
| AnnaBridge | 189:f392fc9709a3 | 822 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 823 | __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 824 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 825 | } |
| AnnaBridge | 189:f392fc9709a3 | 826 | |
| AnnaBridge | 189:f392fc9709a3 | 827 | __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr) |
| AnnaBridge | 189:f392fc9709a3 | 828 | { |
| AnnaBridge | 189:f392fc9709a3 | 829 | __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 830 | } |
| AnnaBridge | 189:f392fc9709a3 | 831 | |
| AnnaBridge | 189:f392fc9709a3 | 832 | __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr) |
| AnnaBridge | 189:f392fc9709a3 | 833 | { |
| AnnaBridge | 189:f392fc9709a3 | 834 | __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 835 | } |
| AnnaBridge | 189:f392fc9709a3 | 836 | |
| AnnaBridge | 189:f392fc9709a3 | 837 | __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr) |
| AnnaBridge | 189:f392fc9709a3 | 838 | { |
| AnnaBridge | 189:f392fc9709a3 | 839 | __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 840 | } |
| AnnaBridge | 189:f392fc9709a3 | 841 | |
| AnnaBridge | 189:f392fc9709a3 | 842 | #endif /* (__CORTEX_M >= 0x03) */ |
| AnnaBridge | 189:f392fc9709a3 | 843 | |
| AnnaBridge | 189:f392fc9709a3 | 844 | #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ |
| AnnaBridge | 189:f392fc9709a3 | 845 | (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) |
| AnnaBridge | 189:f392fc9709a3 | 846 | |
| AnnaBridge | 189:f392fc9709a3 | 847 | |
| AnnaBridge | 189:f392fc9709a3 | 848 | __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 849 | { |
| AnnaBridge | 189:f392fc9709a3 | 850 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 851 | __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 852 | return ((uint8_t)res); |
| AnnaBridge | 189:f392fc9709a3 | 853 | } |
| AnnaBridge | 189:f392fc9709a3 | 854 | |
| AnnaBridge | 189:f392fc9709a3 | 855 | __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 856 | { |
| AnnaBridge | 189:f392fc9709a3 | 857 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 858 | __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 859 | return ((uint16_t)res); |
| AnnaBridge | 189:f392fc9709a3 | 860 | } |
| AnnaBridge | 189:f392fc9709a3 | 861 | |
| AnnaBridge | 189:f392fc9709a3 | 862 | __IAR_FT uint32_t __LDA(volatile uint32_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 863 | { |
| AnnaBridge | 189:f392fc9709a3 | 864 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 865 | __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 866 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 867 | } |
| AnnaBridge | 189:f392fc9709a3 | 868 | |
| AnnaBridge | 189:f392fc9709a3 | 869 | __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 870 | { |
| AnnaBridge | 189:f392fc9709a3 | 871 | __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 872 | } |
| AnnaBridge | 189:f392fc9709a3 | 873 | |
| AnnaBridge | 189:f392fc9709a3 | 874 | __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 875 | { |
| AnnaBridge | 189:f392fc9709a3 | 876 | __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 877 | } |
| AnnaBridge | 189:f392fc9709a3 | 878 | |
| AnnaBridge | 189:f392fc9709a3 | 879 | __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 880 | { |
| AnnaBridge | 189:f392fc9709a3 | 881 | __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 882 | } |
| AnnaBridge | 189:f392fc9709a3 | 883 | |
| AnnaBridge | 189:f392fc9709a3 | 884 | __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 885 | { |
| AnnaBridge | 189:f392fc9709a3 | 886 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 887 | __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 888 | return ((uint8_t)res); |
| AnnaBridge | 189:f392fc9709a3 | 889 | } |
| AnnaBridge | 189:f392fc9709a3 | 890 | |
| AnnaBridge | 189:f392fc9709a3 | 891 | __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 892 | { |
| AnnaBridge | 189:f392fc9709a3 | 893 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 894 | __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 895 | return ((uint16_t)res); |
| AnnaBridge | 189:f392fc9709a3 | 896 | } |
| AnnaBridge | 189:f392fc9709a3 | 897 | |
| AnnaBridge | 189:f392fc9709a3 | 898 | __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 899 | { |
| AnnaBridge | 189:f392fc9709a3 | 900 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 901 | __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 902 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 903 | } |
| AnnaBridge | 189:f392fc9709a3 | 904 | |
| AnnaBridge | 189:f392fc9709a3 | 905 | __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 906 | { |
| AnnaBridge | 189:f392fc9709a3 | 907 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 908 | __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 909 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 910 | } |
| AnnaBridge | 189:f392fc9709a3 | 911 | |
| AnnaBridge | 189:f392fc9709a3 | 912 | __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 913 | { |
| AnnaBridge | 189:f392fc9709a3 | 914 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 915 | __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 916 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 917 | } |
| AnnaBridge | 189:f392fc9709a3 | 918 | |
| AnnaBridge | 189:f392fc9709a3 | 919 | __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) |
| AnnaBridge | 189:f392fc9709a3 | 920 | { |
| AnnaBridge | 189:f392fc9709a3 | 921 | uint32_t res; |
| AnnaBridge | 189:f392fc9709a3 | 922 | __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); |
| AnnaBridge | 189:f392fc9709a3 | 923 | return res; |
| AnnaBridge | 189:f392fc9709a3 | 924 | } |
| AnnaBridge | 189:f392fc9709a3 | 925 | |
| AnnaBridge | 189:f392fc9709a3 | 926 | #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ |
| AnnaBridge | 189:f392fc9709a3 | 927 | |
| AnnaBridge | 189:f392fc9709a3 | 928 | #undef __IAR_FT |
| AnnaBridge | 189:f392fc9709a3 | 929 | #undef __IAR_M0_FAMILY |
| AnnaBridge | 189:f392fc9709a3 | 930 | #undef __ICCARM_V8 |
| AnnaBridge | 189:f392fc9709a3 | 931 | |
| AnnaBridge | 189:f392fc9709a3 | 932 | #pragma diag_default=Pe940 |
| AnnaBridge | 189:f392fc9709a3 | 933 | #pragma diag_default=Pe177 |
| AnnaBridge | 189:f392fc9709a3 | 934 | |
| AnnaBridge | 189:f392fc9709a3 | 935 | #endif /* __CMSIS_ICCARM_H__ */ |
