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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_IAR/stm32l4xx_ll_dma2d.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @file stm32l4xx_ll_dma2d.h |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @author MCD Application Team |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @brief Header file of DMA2D LL module. |
| AnnaBridge | 189:f392fc9709a3 | 6 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 7 | * @attention |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 20 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 21 | * |
| AnnaBridge | 189:f392fc9709a3 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 32 | * |
| AnnaBridge | 189:f392fc9709a3 | 33 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 34 | */ |
| AnnaBridge | 189:f392fc9709a3 | 35 | |
| AnnaBridge | 189:f392fc9709a3 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | #ifndef __STM32L4xx_LL_DMA2D_H |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __STM32L4xx_LL_DMA2D_H |
| AnnaBridge | 189:f392fc9709a3 | 39 | |
| AnnaBridge | 189:f392fc9709a3 | 40 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 41 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 42 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 45 | #include "stm32l4xx.h" |
| AnnaBridge | 189:f392fc9709a3 | 46 | |
| AnnaBridge | 189:f392fc9709a3 | 47 | /** @addtogroup STM32L4xx_LL_Driver |
| AnnaBridge | 189:f392fc9709a3 | 48 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 49 | */ |
| AnnaBridge | 189:f392fc9709a3 | 50 | |
| AnnaBridge | 189:f392fc9709a3 | 51 | #if defined (DMA2D) |
| AnnaBridge | 189:f392fc9709a3 | 52 | |
| AnnaBridge | 189:f392fc9709a3 | 53 | /** @defgroup DMA2D_LL DMA2D |
| AnnaBridge | 189:f392fc9709a3 | 54 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 55 | */ |
| AnnaBridge | 189:f392fc9709a3 | 56 | |
| AnnaBridge | 189:f392fc9709a3 | 57 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 58 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 59 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 60 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 61 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 189:f392fc9709a3 | 62 | /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros |
| AnnaBridge | 189:f392fc9709a3 | 63 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 64 | */ |
| AnnaBridge | 189:f392fc9709a3 | 65 | |
| AnnaBridge | 189:f392fc9709a3 | 66 | /** |
| AnnaBridge | 189:f392fc9709a3 | 67 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 68 | */ |
| AnnaBridge | 189:f392fc9709a3 | 69 | #endif /*USE_FULL_LL_DRIVER*/ |
| AnnaBridge | 189:f392fc9709a3 | 70 | |
| AnnaBridge | 189:f392fc9709a3 | 71 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 72 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 189:f392fc9709a3 | 73 | /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures |
| AnnaBridge | 189:f392fc9709a3 | 74 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 75 | */ |
| AnnaBridge | 189:f392fc9709a3 | 76 | |
| AnnaBridge | 189:f392fc9709a3 | 77 | /** |
| AnnaBridge | 189:f392fc9709a3 | 78 | * @brief LL DMA2D Init Structure Definition |
| AnnaBridge | 189:f392fc9709a3 | 79 | */ |
| AnnaBridge | 189:f392fc9709a3 | 80 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 81 | { |
| AnnaBridge | 189:f392fc9709a3 | 82 | uint32_t Mode; /*!< Specifies the DMA2D transfer mode. |
| AnnaBridge | 189:f392fc9709a3 | 83 | - This parameter can be one value of @ref DMA2D_LL_EC_MODE. |
| AnnaBridge | 189:f392fc9709a3 | 84 | |
| AnnaBridge | 189:f392fc9709a3 | 85 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/ |
| AnnaBridge | 189:f392fc9709a3 | 86 | |
| AnnaBridge | 189:f392fc9709a3 | 87 | uint32_t ColorMode; /*!< Specifies the color format of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 88 | - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. |
| AnnaBridge | 189:f392fc9709a3 | 89 | |
| AnnaBridge | 189:f392fc9709a3 | 90 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */ |
| AnnaBridge | 189:f392fc9709a3 | 91 | |
| AnnaBridge | 189:f392fc9709a3 | 92 | uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 93 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 94 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 95 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 96 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 97 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 98 | |
| AnnaBridge | 189:f392fc9709a3 | 99 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
| AnnaBridge | 189:f392fc9709a3 | 100 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
| AnnaBridge | 189:f392fc9709a3 | 101 | |
| AnnaBridge | 189:f392fc9709a3 | 102 | uint32_t OutputGreen; /*!< Specifies the Green value of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 103 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 104 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 105 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 106 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 107 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 108 | |
| AnnaBridge | 189:f392fc9709a3 | 109 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
| AnnaBridge | 189:f392fc9709a3 | 110 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
| AnnaBridge | 189:f392fc9709a3 | 111 | |
| AnnaBridge | 189:f392fc9709a3 | 112 | uint32_t OutputRed; /*!< Specifies the Red value of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 113 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 114 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 115 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 116 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 117 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 118 | |
| AnnaBridge | 189:f392fc9709a3 | 119 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
| AnnaBridge | 189:f392fc9709a3 | 120 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
| AnnaBridge | 189:f392fc9709a3 | 121 | |
| AnnaBridge | 189:f392fc9709a3 | 122 | uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 123 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 124 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 125 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 126 | - This parameter is not considered if RGB888 or RGB565 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 127 | |
| AnnaBridge | 189:f392fc9709a3 | 128 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
| AnnaBridge | 189:f392fc9709a3 | 129 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
| AnnaBridge | 189:f392fc9709a3 | 130 | |
| AnnaBridge | 189:f392fc9709a3 | 131 | uint32_t OutputMemoryAddress; /*!< Specifies the memory address. |
| AnnaBridge | 189:f392fc9709a3 | 132 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. |
| AnnaBridge | 189:f392fc9709a3 | 133 | |
| AnnaBridge | 189:f392fc9709a3 | 134 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */ |
| AnnaBridge | 189:f392fc9709a3 | 135 | |
| AnnaBridge | 189:f392fc9709a3 | 136 | #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) |
| AnnaBridge | 189:f392fc9709a3 | 137 | uint32_t OutputSwapMode; /*!< Specifies the output swap mode color format of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 138 | - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_SWAP_MODE. |
| AnnaBridge | 189:f392fc9709a3 | 139 | |
| AnnaBridge | 189:f392fc9709a3 | 140 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputSwapMode(). */ |
| AnnaBridge | 189:f392fc9709a3 | 141 | #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 142 | |
| AnnaBridge | 189:f392fc9709a3 | 143 | #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) |
| AnnaBridge | 189:f392fc9709a3 | 144 | uint32_t LineOffsetMode; /*!< Specifies the output line offset mode. |
| AnnaBridge | 189:f392fc9709a3 | 145 | - This parameter can be one value of @ref DMA2D_LL_EC_LINE_OFFSET_MODE. |
| AnnaBridge | 189:f392fc9709a3 | 146 | |
| AnnaBridge | 189:f392fc9709a3 | 147 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffsetMode(). */ |
| AnnaBridge | 189:f392fc9709a3 | 148 | #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 149 | |
| AnnaBridge | 189:f392fc9709a3 | 150 | uint32_t LineOffset; /*!< Specifies the output line offset value. |
| AnnaBridge | 189:f392fc9709a3 | 151 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF on STM32L496xx/STM32L4A6xx |
| AnnaBridge | 189:f392fc9709a3 | 152 | else between Min_Data = 0x0000 and Max_Data = 0xFFFF on other devices. |
| AnnaBridge | 189:f392fc9709a3 | 153 | |
| AnnaBridge | 189:f392fc9709a3 | 154 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */ |
| AnnaBridge | 189:f392fc9709a3 | 155 | |
| AnnaBridge | 189:f392fc9709a3 | 156 | uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred. |
| AnnaBridge | 189:f392fc9709a3 | 157 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. |
| AnnaBridge | 189:f392fc9709a3 | 158 | |
| AnnaBridge | 189:f392fc9709a3 | 159 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */ |
| AnnaBridge | 189:f392fc9709a3 | 160 | |
| AnnaBridge | 189:f392fc9709a3 | 161 | uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered. |
| AnnaBridge | 189:f392fc9709a3 | 162 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. |
| AnnaBridge | 189:f392fc9709a3 | 163 | |
| AnnaBridge | 189:f392fc9709a3 | 164 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */ |
| AnnaBridge | 189:f392fc9709a3 | 165 | |
| AnnaBridge | 189:f392fc9709a3 | 166 | uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode. |
| AnnaBridge | 189:f392fc9709a3 | 167 | - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION. |
| AnnaBridge | 189:f392fc9709a3 | 168 | |
| AnnaBridge | 189:f392fc9709a3 | 169 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */ |
| AnnaBridge | 189:f392fc9709a3 | 170 | |
| AnnaBridge | 189:f392fc9709a3 | 171 | uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 172 | - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP. |
| AnnaBridge | 189:f392fc9709a3 | 173 | |
| AnnaBridge | 189:f392fc9709a3 | 174 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */ |
| AnnaBridge | 189:f392fc9709a3 | 175 | |
| AnnaBridge | 189:f392fc9709a3 | 176 | } LL_DMA2D_InitTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 177 | |
| AnnaBridge | 189:f392fc9709a3 | 178 | /** |
| AnnaBridge | 189:f392fc9709a3 | 179 | * @brief LL DMA2D Layer Configuration Structure Definition |
| AnnaBridge | 189:f392fc9709a3 | 180 | */ |
| AnnaBridge | 189:f392fc9709a3 | 181 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 182 | { |
| AnnaBridge | 189:f392fc9709a3 | 183 | uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address. |
| AnnaBridge | 189:f392fc9709a3 | 184 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. |
| AnnaBridge | 189:f392fc9709a3 | 185 | |
| AnnaBridge | 189:f392fc9709a3 | 186 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 187 | - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 188 | - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 189 | |
| AnnaBridge | 189:f392fc9709a3 | 190 | uint32_t LineOffset; /*!< Specifies the foreground or background line offset value. |
| AnnaBridge | 189:f392fc9709a3 | 191 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. |
| AnnaBridge | 189:f392fc9709a3 | 192 | |
| AnnaBridge | 189:f392fc9709a3 | 193 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 194 | - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 195 | - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 196 | |
| AnnaBridge | 189:f392fc9709a3 | 197 | uint32_t ColorMode; /*!< Specifies the foreground or background color mode. |
| AnnaBridge | 189:f392fc9709a3 | 198 | - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE. |
| AnnaBridge | 189:f392fc9709a3 | 199 | |
| AnnaBridge | 189:f392fc9709a3 | 200 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 201 | - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 202 | - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 203 | |
| AnnaBridge | 189:f392fc9709a3 | 204 | uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode. |
| AnnaBridge | 189:f392fc9709a3 | 205 | - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE. |
| AnnaBridge | 189:f392fc9709a3 | 206 | |
| AnnaBridge | 189:f392fc9709a3 | 207 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 208 | - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 209 | - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 210 | |
| AnnaBridge | 189:f392fc9709a3 | 211 | uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size. |
| AnnaBridge | 189:f392fc9709a3 | 212 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
| AnnaBridge | 189:f392fc9709a3 | 213 | |
| AnnaBridge | 189:f392fc9709a3 | 214 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 215 | - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 216 | - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 217 | |
| AnnaBridge | 189:f392fc9709a3 | 218 | uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode. |
| AnnaBridge | 189:f392fc9709a3 | 219 | - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE. |
| AnnaBridge | 189:f392fc9709a3 | 220 | |
| AnnaBridge | 189:f392fc9709a3 | 221 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 222 | - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 223 | - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 224 | |
| AnnaBridge | 189:f392fc9709a3 | 225 | uint32_t Alpha; /*!< Specifies the foreground or background Alpha value. |
| AnnaBridge | 189:f392fc9709a3 | 226 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
| AnnaBridge | 189:f392fc9709a3 | 227 | |
| AnnaBridge | 189:f392fc9709a3 | 228 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 229 | - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 230 | - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 231 | |
| AnnaBridge | 189:f392fc9709a3 | 232 | uint32_t Blue; /*!< Specifies the foreground or background Blue color value. |
| AnnaBridge | 189:f392fc9709a3 | 233 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
| AnnaBridge | 189:f392fc9709a3 | 234 | |
| AnnaBridge | 189:f392fc9709a3 | 235 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 236 | - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 237 | - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 238 | |
| AnnaBridge | 189:f392fc9709a3 | 239 | uint32_t Green; /*!< Specifies the foreground or background Green color value. |
| AnnaBridge | 189:f392fc9709a3 | 240 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
| AnnaBridge | 189:f392fc9709a3 | 241 | |
| AnnaBridge | 189:f392fc9709a3 | 242 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 243 | - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 244 | - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 245 | |
| AnnaBridge | 189:f392fc9709a3 | 246 | uint32_t Red; /*!< Specifies the foreground or background Red color value. |
| AnnaBridge | 189:f392fc9709a3 | 247 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
| AnnaBridge | 189:f392fc9709a3 | 248 | |
| AnnaBridge | 189:f392fc9709a3 | 249 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 250 | - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 251 | - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 252 | |
| AnnaBridge | 189:f392fc9709a3 | 253 | uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address. |
| AnnaBridge | 189:f392fc9709a3 | 254 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. |
| AnnaBridge | 189:f392fc9709a3 | 255 | |
| AnnaBridge | 189:f392fc9709a3 | 256 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 257 | - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 258 | - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 259 | |
| AnnaBridge | 189:f392fc9709a3 | 260 | uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode. |
| AnnaBridge | 189:f392fc9709a3 | 261 | - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION. |
| AnnaBridge | 189:f392fc9709a3 | 262 | |
| AnnaBridge | 189:f392fc9709a3 | 263 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 264 | - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 265 | - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 266 | |
| AnnaBridge | 189:f392fc9709a3 | 267 | uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 268 | This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP . |
| AnnaBridge | 189:f392fc9709a3 | 269 | |
| AnnaBridge | 189:f392fc9709a3 | 270 | This parameter can be modified afterwards using unitary functions |
| AnnaBridge | 189:f392fc9709a3 | 271 | - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer, |
| AnnaBridge | 189:f392fc9709a3 | 272 | - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */ |
| AnnaBridge | 189:f392fc9709a3 | 273 | |
| AnnaBridge | 189:f392fc9709a3 | 274 | } LL_DMA2D_LayerCfgTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 275 | |
| AnnaBridge | 189:f392fc9709a3 | 276 | /** |
| AnnaBridge | 189:f392fc9709a3 | 277 | * @brief LL DMA2D Output Color Structure Definition |
| AnnaBridge | 189:f392fc9709a3 | 278 | */ |
| AnnaBridge | 189:f392fc9709a3 | 279 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 280 | { |
| AnnaBridge | 189:f392fc9709a3 | 281 | uint32_t ColorMode; /*!< Specifies the color format of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 282 | - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. |
| AnnaBridge | 189:f392fc9709a3 | 283 | |
| AnnaBridge | 189:f392fc9709a3 | 284 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */ |
| AnnaBridge | 189:f392fc9709a3 | 285 | |
| AnnaBridge | 189:f392fc9709a3 | 286 | uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 287 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 288 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 289 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 290 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 291 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 292 | |
| AnnaBridge | 189:f392fc9709a3 | 293 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
| AnnaBridge | 189:f392fc9709a3 | 294 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
| AnnaBridge | 189:f392fc9709a3 | 295 | |
| AnnaBridge | 189:f392fc9709a3 | 296 | uint32_t OutputGreen; /*!< Specifies the Green value of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 297 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 298 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 299 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 300 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 301 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 302 | |
| AnnaBridge | 189:f392fc9709a3 | 303 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
| AnnaBridge | 189:f392fc9709a3 | 304 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
| AnnaBridge | 189:f392fc9709a3 | 305 | |
| AnnaBridge | 189:f392fc9709a3 | 306 | uint32_t OutputRed; /*!< Specifies the Red value of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 307 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 308 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 309 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 310 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 311 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 312 | |
| AnnaBridge | 189:f392fc9709a3 | 313 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
| AnnaBridge | 189:f392fc9709a3 | 314 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
| AnnaBridge | 189:f392fc9709a3 | 315 | |
| AnnaBridge | 189:f392fc9709a3 | 316 | uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. |
| AnnaBridge | 189:f392fc9709a3 | 317 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 318 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 319 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 320 | - This parameter is not considered if RGB888 or RGB565 color mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 321 | |
| AnnaBridge | 189:f392fc9709a3 | 322 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
| AnnaBridge | 189:f392fc9709a3 | 323 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
| AnnaBridge | 189:f392fc9709a3 | 324 | |
| AnnaBridge | 189:f392fc9709a3 | 325 | } LL_DMA2D_ColorTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 326 | |
| AnnaBridge | 189:f392fc9709a3 | 327 | /** |
| AnnaBridge | 189:f392fc9709a3 | 328 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 329 | */ |
| AnnaBridge | 189:f392fc9709a3 | 330 | #endif /* USE_FULL_LL_DRIVER */ |
| AnnaBridge | 189:f392fc9709a3 | 331 | |
| AnnaBridge | 189:f392fc9709a3 | 332 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 333 | /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants |
| AnnaBridge | 189:f392fc9709a3 | 334 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 335 | */ |
| AnnaBridge | 189:f392fc9709a3 | 336 | |
| AnnaBridge | 189:f392fc9709a3 | 337 | /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines |
| AnnaBridge | 189:f392fc9709a3 | 338 | * @brief Flags defines which can be used with LL_DMA2D_ReadReg function |
| AnnaBridge | 189:f392fc9709a3 | 339 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 340 | */ |
| AnnaBridge | 189:f392fc9709a3 | 341 | #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 342 | #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 343 | #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 344 | #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 345 | #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 346 | #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 347 | /** |
| AnnaBridge | 189:f392fc9709a3 | 348 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 349 | */ |
| AnnaBridge | 189:f392fc9709a3 | 350 | |
| AnnaBridge | 189:f392fc9709a3 | 351 | /** @defgroup DMA2D_LL_EC_IT IT Defines |
| AnnaBridge | 189:f392fc9709a3 | 352 | * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions |
| AnnaBridge | 189:f392fc9709a3 | 353 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 354 | */ |
| AnnaBridge | 189:f392fc9709a3 | 355 | #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 356 | #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 357 | #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 358 | #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 359 | #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 360 | #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 361 | /** |
| AnnaBridge | 189:f392fc9709a3 | 362 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 363 | */ |
| AnnaBridge | 189:f392fc9709a3 | 364 | |
| AnnaBridge | 189:f392fc9709a3 | 365 | /** @defgroup DMA2D_LL_EC_MODE Mode |
| AnnaBridge | 189:f392fc9709a3 | 366 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 367 | */ |
| AnnaBridge | 189:f392fc9709a3 | 368 | #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */ |
| AnnaBridge | 189:f392fc9709a3 | 369 | #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */ |
| AnnaBridge | 189:f392fc9709a3 | 370 | #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */ |
| AnnaBridge | 189:f392fc9709a3 | 371 | #define LL_DMA2D_MODE_R2M (DMA2D_CR_MODE_0|DMA2D_CR_MODE_1) /*!< DMA2D register to memory transfer mode */ |
| AnnaBridge | 189:f392fc9709a3 | 372 | #if defined(DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT) |
| AnnaBridge | 189:f392fc9709a3 | 373 | #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG DMA2D_CR_MODE_2 /*!< DMA2D memory to memory with blending transfer mode and fixed color foreground */ |
| AnnaBridge | 189:f392fc9709a3 | 374 | #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (DMA2D_CR_MODE_0|DMA2D_CR_MODE_2) /*!< DMA2D memory to memory with blending transfer mode and fixed color background */ |
| AnnaBridge | 189:f392fc9709a3 | 375 | #endif /* DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 376 | /** |
| AnnaBridge | 189:f392fc9709a3 | 377 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 378 | */ |
| AnnaBridge | 189:f392fc9709a3 | 379 | |
| AnnaBridge | 189:f392fc9709a3 | 380 | /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode |
| AnnaBridge | 189:f392fc9709a3 | 381 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 382 | */ |
| AnnaBridge | 189:f392fc9709a3 | 383 | #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ |
| AnnaBridge | 189:f392fc9709a3 | 384 | #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */ |
| AnnaBridge | 189:f392fc9709a3 | 385 | #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */ |
| AnnaBridge | 189:f392fc9709a3 | 386 | #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */ |
| AnnaBridge | 189:f392fc9709a3 | 387 | #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */ |
| AnnaBridge | 189:f392fc9709a3 | 388 | /** |
| AnnaBridge | 189:f392fc9709a3 | 389 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 390 | */ |
| AnnaBridge | 189:f392fc9709a3 | 391 | |
| AnnaBridge | 189:f392fc9709a3 | 392 | /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode |
| AnnaBridge | 189:f392fc9709a3 | 393 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 394 | */ |
| AnnaBridge | 189:f392fc9709a3 | 395 | #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ |
| AnnaBridge | 189:f392fc9709a3 | 396 | #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */ |
| AnnaBridge | 189:f392fc9709a3 | 397 | #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */ |
| AnnaBridge | 189:f392fc9709a3 | 398 | #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */ |
| AnnaBridge | 189:f392fc9709a3 | 399 | #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */ |
| AnnaBridge | 189:f392fc9709a3 | 400 | #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */ |
| AnnaBridge | 189:f392fc9709a3 | 401 | #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */ |
| AnnaBridge | 189:f392fc9709a3 | 402 | #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */ |
| AnnaBridge | 189:f392fc9709a3 | 403 | #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */ |
| AnnaBridge | 189:f392fc9709a3 | 404 | #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */ |
| AnnaBridge | 189:f392fc9709a3 | 405 | #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */ |
| AnnaBridge | 189:f392fc9709a3 | 406 | /** |
| AnnaBridge | 189:f392fc9709a3 | 407 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 408 | */ |
| AnnaBridge | 189:f392fc9709a3 | 409 | |
| AnnaBridge | 189:f392fc9709a3 | 410 | /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode |
| AnnaBridge | 189:f392fc9709a3 | 411 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 412 | */ |
| AnnaBridge | 189:f392fc9709a3 | 413 | #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */ |
| AnnaBridge | 189:f392fc9709a3 | 414 | #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */ |
| AnnaBridge | 189:f392fc9709a3 | 415 | #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value |
| AnnaBridge | 189:f392fc9709a3 | 416 | with original alpha channel value */ |
| AnnaBridge | 189:f392fc9709a3 | 417 | /** |
| AnnaBridge | 189:f392fc9709a3 | 418 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 419 | */ |
| AnnaBridge | 189:f392fc9709a3 | 420 | |
| AnnaBridge | 189:f392fc9709a3 | 421 | #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) |
| AnnaBridge | 189:f392fc9709a3 | 422 | /** @defgroup DMA2D_LL_EC_OUTPUT_SWAP_MODE Swap Mode |
| AnnaBridge | 189:f392fc9709a3 | 423 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 424 | */ |
| AnnaBridge | 189:f392fc9709a3 | 425 | #define LL_DMA2D_SWAP_MODE_REGULAR ((uint32_t)0x00000000) /*!< Regular order */ |
| AnnaBridge | 189:f392fc9709a3 | 426 | #define LL_DMA2D_SWAP_MODE_TWO_BY_TWO DMA2D_OPFCCR_SB /*!< Bytes swapped two by two */ |
| AnnaBridge | 189:f392fc9709a3 | 427 | /** |
| AnnaBridge | 189:f392fc9709a3 | 428 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 429 | */ |
| AnnaBridge | 189:f392fc9709a3 | 430 | #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 431 | |
| AnnaBridge | 189:f392fc9709a3 | 432 | /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap |
| AnnaBridge | 189:f392fc9709a3 | 433 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 434 | */ |
| AnnaBridge | 189:f392fc9709a3 | 435 | #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */ |
| AnnaBridge | 189:f392fc9709a3 | 436 | #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */ |
| AnnaBridge | 189:f392fc9709a3 | 437 | /** |
| AnnaBridge | 189:f392fc9709a3 | 438 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 439 | */ |
| AnnaBridge | 189:f392fc9709a3 | 440 | |
| AnnaBridge | 189:f392fc9709a3 | 441 | /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion |
| AnnaBridge | 189:f392fc9709a3 | 442 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 443 | */ |
| AnnaBridge | 189:f392fc9709a3 | 444 | #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */ |
| AnnaBridge | 189:f392fc9709a3 | 445 | #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */ |
| AnnaBridge | 189:f392fc9709a3 | 446 | /** |
| AnnaBridge | 189:f392fc9709a3 | 447 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 448 | */ |
| AnnaBridge | 189:f392fc9709a3 | 449 | |
| AnnaBridge | 189:f392fc9709a3 | 450 | #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) |
| AnnaBridge | 189:f392fc9709a3 | 451 | /** @defgroup DMA2D_LL_EC_LINE_OFFSET_MODE Line Offset Mode |
| AnnaBridge | 189:f392fc9709a3 | 452 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 453 | */ |
| AnnaBridge | 189:f392fc9709a3 | 454 | #define LL_DMA2D_LINE_OFFSET_PIXELS ((uint32_t)0x00000000) /*!< Line offsets are expressed in pixels */ |
| AnnaBridge | 189:f392fc9709a3 | 455 | #define LL_DMA2D_LINE_OFFSET_BYTES DMA2D_CR_LOM /*!< Line offsets are expressed in bytes */ |
| AnnaBridge | 189:f392fc9709a3 | 456 | /** |
| AnnaBridge | 189:f392fc9709a3 | 457 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 458 | */ |
| AnnaBridge | 189:f392fc9709a3 | 459 | #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 460 | |
| AnnaBridge | 189:f392fc9709a3 | 461 | /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode |
| AnnaBridge | 189:f392fc9709a3 | 462 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 463 | */ |
| AnnaBridge | 189:f392fc9709a3 | 464 | #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ |
| AnnaBridge | 189:f392fc9709a3 | 465 | #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */ |
| AnnaBridge | 189:f392fc9709a3 | 466 | /** |
| AnnaBridge | 189:f392fc9709a3 | 467 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 468 | */ |
| AnnaBridge | 189:f392fc9709a3 | 469 | |
| AnnaBridge | 189:f392fc9709a3 | 470 | /** |
| AnnaBridge | 189:f392fc9709a3 | 471 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 472 | */ |
| AnnaBridge | 189:f392fc9709a3 | 473 | |
| AnnaBridge | 189:f392fc9709a3 | 474 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 475 | /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros |
| AnnaBridge | 189:f392fc9709a3 | 476 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 477 | */ |
| AnnaBridge | 189:f392fc9709a3 | 478 | |
| AnnaBridge | 189:f392fc9709a3 | 479 | /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros |
| AnnaBridge | 189:f392fc9709a3 | 480 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 481 | */ |
| AnnaBridge | 189:f392fc9709a3 | 482 | |
| AnnaBridge | 189:f392fc9709a3 | 483 | /** |
| AnnaBridge | 189:f392fc9709a3 | 484 | * @brief Write a value in DMA2D register. |
| AnnaBridge | 189:f392fc9709a3 | 485 | * @param __INSTANCE__ DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 486 | * @param __REG__ Register to be written |
| AnnaBridge | 189:f392fc9709a3 | 487 | * @param __VALUE__ Value to be written in the register |
| AnnaBridge | 189:f392fc9709a3 | 488 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 489 | */ |
| AnnaBridge | 189:f392fc9709a3 | 490 | #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
| AnnaBridge | 189:f392fc9709a3 | 491 | |
| AnnaBridge | 189:f392fc9709a3 | 492 | /** |
| AnnaBridge | 189:f392fc9709a3 | 493 | * @brief Read a value in DMA2D register. |
| AnnaBridge | 189:f392fc9709a3 | 494 | * @param __INSTANCE__ DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 495 | * @param __REG__ Register to be read |
| AnnaBridge | 189:f392fc9709a3 | 496 | * @retval Register value |
| AnnaBridge | 189:f392fc9709a3 | 497 | */ |
| AnnaBridge | 189:f392fc9709a3 | 498 | #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
| AnnaBridge | 189:f392fc9709a3 | 499 | /** |
| AnnaBridge | 189:f392fc9709a3 | 500 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 501 | */ |
| AnnaBridge | 189:f392fc9709a3 | 502 | |
| AnnaBridge | 189:f392fc9709a3 | 503 | /** |
| AnnaBridge | 189:f392fc9709a3 | 504 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 505 | */ |
| AnnaBridge | 189:f392fc9709a3 | 506 | |
| AnnaBridge | 189:f392fc9709a3 | 507 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 508 | /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions |
| AnnaBridge | 189:f392fc9709a3 | 509 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 510 | */ |
| AnnaBridge | 189:f392fc9709a3 | 511 | |
| AnnaBridge | 189:f392fc9709a3 | 512 | /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions |
| AnnaBridge | 189:f392fc9709a3 | 513 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 514 | */ |
| AnnaBridge | 189:f392fc9709a3 | 515 | |
| AnnaBridge | 189:f392fc9709a3 | 516 | /** |
| AnnaBridge | 189:f392fc9709a3 | 517 | * @brief Start a DMA2D transfer. |
| AnnaBridge | 189:f392fc9709a3 | 518 | * @rmtoll CR START LL_DMA2D_Start |
| AnnaBridge | 189:f392fc9709a3 | 519 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 520 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 521 | */ |
| AnnaBridge | 189:f392fc9709a3 | 522 | __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 523 | { |
| AnnaBridge | 189:f392fc9709a3 | 524 | SET_BIT(DMA2Dx->CR, DMA2D_CR_START); |
| AnnaBridge | 189:f392fc9709a3 | 525 | } |
| AnnaBridge | 189:f392fc9709a3 | 526 | |
| AnnaBridge | 189:f392fc9709a3 | 527 | /** |
| AnnaBridge | 189:f392fc9709a3 | 528 | * @brief Indicate if a DMA2D transfer is ongoing. |
| AnnaBridge | 189:f392fc9709a3 | 529 | * @rmtoll CR START LL_DMA2D_IsTransferOngoing |
| AnnaBridge | 189:f392fc9709a3 | 530 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 531 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 532 | */ |
| AnnaBridge | 189:f392fc9709a3 | 533 | __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 534 | { |
| AnnaBridge | 189:f392fc9709a3 | 535 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)); |
| AnnaBridge | 189:f392fc9709a3 | 536 | } |
| AnnaBridge | 189:f392fc9709a3 | 537 | |
| AnnaBridge | 189:f392fc9709a3 | 538 | /** |
| AnnaBridge | 189:f392fc9709a3 | 539 | * @brief Suspend DMA2D transfer. |
| AnnaBridge | 189:f392fc9709a3 | 540 | * @note This API can be used to suspend automatic foreground or background CLUT loading. |
| AnnaBridge | 189:f392fc9709a3 | 541 | * @rmtoll CR SUSP LL_DMA2D_Suspend |
| AnnaBridge | 189:f392fc9709a3 | 542 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 543 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 544 | */ |
| AnnaBridge | 189:f392fc9709a3 | 545 | __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 546 | { |
| AnnaBridge | 189:f392fc9709a3 | 547 | MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP); |
| AnnaBridge | 189:f392fc9709a3 | 548 | } |
| AnnaBridge | 189:f392fc9709a3 | 549 | |
| AnnaBridge | 189:f392fc9709a3 | 550 | /** |
| AnnaBridge | 189:f392fc9709a3 | 551 | * @brief Resume DMA2D transfer. |
| AnnaBridge | 189:f392fc9709a3 | 552 | * @note This API can be used to resume automatic foreground or background CLUT loading. |
| AnnaBridge | 189:f392fc9709a3 | 553 | * @rmtoll CR SUSP LL_DMA2D_Resume |
| AnnaBridge | 189:f392fc9709a3 | 554 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 555 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 556 | */ |
| AnnaBridge | 189:f392fc9709a3 | 557 | __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 558 | { |
| AnnaBridge | 189:f392fc9709a3 | 559 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START); |
| AnnaBridge | 189:f392fc9709a3 | 560 | } |
| AnnaBridge | 189:f392fc9709a3 | 561 | |
| AnnaBridge | 189:f392fc9709a3 | 562 | /** |
| AnnaBridge | 189:f392fc9709a3 | 563 | * @brief Indicate if DMA2D transfer is suspended. |
| AnnaBridge | 189:f392fc9709a3 | 564 | * @note This API can be used to indicate whether or not automatic foreground or |
| AnnaBridge | 189:f392fc9709a3 | 565 | * background CLUT loading is suspended. |
| AnnaBridge | 189:f392fc9709a3 | 566 | * @rmtoll CR SUSP LL_DMA2D_IsSuspended |
| AnnaBridge | 189:f392fc9709a3 | 567 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 568 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 569 | */ |
| AnnaBridge | 189:f392fc9709a3 | 570 | __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 571 | { |
| AnnaBridge | 189:f392fc9709a3 | 572 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)); |
| AnnaBridge | 189:f392fc9709a3 | 573 | } |
| AnnaBridge | 189:f392fc9709a3 | 574 | |
| AnnaBridge | 189:f392fc9709a3 | 575 | /** |
| AnnaBridge | 189:f392fc9709a3 | 576 | * @brief Abort DMA2D transfer. |
| AnnaBridge | 189:f392fc9709a3 | 577 | * @note This API can be used to abort automatic foreground or background CLUT loading. |
| AnnaBridge | 189:f392fc9709a3 | 578 | * @rmtoll CR ABORT LL_DMA2D_Abort |
| AnnaBridge | 189:f392fc9709a3 | 579 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 580 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 581 | */ |
| AnnaBridge | 189:f392fc9709a3 | 582 | __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 583 | { |
| AnnaBridge | 189:f392fc9709a3 | 584 | MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT); |
| AnnaBridge | 189:f392fc9709a3 | 585 | } |
| AnnaBridge | 189:f392fc9709a3 | 586 | |
| AnnaBridge | 189:f392fc9709a3 | 587 | /** |
| AnnaBridge | 189:f392fc9709a3 | 588 | * @brief Indicate if DMA2D transfer is aborted. |
| AnnaBridge | 189:f392fc9709a3 | 589 | * @note This API can be used to indicate whether or not automatic foreground or |
| AnnaBridge | 189:f392fc9709a3 | 590 | * background CLUT loading is aborted. |
| AnnaBridge | 189:f392fc9709a3 | 591 | * @rmtoll CR ABORT LL_DMA2D_IsAborted |
| AnnaBridge | 189:f392fc9709a3 | 592 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 593 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 594 | */ |
| AnnaBridge | 189:f392fc9709a3 | 595 | __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 596 | { |
| AnnaBridge | 189:f392fc9709a3 | 597 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)); |
| AnnaBridge | 189:f392fc9709a3 | 598 | } |
| AnnaBridge | 189:f392fc9709a3 | 599 | |
| AnnaBridge | 189:f392fc9709a3 | 600 | /** |
| AnnaBridge | 189:f392fc9709a3 | 601 | * @brief Set DMA2D mode. |
| AnnaBridge | 189:f392fc9709a3 | 602 | * @rmtoll CR MODE LL_DMA2D_SetMode |
| AnnaBridge | 189:f392fc9709a3 | 603 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 604 | * @param Mode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 605 | * @arg @ref LL_DMA2D_MODE_M2M |
| AnnaBridge | 189:f392fc9709a3 | 606 | * @arg @ref LL_DMA2D_MODE_M2M_PFC |
| AnnaBridge | 189:f392fc9709a3 | 607 | * @arg @ref LL_DMA2D_MODE_M2M_BLEND |
| AnnaBridge | 189:f392fc9709a3 | 608 | * @arg @ref LL_DMA2D_MODE_R2M |
| AnnaBridge | 189:f392fc9709a3 | 609 | * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*) |
| AnnaBridge | 189:f392fc9709a3 | 610 | * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*) |
| AnnaBridge | 189:f392fc9709a3 | 611 | * |
| AnnaBridge | 189:f392fc9709a3 | 612 | * (*) value not defined in all devices. |
| AnnaBridge | 189:f392fc9709a3 | 613 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 614 | */ |
| AnnaBridge | 189:f392fc9709a3 | 615 | __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode) |
| AnnaBridge | 189:f392fc9709a3 | 616 | { |
| AnnaBridge | 189:f392fc9709a3 | 617 | MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode); |
| AnnaBridge | 189:f392fc9709a3 | 618 | } |
| AnnaBridge | 189:f392fc9709a3 | 619 | |
| AnnaBridge | 189:f392fc9709a3 | 620 | /** |
| AnnaBridge | 189:f392fc9709a3 | 621 | * @brief Return DMA2D mode |
| AnnaBridge | 189:f392fc9709a3 | 622 | * @rmtoll CR MODE LL_DMA2D_GetMode |
| AnnaBridge | 189:f392fc9709a3 | 623 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 624 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 625 | * @arg @ref LL_DMA2D_MODE_M2M |
| AnnaBridge | 189:f392fc9709a3 | 626 | * @arg @ref LL_DMA2D_MODE_M2M_PFC |
| AnnaBridge | 189:f392fc9709a3 | 627 | * @arg @ref LL_DMA2D_MODE_M2M_BLEND |
| AnnaBridge | 189:f392fc9709a3 | 628 | * @arg @ref LL_DMA2D_MODE_R2M |
| AnnaBridge | 189:f392fc9709a3 | 629 | * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*) |
| AnnaBridge | 189:f392fc9709a3 | 630 | * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*) |
| AnnaBridge | 189:f392fc9709a3 | 631 | * |
| AnnaBridge | 189:f392fc9709a3 | 632 | * (*) value not defined in all devices. |
| AnnaBridge | 189:f392fc9709a3 | 633 | */ |
| AnnaBridge | 189:f392fc9709a3 | 634 | __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 635 | { |
| AnnaBridge | 189:f392fc9709a3 | 636 | return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); |
| AnnaBridge | 189:f392fc9709a3 | 637 | } |
| AnnaBridge | 189:f392fc9709a3 | 638 | |
| AnnaBridge | 189:f392fc9709a3 | 639 | /** |
| AnnaBridge | 189:f392fc9709a3 | 640 | * @brief Set DMA2D output color mode. |
| AnnaBridge | 189:f392fc9709a3 | 641 | * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode |
| AnnaBridge | 189:f392fc9709a3 | 642 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 643 | * @param ColorMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 644 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 645 | * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 646 | * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 |
| AnnaBridge | 189:f392fc9709a3 | 647 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 |
| AnnaBridge | 189:f392fc9709a3 | 648 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 |
| AnnaBridge | 189:f392fc9709a3 | 649 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 650 | */ |
| AnnaBridge | 189:f392fc9709a3 | 651 | __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
| AnnaBridge | 189:f392fc9709a3 | 652 | { |
| AnnaBridge | 189:f392fc9709a3 | 653 | MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 654 | } |
| AnnaBridge | 189:f392fc9709a3 | 655 | |
| AnnaBridge | 189:f392fc9709a3 | 656 | /** |
| AnnaBridge | 189:f392fc9709a3 | 657 | * @brief Return DMA2D output color mode. |
| AnnaBridge | 189:f392fc9709a3 | 658 | * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode |
| AnnaBridge | 189:f392fc9709a3 | 659 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 660 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 661 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 662 | * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 663 | * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 |
| AnnaBridge | 189:f392fc9709a3 | 664 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 |
| AnnaBridge | 189:f392fc9709a3 | 665 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 |
| AnnaBridge | 189:f392fc9709a3 | 666 | */ |
| AnnaBridge | 189:f392fc9709a3 | 667 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 668 | { |
| AnnaBridge | 189:f392fc9709a3 | 669 | return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM)); |
| AnnaBridge | 189:f392fc9709a3 | 670 | } |
| AnnaBridge | 189:f392fc9709a3 | 671 | |
| AnnaBridge | 189:f392fc9709a3 | 672 | /** |
| AnnaBridge | 189:f392fc9709a3 | 673 | * @brief Set DMA2D output Red Blue swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 674 | * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode |
| AnnaBridge | 189:f392fc9709a3 | 675 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 676 | * @param RBSwapMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 677 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 678 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
| AnnaBridge | 189:f392fc9709a3 | 679 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 680 | */ |
| AnnaBridge | 189:f392fc9709a3 | 681 | __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) |
| AnnaBridge | 189:f392fc9709a3 | 682 | { |
| AnnaBridge | 189:f392fc9709a3 | 683 | MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode); |
| AnnaBridge | 189:f392fc9709a3 | 684 | } |
| AnnaBridge | 189:f392fc9709a3 | 685 | |
| AnnaBridge | 189:f392fc9709a3 | 686 | /** |
| AnnaBridge | 189:f392fc9709a3 | 687 | * @brief Return DMA2D output Red Blue swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 688 | * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode |
| AnnaBridge | 189:f392fc9709a3 | 689 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 690 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 691 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 692 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
| AnnaBridge | 189:f392fc9709a3 | 693 | */ |
| AnnaBridge | 189:f392fc9709a3 | 694 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 695 | { |
| AnnaBridge | 189:f392fc9709a3 | 696 | return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS)); |
| AnnaBridge | 189:f392fc9709a3 | 697 | } |
| AnnaBridge | 189:f392fc9709a3 | 698 | |
| AnnaBridge | 189:f392fc9709a3 | 699 | /** |
| AnnaBridge | 189:f392fc9709a3 | 700 | * @brief Set DMA2D output alpha inversion mode. |
| AnnaBridge | 189:f392fc9709a3 | 701 | * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode |
| AnnaBridge | 189:f392fc9709a3 | 702 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 703 | * @param AlphaInversionMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 704 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 705 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
| AnnaBridge | 189:f392fc9709a3 | 706 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 707 | */ |
| AnnaBridge | 189:f392fc9709a3 | 708 | __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) |
| AnnaBridge | 189:f392fc9709a3 | 709 | { |
| AnnaBridge | 189:f392fc9709a3 | 710 | MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode); |
| AnnaBridge | 189:f392fc9709a3 | 711 | } |
| AnnaBridge | 189:f392fc9709a3 | 712 | |
| AnnaBridge | 189:f392fc9709a3 | 713 | /** |
| AnnaBridge | 189:f392fc9709a3 | 714 | * @brief Return DMA2D output alpha inversion mode. |
| AnnaBridge | 189:f392fc9709a3 | 715 | * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode |
| AnnaBridge | 189:f392fc9709a3 | 716 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 717 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 718 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 719 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
| AnnaBridge | 189:f392fc9709a3 | 720 | */ |
| AnnaBridge | 189:f392fc9709a3 | 721 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 722 | { |
| AnnaBridge | 189:f392fc9709a3 | 723 | return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI)); |
| AnnaBridge | 189:f392fc9709a3 | 724 | } |
| AnnaBridge | 189:f392fc9709a3 | 725 | |
| AnnaBridge | 189:f392fc9709a3 | 726 | #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) |
| AnnaBridge | 189:f392fc9709a3 | 727 | /** |
| AnnaBridge | 189:f392fc9709a3 | 728 | * @brief Set DMA2D output swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 729 | * @rmtoll OPFCCR SB LL_DMA2D_SetOutputSwapMode |
| AnnaBridge | 189:f392fc9709a3 | 730 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 731 | * @param OutputSwapMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 732 | * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 733 | * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO |
| AnnaBridge | 189:f392fc9709a3 | 734 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 735 | */ |
| AnnaBridge | 189:f392fc9709a3 | 736 | __STATIC_INLINE void LL_DMA2D_SetOutputSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t OutputSwapMode) |
| AnnaBridge | 189:f392fc9709a3 | 737 | { |
| AnnaBridge | 189:f392fc9709a3 | 738 | MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB, OutputSwapMode); |
| AnnaBridge | 189:f392fc9709a3 | 739 | } |
| AnnaBridge | 189:f392fc9709a3 | 740 | |
| AnnaBridge | 189:f392fc9709a3 | 741 | /** |
| AnnaBridge | 189:f392fc9709a3 | 742 | * @brief Return DMA2D output swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 743 | * @rmtoll OPFCCR SB LL_DMA2D_GetOutputSwapMode |
| AnnaBridge | 189:f392fc9709a3 | 744 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 745 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 746 | * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 747 | * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO |
| AnnaBridge | 189:f392fc9709a3 | 748 | */ |
| AnnaBridge | 189:f392fc9709a3 | 749 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputSwapMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 750 | { |
| AnnaBridge | 189:f392fc9709a3 | 751 | return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB)); |
| AnnaBridge | 189:f392fc9709a3 | 752 | } |
| AnnaBridge | 189:f392fc9709a3 | 753 | #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 754 | |
| AnnaBridge | 189:f392fc9709a3 | 755 | #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) |
| AnnaBridge | 189:f392fc9709a3 | 756 | /** |
| AnnaBridge | 189:f392fc9709a3 | 757 | * @brief Set DMA2D line offset mode. |
| AnnaBridge | 189:f392fc9709a3 | 758 | * @rmtoll CR LOM LL_DMA2D_SetLineOffsetMode |
| AnnaBridge | 189:f392fc9709a3 | 759 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 760 | * @param LineOffsetMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 761 | * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS |
| AnnaBridge | 189:f392fc9709a3 | 762 | * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES |
| AnnaBridge | 189:f392fc9709a3 | 763 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 764 | */ |
| AnnaBridge | 189:f392fc9709a3 | 765 | __STATIC_INLINE void LL_DMA2D_SetLineOffsetMode(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffsetMode) |
| AnnaBridge | 189:f392fc9709a3 | 766 | { |
| AnnaBridge | 189:f392fc9709a3 | 767 | MODIFY_REG(DMA2Dx->CR, DMA2D_CR_LOM, LineOffsetMode); |
| AnnaBridge | 189:f392fc9709a3 | 768 | } |
| AnnaBridge | 189:f392fc9709a3 | 769 | |
| AnnaBridge | 189:f392fc9709a3 | 770 | /** |
| AnnaBridge | 189:f392fc9709a3 | 771 | * @brief Return DMA2D line offset mode. |
| AnnaBridge | 189:f392fc9709a3 | 772 | * @rmtoll CR LOM LL_DMA2D_GetLineOffsetMode |
| AnnaBridge | 189:f392fc9709a3 | 773 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 774 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 775 | * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS |
| AnnaBridge | 189:f392fc9709a3 | 776 | * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES |
| AnnaBridge | 189:f392fc9709a3 | 777 | */ |
| AnnaBridge | 189:f392fc9709a3 | 778 | __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffsetMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 779 | { |
| AnnaBridge | 189:f392fc9709a3 | 780 | return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_LOM)); |
| AnnaBridge | 189:f392fc9709a3 | 781 | } |
| AnnaBridge | 189:f392fc9709a3 | 782 | #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ |
| AnnaBridge | 189:f392fc9709a3 | 783 | |
| AnnaBridge | 189:f392fc9709a3 | 784 | /** |
| AnnaBridge | 189:f392fc9709a3 | 785 | * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 786 | * @rmtoll OOR LO LL_DMA2D_SetLineOffset |
| AnnaBridge | 189:f392fc9709a3 | 787 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 788 | @if DMA2D_LINE_OFFSET_MODE_SUPPORT |
| AnnaBridge | 189:f392fc9709a3 | 789 | * @param LineOffset Value between Min_Data=0 and Max_Data=0xFFFF |
| AnnaBridge | 189:f392fc9709a3 | 790 | @else |
| AnnaBridge | 189:f392fc9709a3 | 791 | * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF |
| AnnaBridge | 189:f392fc9709a3 | 792 | @endif |
| AnnaBridge | 189:f392fc9709a3 | 793 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 794 | */ |
| AnnaBridge | 189:f392fc9709a3 | 795 | __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) |
| AnnaBridge | 189:f392fc9709a3 | 796 | { |
| AnnaBridge | 189:f392fc9709a3 | 797 | MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset); |
| AnnaBridge | 189:f392fc9709a3 | 798 | } |
| AnnaBridge | 189:f392fc9709a3 | 799 | |
| AnnaBridge | 189:f392fc9709a3 | 800 | /** |
| AnnaBridge | 189:f392fc9709a3 | 801 | * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 802 | * @rmtoll OOR LO LL_DMA2D_GetLineOffset |
| AnnaBridge | 189:f392fc9709a3 | 803 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 804 | @if DMA2D_LINE_OFFSET_MODE_SUPPORT |
| AnnaBridge | 189:f392fc9709a3 | 805 | * @retval Line offset value between Min_Data=0 and Max_Data=0xFFFF |
| AnnaBridge | 189:f392fc9709a3 | 806 | @else |
| AnnaBridge | 189:f392fc9709a3 | 807 | * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF |
| AnnaBridge | 189:f392fc9709a3 | 808 | @endif |
| AnnaBridge | 189:f392fc9709a3 | 809 | */ |
| AnnaBridge | 189:f392fc9709a3 | 810 | __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 811 | { |
| AnnaBridge | 189:f392fc9709a3 | 812 | return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO)); |
| AnnaBridge | 189:f392fc9709a3 | 813 | } |
| AnnaBridge | 189:f392fc9709a3 | 814 | |
| AnnaBridge | 189:f392fc9709a3 | 815 | /** |
| AnnaBridge | 189:f392fc9709a3 | 816 | * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 817 | * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines |
| AnnaBridge | 189:f392fc9709a3 | 818 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 819 | * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF |
| AnnaBridge | 189:f392fc9709a3 | 820 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 821 | */ |
| AnnaBridge | 189:f392fc9709a3 | 822 | __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines) |
| AnnaBridge | 189:f392fc9709a3 | 823 | { |
| AnnaBridge | 189:f392fc9709a3 | 824 | MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 825 | } |
| AnnaBridge | 189:f392fc9709a3 | 826 | |
| AnnaBridge | 189:f392fc9709a3 | 827 | /** |
| AnnaBridge | 189:f392fc9709a3 | 828 | * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits) |
| AnnaBridge | 189:f392fc9709a3 | 829 | * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines |
| AnnaBridge | 189:f392fc9709a3 | 830 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 831 | * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF |
| AnnaBridge | 189:f392fc9709a3 | 832 | */ |
| AnnaBridge | 189:f392fc9709a3 | 833 | __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 834 | { |
| AnnaBridge | 189:f392fc9709a3 | 835 | return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 836 | } |
| AnnaBridge | 189:f392fc9709a3 | 837 | |
| AnnaBridge | 189:f392fc9709a3 | 838 | /** |
| AnnaBridge | 189:f392fc9709a3 | 839 | * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 840 | * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines |
| AnnaBridge | 189:f392fc9709a3 | 841 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 842 | * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF |
| AnnaBridge | 189:f392fc9709a3 | 843 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 844 | */ |
| AnnaBridge | 189:f392fc9709a3 | 845 | __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines) |
| AnnaBridge | 189:f392fc9709a3 | 846 | { |
| AnnaBridge | 189:f392fc9709a3 | 847 | MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines); |
| AnnaBridge | 189:f392fc9709a3 | 848 | } |
| AnnaBridge | 189:f392fc9709a3 | 849 | |
| AnnaBridge | 189:f392fc9709a3 | 850 | /** |
| AnnaBridge | 189:f392fc9709a3 | 851 | * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 852 | * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines |
| AnnaBridge | 189:f392fc9709a3 | 853 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 854 | * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF |
| AnnaBridge | 189:f392fc9709a3 | 855 | */ |
| AnnaBridge | 189:f392fc9709a3 | 856 | __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 857 | { |
| AnnaBridge | 189:f392fc9709a3 | 858 | return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL)); |
| AnnaBridge | 189:f392fc9709a3 | 859 | } |
| AnnaBridge | 189:f392fc9709a3 | 860 | |
| AnnaBridge | 189:f392fc9709a3 | 861 | /** |
| AnnaBridge | 189:f392fc9709a3 | 862 | * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 863 | * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 864 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 865 | * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 866 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 867 | */ |
| AnnaBridge | 189:f392fc9709a3 | 868 | __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress) |
| AnnaBridge | 189:f392fc9709a3 | 869 | { |
| AnnaBridge | 189:f392fc9709a3 | 870 | LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress); |
| AnnaBridge | 189:f392fc9709a3 | 871 | } |
| AnnaBridge | 189:f392fc9709a3 | 872 | |
| AnnaBridge | 189:f392fc9709a3 | 873 | /** |
| AnnaBridge | 189:f392fc9709a3 | 874 | * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 875 | * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 876 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 877 | * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 878 | */ |
| AnnaBridge | 189:f392fc9709a3 | 879 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 880 | { |
| AnnaBridge | 189:f392fc9709a3 | 881 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR)); |
| AnnaBridge | 189:f392fc9709a3 | 882 | } |
| AnnaBridge | 189:f392fc9709a3 | 883 | |
| AnnaBridge | 189:f392fc9709a3 | 884 | /** |
| AnnaBridge | 189:f392fc9709a3 | 885 | * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 886 | * @note Output color format depends on output color mode, ARGB8888, RGB888, |
| AnnaBridge | 189:f392fc9709a3 | 887 | * RGB565, ARGB1555 or ARGB4444. |
| AnnaBridge | 189:f392fc9709a3 | 888 | * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting |
| AnnaBridge | 189:f392fc9709a3 | 889 | * with respect to color mode is not done by the user code. |
| AnnaBridge | 189:f392fc9709a3 | 890 | * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n |
| AnnaBridge | 189:f392fc9709a3 | 891 | * OCOLR GREEN LL_DMA2D_SetOutputColor\n |
| AnnaBridge | 189:f392fc9709a3 | 892 | * OCOLR RED LL_DMA2D_SetOutputColor\n |
| AnnaBridge | 189:f392fc9709a3 | 893 | * OCOLR ALPHA LL_DMA2D_SetOutputColor |
| AnnaBridge | 189:f392fc9709a3 | 894 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 895 | * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 896 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 897 | */ |
| AnnaBridge | 189:f392fc9709a3 | 898 | __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor) |
| AnnaBridge | 189:f392fc9709a3 | 899 | { |
| AnnaBridge | 189:f392fc9709a3 | 900 | MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \ |
| AnnaBridge | 189:f392fc9709a3 | 901 | OutputColor); |
| AnnaBridge | 189:f392fc9709a3 | 902 | } |
| AnnaBridge | 189:f392fc9709a3 | 903 | |
| AnnaBridge | 189:f392fc9709a3 | 904 | /** |
| AnnaBridge | 189:f392fc9709a3 | 905 | * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 906 | * @note Alpha channel and red, green, blue color values must be retrieved from the returned |
| AnnaBridge | 189:f392fc9709a3 | 907 | * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444) |
| AnnaBridge | 189:f392fc9709a3 | 908 | * as set by @ref LL_DMA2D_SetOutputColorMode. |
| AnnaBridge | 189:f392fc9709a3 | 909 | * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n |
| AnnaBridge | 189:f392fc9709a3 | 910 | * OCOLR GREEN LL_DMA2D_GetOutputColor\n |
| AnnaBridge | 189:f392fc9709a3 | 911 | * OCOLR RED LL_DMA2D_GetOutputColor\n |
| AnnaBridge | 189:f392fc9709a3 | 912 | * OCOLR ALPHA LL_DMA2D_GetOutputColor |
| AnnaBridge | 189:f392fc9709a3 | 913 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 914 | * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 915 | */ |
| AnnaBridge | 189:f392fc9709a3 | 916 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 917 | { |
| AnnaBridge | 189:f392fc9709a3 | 918 | return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \ |
| AnnaBridge | 189:f392fc9709a3 | 919 | (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1))); |
| AnnaBridge | 189:f392fc9709a3 | 920 | } |
| AnnaBridge | 189:f392fc9709a3 | 921 | |
| AnnaBridge | 189:f392fc9709a3 | 922 | /** |
| AnnaBridge | 189:f392fc9709a3 | 923 | * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 924 | * @rmtoll LWR LW LL_DMA2D_SetLineWatermark |
| AnnaBridge | 189:f392fc9709a3 | 925 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 926 | * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF |
| AnnaBridge | 189:f392fc9709a3 | 927 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 928 | */ |
| AnnaBridge | 189:f392fc9709a3 | 929 | __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark) |
| AnnaBridge | 189:f392fc9709a3 | 930 | { |
| AnnaBridge | 189:f392fc9709a3 | 931 | MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark); |
| AnnaBridge | 189:f392fc9709a3 | 932 | } |
| AnnaBridge | 189:f392fc9709a3 | 933 | |
| AnnaBridge | 189:f392fc9709a3 | 934 | /** |
| AnnaBridge | 189:f392fc9709a3 | 935 | * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 936 | * @rmtoll LWR LW LL_DMA2D_GetLineWatermark |
| AnnaBridge | 189:f392fc9709a3 | 937 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 938 | * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF |
| AnnaBridge | 189:f392fc9709a3 | 939 | */ |
| AnnaBridge | 189:f392fc9709a3 | 940 | __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 941 | { |
| AnnaBridge | 189:f392fc9709a3 | 942 | return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW)); |
| AnnaBridge | 189:f392fc9709a3 | 943 | } |
| AnnaBridge | 189:f392fc9709a3 | 944 | |
| AnnaBridge | 189:f392fc9709a3 | 945 | /** |
| AnnaBridge | 189:f392fc9709a3 | 946 | * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 947 | * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime |
| AnnaBridge | 189:f392fc9709a3 | 948 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 949 | * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 950 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 951 | */ |
| AnnaBridge | 189:f392fc9709a3 | 952 | __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) |
| AnnaBridge | 189:f392fc9709a3 | 953 | { |
| AnnaBridge | 189:f392fc9709a3 | 954 | MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 955 | } |
| AnnaBridge | 189:f392fc9709a3 | 956 | |
| AnnaBridge | 189:f392fc9709a3 | 957 | /** |
| AnnaBridge | 189:f392fc9709a3 | 958 | * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 959 | * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime |
| AnnaBridge | 189:f392fc9709a3 | 960 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 961 | * @retval Dead time value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 962 | */ |
| AnnaBridge | 189:f392fc9709a3 | 963 | __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 964 | { |
| AnnaBridge | 189:f392fc9709a3 | 965 | return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 966 | } |
| AnnaBridge | 189:f392fc9709a3 | 967 | |
| AnnaBridge | 189:f392fc9709a3 | 968 | /** |
| AnnaBridge | 189:f392fc9709a3 | 969 | * @brief Enable DMA2D dead time functionality. |
| AnnaBridge | 189:f392fc9709a3 | 970 | * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime |
| AnnaBridge | 189:f392fc9709a3 | 971 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 972 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 973 | */ |
| AnnaBridge | 189:f392fc9709a3 | 974 | __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 975 | { |
| AnnaBridge | 189:f392fc9709a3 | 976 | SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); |
| AnnaBridge | 189:f392fc9709a3 | 977 | } |
| AnnaBridge | 189:f392fc9709a3 | 978 | |
| AnnaBridge | 189:f392fc9709a3 | 979 | /** |
| AnnaBridge | 189:f392fc9709a3 | 980 | * @brief Disable DMA2D dead time functionality. |
| AnnaBridge | 189:f392fc9709a3 | 981 | * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime |
| AnnaBridge | 189:f392fc9709a3 | 982 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 983 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 984 | */ |
| AnnaBridge | 189:f392fc9709a3 | 985 | __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 986 | { |
| AnnaBridge | 189:f392fc9709a3 | 987 | CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); |
| AnnaBridge | 189:f392fc9709a3 | 988 | } |
| AnnaBridge | 189:f392fc9709a3 | 989 | |
| AnnaBridge | 189:f392fc9709a3 | 990 | /** |
| AnnaBridge | 189:f392fc9709a3 | 991 | * @brief Indicate if DMA2D dead time functionality is enabled. |
| AnnaBridge | 189:f392fc9709a3 | 992 | * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime |
| AnnaBridge | 189:f392fc9709a3 | 993 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 994 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 995 | */ |
| AnnaBridge | 189:f392fc9709a3 | 996 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 997 | { |
| AnnaBridge | 189:f392fc9709a3 | 998 | return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)); |
| AnnaBridge | 189:f392fc9709a3 | 999 | } |
| AnnaBridge | 189:f392fc9709a3 | 1000 | |
| AnnaBridge | 189:f392fc9709a3 | 1001 | /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions |
| AnnaBridge | 189:f392fc9709a3 | 1002 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 1003 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1004 | |
| AnnaBridge | 189:f392fc9709a3 | 1005 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1006 | * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1007 | * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 1008 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1009 | * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 1010 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1011 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1012 | __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) |
| AnnaBridge | 189:f392fc9709a3 | 1013 | { |
| AnnaBridge | 189:f392fc9709a3 | 1014 | LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress); |
| AnnaBridge | 189:f392fc9709a3 | 1015 | } |
| AnnaBridge | 189:f392fc9709a3 | 1016 | |
| AnnaBridge | 189:f392fc9709a3 | 1017 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1018 | * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1019 | * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 1020 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1021 | * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 1022 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1023 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1024 | { |
| AnnaBridge | 189:f392fc9709a3 | 1025 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR)); |
| AnnaBridge | 189:f392fc9709a3 | 1026 | } |
| AnnaBridge | 189:f392fc9709a3 | 1027 | |
| AnnaBridge | 189:f392fc9709a3 | 1028 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1029 | * @brief Enable DMA2D foreground CLUT loading. |
| AnnaBridge | 189:f392fc9709a3 | 1030 | * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad |
| AnnaBridge | 189:f392fc9709a3 | 1031 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1032 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1033 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1034 | __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1035 | { |
| AnnaBridge | 189:f392fc9709a3 | 1036 | SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); |
| AnnaBridge | 189:f392fc9709a3 | 1037 | } |
| AnnaBridge | 189:f392fc9709a3 | 1038 | |
| AnnaBridge | 189:f392fc9709a3 | 1039 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1040 | * @brief Indicate if DMA2D foreground CLUT loading is enabled. |
| AnnaBridge | 189:f392fc9709a3 | 1041 | * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad |
| AnnaBridge | 189:f392fc9709a3 | 1042 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1043 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 1044 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1045 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1046 | { |
| AnnaBridge | 189:f392fc9709a3 | 1047 | return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)); |
| AnnaBridge | 189:f392fc9709a3 | 1048 | } |
| AnnaBridge | 189:f392fc9709a3 | 1049 | |
| AnnaBridge | 189:f392fc9709a3 | 1050 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1051 | * @brief Set DMA2D foreground color mode. |
| AnnaBridge | 189:f392fc9709a3 | 1052 | * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode |
| AnnaBridge | 189:f392fc9709a3 | 1053 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1054 | * @param ColorMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1055 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 1056 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 1057 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 |
| AnnaBridge | 189:f392fc9709a3 | 1058 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 |
| AnnaBridge | 189:f392fc9709a3 | 1059 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 |
| AnnaBridge | 189:f392fc9709a3 | 1060 | * @arg @ref LL_DMA2D_INPUT_MODE_L8 |
| AnnaBridge | 189:f392fc9709a3 | 1061 | * @arg @ref LL_DMA2D_INPUT_MODE_AL44 |
| AnnaBridge | 189:f392fc9709a3 | 1062 | * @arg @ref LL_DMA2D_INPUT_MODE_AL88 |
| AnnaBridge | 189:f392fc9709a3 | 1063 | * @arg @ref LL_DMA2D_INPUT_MODE_L4 |
| AnnaBridge | 189:f392fc9709a3 | 1064 | * @arg @ref LL_DMA2D_INPUT_MODE_A8 |
| AnnaBridge | 189:f392fc9709a3 | 1065 | * @arg @ref LL_DMA2D_INPUT_MODE_A4 |
| AnnaBridge | 189:f392fc9709a3 | 1066 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1067 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1068 | __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
| AnnaBridge | 189:f392fc9709a3 | 1069 | { |
| AnnaBridge | 189:f392fc9709a3 | 1070 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 1071 | } |
| AnnaBridge | 189:f392fc9709a3 | 1072 | |
| AnnaBridge | 189:f392fc9709a3 | 1073 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1074 | * @brief Return DMA2D foreground color mode. |
| AnnaBridge | 189:f392fc9709a3 | 1075 | * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode |
| AnnaBridge | 189:f392fc9709a3 | 1076 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1077 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1078 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 1079 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 1080 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 |
| AnnaBridge | 189:f392fc9709a3 | 1081 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 |
| AnnaBridge | 189:f392fc9709a3 | 1082 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 |
| AnnaBridge | 189:f392fc9709a3 | 1083 | * @arg @ref LL_DMA2D_INPUT_MODE_L8 |
| AnnaBridge | 189:f392fc9709a3 | 1084 | * @arg @ref LL_DMA2D_INPUT_MODE_AL44 |
| AnnaBridge | 189:f392fc9709a3 | 1085 | * @arg @ref LL_DMA2D_INPUT_MODE_AL88 |
| AnnaBridge | 189:f392fc9709a3 | 1086 | * @arg @ref LL_DMA2D_INPUT_MODE_L4 |
| AnnaBridge | 189:f392fc9709a3 | 1087 | * @arg @ref LL_DMA2D_INPUT_MODE_A8 |
| AnnaBridge | 189:f392fc9709a3 | 1088 | * @arg @ref LL_DMA2D_INPUT_MODE_A4 |
| AnnaBridge | 189:f392fc9709a3 | 1089 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1090 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1091 | { |
| AnnaBridge | 189:f392fc9709a3 | 1092 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); |
| AnnaBridge | 189:f392fc9709a3 | 1093 | } |
| AnnaBridge | 189:f392fc9709a3 | 1094 | |
| AnnaBridge | 189:f392fc9709a3 | 1095 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1096 | * @brief Set DMA2D foreground alpha mode. |
| AnnaBridge | 189:f392fc9709a3 | 1097 | * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode |
| AnnaBridge | 189:f392fc9709a3 | 1098 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1099 | * @param AphaMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1100 | * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF |
| AnnaBridge | 189:f392fc9709a3 | 1101 | * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE |
| AnnaBridge | 189:f392fc9709a3 | 1102 | * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE |
| AnnaBridge | 189:f392fc9709a3 | 1103 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1104 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1105 | __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) |
| AnnaBridge | 189:f392fc9709a3 | 1106 | { |
| AnnaBridge | 189:f392fc9709a3 | 1107 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); |
| AnnaBridge | 189:f392fc9709a3 | 1108 | } |
| AnnaBridge | 189:f392fc9709a3 | 1109 | |
| AnnaBridge | 189:f392fc9709a3 | 1110 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1111 | * @brief Return DMA2D foreground alpha mode. |
| AnnaBridge | 189:f392fc9709a3 | 1112 | * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode |
| AnnaBridge | 189:f392fc9709a3 | 1113 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1114 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1115 | * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF |
| AnnaBridge | 189:f392fc9709a3 | 1116 | * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE |
| AnnaBridge | 189:f392fc9709a3 | 1117 | * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE |
| AnnaBridge | 189:f392fc9709a3 | 1118 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1119 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1120 | { |
| AnnaBridge | 189:f392fc9709a3 | 1121 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); |
| AnnaBridge | 189:f392fc9709a3 | 1122 | } |
| AnnaBridge | 189:f392fc9709a3 | 1123 | |
| AnnaBridge | 189:f392fc9709a3 | 1124 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1125 | * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1126 | * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha |
| AnnaBridge | 189:f392fc9709a3 | 1127 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1128 | * @param Alpha Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1129 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1130 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1131 | __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) |
| AnnaBridge | 189:f392fc9709a3 | 1132 | { |
| AnnaBridge | 189:f392fc9709a3 | 1133 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 1134 | } |
| AnnaBridge | 189:f392fc9709a3 | 1135 | |
| AnnaBridge | 189:f392fc9709a3 | 1136 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1137 | * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1138 | * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha |
| AnnaBridge | 189:f392fc9709a3 | 1139 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1140 | * @retval Alpha value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1141 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1142 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1143 | { |
| AnnaBridge | 189:f392fc9709a3 | 1144 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 1145 | } |
| AnnaBridge | 189:f392fc9709a3 | 1146 | |
| AnnaBridge | 189:f392fc9709a3 | 1147 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1148 | * @brief Set DMA2D foreground Red Blue swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 1149 | * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode |
| AnnaBridge | 189:f392fc9709a3 | 1150 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1151 | * @param RBSwapMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1152 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 1153 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
| AnnaBridge | 189:f392fc9709a3 | 1154 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1155 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1156 | __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) |
| AnnaBridge | 189:f392fc9709a3 | 1157 | { |
| AnnaBridge | 189:f392fc9709a3 | 1158 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); |
| AnnaBridge | 189:f392fc9709a3 | 1159 | } |
| AnnaBridge | 189:f392fc9709a3 | 1160 | |
| AnnaBridge | 189:f392fc9709a3 | 1161 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1162 | * @brief Return DMA2D foreground Red Blue swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 1163 | * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode |
| AnnaBridge | 189:f392fc9709a3 | 1164 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1165 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1166 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 1167 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
| AnnaBridge | 189:f392fc9709a3 | 1168 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1169 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1170 | { |
| AnnaBridge | 189:f392fc9709a3 | 1171 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); |
| AnnaBridge | 189:f392fc9709a3 | 1172 | } |
| AnnaBridge | 189:f392fc9709a3 | 1173 | |
| AnnaBridge | 189:f392fc9709a3 | 1174 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1175 | * @brief Set DMA2D foreground alpha inversion mode. |
| AnnaBridge | 189:f392fc9709a3 | 1176 | * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode |
| AnnaBridge | 189:f392fc9709a3 | 1177 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1178 | * @param AlphaInversionMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1179 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 1180 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
| AnnaBridge | 189:f392fc9709a3 | 1181 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1182 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1183 | __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) |
| AnnaBridge | 189:f392fc9709a3 | 1184 | { |
| AnnaBridge | 189:f392fc9709a3 | 1185 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode); |
| AnnaBridge | 189:f392fc9709a3 | 1186 | } |
| AnnaBridge | 189:f392fc9709a3 | 1187 | |
| AnnaBridge | 189:f392fc9709a3 | 1188 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1189 | * @brief Return DMA2D foreground alpha inversion mode. |
| AnnaBridge | 189:f392fc9709a3 | 1190 | * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode |
| AnnaBridge | 189:f392fc9709a3 | 1191 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1192 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1193 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 1194 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
| AnnaBridge | 189:f392fc9709a3 | 1195 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1196 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1197 | { |
| AnnaBridge | 189:f392fc9709a3 | 1198 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI)); |
| AnnaBridge | 189:f392fc9709a3 | 1199 | } |
| AnnaBridge | 189:f392fc9709a3 | 1200 | |
| AnnaBridge | 189:f392fc9709a3 | 1201 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1202 | * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1203 | * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset |
| AnnaBridge | 189:f392fc9709a3 | 1204 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1205 | * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF |
| AnnaBridge | 189:f392fc9709a3 | 1206 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1207 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1208 | __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) |
| AnnaBridge | 189:f392fc9709a3 | 1209 | { |
| AnnaBridge | 189:f392fc9709a3 | 1210 | MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset); |
| AnnaBridge | 189:f392fc9709a3 | 1211 | } |
| AnnaBridge | 189:f392fc9709a3 | 1212 | |
| AnnaBridge | 189:f392fc9709a3 | 1213 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1214 | * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1215 | * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset |
| AnnaBridge | 189:f392fc9709a3 | 1216 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1217 | * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF |
| AnnaBridge | 189:f392fc9709a3 | 1218 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1219 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1220 | { |
| AnnaBridge | 189:f392fc9709a3 | 1221 | return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO)); |
| AnnaBridge | 189:f392fc9709a3 | 1222 | } |
| AnnaBridge | 189:f392fc9709a3 | 1223 | |
| AnnaBridge | 189:f392fc9709a3 | 1224 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1225 | * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1226 | * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor |
| AnnaBridge | 189:f392fc9709a3 | 1227 | * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor |
| AnnaBridge | 189:f392fc9709a3 | 1228 | * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor |
| AnnaBridge | 189:f392fc9709a3 | 1229 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1230 | * @param Red Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1231 | * @param Green Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1232 | * @param Blue Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1233 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1234 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1235 | __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) |
| AnnaBridge | 189:f392fc9709a3 | 1236 | { |
| AnnaBridge | 189:f392fc9709a3 | 1237 | MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \ |
| AnnaBridge | 189:f392fc9709a3 | 1238 | ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue)); |
| AnnaBridge | 189:f392fc9709a3 | 1239 | } |
| AnnaBridge | 189:f392fc9709a3 | 1240 | |
| AnnaBridge | 189:f392fc9709a3 | 1241 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1242 | * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1243 | * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor |
| AnnaBridge | 189:f392fc9709a3 | 1244 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1245 | * @param Red Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1246 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1247 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1248 | __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) |
| AnnaBridge | 189:f392fc9709a3 | 1249 | { |
| AnnaBridge | 189:f392fc9709a3 | 1250 | MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 1251 | } |
| AnnaBridge | 189:f392fc9709a3 | 1252 | |
| AnnaBridge | 189:f392fc9709a3 | 1253 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1254 | * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1255 | * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor |
| AnnaBridge | 189:f392fc9709a3 | 1256 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1257 | * @retval Red color value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1258 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1259 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1260 | { |
| AnnaBridge | 189:f392fc9709a3 | 1261 | return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 1262 | } |
| AnnaBridge | 189:f392fc9709a3 | 1263 | |
| AnnaBridge | 189:f392fc9709a3 | 1264 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1265 | * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1266 | * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor |
| AnnaBridge | 189:f392fc9709a3 | 1267 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1268 | * @param Green Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1269 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1270 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1271 | __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) |
| AnnaBridge | 189:f392fc9709a3 | 1272 | { |
| AnnaBridge | 189:f392fc9709a3 | 1273 | MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 1274 | } |
| AnnaBridge | 189:f392fc9709a3 | 1275 | |
| AnnaBridge | 189:f392fc9709a3 | 1276 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1277 | * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1278 | * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor |
| AnnaBridge | 189:f392fc9709a3 | 1279 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1280 | * @retval Green color value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1281 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1282 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1283 | { |
| AnnaBridge | 189:f392fc9709a3 | 1284 | return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 1285 | } |
| AnnaBridge | 189:f392fc9709a3 | 1286 | |
| AnnaBridge | 189:f392fc9709a3 | 1287 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1288 | * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1289 | * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor |
| AnnaBridge | 189:f392fc9709a3 | 1290 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1291 | * @param Blue Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1292 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1293 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1294 | __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) |
| AnnaBridge | 189:f392fc9709a3 | 1295 | { |
| AnnaBridge | 189:f392fc9709a3 | 1296 | MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue); |
| AnnaBridge | 189:f392fc9709a3 | 1297 | } |
| AnnaBridge | 189:f392fc9709a3 | 1298 | |
| AnnaBridge | 189:f392fc9709a3 | 1299 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1300 | * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1301 | * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor |
| AnnaBridge | 189:f392fc9709a3 | 1302 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1303 | * @retval Blue color value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1304 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1305 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1306 | { |
| AnnaBridge | 189:f392fc9709a3 | 1307 | return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE)); |
| AnnaBridge | 189:f392fc9709a3 | 1308 | } |
| AnnaBridge | 189:f392fc9709a3 | 1309 | |
| AnnaBridge | 189:f392fc9709a3 | 1310 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1311 | * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1312 | * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 1313 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1314 | * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 1315 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1316 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1317 | __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) |
| AnnaBridge | 189:f392fc9709a3 | 1318 | { |
| AnnaBridge | 189:f392fc9709a3 | 1319 | LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress); |
| AnnaBridge | 189:f392fc9709a3 | 1320 | } |
| AnnaBridge | 189:f392fc9709a3 | 1321 | |
| AnnaBridge | 189:f392fc9709a3 | 1322 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1323 | * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1324 | * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 1325 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1326 | * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 1327 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1328 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1329 | { |
| AnnaBridge | 189:f392fc9709a3 | 1330 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR)); |
| AnnaBridge | 189:f392fc9709a3 | 1331 | } |
| AnnaBridge | 189:f392fc9709a3 | 1332 | |
| AnnaBridge | 189:f392fc9709a3 | 1333 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1334 | * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1335 | * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize |
| AnnaBridge | 189:f392fc9709a3 | 1336 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1337 | * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1338 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1339 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1340 | __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) |
| AnnaBridge | 189:f392fc9709a3 | 1341 | { |
| AnnaBridge | 189:f392fc9709a3 | 1342 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 1343 | } |
| AnnaBridge | 189:f392fc9709a3 | 1344 | |
| AnnaBridge | 189:f392fc9709a3 | 1345 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1346 | * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1347 | * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize |
| AnnaBridge | 189:f392fc9709a3 | 1348 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1349 | * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1350 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1351 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1352 | { |
| AnnaBridge | 189:f392fc9709a3 | 1353 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 1354 | } |
| AnnaBridge | 189:f392fc9709a3 | 1355 | |
| AnnaBridge | 189:f392fc9709a3 | 1356 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1357 | * @brief Set DMA2D foreground CLUT color mode. |
| AnnaBridge | 189:f392fc9709a3 | 1358 | * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode |
| AnnaBridge | 189:f392fc9709a3 | 1359 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1360 | * @param CLUTColorMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1361 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 1362 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 1363 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1364 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1365 | __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) |
| AnnaBridge | 189:f392fc9709a3 | 1366 | { |
| AnnaBridge | 189:f392fc9709a3 | 1367 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 1368 | } |
| AnnaBridge | 189:f392fc9709a3 | 1369 | |
| AnnaBridge | 189:f392fc9709a3 | 1370 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1371 | * @brief Return DMA2D foreground CLUT color mode. |
| AnnaBridge | 189:f392fc9709a3 | 1372 | * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode |
| AnnaBridge | 189:f392fc9709a3 | 1373 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1374 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1375 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 1376 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 1377 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1378 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1379 | { |
| AnnaBridge | 189:f392fc9709a3 | 1380 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM)); |
| AnnaBridge | 189:f392fc9709a3 | 1381 | } |
| AnnaBridge | 189:f392fc9709a3 | 1382 | |
| AnnaBridge | 189:f392fc9709a3 | 1383 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1384 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 1385 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1386 | |
| AnnaBridge | 189:f392fc9709a3 | 1387 | /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions |
| AnnaBridge | 189:f392fc9709a3 | 1388 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 1389 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1390 | |
| AnnaBridge | 189:f392fc9709a3 | 1391 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1392 | * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1393 | * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 1394 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1395 | * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 1396 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1397 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1398 | __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) |
| AnnaBridge | 189:f392fc9709a3 | 1399 | { |
| AnnaBridge | 189:f392fc9709a3 | 1400 | LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress); |
| AnnaBridge | 189:f392fc9709a3 | 1401 | } |
| AnnaBridge | 189:f392fc9709a3 | 1402 | |
| AnnaBridge | 189:f392fc9709a3 | 1403 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1404 | * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1405 | * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 1406 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1407 | * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 1408 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1409 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1410 | { |
| AnnaBridge | 189:f392fc9709a3 | 1411 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR)); |
| AnnaBridge | 189:f392fc9709a3 | 1412 | } |
| AnnaBridge | 189:f392fc9709a3 | 1413 | |
| AnnaBridge | 189:f392fc9709a3 | 1414 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1415 | * @brief Enable DMA2D background CLUT loading. |
| AnnaBridge | 189:f392fc9709a3 | 1416 | * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad |
| AnnaBridge | 189:f392fc9709a3 | 1417 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1418 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1419 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1420 | __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1421 | { |
| AnnaBridge | 189:f392fc9709a3 | 1422 | SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START); |
| AnnaBridge | 189:f392fc9709a3 | 1423 | } |
| AnnaBridge | 189:f392fc9709a3 | 1424 | |
| AnnaBridge | 189:f392fc9709a3 | 1425 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1426 | * @brief Indicate if DMA2D background CLUT loading is enabled. |
| AnnaBridge | 189:f392fc9709a3 | 1427 | * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad |
| AnnaBridge | 189:f392fc9709a3 | 1428 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1429 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 1430 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1431 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1432 | { |
| AnnaBridge | 189:f392fc9709a3 | 1433 | return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)); |
| AnnaBridge | 189:f392fc9709a3 | 1434 | } |
| AnnaBridge | 189:f392fc9709a3 | 1435 | |
| AnnaBridge | 189:f392fc9709a3 | 1436 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1437 | * @brief Set DMA2D background color mode. |
| AnnaBridge | 189:f392fc9709a3 | 1438 | * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode |
| AnnaBridge | 189:f392fc9709a3 | 1439 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1440 | * @param ColorMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1441 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 1442 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 1443 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 |
| AnnaBridge | 189:f392fc9709a3 | 1444 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 |
| AnnaBridge | 189:f392fc9709a3 | 1445 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 |
| AnnaBridge | 189:f392fc9709a3 | 1446 | * @arg @ref LL_DMA2D_INPUT_MODE_L8 |
| AnnaBridge | 189:f392fc9709a3 | 1447 | * @arg @ref LL_DMA2D_INPUT_MODE_AL44 |
| AnnaBridge | 189:f392fc9709a3 | 1448 | * @arg @ref LL_DMA2D_INPUT_MODE_AL88 |
| AnnaBridge | 189:f392fc9709a3 | 1449 | * @arg @ref LL_DMA2D_INPUT_MODE_L4 |
| AnnaBridge | 189:f392fc9709a3 | 1450 | * @arg @ref LL_DMA2D_INPUT_MODE_A8 |
| AnnaBridge | 189:f392fc9709a3 | 1451 | * @arg @ref LL_DMA2D_INPUT_MODE_A4 |
| AnnaBridge | 189:f392fc9709a3 | 1452 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1453 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1454 | __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
| AnnaBridge | 189:f392fc9709a3 | 1455 | { |
| AnnaBridge | 189:f392fc9709a3 | 1456 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 1457 | } |
| AnnaBridge | 189:f392fc9709a3 | 1458 | |
| AnnaBridge | 189:f392fc9709a3 | 1459 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1460 | * @brief Return DMA2D background color mode. |
| AnnaBridge | 189:f392fc9709a3 | 1461 | * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode |
| AnnaBridge | 189:f392fc9709a3 | 1462 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1463 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1464 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 1465 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 1466 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 |
| AnnaBridge | 189:f392fc9709a3 | 1467 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 |
| AnnaBridge | 189:f392fc9709a3 | 1468 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 |
| AnnaBridge | 189:f392fc9709a3 | 1469 | * @arg @ref LL_DMA2D_INPUT_MODE_L8 |
| AnnaBridge | 189:f392fc9709a3 | 1470 | * @arg @ref LL_DMA2D_INPUT_MODE_AL44 |
| AnnaBridge | 189:f392fc9709a3 | 1471 | * @arg @ref LL_DMA2D_INPUT_MODE_AL88 |
| AnnaBridge | 189:f392fc9709a3 | 1472 | * @arg @ref LL_DMA2D_INPUT_MODE_L4 |
| AnnaBridge | 189:f392fc9709a3 | 1473 | * @arg @ref LL_DMA2D_INPUT_MODE_A8 |
| AnnaBridge | 189:f392fc9709a3 | 1474 | * @arg @ref LL_DMA2D_INPUT_MODE_A4 |
| AnnaBridge | 189:f392fc9709a3 | 1475 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1476 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1477 | { |
| AnnaBridge | 189:f392fc9709a3 | 1478 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM)); |
| AnnaBridge | 189:f392fc9709a3 | 1479 | } |
| AnnaBridge | 189:f392fc9709a3 | 1480 | |
| AnnaBridge | 189:f392fc9709a3 | 1481 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1482 | * @brief Set DMA2D background alpha mode. |
| AnnaBridge | 189:f392fc9709a3 | 1483 | * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode |
| AnnaBridge | 189:f392fc9709a3 | 1484 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1485 | * @param AphaMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1486 | * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF |
| AnnaBridge | 189:f392fc9709a3 | 1487 | * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE |
| AnnaBridge | 189:f392fc9709a3 | 1488 | * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE |
| AnnaBridge | 189:f392fc9709a3 | 1489 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1490 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1491 | __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) |
| AnnaBridge | 189:f392fc9709a3 | 1492 | { |
| AnnaBridge | 189:f392fc9709a3 | 1493 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode); |
| AnnaBridge | 189:f392fc9709a3 | 1494 | } |
| AnnaBridge | 189:f392fc9709a3 | 1495 | |
| AnnaBridge | 189:f392fc9709a3 | 1496 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1497 | * @brief Return DMA2D background alpha mode. |
| AnnaBridge | 189:f392fc9709a3 | 1498 | * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode |
| AnnaBridge | 189:f392fc9709a3 | 1499 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1500 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1501 | * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF |
| AnnaBridge | 189:f392fc9709a3 | 1502 | * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE |
| AnnaBridge | 189:f392fc9709a3 | 1503 | * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE |
| AnnaBridge | 189:f392fc9709a3 | 1504 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1505 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1506 | { |
| AnnaBridge | 189:f392fc9709a3 | 1507 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM)); |
| AnnaBridge | 189:f392fc9709a3 | 1508 | } |
| AnnaBridge | 189:f392fc9709a3 | 1509 | |
| AnnaBridge | 189:f392fc9709a3 | 1510 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1511 | * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1512 | * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha |
| AnnaBridge | 189:f392fc9709a3 | 1513 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1514 | * @param Alpha Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1515 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1516 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1517 | __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) |
| AnnaBridge | 189:f392fc9709a3 | 1518 | { |
| AnnaBridge | 189:f392fc9709a3 | 1519 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 1520 | } |
| AnnaBridge | 189:f392fc9709a3 | 1521 | |
| AnnaBridge | 189:f392fc9709a3 | 1522 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1523 | * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1524 | * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha |
| AnnaBridge | 189:f392fc9709a3 | 1525 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1526 | * @retval Alpha value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1527 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1528 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1529 | { |
| AnnaBridge | 189:f392fc9709a3 | 1530 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 1531 | } |
| AnnaBridge | 189:f392fc9709a3 | 1532 | |
| AnnaBridge | 189:f392fc9709a3 | 1533 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1534 | * @brief Set DMA2D background Red Blue swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 1535 | * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode |
| AnnaBridge | 189:f392fc9709a3 | 1536 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1537 | * @param RBSwapMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1538 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 1539 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
| AnnaBridge | 189:f392fc9709a3 | 1540 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1541 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1542 | __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) |
| AnnaBridge | 189:f392fc9709a3 | 1543 | { |
| AnnaBridge | 189:f392fc9709a3 | 1544 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode); |
| AnnaBridge | 189:f392fc9709a3 | 1545 | } |
| AnnaBridge | 189:f392fc9709a3 | 1546 | |
| AnnaBridge | 189:f392fc9709a3 | 1547 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1548 | * @brief Return DMA2D background Red Blue swap mode. |
| AnnaBridge | 189:f392fc9709a3 | 1549 | * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode |
| AnnaBridge | 189:f392fc9709a3 | 1550 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1551 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1552 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 1553 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
| AnnaBridge | 189:f392fc9709a3 | 1554 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1555 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1556 | { |
| AnnaBridge | 189:f392fc9709a3 | 1557 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS)); |
| AnnaBridge | 189:f392fc9709a3 | 1558 | } |
| AnnaBridge | 189:f392fc9709a3 | 1559 | |
| AnnaBridge | 189:f392fc9709a3 | 1560 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1561 | * @brief Set DMA2D background alpha inversion mode. |
| AnnaBridge | 189:f392fc9709a3 | 1562 | * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode |
| AnnaBridge | 189:f392fc9709a3 | 1563 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1564 | * @param AlphaInversionMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1565 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 1566 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
| AnnaBridge | 189:f392fc9709a3 | 1567 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1568 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1569 | __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) |
| AnnaBridge | 189:f392fc9709a3 | 1570 | { |
| AnnaBridge | 189:f392fc9709a3 | 1571 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode); |
| AnnaBridge | 189:f392fc9709a3 | 1572 | } |
| AnnaBridge | 189:f392fc9709a3 | 1573 | |
| AnnaBridge | 189:f392fc9709a3 | 1574 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1575 | * @brief Return DMA2D background alpha inversion mode. |
| AnnaBridge | 189:f392fc9709a3 | 1576 | * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode |
| AnnaBridge | 189:f392fc9709a3 | 1577 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1578 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1579 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
| AnnaBridge | 189:f392fc9709a3 | 1580 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
| AnnaBridge | 189:f392fc9709a3 | 1581 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1582 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1583 | { |
| AnnaBridge | 189:f392fc9709a3 | 1584 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI)); |
| AnnaBridge | 189:f392fc9709a3 | 1585 | } |
| AnnaBridge | 189:f392fc9709a3 | 1586 | |
| AnnaBridge | 189:f392fc9709a3 | 1587 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1588 | * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1589 | * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset |
| AnnaBridge | 189:f392fc9709a3 | 1590 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1591 | * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF |
| AnnaBridge | 189:f392fc9709a3 | 1592 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1593 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1594 | __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) |
| AnnaBridge | 189:f392fc9709a3 | 1595 | { |
| AnnaBridge | 189:f392fc9709a3 | 1596 | MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset); |
| AnnaBridge | 189:f392fc9709a3 | 1597 | } |
| AnnaBridge | 189:f392fc9709a3 | 1598 | |
| AnnaBridge | 189:f392fc9709a3 | 1599 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1600 | * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1601 | * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset |
| AnnaBridge | 189:f392fc9709a3 | 1602 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1603 | * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF |
| AnnaBridge | 189:f392fc9709a3 | 1604 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1605 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1606 | { |
| AnnaBridge | 189:f392fc9709a3 | 1607 | return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO)); |
| AnnaBridge | 189:f392fc9709a3 | 1608 | } |
| AnnaBridge | 189:f392fc9709a3 | 1609 | |
| AnnaBridge | 189:f392fc9709a3 | 1610 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1611 | * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1612 | * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor |
| AnnaBridge | 189:f392fc9709a3 | 1613 | * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor |
| AnnaBridge | 189:f392fc9709a3 | 1614 | * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor |
| AnnaBridge | 189:f392fc9709a3 | 1615 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1616 | * @param Red Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1617 | * @param Green Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1618 | * @param Blue Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1619 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1620 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1621 | __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) |
| AnnaBridge | 189:f392fc9709a3 | 1622 | { |
| AnnaBridge | 189:f392fc9709a3 | 1623 | MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \ |
| AnnaBridge | 189:f392fc9709a3 | 1624 | ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue)); |
| AnnaBridge | 189:f392fc9709a3 | 1625 | } |
| AnnaBridge | 189:f392fc9709a3 | 1626 | |
| AnnaBridge | 189:f392fc9709a3 | 1627 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1628 | * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1629 | * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor |
| AnnaBridge | 189:f392fc9709a3 | 1630 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1631 | * @param Red Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1632 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1633 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1634 | __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) |
| AnnaBridge | 189:f392fc9709a3 | 1635 | { |
| AnnaBridge | 189:f392fc9709a3 | 1636 | MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 1637 | } |
| AnnaBridge | 189:f392fc9709a3 | 1638 | |
| AnnaBridge | 189:f392fc9709a3 | 1639 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1640 | * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1641 | * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor |
| AnnaBridge | 189:f392fc9709a3 | 1642 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1643 | * @retval Red color value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1644 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1645 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1646 | { |
| AnnaBridge | 189:f392fc9709a3 | 1647 | return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 1648 | } |
| AnnaBridge | 189:f392fc9709a3 | 1649 | |
| AnnaBridge | 189:f392fc9709a3 | 1650 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1651 | * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1652 | * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor |
| AnnaBridge | 189:f392fc9709a3 | 1653 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1654 | * @param Green Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1655 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1656 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1657 | __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) |
| AnnaBridge | 189:f392fc9709a3 | 1658 | { |
| AnnaBridge | 189:f392fc9709a3 | 1659 | MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 1660 | } |
| AnnaBridge | 189:f392fc9709a3 | 1661 | |
| AnnaBridge | 189:f392fc9709a3 | 1662 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1663 | * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1664 | * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor |
| AnnaBridge | 189:f392fc9709a3 | 1665 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1666 | * @retval Green color value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1667 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1668 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1669 | { |
| AnnaBridge | 189:f392fc9709a3 | 1670 | return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 1671 | } |
| AnnaBridge | 189:f392fc9709a3 | 1672 | |
| AnnaBridge | 189:f392fc9709a3 | 1673 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1674 | * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1675 | * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor |
| AnnaBridge | 189:f392fc9709a3 | 1676 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1677 | * @param Blue Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1678 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1679 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1680 | __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) |
| AnnaBridge | 189:f392fc9709a3 | 1681 | { |
| AnnaBridge | 189:f392fc9709a3 | 1682 | MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue); |
| AnnaBridge | 189:f392fc9709a3 | 1683 | } |
| AnnaBridge | 189:f392fc9709a3 | 1684 | |
| AnnaBridge | 189:f392fc9709a3 | 1685 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1686 | * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1687 | * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor |
| AnnaBridge | 189:f392fc9709a3 | 1688 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1689 | * @retval Blue color value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1690 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1691 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1692 | { |
| AnnaBridge | 189:f392fc9709a3 | 1693 | return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE)); |
| AnnaBridge | 189:f392fc9709a3 | 1694 | } |
| AnnaBridge | 189:f392fc9709a3 | 1695 | |
| AnnaBridge | 189:f392fc9709a3 | 1696 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1697 | * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1698 | * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 1699 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1700 | * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 1701 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1702 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1703 | __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) |
| AnnaBridge | 189:f392fc9709a3 | 1704 | { |
| AnnaBridge | 189:f392fc9709a3 | 1705 | LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress); |
| AnnaBridge | 189:f392fc9709a3 | 1706 | } |
| AnnaBridge | 189:f392fc9709a3 | 1707 | |
| AnnaBridge | 189:f392fc9709a3 | 1708 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1709 | * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1710 | * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr |
| AnnaBridge | 189:f392fc9709a3 | 1711 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1712 | * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 189:f392fc9709a3 | 1713 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1714 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1715 | { |
| AnnaBridge | 189:f392fc9709a3 | 1716 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR)); |
| AnnaBridge | 189:f392fc9709a3 | 1717 | } |
| AnnaBridge | 189:f392fc9709a3 | 1718 | |
| AnnaBridge | 189:f392fc9709a3 | 1719 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1720 | * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1721 | * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize |
| AnnaBridge | 189:f392fc9709a3 | 1722 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1723 | * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1724 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1725 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1726 | __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) |
| AnnaBridge | 189:f392fc9709a3 | 1727 | { |
| AnnaBridge | 189:f392fc9709a3 | 1728 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos)); |
| AnnaBridge | 189:f392fc9709a3 | 1729 | } |
| AnnaBridge | 189:f392fc9709a3 | 1730 | |
| AnnaBridge | 189:f392fc9709a3 | 1731 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1732 | * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). |
| AnnaBridge | 189:f392fc9709a3 | 1733 | * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize |
| AnnaBridge | 189:f392fc9709a3 | 1734 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1735 | * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF |
| AnnaBridge | 189:f392fc9709a3 | 1736 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1737 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1738 | { |
| AnnaBridge | 189:f392fc9709a3 | 1739 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos); |
| AnnaBridge | 189:f392fc9709a3 | 1740 | } |
| AnnaBridge | 189:f392fc9709a3 | 1741 | |
| AnnaBridge | 189:f392fc9709a3 | 1742 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1743 | * @brief Set DMA2D background CLUT color mode. |
| AnnaBridge | 189:f392fc9709a3 | 1744 | * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode |
| AnnaBridge | 189:f392fc9709a3 | 1745 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1746 | * @param CLUTColorMode This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1747 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 1748 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 1749 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1750 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1751 | __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) |
| AnnaBridge | 189:f392fc9709a3 | 1752 | { |
| AnnaBridge | 189:f392fc9709a3 | 1753 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 1754 | } |
| AnnaBridge | 189:f392fc9709a3 | 1755 | |
| AnnaBridge | 189:f392fc9709a3 | 1756 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1757 | * @brief Return DMA2D background CLUT color mode. |
| AnnaBridge | 189:f392fc9709a3 | 1758 | * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode |
| AnnaBridge | 189:f392fc9709a3 | 1759 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1760 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 1761 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 |
| AnnaBridge | 189:f392fc9709a3 | 1762 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 |
| AnnaBridge | 189:f392fc9709a3 | 1763 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1764 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1765 | { |
| AnnaBridge | 189:f392fc9709a3 | 1766 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM)); |
| AnnaBridge | 189:f392fc9709a3 | 1767 | } |
| AnnaBridge | 189:f392fc9709a3 | 1768 | |
| AnnaBridge | 189:f392fc9709a3 | 1769 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1770 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 1771 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1772 | |
| AnnaBridge | 189:f392fc9709a3 | 1773 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1774 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 1775 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1776 | |
| AnnaBridge | 189:f392fc9709a3 | 1777 | |
| AnnaBridge | 189:f392fc9709a3 | 1778 | /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management |
| AnnaBridge | 189:f392fc9709a3 | 1779 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 1780 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1781 | |
| AnnaBridge | 189:f392fc9709a3 | 1782 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1783 | * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not |
| AnnaBridge | 189:f392fc9709a3 | 1784 | * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE |
| AnnaBridge | 189:f392fc9709a3 | 1785 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1786 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 1787 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1788 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1789 | { |
| AnnaBridge | 189:f392fc9709a3 | 1790 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)); |
| AnnaBridge | 189:f392fc9709a3 | 1791 | } |
| AnnaBridge | 189:f392fc9709a3 | 1792 | |
| AnnaBridge | 189:f392fc9709a3 | 1793 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1794 | * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not |
| AnnaBridge | 189:f392fc9709a3 | 1795 | * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC |
| AnnaBridge | 189:f392fc9709a3 | 1796 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1797 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 1798 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1799 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1800 | { |
| AnnaBridge | 189:f392fc9709a3 | 1801 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)); |
| AnnaBridge | 189:f392fc9709a3 | 1802 | } |
| AnnaBridge | 189:f392fc9709a3 | 1803 | |
| AnnaBridge | 189:f392fc9709a3 | 1804 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1805 | * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not |
| AnnaBridge | 189:f392fc9709a3 | 1806 | * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE |
| AnnaBridge | 189:f392fc9709a3 | 1807 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1808 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 1809 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1810 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1811 | { |
| AnnaBridge | 189:f392fc9709a3 | 1812 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)); |
| AnnaBridge | 189:f392fc9709a3 | 1813 | } |
| AnnaBridge | 189:f392fc9709a3 | 1814 | |
| AnnaBridge | 189:f392fc9709a3 | 1815 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1816 | * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not |
| AnnaBridge | 189:f392fc9709a3 | 1817 | * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW |
| AnnaBridge | 189:f392fc9709a3 | 1818 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1819 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 1820 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1821 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1822 | { |
| AnnaBridge | 189:f392fc9709a3 | 1823 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)); |
| AnnaBridge | 189:f392fc9709a3 | 1824 | } |
| AnnaBridge | 189:f392fc9709a3 | 1825 | |
| AnnaBridge | 189:f392fc9709a3 | 1826 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1827 | * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not |
| AnnaBridge | 189:f392fc9709a3 | 1828 | * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC |
| AnnaBridge | 189:f392fc9709a3 | 1829 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1830 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 1831 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1832 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1833 | { |
| AnnaBridge | 189:f392fc9709a3 | 1834 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)); |
| AnnaBridge | 189:f392fc9709a3 | 1835 | } |
| AnnaBridge | 189:f392fc9709a3 | 1836 | |
| AnnaBridge | 189:f392fc9709a3 | 1837 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1838 | * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not |
| AnnaBridge | 189:f392fc9709a3 | 1839 | * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE |
| AnnaBridge | 189:f392fc9709a3 | 1840 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1841 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 1842 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1843 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1844 | { |
| AnnaBridge | 189:f392fc9709a3 | 1845 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)); |
| AnnaBridge | 189:f392fc9709a3 | 1846 | } |
| AnnaBridge | 189:f392fc9709a3 | 1847 | |
| AnnaBridge | 189:f392fc9709a3 | 1848 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1849 | * @brief Clear DMA2D Configuration Error Interrupt Flag |
| AnnaBridge | 189:f392fc9709a3 | 1850 | * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE |
| AnnaBridge | 189:f392fc9709a3 | 1851 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1852 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1853 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1854 | __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1855 | { |
| AnnaBridge | 189:f392fc9709a3 | 1856 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF); |
| AnnaBridge | 189:f392fc9709a3 | 1857 | } |
| AnnaBridge | 189:f392fc9709a3 | 1858 | |
| AnnaBridge | 189:f392fc9709a3 | 1859 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1860 | * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag |
| AnnaBridge | 189:f392fc9709a3 | 1861 | * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC |
| AnnaBridge | 189:f392fc9709a3 | 1862 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1863 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1864 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1865 | __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1866 | { |
| AnnaBridge | 189:f392fc9709a3 | 1867 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF); |
| AnnaBridge | 189:f392fc9709a3 | 1868 | } |
| AnnaBridge | 189:f392fc9709a3 | 1869 | |
| AnnaBridge | 189:f392fc9709a3 | 1870 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1871 | * @brief Clear DMA2D CLUT Access Error Interrupt Flag |
| AnnaBridge | 189:f392fc9709a3 | 1872 | * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE |
| AnnaBridge | 189:f392fc9709a3 | 1873 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1874 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1875 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1876 | __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1877 | { |
| AnnaBridge | 189:f392fc9709a3 | 1878 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF); |
| AnnaBridge | 189:f392fc9709a3 | 1879 | } |
| AnnaBridge | 189:f392fc9709a3 | 1880 | |
| AnnaBridge | 189:f392fc9709a3 | 1881 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1882 | * @brief Clear DMA2D Transfer Watermark Interrupt Flag |
| AnnaBridge | 189:f392fc9709a3 | 1883 | * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW |
| AnnaBridge | 189:f392fc9709a3 | 1884 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1885 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1886 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1887 | __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1888 | { |
| AnnaBridge | 189:f392fc9709a3 | 1889 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF); |
| AnnaBridge | 189:f392fc9709a3 | 1890 | } |
| AnnaBridge | 189:f392fc9709a3 | 1891 | |
| AnnaBridge | 189:f392fc9709a3 | 1892 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1893 | * @brief Clear DMA2D Transfer Complete Interrupt Flag |
| AnnaBridge | 189:f392fc9709a3 | 1894 | * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC |
| AnnaBridge | 189:f392fc9709a3 | 1895 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1896 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1897 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1898 | __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1899 | { |
| AnnaBridge | 189:f392fc9709a3 | 1900 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF); |
| AnnaBridge | 189:f392fc9709a3 | 1901 | } |
| AnnaBridge | 189:f392fc9709a3 | 1902 | |
| AnnaBridge | 189:f392fc9709a3 | 1903 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1904 | * @brief Clear DMA2D Transfer Error Interrupt Flag |
| AnnaBridge | 189:f392fc9709a3 | 1905 | * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE |
| AnnaBridge | 189:f392fc9709a3 | 1906 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1907 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1908 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1909 | __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1910 | { |
| AnnaBridge | 189:f392fc9709a3 | 1911 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF); |
| AnnaBridge | 189:f392fc9709a3 | 1912 | } |
| AnnaBridge | 189:f392fc9709a3 | 1913 | |
| AnnaBridge | 189:f392fc9709a3 | 1914 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1915 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 1916 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1917 | |
| AnnaBridge | 189:f392fc9709a3 | 1918 | /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management |
| AnnaBridge | 189:f392fc9709a3 | 1919 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 1920 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1921 | |
| AnnaBridge | 189:f392fc9709a3 | 1922 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1923 | * @brief Enable Configuration Error Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 1924 | * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE |
| AnnaBridge | 189:f392fc9709a3 | 1925 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1926 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1927 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1928 | __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1929 | { |
| AnnaBridge | 189:f392fc9709a3 | 1930 | SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); |
| AnnaBridge | 189:f392fc9709a3 | 1931 | } |
| AnnaBridge | 189:f392fc9709a3 | 1932 | |
| AnnaBridge | 189:f392fc9709a3 | 1933 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1934 | * @brief Enable CLUT Transfer Complete Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 1935 | * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC |
| AnnaBridge | 189:f392fc9709a3 | 1936 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1937 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1938 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1939 | __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1940 | { |
| AnnaBridge | 189:f392fc9709a3 | 1941 | SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); |
| AnnaBridge | 189:f392fc9709a3 | 1942 | } |
| AnnaBridge | 189:f392fc9709a3 | 1943 | |
| AnnaBridge | 189:f392fc9709a3 | 1944 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1945 | * @brief Enable CLUT Access Error Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 1946 | * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE |
| AnnaBridge | 189:f392fc9709a3 | 1947 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1948 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1949 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1950 | __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1951 | { |
| AnnaBridge | 189:f392fc9709a3 | 1952 | SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); |
| AnnaBridge | 189:f392fc9709a3 | 1953 | } |
| AnnaBridge | 189:f392fc9709a3 | 1954 | |
| AnnaBridge | 189:f392fc9709a3 | 1955 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1956 | * @brief Enable Transfer Watermark Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 1957 | * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW |
| AnnaBridge | 189:f392fc9709a3 | 1958 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1959 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1960 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1961 | __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1962 | { |
| AnnaBridge | 189:f392fc9709a3 | 1963 | SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); |
| AnnaBridge | 189:f392fc9709a3 | 1964 | } |
| AnnaBridge | 189:f392fc9709a3 | 1965 | |
| AnnaBridge | 189:f392fc9709a3 | 1966 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1967 | * @brief Enable Transfer Complete Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 1968 | * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC |
| AnnaBridge | 189:f392fc9709a3 | 1969 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1970 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1971 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1972 | __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1973 | { |
| AnnaBridge | 189:f392fc9709a3 | 1974 | SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); |
| AnnaBridge | 189:f392fc9709a3 | 1975 | } |
| AnnaBridge | 189:f392fc9709a3 | 1976 | |
| AnnaBridge | 189:f392fc9709a3 | 1977 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1978 | * @brief Enable Transfer Error Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 1979 | * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE |
| AnnaBridge | 189:f392fc9709a3 | 1980 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1981 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1982 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1983 | __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1984 | { |
| AnnaBridge | 189:f392fc9709a3 | 1985 | SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); |
| AnnaBridge | 189:f392fc9709a3 | 1986 | } |
| AnnaBridge | 189:f392fc9709a3 | 1987 | |
| AnnaBridge | 189:f392fc9709a3 | 1988 | /** |
| AnnaBridge | 189:f392fc9709a3 | 1989 | * @brief Disable Configuration Error Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 1990 | * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE |
| AnnaBridge | 189:f392fc9709a3 | 1991 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 1992 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 1993 | */ |
| AnnaBridge | 189:f392fc9709a3 | 1994 | __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 1995 | { |
| AnnaBridge | 189:f392fc9709a3 | 1996 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); |
| AnnaBridge | 189:f392fc9709a3 | 1997 | } |
| AnnaBridge | 189:f392fc9709a3 | 1998 | |
| AnnaBridge | 189:f392fc9709a3 | 1999 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2000 | * @brief Disable CLUT Transfer Complete Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 2001 | * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC |
| AnnaBridge | 189:f392fc9709a3 | 2002 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2003 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 2004 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2005 | __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2006 | { |
| AnnaBridge | 189:f392fc9709a3 | 2007 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); |
| AnnaBridge | 189:f392fc9709a3 | 2008 | } |
| AnnaBridge | 189:f392fc9709a3 | 2009 | |
| AnnaBridge | 189:f392fc9709a3 | 2010 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2011 | * @brief Disable CLUT Access Error Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 2012 | * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE |
| AnnaBridge | 189:f392fc9709a3 | 2013 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2014 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 2015 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2016 | __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2017 | { |
| AnnaBridge | 189:f392fc9709a3 | 2018 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); |
| AnnaBridge | 189:f392fc9709a3 | 2019 | } |
| AnnaBridge | 189:f392fc9709a3 | 2020 | |
| AnnaBridge | 189:f392fc9709a3 | 2021 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2022 | * @brief Disable Transfer Watermark Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 2023 | * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW |
| AnnaBridge | 189:f392fc9709a3 | 2024 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2025 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 2026 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2027 | __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2028 | { |
| AnnaBridge | 189:f392fc9709a3 | 2029 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); |
| AnnaBridge | 189:f392fc9709a3 | 2030 | } |
| AnnaBridge | 189:f392fc9709a3 | 2031 | |
| AnnaBridge | 189:f392fc9709a3 | 2032 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2033 | * @brief Disable Transfer Complete Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 2034 | * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC |
| AnnaBridge | 189:f392fc9709a3 | 2035 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2036 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 2037 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2038 | __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2039 | { |
| AnnaBridge | 189:f392fc9709a3 | 2040 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); |
| AnnaBridge | 189:f392fc9709a3 | 2041 | } |
| AnnaBridge | 189:f392fc9709a3 | 2042 | |
| AnnaBridge | 189:f392fc9709a3 | 2043 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2044 | * @brief Disable Transfer Error Interrupt |
| AnnaBridge | 189:f392fc9709a3 | 2045 | * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE |
| AnnaBridge | 189:f392fc9709a3 | 2046 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2047 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 2048 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2049 | __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2050 | { |
| AnnaBridge | 189:f392fc9709a3 | 2051 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); |
| AnnaBridge | 189:f392fc9709a3 | 2052 | } |
| AnnaBridge | 189:f392fc9709a3 | 2053 | |
| AnnaBridge | 189:f392fc9709a3 | 2054 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2055 | * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled. |
| AnnaBridge | 189:f392fc9709a3 | 2056 | * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE |
| AnnaBridge | 189:f392fc9709a3 | 2057 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2058 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 2059 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2060 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2061 | { |
| AnnaBridge | 189:f392fc9709a3 | 2062 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)); |
| AnnaBridge | 189:f392fc9709a3 | 2063 | } |
| AnnaBridge | 189:f392fc9709a3 | 2064 | |
| AnnaBridge | 189:f392fc9709a3 | 2065 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2066 | * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled. |
| AnnaBridge | 189:f392fc9709a3 | 2067 | * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC |
| AnnaBridge | 189:f392fc9709a3 | 2068 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2069 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 2070 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2071 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2072 | { |
| AnnaBridge | 189:f392fc9709a3 | 2073 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)); |
| AnnaBridge | 189:f392fc9709a3 | 2074 | } |
| AnnaBridge | 189:f392fc9709a3 | 2075 | |
| AnnaBridge | 189:f392fc9709a3 | 2076 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2077 | * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled. |
| AnnaBridge | 189:f392fc9709a3 | 2078 | * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE |
| AnnaBridge | 189:f392fc9709a3 | 2079 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2080 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 2081 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2082 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2083 | { |
| AnnaBridge | 189:f392fc9709a3 | 2084 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)); |
| AnnaBridge | 189:f392fc9709a3 | 2085 | } |
| AnnaBridge | 189:f392fc9709a3 | 2086 | |
| AnnaBridge | 189:f392fc9709a3 | 2087 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2088 | * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled. |
| AnnaBridge | 189:f392fc9709a3 | 2089 | * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW |
| AnnaBridge | 189:f392fc9709a3 | 2090 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2091 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 2092 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2093 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2094 | { |
| AnnaBridge | 189:f392fc9709a3 | 2095 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)); |
| AnnaBridge | 189:f392fc9709a3 | 2096 | } |
| AnnaBridge | 189:f392fc9709a3 | 2097 | |
| AnnaBridge | 189:f392fc9709a3 | 2098 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2099 | * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled. |
| AnnaBridge | 189:f392fc9709a3 | 2100 | * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC |
| AnnaBridge | 189:f392fc9709a3 | 2101 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2102 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 2103 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2104 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2105 | { |
| AnnaBridge | 189:f392fc9709a3 | 2106 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)); |
| AnnaBridge | 189:f392fc9709a3 | 2107 | } |
| AnnaBridge | 189:f392fc9709a3 | 2108 | |
| AnnaBridge | 189:f392fc9709a3 | 2109 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2110 | * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled. |
| AnnaBridge | 189:f392fc9709a3 | 2111 | * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE |
| AnnaBridge | 189:f392fc9709a3 | 2112 | * @param DMA2Dx DMA2D Instance |
| AnnaBridge | 189:f392fc9709a3 | 2113 | * @retval State of bit (1 or 0). |
| AnnaBridge | 189:f392fc9709a3 | 2114 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2115 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) |
| AnnaBridge | 189:f392fc9709a3 | 2116 | { |
| AnnaBridge | 189:f392fc9709a3 | 2117 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)); |
| AnnaBridge | 189:f392fc9709a3 | 2118 | } |
| AnnaBridge | 189:f392fc9709a3 | 2119 | |
| AnnaBridge | 189:f392fc9709a3 | 2120 | |
| AnnaBridge | 189:f392fc9709a3 | 2121 | |
| AnnaBridge | 189:f392fc9709a3 | 2122 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2123 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 2124 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2125 | |
| AnnaBridge | 189:f392fc9709a3 | 2126 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 189:f392fc9709a3 | 2127 | /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions |
| AnnaBridge | 189:f392fc9709a3 | 2128 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 2129 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2130 | |
| AnnaBridge | 189:f392fc9709a3 | 2131 | ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx); |
| AnnaBridge | 189:f392fc9709a3 | 2132 | ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct); |
| AnnaBridge | 189:f392fc9709a3 | 2133 | void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct); |
| AnnaBridge | 189:f392fc9709a3 | 2134 | void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx); |
| AnnaBridge | 189:f392fc9709a3 | 2135 | void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg); |
| AnnaBridge | 189:f392fc9709a3 | 2136 | void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct); |
| AnnaBridge | 189:f392fc9709a3 | 2137 | uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 2138 | uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 2139 | uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 2140 | uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); |
| AnnaBridge | 189:f392fc9709a3 | 2141 | void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines); |
| AnnaBridge | 189:f392fc9709a3 | 2142 | |
| AnnaBridge | 189:f392fc9709a3 | 2143 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2144 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 2145 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2146 | #endif /* USE_FULL_LL_DRIVER */ |
| AnnaBridge | 189:f392fc9709a3 | 2147 | |
| AnnaBridge | 189:f392fc9709a3 | 2148 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2149 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 2150 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2151 | |
| AnnaBridge | 189:f392fc9709a3 | 2152 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2153 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 2154 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2155 | |
| AnnaBridge | 189:f392fc9709a3 | 2156 | #endif /* defined (DMA2D) */ |
| AnnaBridge | 189:f392fc9709a3 | 2157 | |
| AnnaBridge | 189:f392fc9709a3 | 2158 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2159 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 2160 | */ |
| AnnaBridge | 189:f392fc9709a3 | 2161 | |
| AnnaBridge | 189:f392fc9709a3 | 2162 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 2163 | } |
| AnnaBridge | 189:f392fc9709a3 | 2164 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 2165 | |
| AnnaBridge | 189:f392fc9709a3 | 2166 | #endif /* __STM32L4xx_LL_DMA2D_H */ |
| AnnaBridge | 189:f392fc9709a3 | 2167 | |
| AnnaBridge | 189:f392fc9709a3 | 2168 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
