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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_IAR/stm32l4xx_hal_usart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32l4xx_hal_usart.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file of USART HAL module.
AnnaBridge 189:f392fc9709a3 6 ******************************************************************************
AnnaBridge 189:f392fc9709a3 7 * @attention
AnnaBridge 189:f392fc9709a3 8 *
AnnaBridge 189:f392fc9709a3 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 189:f392fc9709a3 10 *
AnnaBridge 189:f392fc9709a3 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 12 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 189:f392fc9709a3 14 * this list of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 189:f392fc9709a3 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 189:f392fc9709a3 17 * and/or other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 189:f392fc9709a3 19 * may be used to endorse or promote products derived from this software
AnnaBridge 189:f392fc9709a3 20 * without specific prior written permission.
AnnaBridge 189:f392fc9709a3 21 *
AnnaBridge 189:f392fc9709a3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 189:f392fc9709a3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 189:f392fc9709a3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 189:f392fc9709a3 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 189:f392fc9709a3 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 189:f392fc9709a3 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 189:f392fc9709a3 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 189:f392fc9709a3 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 189:f392fc9709a3 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 32 *
AnnaBridge 189:f392fc9709a3 33 ******************************************************************************
AnnaBridge 189:f392fc9709a3 34 */
AnnaBridge 189:f392fc9709a3 35
AnnaBridge 189:f392fc9709a3 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 37 #ifndef __STM32L4xx_HAL_USART_H
AnnaBridge 189:f392fc9709a3 38 #define __STM32L4xx_HAL_USART_H
AnnaBridge 189:f392fc9709a3 39
AnnaBridge 189:f392fc9709a3 40 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 41 extern "C" {
AnnaBridge 189:f392fc9709a3 42 #endif
AnnaBridge 189:f392fc9709a3 43
AnnaBridge 189:f392fc9709a3 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 45 #include "stm32l4xx_hal_def.h"
AnnaBridge 189:f392fc9709a3 46
AnnaBridge 189:f392fc9709a3 47 /** @addtogroup STM32L4xx_HAL_Driver
AnnaBridge 189:f392fc9709a3 48 * @{
AnnaBridge 189:f392fc9709a3 49 */
AnnaBridge 189:f392fc9709a3 50
AnnaBridge 189:f392fc9709a3 51 /** @addtogroup USART
AnnaBridge 189:f392fc9709a3 52 * @{
AnnaBridge 189:f392fc9709a3 53 */
AnnaBridge 189:f392fc9709a3 54
AnnaBridge 189:f392fc9709a3 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 56 /** @defgroup USART_Exported_Types USART Exported Types
AnnaBridge 189:f392fc9709a3 57 * @{
AnnaBridge 189:f392fc9709a3 58 */
AnnaBridge 189:f392fc9709a3 59
AnnaBridge 189:f392fc9709a3 60 /**
AnnaBridge 189:f392fc9709a3 61 * @brief USART Init Structure definition
AnnaBridge 189:f392fc9709a3 62 */
AnnaBridge 189:f392fc9709a3 63 typedef struct
AnnaBridge 189:f392fc9709a3 64 {
AnnaBridge 189:f392fc9709a3 65 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
AnnaBridge 189:f392fc9709a3 66 The baud rate is computed using the following formula:
AnnaBridge 189:f392fc9709a3 67 Baud Rate Register[15:4] = ((2 * fclk_pres) / ((huart->Init.BaudRate)))[15:4]
AnnaBridge 189:f392fc9709a3 68 Baud Rate Register[3] = 0
AnnaBridge 189:f392fc9709a3 69 Baud Rate Register[2:0] = (((2 * fclk_pres) / ((huart->Init.BaudRate)))[3:0]) >> 1
AnnaBridge 189:f392fc9709a3 70 where fclk_pres is the USART input clock frequency (fclk) divided by a prescaler.
AnnaBridge 189:f392fc9709a3 71 @note Oversampling by 8 is systematically applied to achieve high baud rates. */
AnnaBridge 189:f392fc9709a3 72
AnnaBridge 189:f392fc9709a3 73 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge 189:f392fc9709a3 74 This parameter can be a value of @ref USARTEx_Word_Length. */
AnnaBridge 189:f392fc9709a3 75
AnnaBridge 189:f392fc9709a3 76 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge 189:f392fc9709a3 77 This parameter can be a value of @ref USART_Stop_Bits. */
AnnaBridge 189:f392fc9709a3 78
AnnaBridge 189:f392fc9709a3 79 uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge 189:f392fc9709a3 80 This parameter can be a value of @ref USART_Parity
AnnaBridge 189:f392fc9709a3 81 @note When parity is enabled, the computed parity is inserted
AnnaBridge 189:f392fc9709a3 82 at the MSB position of the transmitted data (9th bit when
AnnaBridge 189:f392fc9709a3 83 the word length is set to 9 data bits; 8th bit when the
AnnaBridge 189:f392fc9709a3 84 word length is set to 8 data bits). */
AnnaBridge 189:f392fc9709a3 85
AnnaBridge 189:f392fc9709a3 86 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
AnnaBridge 189:f392fc9709a3 87 This parameter can be a value of @ref USART_Mode. */
AnnaBridge 189:f392fc9709a3 88
AnnaBridge 189:f392fc9709a3 89 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
AnnaBridge 189:f392fc9709a3 90 This parameter can be a value of @ref USART_Clock_Polarity. */
AnnaBridge 189:f392fc9709a3 91
AnnaBridge 189:f392fc9709a3 92 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
AnnaBridge 189:f392fc9709a3 93 This parameter can be a value of @ref USART_Clock_Phase. */
AnnaBridge 189:f392fc9709a3 94
AnnaBridge 189:f392fc9709a3 95 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
AnnaBridge 189:f392fc9709a3 96 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
AnnaBridge 189:f392fc9709a3 97 This parameter can be a value of @ref USART_Last_Bit. */
AnnaBridge 189:f392fc9709a3 98
AnnaBridge 189:f392fc9709a3 99 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 100 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the USART clock source.
AnnaBridge 189:f392fc9709a3 101 This parameter can be a value of @ref USART_ClockPrescaler. */
AnnaBridge 189:f392fc9709a3 102 #endif
AnnaBridge 189:f392fc9709a3 103
AnnaBridge 189:f392fc9709a3 104 }USART_InitTypeDef;
AnnaBridge 189:f392fc9709a3 105
AnnaBridge 189:f392fc9709a3 106 /**
AnnaBridge 189:f392fc9709a3 107 * @brief HAL USART State structures definition
AnnaBridge 189:f392fc9709a3 108 */
AnnaBridge 189:f392fc9709a3 109 typedef enum
AnnaBridge 189:f392fc9709a3 110 {
AnnaBridge 189:f392fc9709a3 111 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */
AnnaBridge 189:f392fc9709a3 112 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
AnnaBridge 189:f392fc9709a3 113 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
AnnaBridge 189:f392fc9709a3 114 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
AnnaBridge 189:f392fc9709a3 115 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
AnnaBridge 189:f392fc9709a3 116 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
AnnaBridge 189:f392fc9709a3 117 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
AnnaBridge 189:f392fc9709a3 118 HAL_USART_STATE_ERROR = 0x04U /*!< Error */
AnnaBridge 189:f392fc9709a3 119 }HAL_USART_StateTypeDef;
AnnaBridge 189:f392fc9709a3 120
AnnaBridge 189:f392fc9709a3 121 /**
AnnaBridge 189:f392fc9709a3 122 * @brief HAL USART Error Code structure definition
AnnaBridge 189:f392fc9709a3 123 */
AnnaBridge 189:f392fc9709a3 124 typedef enum
AnnaBridge 189:f392fc9709a3 125 {
AnnaBridge 189:f392fc9709a3 126 HAL_USART_ERROR_NONE = 0x00U, /*!< No error */
AnnaBridge 189:f392fc9709a3 127 HAL_USART_ERROR_PE = 0x01U, /*!< Parity error */
AnnaBridge 189:f392fc9709a3 128 HAL_USART_ERROR_NE = 0x02U, /*!< Noise error */
AnnaBridge 189:f392fc9709a3 129 HAL_USART_ERROR_FE = 0x04U, /*!< frame error */
AnnaBridge 189:f392fc9709a3 130 HAL_USART_ERROR_ORE = 0x08U, /*!< Overrun error */
AnnaBridge 189:f392fc9709a3 131 HAL_USART_ERROR_DMA = 0x10U, /*!< DMA transfer error */
AnnaBridge 189:f392fc9709a3 132 HAL_USART_ERROR_UDR = 0x20U /*!< SPI slave underrun error */
AnnaBridge 189:f392fc9709a3 133 }HAL_USART_ErrorTypeDef;
AnnaBridge 189:f392fc9709a3 134
AnnaBridge 189:f392fc9709a3 135 /**
AnnaBridge 189:f392fc9709a3 136 * @brief USART clock sources definitions
AnnaBridge 189:f392fc9709a3 137 */
AnnaBridge 189:f392fc9709a3 138 typedef enum
AnnaBridge 189:f392fc9709a3 139 {
AnnaBridge 189:f392fc9709a3 140 USART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
AnnaBridge 189:f392fc9709a3 141 USART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
AnnaBridge 189:f392fc9709a3 142 USART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
AnnaBridge 189:f392fc9709a3 143 USART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
AnnaBridge 189:f392fc9709a3 144 USART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
AnnaBridge 189:f392fc9709a3 145 USART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
AnnaBridge 189:f392fc9709a3 146 }USART_ClockSourceTypeDef;
AnnaBridge 189:f392fc9709a3 147
AnnaBridge 189:f392fc9709a3 148
AnnaBridge 189:f392fc9709a3 149 /**
AnnaBridge 189:f392fc9709a3 150 * @brief USART handle Structure definition
AnnaBridge 189:f392fc9709a3 151 */
AnnaBridge 189:f392fc9709a3 152 typedef struct __USART_HandleTypeDef
AnnaBridge 189:f392fc9709a3 153 {
AnnaBridge 189:f392fc9709a3 154 USART_TypeDef *Instance; /*!< USART registers base address */
AnnaBridge 189:f392fc9709a3 155
AnnaBridge 189:f392fc9709a3 156 USART_InitTypeDef Init; /*!< USART communication parameters */
AnnaBridge 189:f392fc9709a3 157
AnnaBridge 189:f392fc9709a3 158 uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
AnnaBridge 189:f392fc9709a3 159
AnnaBridge 189:f392fc9709a3 160 uint16_t TxXferSize; /*!< USART Tx Transfer size */
AnnaBridge 189:f392fc9709a3 161
AnnaBridge 189:f392fc9709a3 162 __IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
AnnaBridge 189:f392fc9709a3 163
AnnaBridge 189:f392fc9709a3 164 uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
AnnaBridge 189:f392fc9709a3 165
AnnaBridge 189:f392fc9709a3 166 uint16_t RxXferSize; /*!< USART Rx Transfer size */
AnnaBridge 189:f392fc9709a3 167
AnnaBridge 189:f392fc9709a3 168 __IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
AnnaBridge 189:f392fc9709a3 169
AnnaBridge 189:f392fc9709a3 170 uint16_t Mask; /*!< USART Rx RDR register mask */
AnnaBridge 189:f392fc9709a3 171
AnnaBridge 189:f392fc9709a3 172 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 173 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
AnnaBridge 189:f392fc9709a3 174
AnnaBridge 189:f392fc9709a3 175 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
AnnaBridge 189:f392fc9709a3 176
AnnaBridge 189:f392fc9709a3 177 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used.
AnnaBridge 189:f392fc9709a3 178 This parameter can be a value of @ref USARTEx_FIFO_mode. */
AnnaBridge 189:f392fc9709a3 179 #endif
AnnaBridge 189:f392fc9709a3 180
AnnaBridge 189:f392fc9709a3 181 #if defined(USART_CR2_SLVEN)
AnnaBridge 189:f392fc9709a3 182 uint32_t SlaveMode; /*!< Specifies if the UART SPI Slave mode is being used.
AnnaBridge 189:f392fc9709a3 183 This parameter can be a value of @ref USARTEx_Slave_Mode. */
AnnaBridge 189:f392fc9709a3 184 #endif
AnnaBridge 189:f392fc9709a3 185
AnnaBridge 189:f392fc9709a3 186 void (*RxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Rx IRQ handler */
AnnaBridge 189:f392fc9709a3 187
AnnaBridge 189:f392fc9709a3 188 void (*TxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Tx IRQ handler */
AnnaBridge 189:f392fc9709a3 189
AnnaBridge 189:f392fc9709a3 190 DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
AnnaBridge 189:f392fc9709a3 191
AnnaBridge 189:f392fc9709a3 192 DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
AnnaBridge 189:f392fc9709a3 193
AnnaBridge 189:f392fc9709a3 194 HAL_LockTypeDef Lock; /*!< Locking object */
AnnaBridge 189:f392fc9709a3 195
AnnaBridge 189:f392fc9709a3 196 __IO HAL_USART_StateTypeDef State; /*!< USART communication state */
AnnaBridge 189:f392fc9709a3 197
AnnaBridge 189:f392fc9709a3 198 __IO uint32_t ErrorCode; /*!< USART Error code */
AnnaBridge 189:f392fc9709a3 199
AnnaBridge 189:f392fc9709a3 200 }USART_HandleTypeDef;
AnnaBridge 189:f392fc9709a3 201
AnnaBridge 189:f392fc9709a3 202 /**
AnnaBridge 189:f392fc9709a3 203 * @}
AnnaBridge 189:f392fc9709a3 204 */
AnnaBridge 189:f392fc9709a3 205
AnnaBridge 189:f392fc9709a3 206 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 207 /** @defgroup USART_Exported_Constants USART Exported Constants
AnnaBridge 189:f392fc9709a3 208 * @{
AnnaBridge 189:f392fc9709a3 209 */
AnnaBridge 189:f392fc9709a3 210
AnnaBridge 189:f392fc9709a3 211 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
AnnaBridge 189:f392fc9709a3 212 * @{
AnnaBridge 189:f392fc9709a3 213 */
AnnaBridge 189:f392fc9709a3 214 #define USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< USART frame with 0.5 stop bit */
AnnaBridge 189:f392fc9709a3 215 #define USART_STOPBITS_1 0x00000000U /*!< USART frame with 1 stop bit */
AnnaBridge 189:f392fc9709a3 216 #define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */
AnnaBridge 189:f392fc9709a3 217 #define USART_STOPBITS_2 USART_CR2_STOP_1 /*!< USART frame with 2 stop bits */
AnnaBridge 189:f392fc9709a3 218 /**
AnnaBridge 189:f392fc9709a3 219 * @}
AnnaBridge 189:f392fc9709a3 220 */
AnnaBridge 189:f392fc9709a3 221
AnnaBridge 189:f392fc9709a3 222 /** @defgroup USART_Parity USART Parity
AnnaBridge 189:f392fc9709a3 223 * @{
AnnaBridge 189:f392fc9709a3 224 */
AnnaBridge 189:f392fc9709a3 225 #define USART_PARITY_NONE 0x00000000U /*!< No parity */
AnnaBridge 189:f392fc9709a3 226 #define USART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
AnnaBridge 189:f392fc9709a3 227 #define USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
AnnaBridge 189:f392fc9709a3 228 /**
AnnaBridge 189:f392fc9709a3 229 * @}
AnnaBridge 189:f392fc9709a3 230 */
AnnaBridge 189:f392fc9709a3 231
AnnaBridge 189:f392fc9709a3 232 /** @defgroup USART_Mode USART Mode
AnnaBridge 189:f392fc9709a3 233 * @{
AnnaBridge 189:f392fc9709a3 234 */
AnnaBridge 189:f392fc9709a3 235 #define USART_MODE_RX USART_CR1_RE /*!< RX mode */
AnnaBridge 189:f392fc9709a3 236 #define USART_MODE_TX USART_CR1_TE /*!< TX mode */
AnnaBridge 189:f392fc9709a3 237 #define USART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
AnnaBridge 189:f392fc9709a3 238 /**
AnnaBridge 189:f392fc9709a3 239 * @}
AnnaBridge 189:f392fc9709a3 240 */
AnnaBridge 189:f392fc9709a3 241
AnnaBridge 189:f392fc9709a3 242 /** @defgroup USART_Over_Sampling USART Over Sampling
AnnaBridge 189:f392fc9709a3 243 * @{
AnnaBridge 189:f392fc9709a3 244 */
AnnaBridge 189:f392fc9709a3 245 #define USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
AnnaBridge 189:f392fc9709a3 246 #define USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
AnnaBridge 189:f392fc9709a3 247 /**
AnnaBridge 189:f392fc9709a3 248 * @}
AnnaBridge 189:f392fc9709a3 249 */
AnnaBridge 189:f392fc9709a3 250
AnnaBridge 189:f392fc9709a3 251 /** @defgroup USART_Clock USART Clock
AnnaBridge 189:f392fc9709a3 252 * @{
AnnaBridge 189:f392fc9709a3 253 */
AnnaBridge 189:f392fc9709a3 254 #define USART_CLOCK_DISABLE 0x00000000U /*!< USART clock disable */
AnnaBridge 189:f392fc9709a3 255 #define USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< USART clock enable */
AnnaBridge 189:f392fc9709a3 256 /**
AnnaBridge 189:f392fc9709a3 257 * @}
AnnaBridge 189:f392fc9709a3 258 */
AnnaBridge 189:f392fc9709a3 259
AnnaBridge 189:f392fc9709a3 260 /** @defgroup USART_Clock_Polarity USART Clock Polarity
AnnaBridge 189:f392fc9709a3 261 * @{
AnnaBridge 189:f392fc9709a3 262 */
AnnaBridge 189:f392fc9709a3 263 #define USART_POLARITY_LOW 0x00000000U /*!< Driver enable signal is active high */
AnnaBridge 189:f392fc9709a3 264 #define USART_POLARITY_HIGH USART_CR2_CPOL /*!< Driver enable signal is active low */
AnnaBridge 189:f392fc9709a3 265 /**
AnnaBridge 189:f392fc9709a3 266 * @}
AnnaBridge 189:f392fc9709a3 267 */
AnnaBridge 189:f392fc9709a3 268
AnnaBridge 189:f392fc9709a3 269 /** @defgroup USART_Clock_Phase USART Clock Phase
AnnaBridge 189:f392fc9709a3 270 * @{
AnnaBridge 189:f392fc9709a3 271 */
AnnaBridge 189:f392fc9709a3 272 #define USART_PHASE_1EDGE 0x00000000U /*!< USART frame phase on first clock transition */
AnnaBridge 189:f392fc9709a3 273 #define USART_PHASE_2EDGE USART_CR2_CPHA /*!< USART frame phase on second clock transition */
AnnaBridge 189:f392fc9709a3 274 /**
AnnaBridge 189:f392fc9709a3 275 * @}
AnnaBridge 189:f392fc9709a3 276 */
AnnaBridge 189:f392fc9709a3 277
AnnaBridge 189:f392fc9709a3 278 /** @defgroup USART_Last_Bit USART Last Bit
AnnaBridge 189:f392fc9709a3 279 * @{
AnnaBridge 189:f392fc9709a3 280 */
AnnaBridge 189:f392fc9709a3 281 #define USART_LASTBIT_DISABLE 0x00000000U /*!< USART frame last data bit clock pulse not output to SCLK pin */
AnnaBridge 189:f392fc9709a3 282 #define USART_LASTBIT_ENABLE USART_CR2_LBCL /*!< USART frame last data bit clock pulse output to SCLK pin */
AnnaBridge 189:f392fc9709a3 283 /**
AnnaBridge 189:f392fc9709a3 284 * @}
AnnaBridge 189:f392fc9709a3 285 */
AnnaBridge 189:f392fc9709a3 286
AnnaBridge 189:f392fc9709a3 287 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 288 /** @defgroup USART_ClockPrescaler USART Clock Prescaler
AnnaBridge 189:f392fc9709a3 289 * @{
AnnaBridge 189:f392fc9709a3 290 */
AnnaBridge 189:f392fc9709a3 291 #define USART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
AnnaBridge 189:f392fc9709a3 292 #define USART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
AnnaBridge 189:f392fc9709a3 293 #define USART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
AnnaBridge 189:f392fc9709a3 294 #define USART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
AnnaBridge 189:f392fc9709a3 295 #define USART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
AnnaBridge 189:f392fc9709a3 296 #define USART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
AnnaBridge 189:f392fc9709a3 297 #define USART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
AnnaBridge 189:f392fc9709a3 298 #define USART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
AnnaBridge 189:f392fc9709a3 299 #define USART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
AnnaBridge 189:f392fc9709a3 300 #define USART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
AnnaBridge 189:f392fc9709a3 301 #define USART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
AnnaBridge 189:f392fc9709a3 302 #define USART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
AnnaBridge 189:f392fc9709a3 303 /**
AnnaBridge 189:f392fc9709a3 304 * @}
AnnaBridge 189:f392fc9709a3 305 */
AnnaBridge 189:f392fc9709a3 306 #endif
AnnaBridge 189:f392fc9709a3 307
AnnaBridge 189:f392fc9709a3 308 /** @defgroup USART_Request_Parameters USART Request Parameters
AnnaBridge 189:f392fc9709a3 309 * @{
AnnaBridge 189:f392fc9709a3 310 */
AnnaBridge 189:f392fc9709a3 311 #define USART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
AnnaBridge 189:f392fc9709a3 312 #define USART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
AnnaBridge 189:f392fc9709a3 313 /**
AnnaBridge 189:f392fc9709a3 314 * @}
AnnaBridge 189:f392fc9709a3 315 */
AnnaBridge 189:f392fc9709a3 316
AnnaBridge 189:f392fc9709a3 317 /** @defgroup USART_Flags USART Flags
AnnaBridge 189:f392fc9709a3 318 * Elements values convention: 0xXXXX
AnnaBridge 189:f392fc9709a3 319 * - 0xXXXX : Flag mask in the ISR register
AnnaBridge 189:f392fc9709a3 320 * @{
AnnaBridge 189:f392fc9709a3 321 */
AnnaBridge 189:f392fc9709a3 322 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 323 #define USART_FLAG_TXFT USART_ISR_TXFT /*!< USART TXFIFO threshold flag */
AnnaBridge 189:f392fc9709a3 324 #define USART_FLAG_RXFT USART_ISR_RXFT /*!< USART RXFIFO threshold flag */
AnnaBridge 189:f392fc9709a3 325 #define USART_FLAG_RXFF USART_ISR_RXFF /*!< USART RXFIFO Full flag */
AnnaBridge 189:f392fc9709a3 326 #define USART_FLAG_TXFE USART_ISR_TXFE /*!< USART TXFIFO Empty flag */
AnnaBridge 189:f392fc9709a3 327 #define USART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< USART transmit data register empty */
AnnaBridge 189:f392fc9709a3 328 #define USART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< USART TXFIFO not full */
AnnaBridge 189:f392fc9709a3 329 #define USART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< USART read data register not empty */
AnnaBridge 189:f392fc9709a3 330 #define USART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< USART RXFIFO not empty */
AnnaBridge 189:f392fc9709a3 331 #else
AnnaBridge 189:f392fc9709a3 332 #define USART_FLAG_TXE USART_ISR_TXE /*!< USART transmit data register empty */
AnnaBridge 189:f392fc9709a3 333 #define USART_FLAG_RXNE USART_ISR_RXNE /*!< USART read data register not empty */
AnnaBridge 189:f392fc9709a3 334 #endif
AnnaBridge 189:f392fc9709a3 335 #define USART_FLAG_REACK USART_ISR_REACK /*!< USART receive enable acknowledge flag */
AnnaBridge 189:f392fc9709a3 336 #define USART_FLAG_TEACK USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */
AnnaBridge 189:f392fc9709a3 337 #define USART_FLAG_BUSY USART_ISR_BUSY /*!< USART busy flag */
AnnaBridge 189:f392fc9709a3 338 #define USART_FLAG_TC USART_ISR_TC /*!< USART transmission complete */
AnnaBridge 189:f392fc9709a3 339 #define USART_FLAG_IDLE USART_ISR_IDLE /*!< USART idle flag */
AnnaBridge 189:f392fc9709a3 340 #define USART_FLAG_ORE USART_ISR_ORE /*!< USART overrun error */
AnnaBridge 189:f392fc9709a3 341 #define USART_FLAG_NE USART_ISR_NE /*!< USART noise error */
AnnaBridge 189:f392fc9709a3 342 #define USART_FLAG_FE USART_ISR_FE /*!< USART frame error */
AnnaBridge 189:f392fc9709a3 343 #define USART_FLAG_PE USART_ISR_PE /*!< USART parity error */
AnnaBridge 189:f392fc9709a3 344 #if defined(USART_CR2_SLVEN)
AnnaBridge 189:f392fc9709a3 345 #define USART_FLAG_UDR USART_ISR_UDR /*!< SPI slave underrun error flag */
AnnaBridge 189:f392fc9709a3 346 #endif
AnnaBridge 189:f392fc9709a3 347 /**
AnnaBridge 189:f392fc9709a3 348 * @}
AnnaBridge 189:f392fc9709a3 349 */
AnnaBridge 189:f392fc9709a3 350
AnnaBridge 189:f392fc9709a3 351 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
AnnaBridge 189:f392fc9709a3 352 * Elements values convention: 0000ZZZZ0XXYYYYYb
AnnaBridge 189:f392fc9709a3 353 * - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge 189:f392fc9709a3 354 * - XX : Interrupt source register (2bits)
AnnaBridge 189:f392fc9709a3 355 * - 01: CR1 register
AnnaBridge 189:f392fc9709a3 356 * - 10: CR2 register
AnnaBridge 189:f392fc9709a3 357 * - 11: CR3 register
AnnaBridge 189:f392fc9709a3 358 * - ZZZZ : Flag position in the ISR register(4bits)
AnnaBridge 189:f392fc9709a3 359 * @{
AnnaBridge 189:f392fc9709a3 360 */
AnnaBridge 189:f392fc9709a3 361
AnnaBridge 189:f392fc9709a3 362 #define USART_IT_PE 0x0028U /*!< USART parity error interruption */
AnnaBridge 189:f392fc9709a3 363 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 364 #define USART_IT_TXFNF 0x0727U /*!< USART TX FIFO not full interruption */
AnnaBridge 189:f392fc9709a3 365 #define USART_IT_RXFNE 0x0525U /*!< USART RXFIFO not empty interruption */
AnnaBridge 189:f392fc9709a3 366 #define USART_IT_RXFF 0x183FU /*!< USART RXFIFO full interruption */
AnnaBridge 189:f392fc9709a3 367 #define USART_IT_TXFE 0x173EU /*!< USART TXFIFO empty interruption */
AnnaBridge 189:f392fc9709a3 368 #define USART_IT_RXFT 0x1A7CU /*!< USART RXFIFO threshold reached interruption */
AnnaBridge 189:f392fc9709a3 369 #define USART_IT_TXFT 0x1B77U /*!< USART TXFIFO threshold reached interruption */
AnnaBridge 189:f392fc9709a3 370 #endif
AnnaBridge 189:f392fc9709a3 371 #define USART_IT_TXE 0x0727U /*!< USART transmit data register empty interruption */
AnnaBridge 189:f392fc9709a3 372 #define USART_IT_TC 0x0626U /*!< USART transmission complete interruption */
AnnaBridge 189:f392fc9709a3 373 #define USART_IT_RXNE 0x0525U /*!< USART read data register not empty interruption */
AnnaBridge 189:f392fc9709a3 374 #define USART_IT_IDLE 0x0424U /*!< USART idle interruption */
AnnaBridge 189:f392fc9709a3 375 #define USART_IT_ERR 0x0060U /*!< USART error interruption */
AnnaBridge 189:f392fc9709a3 376 #define USART_IT_ORE 0x0300U /*!< USART overrun error interruption */
AnnaBridge 189:f392fc9709a3 377 #define USART_IT_NE 0x0200U /*!< USART noise error interruption */
AnnaBridge 189:f392fc9709a3 378 #define USART_IT_FE 0x0100U /*!< USART frame error interruption */
AnnaBridge 189:f392fc9709a3 379
AnnaBridge 189:f392fc9709a3 380 /**
AnnaBridge 189:f392fc9709a3 381 * @}
AnnaBridge 189:f392fc9709a3 382 */
AnnaBridge 189:f392fc9709a3 383
AnnaBridge 189:f392fc9709a3 384 /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
AnnaBridge 189:f392fc9709a3 385 * @{
AnnaBridge 189:f392fc9709a3 386 */
AnnaBridge 189:f392fc9709a3 387 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
AnnaBridge 189:f392fc9709a3 388 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
AnnaBridge 189:f392fc9709a3 389 #define USART_CLEAR_NEF USART_ICR_NECF /*!< Noise detected Clear Flag */
AnnaBridge 189:f392fc9709a3 390 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
AnnaBridge 189:f392fc9709a3 391 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
AnnaBridge 189:f392fc9709a3 392 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
AnnaBridge 189:f392fc9709a3 393 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 394 #define USART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO Empty Clear Flag */
AnnaBridge 189:f392fc9709a3 395 #endif
AnnaBridge 189:f392fc9709a3 396 #if defined(USART_CR2_SLVEN)
AnnaBridge 189:f392fc9709a3 397 #define USART_CLEAR_UDRF USART_ICR_UDRCF /*!< SPI slave underrun error Clear Flag */
AnnaBridge 189:f392fc9709a3 398 #endif
AnnaBridge 189:f392fc9709a3 399 /**
AnnaBridge 189:f392fc9709a3 400 * @}
AnnaBridge 189:f392fc9709a3 401 */
AnnaBridge 189:f392fc9709a3 402
AnnaBridge 189:f392fc9709a3 403 /** @defgroup USART_Interruption_Mask USART Interruption Flags Mask
AnnaBridge 189:f392fc9709a3 404 * @{
AnnaBridge 189:f392fc9709a3 405 */
AnnaBridge 189:f392fc9709a3 406 #define USART_IT_MASK 0x001FU /*!< USART interruptions flags mask */
AnnaBridge 189:f392fc9709a3 407 /**
AnnaBridge 189:f392fc9709a3 408 * @}
AnnaBridge 189:f392fc9709a3 409 */
AnnaBridge 189:f392fc9709a3 410
AnnaBridge 189:f392fc9709a3 411 /**
AnnaBridge 189:f392fc9709a3 412 * @}
AnnaBridge 189:f392fc9709a3 413 */
AnnaBridge 189:f392fc9709a3 414
AnnaBridge 189:f392fc9709a3 415 /* Exported macros -----------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 416 /** @defgroup USART_Exported_Macros USART Exported Macros
AnnaBridge 189:f392fc9709a3 417 * @{
AnnaBridge 189:f392fc9709a3 418 */
AnnaBridge 189:f392fc9709a3 419
AnnaBridge 189:f392fc9709a3 420 /** @brief Reset USART handle state.
AnnaBridge 189:f392fc9709a3 421 * @param __HANDLE__ USART handle.
AnnaBridge 189:f392fc9709a3 422 * @retval None
AnnaBridge 189:f392fc9709a3 423 */
AnnaBridge 189:f392fc9709a3 424 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
AnnaBridge 189:f392fc9709a3 425
AnnaBridge 189:f392fc9709a3 426 /** @brief Check whether the specified USART flag is set or not.
AnnaBridge 189:f392fc9709a3 427 * @param __HANDLE__ specifies the USART Handle
AnnaBridge 189:f392fc9709a3 428 * @param __FLAG__ specifies the flag to check.
AnnaBridge 189:f392fc9709a3 429 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 430 * @arg @ref USART_FLAG_TXFT TXFIFO threshold flag
AnnaBridge 189:f392fc9709a3 431 * @arg @ref USART_FLAG_RXFT RXFIFO threshold flag
AnnaBridge 189:f392fc9709a3 432 * @arg @ref USART_FLAG_RXFF RXFIFO Full flag
AnnaBridge 189:f392fc9709a3 433 * @arg @ref USART_FLAG_TXFE TXFIFO Empty flag
AnnaBridge 189:f392fc9709a3 434 * @arg @ref USART_FLAG_REACK Receive enable acknowledge flag
AnnaBridge 189:f392fc9709a3 435 * @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag
AnnaBridge 189:f392fc9709a3 436 * @arg @ref USART_FLAG_BUSY Busy flag
AnnaBridge 189:f392fc9709a3 437 * @arg @ref USART_FLAG_UDR SPI slave underrun error flag
AnnaBridge 189:f392fc9709a3 438 * @arg @ref USART_FLAG_TXE Transmit data register empty flag
AnnaBridge 189:f392fc9709a3 439 * @arg @ref USART_FLAG_TXFNF TXFIFO not full flag
AnnaBridge 189:f392fc9709a3 440 * @arg @ref USART_FLAG_TC Transmission Complete flag
AnnaBridge 189:f392fc9709a3 441 * @arg @ref USART_FLAG_RXNE Receive data register not empty flag
AnnaBridge 189:f392fc9709a3 442 * @arg @ref USART_FLAG_RXFNE RXFIFO not empty flag
AnnaBridge 189:f392fc9709a3 443 * @arg @ref USART_FLAG_IDLE Idle Line detection flag
AnnaBridge 189:f392fc9709a3 444 * @arg @ref USART_FLAG_ORE OverRun Error flag
AnnaBridge 189:f392fc9709a3 445 * @arg @ref USART_FLAG_NE Noise Error flag
AnnaBridge 189:f392fc9709a3 446 * @arg @ref USART_FLAG_FE Framing Error flag
AnnaBridge 189:f392fc9709a3 447 * @arg @ref USART_FLAG_PE Parity Error flag
AnnaBridge 189:f392fc9709a3 448 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 189:f392fc9709a3 449 */
AnnaBridge 189:f392fc9709a3 450 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
AnnaBridge 189:f392fc9709a3 451
AnnaBridge 189:f392fc9709a3 452 /** @brief Clear the specified USART pending flag.
AnnaBridge 189:f392fc9709a3 453 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 454 * @param __FLAG__ specifies the flag to check.
AnnaBridge 189:f392fc9709a3 455 * This parameter can be any combination of the following values:
AnnaBridge 189:f392fc9709a3 456 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
AnnaBridge 189:f392fc9709a3 457 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
AnnaBridge 189:f392fc9709a3 458 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
AnnaBridge 189:f392fc9709a3 459 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
AnnaBridge 189:f392fc9709a3 460 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
AnnaBridge 189:f392fc9709a3 461 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag
AnnaBridge 189:f392fc9709a3 462 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
AnnaBridge 189:f392fc9709a3 463 * @arg @ref USART_CLEAR_UDRF SPI slave underrun error Clear Flag
AnnaBridge 189:f392fc9709a3 464 * @retval None
AnnaBridge 189:f392fc9709a3 465 */
AnnaBridge 189:f392fc9709a3 466 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge 189:f392fc9709a3 467
AnnaBridge 189:f392fc9709a3 468 /** @brief Clear the USART PE pending flag.
AnnaBridge 189:f392fc9709a3 469 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 470 * @retval None
AnnaBridge 189:f392fc9709a3 471 */
AnnaBridge 189:f392fc9709a3 472 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF)
AnnaBridge 189:f392fc9709a3 473
AnnaBridge 189:f392fc9709a3 474 /** @brief Clear the USART FE pending flag.
AnnaBridge 189:f392fc9709a3 475 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 476 * @retval None
AnnaBridge 189:f392fc9709a3 477 */
AnnaBridge 189:f392fc9709a3 478 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF)
AnnaBridge 189:f392fc9709a3 479
AnnaBridge 189:f392fc9709a3 480 /** @brief Clear the USART NE pending flag.
AnnaBridge 189:f392fc9709a3 481 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 482 * @retval None
AnnaBridge 189:f392fc9709a3 483 */
AnnaBridge 189:f392fc9709a3 484 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF)
AnnaBridge 189:f392fc9709a3 485
AnnaBridge 189:f392fc9709a3 486 /** @brief Clear the USART ORE pending flag.
AnnaBridge 189:f392fc9709a3 487 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 488 * @retval None
AnnaBridge 189:f392fc9709a3 489 */
AnnaBridge 189:f392fc9709a3 490 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF)
AnnaBridge 189:f392fc9709a3 491
AnnaBridge 189:f392fc9709a3 492 /** @brief Clear the USART IDLE pending flag.
AnnaBridge 189:f392fc9709a3 493 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 494 * @retval None
AnnaBridge 189:f392fc9709a3 495 */
AnnaBridge 189:f392fc9709a3 496 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
AnnaBridge 189:f392fc9709a3 497
AnnaBridge 189:f392fc9709a3 498 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 499 /** @brief Clear the USART TX FIFO empty clear flag.
AnnaBridge 189:f392fc9709a3 500 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 501 * @retval None
AnnaBridge 189:f392fc9709a3 502 */
AnnaBridge 189:f392fc9709a3 503 #define __HAL_USART_CLEAR_TXFECF(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_TXFECF)
AnnaBridge 189:f392fc9709a3 504 #endif
AnnaBridge 189:f392fc9709a3 505
AnnaBridge 189:f392fc9709a3 506 #if defined(USART_CR2_SLVEN)
AnnaBridge 189:f392fc9709a3 507 /** @brief Clear SPI slave underrun error flag.
AnnaBridge 189:f392fc9709a3 508 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 509 * @retval None
AnnaBridge 189:f392fc9709a3 510 */
AnnaBridge 189:f392fc9709a3 511 #define __HAL_USART_CLEAR_UDRFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_UDRF)
AnnaBridge 189:f392fc9709a3 512 #endif
AnnaBridge 189:f392fc9709a3 513
AnnaBridge 189:f392fc9709a3 514 /** @brief Enable the specified USART interrupt.
AnnaBridge 189:f392fc9709a3 515 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 516 * @param __INTERRUPT__ specifies the USART interrupt source to enable.
AnnaBridge 189:f392fc9709a3 517 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 518 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
AnnaBridge 189:f392fc9709a3 519 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
AnnaBridge 189:f392fc9709a3 520 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 521 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 522 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 189:f392fc9709a3 523 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
AnnaBridge 189:f392fc9709a3 524 * @arg @ref USART_IT_TC Transmission complete interrupt
AnnaBridge 189:f392fc9709a3 525 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 189:f392fc9709a3 526 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
AnnaBridge 189:f392fc9709a3 527 * @arg @ref USART_IT_IDLE Idle line detection interrupt
AnnaBridge 189:f392fc9709a3 528 * @arg @ref USART_IT_PE Parity Error interrupt
AnnaBridge 189:f392fc9709a3 529 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
AnnaBridge 189:f392fc9709a3 530 * @retval None
AnnaBridge 189:f392fc9709a3 531 */
AnnaBridge 189:f392fc9709a3 532 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
AnnaBridge 189:f392fc9709a3 533 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
AnnaBridge 189:f392fc9709a3 534 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
AnnaBridge 189:f392fc9709a3 535
AnnaBridge 189:f392fc9709a3 536 /** @brief Disable the specified USART interrupt.
AnnaBridge 189:f392fc9709a3 537 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 538 * @param __INTERRUPT__ specifies the USART interrupt source to disable.
AnnaBridge 189:f392fc9709a3 539 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 540 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
AnnaBridge 189:f392fc9709a3 541 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
AnnaBridge 189:f392fc9709a3 542 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 543 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 544 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 189:f392fc9709a3 545 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
AnnaBridge 189:f392fc9709a3 546 * @arg @ref USART_IT_TC Transmission complete interrupt
AnnaBridge 189:f392fc9709a3 547 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 189:f392fc9709a3 548 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
AnnaBridge 189:f392fc9709a3 549 * @arg @ref USART_IT_IDLE Idle line detection interrupt
AnnaBridge 189:f392fc9709a3 550 * @arg @ref USART_IT_PE Parity Error interrupt
AnnaBridge 189:f392fc9709a3 551 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
AnnaBridge 189:f392fc9709a3 552 * @retval None
AnnaBridge 189:f392fc9709a3 553 */
AnnaBridge 189:f392fc9709a3 554 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
AnnaBridge 189:f392fc9709a3 555 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
AnnaBridge 189:f392fc9709a3 556 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
AnnaBridge 189:f392fc9709a3 557
AnnaBridge 189:f392fc9709a3 558
AnnaBridge 189:f392fc9709a3 559 /** @brief Check whether the specified USART interrupt has occurred or not.
AnnaBridge 189:f392fc9709a3 560 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 561 * @param __INTERRUPT__ specifies the USART interrupt source to check.
AnnaBridge 189:f392fc9709a3 562 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 563 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
AnnaBridge 189:f392fc9709a3 564 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
AnnaBridge 189:f392fc9709a3 565 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 566 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 567 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 189:f392fc9709a3 568 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
AnnaBridge 189:f392fc9709a3 569 * @arg @ref USART_IT_TC Transmission complete interrupt
AnnaBridge 189:f392fc9709a3 570 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 189:f392fc9709a3 571 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
AnnaBridge 189:f392fc9709a3 572 * @arg @ref USART_IT_IDLE Idle line detection interrupt
AnnaBridge 189:f392fc9709a3 573 * @arg @ref USART_IT_ORE OverRun Error interrupt
AnnaBridge 189:f392fc9709a3 574 * @arg @ref USART_IT_NE Noise Error interrupt
AnnaBridge 189:f392fc9709a3 575 * @arg @ref USART_IT_FE Framing Error interrupt
AnnaBridge 189:f392fc9709a3 576 * @arg @ref USART_IT_PE Parity Error interrupt
AnnaBridge 189:f392fc9709a3 577 * @retval The new state of __INTERRUPT__ (SET or RESET).
AnnaBridge 189:f392fc9709a3 578 */
AnnaBridge 189:f392fc9709a3 579 #define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__INTERRUPT__)>> 0x08))) != RESET) ? SET : RESET)
AnnaBridge 189:f392fc9709a3 580
AnnaBridge 189:f392fc9709a3 581 /** @brief Check whether the specified USART interrupt source is enabled or not.
AnnaBridge 189:f392fc9709a3 582 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 583 * @param __INTERRUPT__ specifies the USART interrupt source to check.
AnnaBridge 189:f392fc9709a3 584 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 585 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt
AnnaBridge 189:f392fc9709a3 586 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt
AnnaBridge 189:f392fc9709a3 587 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 588 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 589 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 189:f392fc9709a3 590 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt
AnnaBridge 189:f392fc9709a3 591 * @arg @ref USART_IT_TC Transmission complete interrupt
AnnaBridge 189:f392fc9709a3 592 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 189:f392fc9709a3 593 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt
AnnaBridge 189:f392fc9709a3 594 * @arg @ref USART_IT_IDLE Idle line detection interrupt
AnnaBridge 189:f392fc9709a3 595 * @arg @ref USART_IT_ORE OverRun Error interrupt
AnnaBridge 189:f392fc9709a3 596 * @arg @ref USART_IT_NE Noise Error interrupt
AnnaBridge 189:f392fc9709a3 597 * @arg @ref USART_IT_FE Framing Error interrupt
AnnaBridge 189:f392fc9709a3 598 * @arg @ref USART_IT_PE Parity Error interrupt
AnnaBridge 189:f392fc9709a3 599 * @retval The new state of __INTERRUPT__ (SET or RESET).
AnnaBridge 189:f392fc9709a3 600 */
AnnaBridge 189:f392fc9709a3 601 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U) ? (__HANDLE__)->Instance->CR1 : \
AnnaBridge 189:f392fc9709a3 602 (((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U) ? (__HANDLE__)->Instance->CR2 : \
AnnaBridge 189:f392fc9709a3 603 (__HANDLE__)->Instance->CR3)) & (0x01U << (((uint16_t)(__INTERRUPT__)) & USART_IT_MASK))) != RESET) ? SET : RESET)
AnnaBridge 189:f392fc9709a3 604
AnnaBridge 189:f392fc9709a3 605
AnnaBridge 189:f392fc9709a3 606 /** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag.
AnnaBridge 189:f392fc9709a3 607 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 608 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
AnnaBridge 189:f392fc9709a3 609 * to clear the corresponding interrupt.
AnnaBridge 189:f392fc9709a3 610 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 611 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
AnnaBridge 189:f392fc9709a3 612 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
AnnaBridge 189:f392fc9709a3 613 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
AnnaBridge 189:f392fc9709a3 614 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
AnnaBridge 189:f392fc9709a3 615 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
AnnaBridge 189:f392fc9709a3 616 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag
AnnaBridge 189:f392fc9709a3 617 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
AnnaBridge 189:f392fc9709a3 618 * @retval None
AnnaBridge 189:f392fc9709a3 619 */
AnnaBridge 189:f392fc9709a3 620 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
AnnaBridge 189:f392fc9709a3 621
AnnaBridge 189:f392fc9709a3 622 /** @brief Set a specific USART request flag.
AnnaBridge 189:f392fc9709a3 623 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 624 * @param __REQ__ specifies the request flag to set.
AnnaBridge 189:f392fc9709a3 625 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 626 * @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request
AnnaBridge 189:f392fc9709a3 627 * @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request
AnnaBridge 189:f392fc9709a3 628 *
AnnaBridge 189:f392fc9709a3 629 * @retval None
AnnaBridge 189:f392fc9709a3 630 */
AnnaBridge 189:f392fc9709a3 631 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__))
AnnaBridge 189:f392fc9709a3 632
AnnaBridge 189:f392fc9709a3 633 /** @brief Enable the USART one bit sample method.
AnnaBridge 189:f392fc9709a3 634 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 635 * @retval None
AnnaBridge 189:f392fc9709a3 636 */
AnnaBridge 189:f392fc9709a3 637 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
AnnaBridge 189:f392fc9709a3 638
AnnaBridge 189:f392fc9709a3 639 /** @brief Disable the USART one bit sample method.
AnnaBridge 189:f392fc9709a3 640 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 641 * @retval None
AnnaBridge 189:f392fc9709a3 642 */
AnnaBridge 189:f392fc9709a3 643 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
AnnaBridge 189:f392fc9709a3 644
AnnaBridge 189:f392fc9709a3 645 /** @brief Enable USART.
AnnaBridge 189:f392fc9709a3 646 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 647 * @retval None
AnnaBridge 189:f392fc9709a3 648 */
AnnaBridge 189:f392fc9709a3 649 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
AnnaBridge 189:f392fc9709a3 650
AnnaBridge 189:f392fc9709a3 651 /** @brief Disable USART.
AnnaBridge 189:f392fc9709a3 652 * @param __HANDLE__ specifies the USART Handle.
AnnaBridge 189:f392fc9709a3 653 * @retval None
AnnaBridge 189:f392fc9709a3 654 */
AnnaBridge 189:f392fc9709a3 655 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
AnnaBridge 189:f392fc9709a3 656
AnnaBridge 189:f392fc9709a3 657 /**
AnnaBridge 189:f392fc9709a3 658 * @}
AnnaBridge 189:f392fc9709a3 659 */
AnnaBridge 189:f392fc9709a3 660
AnnaBridge 189:f392fc9709a3 661 /* Private variables -----------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 662 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 663 /** @defgroup USART_Private_Variables USART Private Variables
AnnaBridge 189:f392fc9709a3 664 * @{
AnnaBridge 189:f392fc9709a3 665 */
AnnaBridge 189:f392fc9709a3 666 static const uint16_t USARTPrescTable[12] = {1, 2, 4, 6, 8, 10, 12, 16, 32, 64, 128, 256};
AnnaBridge 189:f392fc9709a3 667 /**
AnnaBridge 189:f392fc9709a3 668 * @}
AnnaBridge 189:f392fc9709a3 669 */
AnnaBridge 189:f392fc9709a3 670 #endif
AnnaBridge 189:f392fc9709a3 671
AnnaBridge 189:f392fc9709a3 672 /* Private macros --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 673 /** @defgroup USART_Private_Macros USART Private Macros
AnnaBridge 189:f392fc9709a3 674 * @{
AnnaBridge 189:f392fc9709a3 675 */
AnnaBridge 189:f392fc9709a3 676
AnnaBridge 189:f392fc9709a3 677 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 678 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
AnnaBridge 189:f392fc9709a3 679 * @param __PCLK__ USART clock.
AnnaBridge 189:f392fc9709a3 680 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 189:f392fc9709a3 681 * @param __CLOCKPRESCALER__ UART prescaler value.
AnnaBridge 189:f392fc9709a3 682 * @retval Division result
AnnaBridge 189:f392fc9709a3 683 */
AnnaBridge 189:f392fc9709a3 684 #define USART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/USARTPrescTable[(__CLOCKPRESCALER__)])*2) + ((__BAUD__)/2)) / (__BAUD__))
AnnaBridge 189:f392fc9709a3 685 #else
AnnaBridge 189:f392fc9709a3 686 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
AnnaBridge 189:f392fc9709a3 687 * @param __PCLK__ USART clock.
AnnaBridge 189:f392fc9709a3 688 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 189:f392fc9709a3 689 * @retval Division result
AnnaBridge 189:f392fc9709a3 690 */
AnnaBridge 189:f392fc9709a3 691 #define USART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2) + ((__BAUD__)/2)) / (__BAUD__))
AnnaBridge 189:f392fc9709a3 692 #endif
AnnaBridge 189:f392fc9709a3 693
AnnaBridge 189:f392fc9709a3 694 /** @brief Check USART Baud rate.
AnnaBridge 189:f392fc9709a3 695 * @param __BAUDRATE__ Baudrate specified by the user.
AnnaBridge 189:f392fc9709a3 696 * The maximum Baud Rate is derived from the maximum clock on L4
AnnaBridge 189:f392fc9709a3 697 * divided by the smallest oversampling used on the USART (i.e. 8)
AnnaBridge 189:f392fc9709a3 698 * (i.e. 120 MHz on STM32L4Rx/L4Sx, 80 Mhz otherwise)
AnnaBridge 189:f392fc9709a3 699 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) */
AnnaBridge 189:f392fc9709a3 700 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
AnnaBridge 189:f392fc9709a3 701 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15000001U)
AnnaBridge 189:f392fc9709a3 702 #else
AnnaBridge 189:f392fc9709a3 703 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001U)
AnnaBridge 189:f392fc9709a3 704 #endif
AnnaBridge 189:f392fc9709a3 705
AnnaBridge 189:f392fc9709a3 706 /**
AnnaBridge 189:f392fc9709a3 707 * @brief Ensure that USART frame number of stop bits is valid.
AnnaBridge 189:f392fc9709a3 708 * @param __STOPBITS__ USART frame number of stop bits.
AnnaBridge 189:f392fc9709a3 709 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
AnnaBridge 189:f392fc9709a3 710 */
AnnaBridge 189:f392fc9709a3 711 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \
AnnaBridge 189:f392fc9709a3 712 ((__STOPBITS__) == USART_STOPBITS_1) || \
AnnaBridge 189:f392fc9709a3 713 ((__STOPBITS__) == USART_STOPBITS_1_5) || \
AnnaBridge 189:f392fc9709a3 714 ((__STOPBITS__) == USART_STOPBITS_2))
AnnaBridge 189:f392fc9709a3 715
AnnaBridge 189:f392fc9709a3 716 /**
AnnaBridge 189:f392fc9709a3 717 * @brief Ensure that USART frame parity is valid.
AnnaBridge 189:f392fc9709a3 718 * @param __PARITY__ USART frame parity.
AnnaBridge 189:f392fc9709a3 719 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
AnnaBridge 189:f392fc9709a3 720 */
AnnaBridge 189:f392fc9709a3 721 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
AnnaBridge 189:f392fc9709a3 722 ((__PARITY__) == USART_PARITY_EVEN) || \
AnnaBridge 189:f392fc9709a3 723 ((__PARITY__) == USART_PARITY_ODD))
AnnaBridge 189:f392fc9709a3 724
AnnaBridge 189:f392fc9709a3 725 /**
AnnaBridge 189:f392fc9709a3 726 * @brief Ensure that USART communication mode is valid.
AnnaBridge 189:f392fc9709a3 727 * @param __MODE__ USART communication mode.
AnnaBridge 189:f392fc9709a3 728 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
AnnaBridge 189:f392fc9709a3 729 */
AnnaBridge 189:f392fc9709a3 730 #define IS_USART_MODE(__MODE__) ((((__MODE__) & (uint32_t)0xFFFFFFF3U) == 0x00U) && ((__MODE__) != (uint32_t)0x00U))
AnnaBridge 189:f392fc9709a3 731
AnnaBridge 189:f392fc9709a3 732 /**
AnnaBridge 189:f392fc9709a3 733 * @brief Ensure that USART oversampling is valid.
AnnaBridge 189:f392fc9709a3 734 * @param __SAMPLING__ USART oversampling.
AnnaBridge 189:f392fc9709a3 735 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
AnnaBridge 189:f392fc9709a3 736 */
AnnaBridge 189:f392fc9709a3 737 #define IS_USART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == USART_OVERSAMPLING_16) || \
AnnaBridge 189:f392fc9709a3 738 ((__SAMPLING__) == USART_OVERSAMPLING_8))
AnnaBridge 189:f392fc9709a3 739
AnnaBridge 189:f392fc9709a3 740 /**
AnnaBridge 189:f392fc9709a3 741 * @brief Ensure that USART clock state is valid.
AnnaBridge 189:f392fc9709a3 742 * @param __CLOCK__ USART clock state.
AnnaBridge 189:f392fc9709a3 743 * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid)
AnnaBridge 189:f392fc9709a3 744 */
AnnaBridge 189:f392fc9709a3 745 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \
AnnaBridge 189:f392fc9709a3 746 ((__CLOCK__) == USART_CLOCK_ENABLE))
AnnaBridge 189:f392fc9709a3 747
AnnaBridge 189:f392fc9709a3 748 /**
AnnaBridge 189:f392fc9709a3 749 * @brief Ensure that USART frame polarity is valid.
AnnaBridge 189:f392fc9709a3 750 * @param __CPOL__ USART frame polarity.
AnnaBridge 189:f392fc9709a3 751 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
AnnaBridge 189:f392fc9709a3 752 */
AnnaBridge 189:f392fc9709a3 753 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
AnnaBridge 189:f392fc9709a3 754
AnnaBridge 189:f392fc9709a3 755 /**
AnnaBridge 189:f392fc9709a3 756 * @brief Ensure that USART frame phase is valid.
AnnaBridge 189:f392fc9709a3 757 * @param __CPHA__ USART frame phase.
AnnaBridge 189:f392fc9709a3 758 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
AnnaBridge 189:f392fc9709a3 759 */
AnnaBridge 189:f392fc9709a3 760 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
AnnaBridge 189:f392fc9709a3 761
AnnaBridge 189:f392fc9709a3 762 /**
AnnaBridge 189:f392fc9709a3 763 * @brief Ensure that USART frame last bit clock pulse setting is valid.
AnnaBridge 189:f392fc9709a3 764 * @param __LASTBIT__ USART frame last bit clock pulse setting.
AnnaBridge 189:f392fc9709a3 765 * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid)
AnnaBridge 189:f392fc9709a3 766 */
AnnaBridge 189:f392fc9709a3 767 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
AnnaBridge 189:f392fc9709a3 768 ((__LASTBIT__) == USART_LASTBIT_ENABLE))
AnnaBridge 189:f392fc9709a3 769
AnnaBridge 189:f392fc9709a3 770 /**
AnnaBridge 189:f392fc9709a3 771 * @brief Ensure that USART request parameter is valid.
AnnaBridge 189:f392fc9709a3 772 * @param __PARAM__ USART request parameter.
AnnaBridge 189:f392fc9709a3 773 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
AnnaBridge 189:f392fc9709a3 774 */
AnnaBridge 189:f392fc9709a3 775 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \
AnnaBridge 189:f392fc9709a3 776 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST))
AnnaBridge 189:f392fc9709a3 777
AnnaBridge 189:f392fc9709a3 778 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 779 /**
AnnaBridge 189:f392fc9709a3 780 * @brief Ensure that USART Prescaler is valid.
AnnaBridge 189:f392fc9709a3 781 * @param __CLOCKPRESCALER__ USART Prescaler value.
AnnaBridge 189:f392fc9709a3 782 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
AnnaBridge 189:f392fc9709a3 783 */
AnnaBridge 189:f392fc9709a3 784 #define IS_USART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) || \
AnnaBridge 189:f392fc9709a3 785 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) || \
AnnaBridge 189:f392fc9709a3 786 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) || \
AnnaBridge 189:f392fc9709a3 787 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) || \
AnnaBridge 189:f392fc9709a3 788 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) || \
AnnaBridge 189:f392fc9709a3 789 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) || \
AnnaBridge 189:f392fc9709a3 790 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) || \
AnnaBridge 189:f392fc9709a3 791 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) || \
AnnaBridge 189:f392fc9709a3 792 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) || \
AnnaBridge 189:f392fc9709a3 793 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) || \
AnnaBridge 189:f392fc9709a3 794 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) || \
AnnaBridge 189:f392fc9709a3 795 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256))
AnnaBridge 189:f392fc9709a3 796
AnnaBridge 189:f392fc9709a3 797 #endif
AnnaBridge 189:f392fc9709a3 798 /**
AnnaBridge 189:f392fc9709a3 799 * @}
AnnaBridge 189:f392fc9709a3 800 */
AnnaBridge 189:f392fc9709a3 801
AnnaBridge 189:f392fc9709a3 802 /* Include USART HAL Extended module */
AnnaBridge 189:f392fc9709a3 803 #include "stm32l4xx_hal_usart_ex.h"
AnnaBridge 189:f392fc9709a3 804
AnnaBridge 189:f392fc9709a3 805 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 806 /** @addtogroup USART_Exported_Functions USART Exported Functions
AnnaBridge 189:f392fc9709a3 807 * @{
AnnaBridge 189:f392fc9709a3 808 */
AnnaBridge 189:f392fc9709a3 809
AnnaBridge 189:f392fc9709a3 810 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 189:f392fc9709a3 811 * @{
AnnaBridge 189:f392fc9709a3 812 */
AnnaBridge 189:f392fc9709a3 813
AnnaBridge 189:f392fc9709a3 814 /* Initialization and de-initialization functions ****************************/
AnnaBridge 189:f392fc9709a3 815 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 816 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 817 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 818 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 819
AnnaBridge 189:f392fc9709a3 820 /**
AnnaBridge 189:f392fc9709a3 821 * @}
AnnaBridge 189:f392fc9709a3 822 */
AnnaBridge 189:f392fc9709a3 823
AnnaBridge 189:f392fc9709a3 824 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions
AnnaBridge 189:f392fc9709a3 825 * @{
AnnaBridge 189:f392fc9709a3 826 */
AnnaBridge 189:f392fc9709a3 827
AnnaBridge 189:f392fc9709a3 828 /* IO operation functions *****************************************************/
AnnaBridge 189:f392fc9709a3 829 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 830 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 831 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 832 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 833 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 834 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 835 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 836 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 837 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 838 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 839 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 840 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 841 /* Transfer Abort functions */
AnnaBridge 189:f392fc9709a3 842 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 843 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 844
AnnaBridge 189:f392fc9709a3 845 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 846 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 847 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 848 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 849 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 850 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 851 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 852 void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 853
AnnaBridge 189:f392fc9709a3 854 /**
AnnaBridge 189:f392fc9709a3 855 * @}
AnnaBridge 189:f392fc9709a3 856 */
AnnaBridge 189:f392fc9709a3 857
AnnaBridge 189:f392fc9709a3 858 /** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions
AnnaBridge 189:f392fc9709a3 859 * @{
AnnaBridge 189:f392fc9709a3 860 */
AnnaBridge 189:f392fc9709a3 861
AnnaBridge 189:f392fc9709a3 862 /* Peripheral State and Error functions ***************************************/
AnnaBridge 189:f392fc9709a3 863 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 864 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
AnnaBridge 189:f392fc9709a3 865
AnnaBridge 189:f392fc9709a3 866 /**
AnnaBridge 189:f392fc9709a3 867 * @}
AnnaBridge 189:f392fc9709a3 868 */
AnnaBridge 189:f392fc9709a3 869
AnnaBridge 189:f392fc9709a3 870 /**
AnnaBridge 189:f392fc9709a3 871 * @}
AnnaBridge 189:f392fc9709a3 872 */
AnnaBridge 189:f392fc9709a3 873
AnnaBridge 189:f392fc9709a3 874 /**
AnnaBridge 189:f392fc9709a3 875 * @}
AnnaBridge 189:f392fc9709a3 876 */
AnnaBridge 189:f392fc9709a3 877
AnnaBridge 189:f392fc9709a3 878 /**
AnnaBridge 189:f392fc9709a3 879 * @}
AnnaBridge 189:f392fc9709a3 880 */
AnnaBridge 189:f392fc9709a3 881
AnnaBridge 189:f392fc9709a3 882 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 883 }
AnnaBridge 189:f392fc9709a3 884 #endif
AnnaBridge 189:f392fc9709a3 885
AnnaBridge 189:f392fc9709a3 886 #endif /* __STM32L4xx_HAL_USART_H */
AnnaBridge 189:f392fc9709a3 887
AnnaBridge 189:f392fc9709a3 888 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/