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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_IAR/stm32l4xx_hal_uart_ex.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @file stm32l4xx_hal_uart_ex.h |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @author MCD Application Team |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @brief Header file of UART HAL Extended module. |
| AnnaBridge | 189:f392fc9709a3 | 6 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 7 | * @attention |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 20 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 21 | * |
| AnnaBridge | 189:f392fc9709a3 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 32 | * |
| AnnaBridge | 189:f392fc9709a3 | 33 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 34 | */ |
| AnnaBridge | 189:f392fc9709a3 | 35 | |
| AnnaBridge | 189:f392fc9709a3 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | #ifndef __STM32L4xx_HAL_UART_EX_H |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __STM32L4xx_HAL_UART_EX_H |
| AnnaBridge | 189:f392fc9709a3 | 39 | |
| AnnaBridge | 189:f392fc9709a3 | 40 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 41 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 42 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 45 | #include "stm32l4xx_hal_def.h" |
| AnnaBridge | 189:f392fc9709a3 | 46 | |
| AnnaBridge | 189:f392fc9709a3 | 47 | /** @addtogroup STM32L4xx_HAL_Driver |
| AnnaBridge | 189:f392fc9709a3 | 48 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 49 | */ |
| AnnaBridge | 189:f392fc9709a3 | 50 | |
| AnnaBridge | 189:f392fc9709a3 | 51 | /** @addtogroup UARTEx |
| AnnaBridge | 189:f392fc9709a3 | 52 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 53 | */ |
| AnnaBridge | 189:f392fc9709a3 | 54 | |
| AnnaBridge | 189:f392fc9709a3 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 56 | /** @defgroup UARTEx_Exported_Types UARTEx Exported Types |
| AnnaBridge | 189:f392fc9709a3 | 57 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 58 | */ |
| AnnaBridge | 189:f392fc9709a3 | 59 | |
| AnnaBridge | 189:f392fc9709a3 | 60 | /** |
| AnnaBridge | 189:f392fc9709a3 | 61 | * @brief UART wake up from stop mode parameters |
| AnnaBridge | 189:f392fc9709a3 | 62 | */ |
| AnnaBridge | 189:f392fc9709a3 | 63 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 64 | { |
| AnnaBridge | 189:f392fc9709a3 | 65 | uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF). |
| AnnaBridge | 189:f392fc9709a3 | 66 | This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. |
| AnnaBridge | 189:f392fc9709a3 | 67 | If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must |
| AnnaBridge | 189:f392fc9709a3 | 68 | be filled up. */ |
| AnnaBridge | 189:f392fc9709a3 | 69 | |
| AnnaBridge | 189:f392fc9709a3 | 70 | uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. |
| AnnaBridge | 189:f392fc9709a3 | 71 | This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ |
| AnnaBridge | 189:f392fc9709a3 | 72 | |
| AnnaBridge | 189:f392fc9709a3 | 73 | uint8_t Address; /*!< UART/USART node address (7-bit long max). */ |
| AnnaBridge | 189:f392fc9709a3 | 74 | } UART_WakeUpTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 75 | |
| AnnaBridge | 189:f392fc9709a3 | 76 | /** |
| AnnaBridge | 189:f392fc9709a3 | 77 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 78 | */ |
| AnnaBridge | 189:f392fc9709a3 | 79 | |
| AnnaBridge | 189:f392fc9709a3 | 80 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 81 | /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants |
| AnnaBridge | 189:f392fc9709a3 | 82 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 83 | */ |
| AnnaBridge | 189:f392fc9709a3 | 84 | |
| AnnaBridge | 189:f392fc9709a3 | 85 | /** @defgroup UARTEx_Word_Length UARTEx Word Length |
| AnnaBridge | 189:f392fc9709a3 | 86 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 87 | */ |
| AnnaBridge | 189:f392fc9709a3 | 88 | #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ |
| AnnaBridge | 189:f392fc9709a3 | 89 | #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ |
| AnnaBridge | 189:f392fc9709a3 | 90 | #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ |
| AnnaBridge | 189:f392fc9709a3 | 91 | /** |
| AnnaBridge | 189:f392fc9709a3 | 92 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 93 | */ |
| AnnaBridge | 189:f392fc9709a3 | 94 | |
| AnnaBridge | 189:f392fc9709a3 | 95 | /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length |
| AnnaBridge | 189:f392fc9709a3 | 96 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 97 | */ |
| AnnaBridge | 189:f392fc9709a3 | 98 | #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ |
| AnnaBridge | 189:f392fc9709a3 | 99 | #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ |
| AnnaBridge | 189:f392fc9709a3 | 100 | /** |
| AnnaBridge | 189:f392fc9709a3 | 101 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 102 | */ |
| AnnaBridge | 189:f392fc9709a3 | 103 | |
| AnnaBridge | 189:f392fc9709a3 | 104 | #if defined(USART_CR2_SLVEN) |
| AnnaBridge | 189:f392fc9709a3 | 105 | /** @defgroup UARTEx_Slave_Select_management UARTEx Slave Select Management |
| AnnaBridge | 189:f392fc9709a3 | 106 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 107 | */ |
| AnnaBridge | 189:f392fc9709a3 | 108 | #define UART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */ |
| AnnaBridge | 189:f392fc9709a3 | 109 | #define UART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */ |
| AnnaBridge | 189:f392fc9709a3 | 110 | /** |
| AnnaBridge | 189:f392fc9709a3 | 111 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 112 | */ |
| AnnaBridge | 189:f392fc9709a3 | 113 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 114 | |
| AnnaBridge | 189:f392fc9709a3 | 115 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 116 | /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level |
| AnnaBridge | 189:f392fc9709a3 | 117 | * @brief UART TXFIFO level |
| AnnaBridge | 189:f392fc9709a3 | 118 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 119 | */ |
| AnnaBridge | 189:f392fc9709a3 | 120 | #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 121 | #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 122 | #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 123 | #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 124 | #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 125 | #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ |
| AnnaBridge | 189:f392fc9709a3 | 126 | /** |
| AnnaBridge | 189:f392fc9709a3 | 127 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 128 | */ |
| AnnaBridge | 189:f392fc9709a3 | 129 | |
| AnnaBridge | 189:f392fc9709a3 | 130 | /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level |
| AnnaBridge | 189:f392fc9709a3 | 131 | * @brief UART RXFIFO level |
| AnnaBridge | 189:f392fc9709a3 | 132 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 133 | */ |
| AnnaBridge | 189:f392fc9709a3 | 134 | #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 135 | #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 136 | #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 137 | #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 138 | #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 139 | #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ |
| AnnaBridge | 189:f392fc9709a3 | 140 | /** |
| AnnaBridge | 189:f392fc9709a3 | 141 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 142 | */ |
| AnnaBridge | 189:f392fc9709a3 | 143 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 144 | |
| AnnaBridge | 189:f392fc9709a3 | 145 | /** |
| AnnaBridge | 189:f392fc9709a3 | 146 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 147 | */ |
| AnnaBridge | 189:f392fc9709a3 | 148 | |
| AnnaBridge | 189:f392fc9709a3 | 149 | /* Exported macros -----------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 150 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 151 | /** @addtogroup UARTEx_Exported_Functions |
| AnnaBridge | 189:f392fc9709a3 | 152 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 153 | */ |
| AnnaBridge | 189:f392fc9709a3 | 154 | |
| AnnaBridge | 189:f392fc9709a3 | 155 | /** @addtogroup UARTEx_Exported_Functions_Group1 |
| AnnaBridge | 189:f392fc9709a3 | 156 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 157 | */ |
| AnnaBridge | 189:f392fc9709a3 | 158 | |
| AnnaBridge | 189:f392fc9709a3 | 159 | /* Initialization and de-initialization functions ****************************/ |
| AnnaBridge | 189:f392fc9709a3 | 160 | HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime); |
| AnnaBridge | 189:f392fc9709a3 | 161 | |
| AnnaBridge | 189:f392fc9709a3 | 162 | /** |
| AnnaBridge | 189:f392fc9709a3 | 163 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 164 | */ |
| AnnaBridge | 189:f392fc9709a3 | 165 | |
| AnnaBridge | 189:f392fc9709a3 | 166 | /** @addtogroup UARTEx_Exported_Functions_Group2 |
| AnnaBridge | 189:f392fc9709a3 | 167 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 168 | */ |
| AnnaBridge | 189:f392fc9709a3 | 169 | |
| AnnaBridge | 189:f392fc9709a3 | 170 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 171 | void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 172 | |
| AnnaBridge | 189:f392fc9709a3 | 173 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 174 | void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 175 | void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 176 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 177 | |
| AnnaBridge | 189:f392fc9709a3 | 178 | /** |
| AnnaBridge | 189:f392fc9709a3 | 179 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 180 | */ |
| AnnaBridge | 189:f392fc9709a3 | 181 | |
| AnnaBridge | 189:f392fc9709a3 | 182 | /** @addtogroup UARTEx_Exported_Functions_Group3 |
| AnnaBridge | 189:f392fc9709a3 | 183 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 184 | */ |
| AnnaBridge | 189:f392fc9709a3 | 185 | |
| AnnaBridge | 189:f392fc9709a3 | 186 | /* Peripheral Control functions **********************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 187 | HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); |
| AnnaBridge | 189:f392fc9709a3 | 188 | HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 189 | /* MBED */ |
| AnnaBridge | 189:f392fc9709a3 | 190 | HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 191 | /* MBED */ |
| AnnaBridge | 189:f392fc9709a3 | 192 | HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 193 | /* MBED */ |
| AnnaBridge | 189:f392fc9709a3 | 194 | HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 195 | /* MBED */ |
| AnnaBridge | 189:f392fc9709a3 | 196 | HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); |
| AnnaBridge | 189:f392fc9709a3 | 197 | |
| AnnaBridge | 189:f392fc9709a3 | 198 | #if defined(USART_CR2_SLVEN) |
| AnnaBridge | 189:f392fc9709a3 | 199 | HAL_StatusTypeDef HAL_UARTEx_EnableSlaveMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 200 | HAL_StatusTypeDef HAL_UARTEx_DisableSlaveMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 201 | HAL_StatusTypeDef HAL_UARTEx_ConfigNSS(UART_HandleTypeDef *huart, uint32_t NSSConfig); |
| AnnaBridge | 189:f392fc9709a3 | 202 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 203 | |
| AnnaBridge | 189:f392fc9709a3 | 204 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 205 | HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 206 | HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 189:f392fc9709a3 | 207 | HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); |
| AnnaBridge | 189:f392fc9709a3 | 208 | HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); |
| AnnaBridge | 189:f392fc9709a3 | 209 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 210 | |
| AnnaBridge | 189:f392fc9709a3 | 211 | |
| AnnaBridge | 189:f392fc9709a3 | 212 | /** |
| AnnaBridge | 189:f392fc9709a3 | 213 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 214 | */ |
| AnnaBridge | 189:f392fc9709a3 | 215 | |
| AnnaBridge | 189:f392fc9709a3 | 216 | /** |
| AnnaBridge | 189:f392fc9709a3 | 217 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 218 | */ |
| AnnaBridge | 189:f392fc9709a3 | 219 | |
| AnnaBridge | 189:f392fc9709a3 | 220 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 221 | /** @defgroup UARTEx_Private_Constants UARTEx Private Constants |
| AnnaBridge | 189:f392fc9709a3 | 222 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 223 | */ |
| AnnaBridge | 189:f392fc9709a3 | 224 | #if defined(USART_CR2_SLVEN) |
| AnnaBridge | 189:f392fc9709a3 | 225 | /** @defgroup UARTEx_Slave_Mode UARTEx Synchronous Slave mode |
| AnnaBridge | 189:f392fc9709a3 | 226 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 227 | */ |
| AnnaBridge | 189:f392fc9709a3 | 228 | #define UART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */ |
| AnnaBridge | 189:f392fc9709a3 | 229 | #define UART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */ |
| AnnaBridge | 189:f392fc9709a3 | 230 | /** |
| AnnaBridge | 189:f392fc9709a3 | 231 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 232 | */ |
| AnnaBridge | 189:f392fc9709a3 | 233 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 234 | |
| AnnaBridge | 189:f392fc9709a3 | 235 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 236 | /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode |
| AnnaBridge | 189:f392fc9709a3 | 237 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 238 | */ |
| AnnaBridge | 189:f392fc9709a3 | 239 | #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ |
| AnnaBridge | 189:f392fc9709a3 | 240 | #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ |
| AnnaBridge | 189:f392fc9709a3 | 241 | /** |
| AnnaBridge | 189:f392fc9709a3 | 242 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 243 | */ |
| AnnaBridge | 189:f392fc9709a3 | 244 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 245 | /** |
| AnnaBridge | 189:f392fc9709a3 | 246 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 247 | */ |
| AnnaBridge | 189:f392fc9709a3 | 248 | |
| AnnaBridge | 189:f392fc9709a3 | 249 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 250 | /** @defgroup UARTEx_Private_Macros UARTEx Private Macros |
| AnnaBridge | 189:f392fc9709a3 | 251 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 252 | */ |
| AnnaBridge | 189:f392fc9709a3 | 253 | |
| AnnaBridge | 189:f392fc9709a3 | 254 | /** @brief Report the UART clock source. |
| AnnaBridge | 189:f392fc9709a3 | 255 | * @param __HANDLE__ specifies the UART Handle. |
| AnnaBridge | 189:f392fc9709a3 | 256 | * @param __CLOCKSOURCE__ output variable. |
| AnnaBridge | 189:f392fc9709a3 | 257 | * @retval UART clocking source, written in __CLOCKSOURCE__. |
| AnnaBridge | 189:f392fc9709a3 | 258 | */ |
| AnnaBridge | 189:f392fc9709a3 | 259 | #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ |
| AnnaBridge | 189:f392fc9709a3 | 260 | defined (STM32L496xx) || defined (STM32L4A6xx) || \ |
| AnnaBridge | 189:f392fc9709a3 | 261 | defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) |
| AnnaBridge | 189:f392fc9709a3 | 262 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 263 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 264 | if((__HANDLE__)->Instance == USART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 265 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 266 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 267 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 268 | case RCC_USART1CLKSOURCE_PCLK2: \ |
| AnnaBridge | 189:f392fc9709a3 | 269 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ |
| AnnaBridge | 189:f392fc9709a3 | 270 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 271 | case RCC_USART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 272 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 273 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 274 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 275 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 276 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 277 | case RCC_USART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 278 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 279 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 280 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 281 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 282 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 283 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 284 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 285 | else if((__HANDLE__)->Instance == USART2) \ |
| AnnaBridge | 189:f392fc9709a3 | 286 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 287 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 288 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 289 | case RCC_USART2CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 290 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 291 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 292 | case RCC_USART2CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 293 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 294 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 295 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 296 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 297 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 298 | case RCC_USART2CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 299 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 300 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 301 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 302 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 303 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 304 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 305 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 306 | else if((__HANDLE__)->Instance == USART3) \ |
| AnnaBridge | 189:f392fc9709a3 | 307 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 308 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 309 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 310 | case RCC_USART3CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 311 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 312 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 313 | case RCC_USART3CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 314 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 315 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 316 | case RCC_USART3CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 317 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 318 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 319 | case RCC_USART3CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 320 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 321 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 322 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 323 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 324 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 325 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 326 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 327 | else if((__HANDLE__)->Instance == UART4) \ |
| AnnaBridge | 189:f392fc9709a3 | 328 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 329 | switch(__HAL_RCC_GET_UART4_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 330 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 331 | case RCC_UART4CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 332 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 333 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 334 | case RCC_UART4CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 335 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 336 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 337 | case RCC_UART4CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 338 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 339 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 340 | case RCC_UART4CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 341 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 342 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 343 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 344 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 345 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 346 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 347 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 348 | else if((__HANDLE__)->Instance == UART5) \ |
| AnnaBridge | 189:f392fc9709a3 | 349 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 350 | switch(__HAL_RCC_GET_UART5_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 351 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 352 | case RCC_UART5CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 353 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 354 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 355 | case RCC_UART5CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 356 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 357 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 358 | case RCC_UART5CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 359 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 360 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 361 | case RCC_UART5CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 362 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 363 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 364 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 365 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 366 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 367 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 368 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 369 | else if((__HANDLE__)->Instance == LPUART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 370 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 371 | switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 372 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 373 | case RCC_LPUART1CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 374 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 375 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 376 | case RCC_LPUART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 377 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 378 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 379 | case RCC_LPUART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 380 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 381 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 382 | case RCC_LPUART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 383 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 384 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 385 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 386 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 387 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 388 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 389 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 390 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 391 | #elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) |
| AnnaBridge | 189:f392fc9709a3 | 392 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 393 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 394 | if((__HANDLE__)->Instance == USART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 395 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 396 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 397 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 398 | case RCC_USART1CLKSOURCE_PCLK2: \ |
| AnnaBridge | 189:f392fc9709a3 | 399 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ |
| AnnaBridge | 189:f392fc9709a3 | 400 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 401 | case RCC_USART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 402 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 403 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 404 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 405 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 406 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 407 | case RCC_USART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 408 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 409 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 410 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 411 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 412 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 413 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 414 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 415 | else if((__HANDLE__)->Instance == USART2) \ |
| AnnaBridge | 189:f392fc9709a3 | 416 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 417 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 418 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 419 | case RCC_USART2CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 420 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 421 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 422 | case RCC_USART2CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 423 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 424 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 425 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 426 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 427 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 428 | case RCC_USART2CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 429 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 430 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 431 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 432 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 433 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 434 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 435 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 436 | else if((__HANDLE__)->Instance == USART3) \ |
| AnnaBridge | 189:f392fc9709a3 | 437 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 438 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 439 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 440 | case RCC_USART3CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 441 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 442 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 443 | case RCC_USART3CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 444 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 445 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 446 | case RCC_USART3CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 447 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 448 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 449 | case RCC_USART3CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 450 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 451 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 452 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 453 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 454 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 455 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 456 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 457 | else if((__HANDLE__)->Instance == LPUART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 458 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 459 | switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 460 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 461 | case RCC_LPUART1CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 462 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 463 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 464 | case RCC_LPUART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 465 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 466 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 467 | case RCC_LPUART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 468 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 469 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 470 | case RCC_LPUART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 471 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 472 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 473 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 474 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 475 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 476 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 477 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 478 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 479 | #elif defined (STM32L432xx) || defined (STM32L442xx) |
| AnnaBridge | 189:f392fc9709a3 | 480 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 481 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 482 | if((__HANDLE__)->Instance == USART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 483 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 484 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 485 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 486 | case RCC_USART1CLKSOURCE_PCLK2: \ |
| AnnaBridge | 189:f392fc9709a3 | 487 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ |
| AnnaBridge | 189:f392fc9709a3 | 488 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 489 | case RCC_USART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 490 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 491 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 492 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 493 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 494 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 495 | case RCC_USART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 496 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 497 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 498 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 499 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 500 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 501 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 502 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 503 | else if((__HANDLE__)->Instance == USART2) \ |
| AnnaBridge | 189:f392fc9709a3 | 504 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 505 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 506 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 507 | case RCC_USART2CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 508 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 509 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 510 | case RCC_USART2CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 511 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 512 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 513 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 514 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 515 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 516 | case RCC_USART2CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 517 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 518 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 519 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 520 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 521 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 522 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 523 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 524 | else if((__HANDLE__)->Instance == LPUART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 525 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 526 | switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 527 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 528 | case RCC_LPUART1CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 529 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 530 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 531 | case RCC_LPUART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 532 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 533 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 534 | case RCC_LPUART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 535 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 536 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 537 | case RCC_LPUART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 538 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 539 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 540 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 541 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 542 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 543 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 544 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 545 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 546 | #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) |
| AnnaBridge | 189:f392fc9709a3 | 547 | #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 548 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 549 | if((__HANDLE__)->Instance == USART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 550 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 551 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 552 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 553 | case RCC_USART1CLKSOURCE_PCLK2: \ |
| AnnaBridge | 189:f392fc9709a3 | 554 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ |
| AnnaBridge | 189:f392fc9709a3 | 555 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 556 | case RCC_USART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 557 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 558 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 559 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 560 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 561 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 562 | case RCC_USART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 563 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 564 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 565 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 566 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 567 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 568 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 569 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 570 | else if((__HANDLE__)->Instance == USART2) \ |
| AnnaBridge | 189:f392fc9709a3 | 571 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 572 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 573 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 574 | case RCC_USART2CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 575 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 576 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 577 | case RCC_USART2CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 578 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 579 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 580 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 581 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 582 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 583 | case RCC_USART2CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 584 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 585 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 586 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 587 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 588 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 589 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 590 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 591 | else if((__HANDLE__)->Instance == USART3) \ |
| AnnaBridge | 189:f392fc9709a3 | 592 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 593 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 594 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 595 | case RCC_USART3CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 596 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 597 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 598 | case RCC_USART3CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 599 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 600 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 601 | case RCC_USART3CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 602 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 603 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 604 | case RCC_USART3CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 605 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 606 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 607 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 608 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 609 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 610 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 611 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 612 | else if((__HANDLE__)->Instance == UART4) \ |
| AnnaBridge | 189:f392fc9709a3 | 613 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 614 | switch(__HAL_RCC_GET_UART4_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 615 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 616 | case RCC_UART4CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 617 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 618 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 619 | case RCC_UART4CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 620 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 621 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 622 | case RCC_UART4CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 623 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 624 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 625 | case RCC_UART4CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 626 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 627 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 628 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 629 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 630 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 631 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 632 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 633 | else if((__HANDLE__)->Instance == LPUART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 634 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 635 | switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 636 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 637 | case RCC_LPUART1CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 638 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 639 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 640 | case RCC_LPUART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 641 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 642 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 643 | case RCC_LPUART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 644 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 645 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 646 | case RCC_LPUART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 647 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 648 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 649 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 650 | (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 651 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 652 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 653 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 654 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 655 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 656 | |
| AnnaBridge | 189:f392fc9709a3 | 657 | /** @brief Report the UART mask to apply to retrieve the received data |
| AnnaBridge | 189:f392fc9709a3 | 658 | * according to the word length and to the parity bits activation. |
| AnnaBridge | 189:f392fc9709a3 | 659 | * @note If PCE = 1, the parity bit is not included in the data extracted |
| AnnaBridge | 189:f392fc9709a3 | 660 | * by the reception API(). |
| AnnaBridge | 189:f392fc9709a3 | 661 | * This masking operation is not carried out in the case of |
| AnnaBridge | 189:f392fc9709a3 | 662 | * DMA transfers. |
| AnnaBridge | 189:f392fc9709a3 | 663 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 189:f392fc9709a3 | 664 | * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. |
| AnnaBridge | 189:f392fc9709a3 | 665 | */ |
| AnnaBridge | 189:f392fc9709a3 | 666 | #define UART_MASK_COMPUTATION(__HANDLE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 667 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 668 | if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ |
| AnnaBridge | 189:f392fc9709a3 | 669 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 670 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 671 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 672 | (__HANDLE__)->Mask = 0x01FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 673 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 674 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 675 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 676 | (__HANDLE__)->Mask = 0x00FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 677 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 678 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 679 | else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ |
| AnnaBridge | 189:f392fc9709a3 | 680 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 681 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 682 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 683 | (__HANDLE__)->Mask = 0x00FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 684 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 685 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 686 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 687 | (__HANDLE__)->Mask = 0x007F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 688 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 689 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 690 | else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ |
| AnnaBridge | 189:f392fc9709a3 | 691 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 692 | if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 693 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 694 | (__HANDLE__)->Mask = 0x007F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 695 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 696 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 697 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 698 | (__HANDLE__)->Mask = 0x003F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 699 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 700 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 701 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 702 | |
| AnnaBridge | 189:f392fc9709a3 | 703 | |
| AnnaBridge | 189:f392fc9709a3 | 704 | /** |
| AnnaBridge | 189:f392fc9709a3 | 705 | * @brief Ensure that UART frame length is valid. |
| AnnaBridge | 189:f392fc9709a3 | 706 | * @param __LENGTH__ UART frame length. |
| AnnaBridge | 189:f392fc9709a3 | 707 | * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 708 | */ |
| AnnaBridge | 189:f392fc9709a3 | 709 | #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ |
| AnnaBridge | 189:f392fc9709a3 | 710 | ((__LENGTH__) == UART_WORDLENGTH_8B) || \ |
| AnnaBridge | 189:f392fc9709a3 | 711 | ((__LENGTH__) == UART_WORDLENGTH_9B)) |
| AnnaBridge | 189:f392fc9709a3 | 712 | |
| AnnaBridge | 189:f392fc9709a3 | 713 | /** |
| AnnaBridge | 189:f392fc9709a3 | 714 | * @brief Ensure that UART wake-up address length is valid. |
| AnnaBridge | 189:f392fc9709a3 | 715 | * @param __ADDRESS__ UART wake-up address length. |
| AnnaBridge | 189:f392fc9709a3 | 716 | * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 717 | */ |
| AnnaBridge | 189:f392fc9709a3 | 718 | #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ |
| AnnaBridge | 189:f392fc9709a3 | 719 | ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) |
| AnnaBridge | 189:f392fc9709a3 | 720 | |
| AnnaBridge | 189:f392fc9709a3 | 721 | #if defined(USART_CR2_SLVEN) |
| AnnaBridge | 189:f392fc9709a3 | 722 | /** |
| AnnaBridge | 189:f392fc9709a3 | 723 | * @brief Ensure that UART Negative Slave Select (NSS) pin management is valid. |
| AnnaBridge | 189:f392fc9709a3 | 724 | * @param __NSS__ UART Negative Slave Select pin management. |
| AnnaBridge | 189:f392fc9709a3 | 725 | * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 726 | */ |
| AnnaBridge | 189:f392fc9709a3 | 727 | #define IS_UART_NSS(__NSS__) (((__NSS__) == UART_NSS_HARD) || \ |
| AnnaBridge | 189:f392fc9709a3 | 728 | ((__NSS__) == UART_NSS_SOFT)) |
| AnnaBridge | 189:f392fc9709a3 | 729 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 730 | |
| AnnaBridge | 189:f392fc9709a3 | 731 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 732 | /** |
| AnnaBridge | 189:f392fc9709a3 | 733 | * @brief Ensure that UART TXFIFO threshold level is valid. |
| AnnaBridge | 189:f392fc9709a3 | 734 | * @param __THRESHOLD__ UART TXFIFO threshold level. |
| AnnaBridge | 189:f392fc9709a3 | 735 | * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 736 | */ |
| AnnaBridge | 189:f392fc9709a3 | 737 | #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 738 | ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 739 | ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ |
| AnnaBridge | 189:f392fc9709a3 | 740 | ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 741 | ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 742 | ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) |
| AnnaBridge | 189:f392fc9709a3 | 743 | |
| AnnaBridge | 189:f392fc9709a3 | 744 | /** |
| AnnaBridge | 189:f392fc9709a3 | 745 | * @brief Ensure that USART RXFIFO threshold level is valid. |
| AnnaBridge | 189:f392fc9709a3 | 746 | * @param __THRESHOLD__ USART RXFIFO threshold level. |
| AnnaBridge | 189:f392fc9709a3 | 747 | * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 748 | */ |
| AnnaBridge | 189:f392fc9709a3 | 749 | #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 750 | ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 751 | ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ |
| AnnaBridge | 189:f392fc9709a3 | 752 | ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 753 | ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 754 | ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) |
| AnnaBridge | 189:f392fc9709a3 | 755 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 756 | |
| AnnaBridge | 189:f392fc9709a3 | 757 | /** |
| AnnaBridge | 189:f392fc9709a3 | 758 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 759 | */ |
| AnnaBridge | 189:f392fc9709a3 | 760 | |
| AnnaBridge | 189:f392fc9709a3 | 761 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 762 | |
| AnnaBridge | 189:f392fc9709a3 | 763 | /** |
| AnnaBridge | 189:f392fc9709a3 | 764 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 765 | */ |
| AnnaBridge | 189:f392fc9709a3 | 766 | |
| AnnaBridge | 189:f392fc9709a3 | 767 | /** |
| AnnaBridge | 189:f392fc9709a3 | 768 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 769 | */ |
| AnnaBridge | 189:f392fc9709a3 | 770 | |
| AnnaBridge | 189:f392fc9709a3 | 771 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 772 | } |
| AnnaBridge | 189:f392fc9709a3 | 773 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 774 | |
| AnnaBridge | 189:f392fc9709a3 | 775 | #endif /* __STM32L4xx_HAL_UART_EX_H */ |
| AnnaBridge | 189:f392fc9709a3 | 776 | |
| AnnaBridge | 189:f392fc9709a3 | 777 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
