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mbed library sources. Supersedes mbed-src.

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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_IAR/stm32l4xx_hal_uart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32l4xx_hal_uart.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file of UART HAL module.
AnnaBridge 189:f392fc9709a3 6 ******************************************************************************
AnnaBridge 189:f392fc9709a3 7 * @attention
AnnaBridge 189:f392fc9709a3 8 *
AnnaBridge 189:f392fc9709a3 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 189:f392fc9709a3 10 *
AnnaBridge 189:f392fc9709a3 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 12 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 189:f392fc9709a3 14 * this list of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 189:f392fc9709a3 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 189:f392fc9709a3 17 * and/or other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 189:f392fc9709a3 19 * may be used to endorse or promote products derived from this software
AnnaBridge 189:f392fc9709a3 20 * without specific prior written permission.
AnnaBridge 189:f392fc9709a3 21 *
AnnaBridge 189:f392fc9709a3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 189:f392fc9709a3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 189:f392fc9709a3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 189:f392fc9709a3 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 189:f392fc9709a3 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 189:f392fc9709a3 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 189:f392fc9709a3 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 189:f392fc9709a3 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 189:f392fc9709a3 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 32 *
AnnaBridge 189:f392fc9709a3 33 ******************************************************************************
AnnaBridge 189:f392fc9709a3 34 */
AnnaBridge 189:f392fc9709a3 35
AnnaBridge 189:f392fc9709a3 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 37 #ifndef __STM32L4xx_HAL_UART_H
AnnaBridge 189:f392fc9709a3 38 #define __STM32L4xx_HAL_UART_H
AnnaBridge 189:f392fc9709a3 39
AnnaBridge 189:f392fc9709a3 40 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 41 extern "C" {
AnnaBridge 189:f392fc9709a3 42 #endif
AnnaBridge 189:f392fc9709a3 43
AnnaBridge 189:f392fc9709a3 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 45 #include "stm32l4xx_hal_def.h"
AnnaBridge 189:f392fc9709a3 46
AnnaBridge 189:f392fc9709a3 47 /** @addtogroup STM32L4xx_HAL_Driver
AnnaBridge 189:f392fc9709a3 48 * @{
AnnaBridge 189:f392fc9709a3 49 */
AnnaBridge 189:f392fc9709a3 50
AnnaBridge 189:f392fc9709a3 51 /** @addtogroup UART
AnnaBridge 189:f392fc9709a3 52 * @{
AnnaBridge 189:f392fc9709a3 53 */
AnnaBridge 189:f392fc9709a3 54
AnnaBridge 189:f392fc9709a3 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 56 /** @defgroup UART_Exported_Types UART Exported Types
AnnaBridge 189:f392fc9709a3 57 * @{
AnnaBridge 189:f392fc9709a3 58 */
AnnaBridge 189:f392fc9709a3 59
AnnaBridge 189:f392fc9709a3 60 /**
AnnaBridge 189:f392fc9709a3 61 * @brief UART Init Structure definition
AnnaBridge 189:f392fc9709a3 62 */
AnnaBridge 189:f392fc9709a3 63 typedef struct
AnnaBridge 189:f392fc9709a3 64 {
AnnaBridge 189:f392fc9709a3 65 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
AnnaBridge 189:f392fc9709a3 66 The baud rate register is computed using the following formula:
AnnaBridge 189:f392fc9709a3 67 UART:
AnnaBridge 189:f392fc9709a3 68 =====
AnnaBridge 189:f392fc9709a3 69 - If oversampling is 16 or in LIN mode,
AnnaBridge 189:f392fc9709a3 70 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
AnnaBridge 189:f392fc9709a3 71 - If oversampling is 8,
AnnaBridge 189:f392fc9709a3 72 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4]
AnnaBridge 189:f392fc9709a3 73 Baud Rate Register[3] = 0
AnnaBridge 189:f392fc9709a3 74 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1
AnnaBridge 189:f392fc9709a3 75 LPUART:
AnnaBridge 189:f392fc9709a3 76 =======
AnnaBridge 189:f392fc9709a3 77 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
AnnaBridge 189:f392fc9709a3 78
AnnaBridge 189:f392fc9709a3 79 where (uart/lpuart)_ker_ck_pres is the UART input clock divided by a prescaler */
AnnaBridge 189:f392fc9709a3 80
AnnaBridge 189:f392fc9709a3 81 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge 189:f392fc9709a3 82 This parameter can be a value of @ref UARTEx_Word_Length. */
AnnaBridge 189:f392fc9709a3 83
AnnaBridge 189:f392fc9709a3 84 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge 189:f392fc9709a3 85 This parameter can be a value of @ref UART_Stop_Bits. */
AnnaBridge 189:f392fc9709a3 86
AnnaBridge 189:f392fc9709a3 87 uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge 189:f392fc9709a3 88 This parameter can be a value of @ref UART_Parity
AnnaBridge 189:f392fc9709a3 89 @note When parity is enabled, the computed parity is inserted
AnnaBridge 189:f392fc9709a3 90 at the MSB position of the transmitted data (9th bit when
AnnaBridge 189:f392fc9709a3 91 the word length is set to 9 data bits; 8th bit when the
AnnaBridge 189:f392fc9709a3 92 word length is set to 8 data bits). */
AnnaBridge 189:f392fc9709a3 93
AnnaBridge 189:f392fc9709a3 94 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
AnnaBridge 189:f392fc9709a3 95 This parameter can be a value of @ref UART_Mode. */
AnnaBridge 189:f392fc9709a3 96
AnnaBridge 189:f392fc9709a3 97 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
AnnaBridge 189:f392fc9709a3 98 or disabled.
AnnaBridge 189:f392fc9709a3 99 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
AnnaBridge 189:f392fc9709a3 100
AnnaBridge 189:f392fc9709a3 101 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
AnnaBridge 189:f392fc9709a3 102 This parameter can be a value of @ref UART_Over_Sampling. */
AnnaBridge 189:f392fc9709a3 103
AnnaBridge 189:f392fc9709a3 104 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
AnnaBridge 189:f392fc9709a3 105 Selecting the single sample method increases the receiver tolerance to clock
AnnaBridge 189:f392fc9709a3 106 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
AnnaBridge 189:f392fc9709a3 107
AnnaBridge 189:f392fc9709a3 108 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 109 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source.
AnnaBridge 189:f392fc9709a3 110 This parameter can be a value of @ref UART_ClockPrescaler. */
AnnaBridge 189:f392fc9709a3 111 #endif
AnnaBridge 189:f392fc9709a3 112
AnnaBridge 189:f392fc9709a3 113 }UART_InitTypeDef;
AnnaBridge 189:f392fc9709a3 114
AnnaBridge 189:f392fc9709a3 115 /**
AnnaBridge 189:f392fc9709a3 116 * @brief UART Advanced Features initalization structure definition
AnnaBridge 189:f392fc9709a3 117 */
AnnaBridge 189:f392fc9709a3 118 typedef struct
AnnaBridge 189:f392fc9709a3 119 {
AnnaBridge 189:f392fc9709a3 120 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
AnnaBridge 189:f392fc9709a3 121 Advanced Features may be initialized at the same time .
AnnaBridge 189:f392fc9709a3 122 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
AnnaBridge 189:f392fc9709a3 123
AnnaBridge 189:f392fc9709a3 124 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
AnnaBridge 189:f392fc9709a3 125 This parameter can be a value of @ref UART_Tx_Inv. */
AnnaBridge 189:f392fc9709a3 126
AnnaBridge 189:f392fc9709a3 127 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
AnnaBridge 189:f392fc9709a3 128 This parameter can be a value of @ref UART_Rx_Inv. */
AnnaBridge 189:f392fc9709a3 129
AnnaBridge 189:f392fc9709a3 130 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
AnnaBridge 189:f392fc9709a3 131 vs negative/inverted logic).
AnnaBridge 189:f392fc9709a3 132 This parameter can be a value of @ref UART_Data_Inv. */
AnnaBridge 189:f392fc9709a3 133
AnnaBridge 189:f392fc9709a3 134 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
AnnaBridge 189:f392fc9709a3 135 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
AnnaBridge 189:f392fc9709a3 136
AnnaBridge 189:f392fc9709a3 137 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
AnnaBridge 189:f392fc9709a3 138 This parameter can be a value of @ref UART_Overrun_Disable. */
AnnaBridge 189:f392fc9709a3 139
AnnaBridge 189:f392fc9709a3 140 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
AnnaBridge 189:f392fc9709a3 141 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
AnnaBridge 189:f392fc9709a3 142
AnnaBridge 189:f392fc9709a3 143 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
AnnaBridge 189:f392fc9709a3 144 This parameter can be a value of @ref UART_AutoBaudRate_Enable */
AnnaBridge 189:f392fc9709a3 145
AnnaBridge 189:f392fc9709a3 146 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
AnnaBridge 189:f392fc9709a3 147 detection is carried out.
AnnaBridge 189:f392fc9709a3 148 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
AnnaBridge 189:f392fc9709a3 149
AnnaBridge 189:f392fc9709a3 150 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
AnnaBridge 189:f392fc9709a3 151 This parameter can be a value of @ref UART_MSB_First. */
AnnaBridge 189:f392fc9709a3 152 } UART_AdvFeatureInitTypeDef;
AnnaBridge 189:f392fc9709a3 153
AnnaBridge 189:f392fc9709a3 154
AnnaBridge 189:f392fc9709a3 155
AnnaBridge 189:f392fc9709a3 156 /**
AnnaBridge 189:f392fc9709a3 157 * @brief HAL UART State structures definition
AnnaBridge 189:f392fc9709a3 158 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
AnnaBridge 189:f392fc9709a3 159 * - gState contains UART state information related to global Handle management
AnnaBridge 189:f392fc9709a3 160 * and also information related to Tx operations.
AnnaBridge 189:f392fc9709a3 161 * gState value coding follow below described bitmap :
AnnaBridge 189:f392fc9709a3 162 * b7-b6 Error information
AnnaBridge 189:f392fc9709a3 163 * 00 : No Error
AnnaBridge 189:f392fc9709a3 164 * 01 : (Not Used)
AnnaBridge 189:f392fc9709a3 165 * 10 : Timeout
AnnaBridge 189:f392fc9709a3 166 * 11 : Error
AnnaBridge 189:f392fc9709a3 167 * b5 IP initilisation status
AnnaBridge 189:f392fc9709a3 168 * 0 : Reset (IP not initialized)
AnnaBridge 189:f392fc9709a3 169 * 1 : Init done (IP not initialized. HAL UART Init function already called)
AnnaBridge 189:f392fc9709a3 170 * b4-b3 (not used)
AnnaBridge 189:f392fc9709a3 171 * xx : Should be set to 00
AnnaBridge 189:f392fc9709a3 172 * b2 Intrinsic process state
AnnaBridge 189:f392fc9709a3 173 * 0 : Ready
AnnaBridge 189:f392fc9709a3 174 * 1 : Busy (IP busy with some configuration or internal operations)
AnnaBridge 189:f392fc9709a3 175 * b1 (not used)
AnnaBridge 189:f392fc9709a3 176 * x : Should be set to 0
AnnaBridge 189:f392fc9709a3 177 * b0 Tx state
AnnaBridge 189:f392fc9709a3 178 * 0 : Ready (no Tx operation ongoing)
AnnaBridge 189:f392fc9709a3 179 * 1 : Busy (Tx operation ongoing)
AnnaBridge 189:f392fc9709a3 180 * - RxState contains information related to Rx operations.
AnnaBridge 189:f392fc9709a3 181 * RxState value coding follow below described bitmap :
AnnaBridge 189:f392fc9709a3 182 * b7-b6 (not used)
AnnaBridge 189:f392fc9709a3 183 * xx : Should be set to 00
AnnaBridge 189:f392fc9709a3 184 * b5 IP initilisation status
AnnaBridge 189:f392fc9709a3 185 * 0 : Reset (IP not initialized)
AnnaBridge 189:f392fc9709a3 186 * 1 : Init done (IP not initialized)
AnnaBridge 189:f392fc9709a3 187 * b4-b2 (not used)
AnnaBridge 189:f392fc9709a3 188 * xxx : Should be set to 000
AnnaBridge 189:f392fc9709a3 189 * b1 Rx state
AnnaBridge 189:f392fc9709a3 190 * 0 : Ready (no Rx operation ongoing)
AnnaBridge 189:f392fc9709a3 191 * 1 : Busy (Rx operation ongoing)
AnnaBridge 189:f392fc9709a3 192 * b0 (not used)
AnnaBridge 189:f392fc9709a3 193 * x : Should be set to 0.
AnnaBridge 189:f392fc9709a3 194 */
AnnaBridge 189:f392fc9709a3 195 typedef enum
AnnaBridge 189:f392fc9709a3 196 {
AnnaBridge 189:f392fc9709a3 197 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
AnnaBridge 189:f392fc9709a3 198 Value is allowed for gState and RxState */
AnnaBridge 189:f392fc9709a3 199 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
AnnaBridge 189:f392fc9709a3 200 Value is allowed for gState and RxState */
AnnaBridge 189:f392fc9709a3 201 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
AnnaBridge 189:f392fc9709a3 202 Value is allowed for gState only */
AnnaBridge 189:f392fc9709a3 203 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
AnnaBridge 189:f392fc9709a3 204 Value is allowed for gState only */
AnnaBridge 189:f392fc9709a3 205 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
AnnaBridge 189:f392fc9709a3 206 Value is allowed for RxState only */
AnnaBridge 189:f392fc9709a3 207 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
AnnaBridge 189:f392fc9709a3 208 Not to be used for neither gState nor RxState.
AnnaBridge 189:f392fc9709a3 209 Value is result of combination (Or) between gState and RxState values */
AnnaBridge 189:f392fc9709a3 210 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
AnnaBridge 189:f392fc9709a3 211 Value is allowed for gState only */
AnnaBridge 189:f392fc9709a3 212 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
AnnaBridge 189:f392fc9709a3 213 Value is allowed for gState only */
AnnaBridge 189:f392fc9709a3 214 }HAL_UART_StateTypeDef;
AnnaBridge 189:f392fc9709a3 215
AnnaBridge 189:f392fc9709a3 216 /**
AnnaBridge 189:f392fc9709a3 217 * @brief HAL UART Error Code structure definition
AnnaBridge 189:f392fc9709a3 218 */
AnnaBridge 189:f392fc9709a3 219 typedef enum
AnnaBridge 189:f392fc9709a3 220 {
AnnaBridge 189:f392fc9709a3 221 HAL_UART_ERROR_NONE = 0x00U, /*!< No error */
AnnaBridge 189:f392fc9709a3 222 HAL_UART_ERROR_PE = 0x01U, /*!< Parity error */
AnnaBridge 189:f392fc9709a3 223 HAL_UART_ERROR_NE = 0x02U, /*!< Noise error */
AnnaBridge 189:f392fc9709a3 224 HAL_UART_ERROR_FE = 0x04U, /*!< frame error */
AnnaBridge 189:f392fc9709a3 225 HAL_UART_ERROR_ORE = 0x08U, /*!< Overrun error */
AnnaBridge 189:f392fc9709a3 226 HAL_UART_ERROR_DMA = 0x10U /*!< DMA transfer error */
AnnaBridge 189:f392fc9709a3 227 }HAL_UART_ErrorTypeDef;
AnnaBridge 189:f392fc9709a3 228
AnnaBridge 189:f392fc9709a3 229 /**
AnnaBridge 189:f392fc9709a3 230 * @brief UART clock sources definition
AnnaBridge 189:f392fc9709a3 231 */
AnnaBridge 189:f392fc9709a3 232 typedef enum
AnnaBridge 189:f392fc9709a3 233 {
AnnaBridge 189:f392fc9709a3 234 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
AnnaBridge 189:f392fc9709a3 235 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
AnnaBridge 189:f392fc9709a3 236 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
AnnaBridge 189:f392fc9709a3 237 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
AnnaBridge 189:f392fc9709a3 238 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
AnnaBridge 189:f392fc9709a3 239 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
AnnaBridge 189:f392fc9709a3 240 }UART_ClockSourceTypeDef;
AnnaBridge 189:f392fc9709a3 241
AnnaBridge 189:f392fc9709a3 242 /**
AnnaBridge 189:f392fc9709a3 243 * @brief UART handle Structure definition
AnnaBridge 189:f392fc9709a3 244 */
AnnaBridge 189:f392fc9709a3 245 typedef struct __UART_HandleTypeDef
AnnaBridge 189:f392fc9709a3 246 {
AnnaBridge 189:f392fc9709a3 247 USART_TypeDef *Instance; /*!< UART registers base address */
AnnaBridge 189:f392fc9709a3 248
AnnaBridge 189:f392fc9709a3 249 UART_InitTypeDef Init; /*!< UART communication parameters */
AnnaBridge 189:f392fc9709a3 250
AnnaBridge 189:f392fc9709a3 251 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
AnnaBridge 189:f392fc9709a3 252
AnnaBridge 189:f392fc9709a3 253 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
AnnaBridge 189:f392fc9709a3 254
AnnaBridge 189:f392fc9709a3 255 uint16_t TxXferSize; /*!< UART Tx Transfer size */
AnnaBridge 189:f392fc9709a3 256
AnnaBridge 189:f392fc9709a3 257 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
AnnaBridge 189:f392fc9709a3 258
AnnaBridge 189:f392fc9709a3 259 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
AnnaBridge 189:f392fc9709a3 260
AnnaBridge 189:f392fc9709a3 261 uint16_t RxXferSize; /*!< UART Rx Transfer size */
AnnaBridge 189:f392fc9709a3 262
AnnaBridge 189:f392fc9709a3 263 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
AnnaBridge 189:f392fc9709a3 264
AnnaBridge 189:f392fc9709a3 265 uint16_t Mask; /*!< UART Rx RDR register mask */
AnnaBridge 189:f392fc9709a3 266
AnnaBridge 189:f392fc9709a3 267 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 268 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
AnnaBridge 189:f392fc9709a3 269
AnnaBridge 189:f392fc9709a3 270 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
AnnaBridge 189:f392fc9709a3 271
AnnaBridge 189:f392fc9709a3 272 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used.
AnnaBridge 189:f392fc9709a3 273 This parameter can be a value of @ref UARTEx_FIFO_mode. */
AnnaBridge 189:f392fc9709a3 274 #endif
AnnaBridge 189:f392fc9709a3 275
AnnaBridge 189:f392fc9709a3 276 #if defined(USART_CR2_SLVEN)
AnnaBridge 189:f392fc9709a3 277 uint32_t SlaveMode; /*!< Specifies if the UART SPI Slave mode is being used.
AnnaBridge 189:f392fc9709a3 278 This parameter can be a value of @ref UARTEx_Slave_Mode. */
AnnaBridge 189:f392fc9709a3 279 #endif
AnnaBridge 189:f392fc9709a3 280
AnnaBridge 189:f392fc9709a3 281 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
AnnaBridge 189:f392fc9709a3 282
AnnaBridge 189:f392fc9709a3 283 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
AnnaBridge 189:f392fc9709a3 284
AnnaBridge 189:f392fc9709a3 285 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
AnnaBridge 189:f392fc9709a3 286
AnnaBridge 189:f392fc9709a3 287 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
AnnaBridge 189:f392fc9709a3 288
AnnaBridge 189:f392fc9709a3 289 HAL_LockTypeDef Lock; /*!< Locking object */
AnnaBridge 189:f392fc9709a3 290
AnnaBridge 189:f392fc9709a3 291 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
AnnaBridge 189:f392fc9709a3 292 and also related to Tx operations.
AnnaBridge 189:f392fc9709a3 293 This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge 189:f392fc9709a3 294
AnnaBridge 189:f392fc9709a3 295 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
AnnaBridge 189:f392fc9709a3 296 This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge 189:f392fc9709a3 297
AnnaBridge 189:f392fc9709a3 298 __IO uint32_t ErrorCode; /*!< UART Error code */
AnnaBridge 189:f392fc9709a3 299
AnnaBridge 189:f392fc9709a3 300 }UART_HandleTypeDef;
AnnaBridge 189:f392fc9709a3 301
AnnaBridge 189:f392fc9709a3 302 /**
AnnaBridge 189:f392fc9709a3 303 * @}
AnnaBridge 189:f392fc9709a3 304 */
AnnaBridge 189:f392fc9709a3 305
AnnaBridge 189:f392fc9709a3 306 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 307 /** @defgroup UART_Exported_Constants UART Exported Constants
AnnaBridge 189:f392fc9709a3 308 * @{
AnnaBridge 189:f392fc9709a3 309 */
AnnaBridge 189:f392fc9709a3 310
AnnaBridge 189:f392fc9709a3 311 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
AnnaBridge 189:f392fc9709a3 312 * @{
AnnaBridge 189:f392fc9709a3 313 */
AnnaBridge 189:f392fc9709a3 314 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
AnnaBridge 189:f392fc9709a3 315 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */
AnnaBridge 189:f392fc9709a3 316 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
AnnaBridge 189:f392fc9709a3 317 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */
AnnaBridge 189:f392fc9709a3 318 /**
AnnaBridge 189:f392fc9709a3 319 * @}
AnnaBridge 189:f392fc9709a3 320 */
AnnaBridge 189:f392fc9709a3 321
AnnaBridge 189:f392fc9709a3 322 /** @defgroup UART_Parity UART Parity
AnnaBridge 189:f392fc9709a3 323 * @{
AnnaBridge 189:f392fc9709a3 324 */
AnnaBridge 189:f392fc9709a3 325 #define UART_PARITY_NONE 0x00000000U /*!< No parity */
AnnaBridge 189:f392fc9709a3 326 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
AnnaBridge 189:f392fc9709a3 327 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
AnnaBridge 189:f392fc9709a3 328 /**
AnnaBridge 189:f392fc9709a3 329 * @}
AnnaBridge 189:f392fc9709a3 330 */
AnnaBridge 189:f392fc9709a3 331
AnnaBridge 189:f392fc9709a3 332 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
AnnaBridge 189:f392fc9709a3 333 * @{
AnnaBridge 189:f392fc9709a3 334 */
AnnaBridge 189:f392fc9709a3 335 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */
AnnaBridge 189:f392fc9709a3 336 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */
AnnaBridge 189:f392fc9709a3 337 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */
AnnaBridge 189:f392fc9709a3 338 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */
AnnaBridge 189:f392fc9709a3 339 /**
AnnaBridge 189:f392fc9709a3 340 * @}
AnnaBridge 189:f392fc9709a3 341 */
AnnaBridge 189:f392fc9709a3 342
AnnaBridge 189:f392fc9709a3 343 /** @defgroup UART_Mode UART Transfer Mode
AnnaBridge 189:f392fc9709a3 344 * @{
AnnaBridge 189:f392fc9709a3 345 */
AnnaBridge 189:f392fc9709a3 346 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */
AnnaBridge 189:f392fc9709a3 347 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */
AnnaBridge 189:f392fc9709a3 348 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
AnnaBridge 189:f392fc9709a3 349 /**
AnnaBridge 189:f392fc9709a3 350 * @}
AnnaBridge 189:f392fc9709a3 351 */
AnnaBridge 189:f392fc9709a3 352
AnnaBridge 189:f392fc9709a3 353 /** @defgroup UART_State UART State
AnnaBridge 189:f392fc9709a3 354 * @{
AnnaBridge 189:f392fc9709a3 355 */
AnnaBridge 189:f392fc9709a3 356 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */
AnnaBridge 189:f392fc9709a3 357 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */
AnnaBridge 189:f392fc9709a3 358 /**
AnnaBridge 189:f392fc9709a3 359 * @}
AnnaBridge 189:f392fc9709a3 360 */
AnnaBridge 189:f392fc9709a3 361
AnnaBridge 189:f392fc9709a3 362 /** @defgroup UART_Over_Sampling UART Over Sampling
AnnaBridge 189:f392fc9709a3 363 * @{
AnnaBridge 189:f392fc9709a3 364 */
AnnaBridge 189:f392fc9709a3 365 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
AnnaBridge 189:f392fc9709a3 366 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
AnnaBridge 189:f392fc9709a3 367 /**
AnnaBridge 189:f392fc9709a3 368 * @}
AnnaBridge 189:f392fc9709a3 369 */
AnnaBridge 189:f392fc9709a3 370
AnnaBridge 189:f392fc9709a3 371 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
AnnaBridge 189:f392fc9709a3 372 * @{
AnnaBridge 189:f392fc9709a3 373 */
AnnaBridge 189:f392fc9709a3 374 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */
AnnaBridge 189:f392fc9709a3 375 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */
AnnaBridge 189:f392fc9709a3 376 /**
AnnaBridge 189:f392fc9709a3 377 * @}
AnnaBridge 189:f392fc9709a3 378 */
AnnaBridge 189:f392fc9709a3 379
AnnaBridge 189:f392fc9709a3 380 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 381 /** @defgroup UART_ClockPrescaler UART Clock Prescaler
AnnaBridge 189:f392fc9709a3 382 * @{
AnnaBridge 189:f392fc9709a3 383 */
AnnaBridge 189:f392fc9709a3 384 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
AnnaBridge 189:f392fc9709a3 385 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
AnnaBridge 189:f392fc9709a3 386 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
AnnaBridge 189:f392fc9709a3 387 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
AnnaBridge 189:f392fc9709a3 388 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
AnnaBridge 189:f392fc9709a3 389 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
AnnaBridge 189:f392fc9709a3 390 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
AnnaBridge 189:f392fc9709a3 391 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
AnnaBridge 189:f392fc9709a3 392 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
AnnaBridge 189:f392fc9709a3 393 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
AnnaBridge 189:f392fc9709a3 394 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
AnnaBridge 189:f392fc9709a3 395 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
AnnaBridge 189:f392fc9709a3 396 /**
AnnaBridge 189:f392fc9709a3 397 * @}
AnnaBridge 189:f392fc9709a3 398 */
AnnaBridge 189:f392fc9709a3 399 #endif
AnnaBridge 189:f392fc9709a3 400
AnnaBridge 189:f392fc9709a3 401 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
AnnaBridge 189:f392fc9709a3 402 * @{
AnnaBridge 189:f392fc9709a3 403 */
AnnaBridge 189:f392fc9709a3 404 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */
AnnaBridge 189:f392fc9709a3 405 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */
AnnaBridge 189:f392fc9709a3 406 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */
AnnaBridge 189:f392fc9709a3 407 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */
AnnaBridge 189:f392fc9709a3 408 /**
AnnaBridge 189:f392fc9709a3 409 * @}
AnnaBridge 189:f392fc9709a3 410 */
AnnaBridge 189:f392fc9709a3 411
AnnaBridge 189:f392fc9709a3 412 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
AnnaBridge 189:f392fc9709a3 413 * @{
AnnaBridge 189:f392fc9709a3 414 */
AnnaBridge 189:f392fc9709a3 415 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */
AnnaBridge 189:f392fc9709a3 416 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */
AnnaBridge 189:f392fc9709a3 417 /**
AnnaBridge 189:f392fc9709a3 418 * @}
AnnaBridge 189:f392fc9709a3 419 */
AnnaBridge 189:f392fc9709a3 420
AnnaBridge 189:f392fc9709a3 421 /** @defgroup UART_LIN UART Local Interconnection Network mode
AnnaBridge 189:f392fc9709a3 422 * @{
AnnaBridge 189:f392fc9709a3 423 */
AnnaBridge 189:f392fc9709a3 424 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */
AnnaBridge 189:f392fc9709a3 425 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */
AnnaBridge 189:f392fc9709a3 426 /**
AnnaBridge 189:f392fc9709a3 427 * @}
AnnaBridge 189:f392fc9709a3 428 */
AnnaBridge 189:f392fc9709a3 429
AnnaBridge 189:f392fc9709a3 430 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
AnnaBridge 189:f392fc9709a3 431 * @{
AnnaBridge 189:f392fc9709a3 432 */
AnnaBridge 189:f392fc9709a3 433 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */
AnnaBridge 189:f392fc9709a3 434 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */
AnnaBridge 189:f392fc9709a3 435 /**
AnnaBridge 189:f392fc9709a3 436 * @}
AnnaBridge 189:f392fc9709a3 437 */
AnnaBridge 189:f392fc9709a3 438
AnnaBridge 189:f392fc9709a3 439 /** @defgroup UART_DMA_Tx UART DMA Tx
AnnaBridge 189:f392fc9709a3 440 * @{
AnnaBridge 189:f392fc9709a3 441 */
AnnaBridge 189:f392fc9709a3 442 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */
AnnaBridge 189:f392fc9709a3 443 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */
AnnaBridge 189:f392fc9709a3 444 /**
AnnaBridge 189:f392fc9709a3 445 * @}
AnnaBridge 189:f392fc9709a3 446 */
AnnaBridge 189:f392fc9709a3 447
AnnaBridge 189:f392fc9709a3 448 /** @defgroup UART_DMA_Rx UART DMA Rx
AnnaBridge 189:f392fc9709a3 449 * @{
AnnaBridge 189:f392fc9709a3 450 */
AnnaBridge 189:f392fc9709a3 451 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */
AnnaBridge 189:f392fc9709a3 452 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */
AnnaBridge 189:f392fc9709a3 453 /**
AnnaBridge 189:f392fc9709a3 454 * @}
AnnaBridge 189:f392fc9709a3 455 */
AnnaBridge 189:f392fc9709a3 456
AnnaBridge 189:f392fc9709a3 457 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
AnnaBridge 189:f392fc9709a3 458 * @{
AnnaBridge 189:f392fc9709a3 459 */
AnnaBridge 189:f392fc9709a3 460 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */
AnnaBridge 189:f392fc9709a3 461 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */
AnnaBridge 189:f392fc9709a3 462 /**
AnnaBridge 189:f392fc9709a3 463 * @}
AnnaBridge 189:f392fc9709a3 464 */
AnnaBridge 189:f392fc9709a3 465
AnnaBridge 189:f392fc9709a3 466 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
AnnaBridge 189:f392fc9709a3 467 * @{
AnnaBridge 189:f392fc9709a3 468 */
AnnaBridge 189:f392fc9709a3 469 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */
AnnaBridge 189:f392fc9709a3 470 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */
AnnaBridge 189:f392fc9709a3 471 /**
AnnaBridge 189:f392fc9709a3 472 * @}
AnnaBridge 189:f392fc9709a3 473 */
AnnaBridge 189:f392fc9709a3 474
AnnaBridge 189:f392fc9709a3 475 /** @defgroup UART_Request_Parameters UART Request Parameters
AnnaBridge 189:f392fc9709a3 476 * @{
AnnaBridge 189:f392fc9709a3 477 */
AnnaBridge 189:f392fc9709a3 478 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */
AnnaBridge 189:f392fc9709a3 479 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */
AnnaBridge 189:f392fc9709a3 480 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */
AnnaBridge 189:f392fc9709a3 481 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
AnnaBridge 189:f392fc9709a3 482 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
AnnaBridge 189:f392fc9709a3 483 /**
AnnaBridge 189:f392fc9709a3 484 * @}
AnnaBridge 189:f392fc9709a3 485 */
AnnaBridge 189:f392fc9709a3 486
AnnaBridge 189:f392fc9709a3 487 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
AnnaBridge 189:f392fc9709a3 488 * @{
AnnaBridge 189:f392fc9709a3 489 */
AnnaBridge 189:f392fc9709a3 490 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
AnnaBridge 189:f392fc9709a3 491 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
AnnaBridge 189:f392fc9709a3 492 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
AnnaBridge 189:f392fc9709a3 493 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
AnnaBridge 189:f392fc9709a3 494 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
AnnaBridge 189:f392fc9709a3 495 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
AnnaBridge 189:f392fc9709a3 496 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
AnnaBridge 189:f392fc9709a3 497 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */
AnnaBridge 189:f392fc9709a3 498 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
AnnaBridge 189:f392fc9709a3 499 /**
AnnaBridge 189:f392fc9709a3 500 * @}
AnnaBridge 189:f392fc9709a3 501 */
AnnaBridge 189:f392fc9709a3 502
AnnaBridge 189:f392fc9709a3 503 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
AnnaBridge 189:f392fc9709a3 504 * @{
AnnaBridge 189:f392fc9709a3 505 */
AnnaBridge 189:f392fc9709a3 506 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */
AnnaBridge 189:f392fc9709a3 507 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */
AnnaBridge 189:f392fc9709a3 508 /**
AnnaBridge 189:f392fc9709a3 509 * @}
AnnaBridge 189:f392fc9709a3 510 */
AnnaBridge 189:f392fc9709a3 511
AnnaBridge 189:f392fc9709a3 512 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
AnnaBridge 189:f392fc9709a3 513 * @{
AnnaBridge 189:f392fc9709a3 514 */
AnnaBridge 189:f392fc9709a3 515 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */
AnnaBridge 189:f392fc9709a3 516 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */
AnnaBridge 189:f392fc9709a3 517 /**
AnnaBridge 189:f392fc9709a3 518 * @}
AnnaBridge 189:f392fc9709a3 519 */
AnnaBridge 189:f392fc9709a3 520
AnnaBridge 189:f392fc9709a3 521 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
AnnaBridge 189:f392fc9709a3 522 * @{
AnnaBridge 189:f392fc9709a3 523 */
AnnaBridge 189:f392fc9709a3 524 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */
AnnaBridge 189:f392fc9709a3 525 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */
AnnaBridge 189:f392fc9709a3 526 /**
AnnaBridge 189:f392fc9709a3 527 * @}
AnnaBridge 189:f392fc9709a3 528 */
AnnaBridge 189:f392fc9709a3 529
AnnaBridge 189:f392fc9709a3 530 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
AnnaBridge 189:f392fc9709a3 531 * @{
AnnaBridge 189:f392fc9709a3 532 */
AnnaBridge 189:f392fc9709a3 533 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */
AnnaBridge 189:f392fc9709a3 534 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */
AnnaBridge 189:f392fc9709a3 535 /**
AnnaBridge 189:f392fc9709a3 536 * @}
AnnaBridge 189:f392fc9709a3 537 */
AnnaBridge 189:f392fc9709a3 538
AnnaBridge 189:f392fc9709a3 539 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
AnnaBridge 189:f392fc9709a3 540 * @{
AnnaBridge 189:f392fc9709a3 541 */
AnnaBridge 189:f392fc9709a3 542 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */
AnnaBridge 189:f392fc9709a3 543 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */
AnnaBridge 189:f392fc9709a3 544 /**
AnnaBridge 189:f392fc9709a3 545 * @}
AnnaBridge 189:f392fc9709a3 546 */
AnnaBridge 189:f392fc9709a3 547
AnnaBridge 189:f392fc9709a3 548 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
AnnaBridge 189:f392fc9709a3 549 * @{
AnnaBridge 189:f392fc9709a3 550 */
AnnaBridge 189:f392fc9709a3 551 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */
AnnaBridge 189:f392fc9709a3 552 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */
AnnaBridge 189:f392fc9709a3 553 /**
AnnaBridge 189:f392fc9709a3 554 * @}
AnnaBridge 189:f392fc9709a3 555 */
AnnaBridge 189:f392fc9709a3 556
AnnaBridge 189:f392fc9709a3 557 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
AnnaBridge 189:f392fc9709a3 558 * @{
AnnaBridge 189:f392fc9709a3 559 */
AnnaBridge 189:f392fc9709a3 560 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */
AnnaBridge 189:f392fc9709a3 561 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */
AnnaBridge 189:f392fc9709a3 562 /**
AnnaBridge 189:f392fc9709a3 563 * @}
AnnaBridge 189:f392fc9709a3 564 */
AnnaBridge 189:f392fc9709a3 565
AnnaBridge 189:f392fc9709a3 566 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
AnnaBridge 189:f392fc9709a3 567 * @{
AnnaBridge 189:f392fc9709a3 568 */
AnnaBridge 189:f392fc9709a3 569 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */
AnnaBridge 189:f392fc9709a3 570 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */
AnnaBridge 189:f392fc9709a3 571 /**
AnnaBridge 189:f392fc9709a3 572 * @}
AnnaBridge 189:f392fc9709a3 573 */
AnnaBridge 189:f392fc9709a3 574
AnnaBridge 189:f392fc9709a3 575 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
AnnaBridge 189:f392fc9709a3 576 * @{
AnnaBridge 189:f392fc9709a3 577 */
AnnaBridge 189:f392fc9709a3 578 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */
AnnaBridge 189:f392fc9709a3 579 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */
AnnaBridge 189:f392fc9709a3 580 /**
AnnaBridge 189:f392fc9709a3 581 * @}
AnnaBridge 189:f392fc9709a3 582 */
AnnaBridge 189:f392fc9709a3 583
AnnaBridge 189:f392fc9709a3 584 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
AnnaBridge 189:f392fc9709a3 585 * @{
AnnaBridge 189:f392fc9709a3 586 */
AnnaBridge 189:f392fc9709a3 587 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */
AnnaBridge 189:f392fc9709a3 588 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */
AnnaBridge 189:f392fc9709a3 589 /**
AnnaBridge 189:f392fc9709a3 590 * @}
AnnaBridge 189:f392fc9709a3 591 */
AnnaBridge 189:f392fc9709a3 592
AnnaBridge 189:f392fc9709a3 593 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
AnnaBridge 189:f392fc9709a3 594 * @{
AnnaBridge 189:f392fc9709a3 595 */
AnnaBridge 189:f392fc9709a3 596 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */
AnnaBridge 189:f392fc9709a3 597 /**
AnnaBridge 189:f392fc9709a3 598 * @}
AnnaBridge 189:f392fc9709a3 599 */
AnnaBridge 189:f392fc9709a3 600
AnnaBridge 189:f392fc9709a3 601 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
AnnaBridge 189:f392fc9709a3 602 * @{
AnnaBridge 189:f392fc9709a3 603 */
AnnaBridge 189:f392fc9709a3 604 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */
AnnaBridge 189:f392fc9709a3 605 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */
AnnaBridge 189:f392fc9709a3 606 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */
AnnaBridge 189:f392fc9709a3 607 /**
AnnaBridge 189:f392fc9709a3 608 * @}
AnnaBridge 189:f392fc9709a3 609 */
AnnaBridge 189:f392fc9709a3 610
AnnaBridge 189:f392fc9709a3 611 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
AnnaBridge 189:f392fc9709a3 612 * @{
AnnaBridge 189:f392fc9709a3 613 */
AnnaBridge 189:f392fc9709a3 614 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */
AnnaBridge 189:f392fc9709a3 615 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */
AnnaBridge 189:f392fc9709a3 616 /**
AnnaBridge 189:f392fc9709a3 617 * @}
AnnaBridge 189:f392fc9709a3 618 */
AnnaBridge 189:f392fc9709a3 619
AnnaBridge 189:f392fc9709a3 620 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
AnnaBridge 189:f392fc9709a3 621 * @{
AnnaBridge 189:f392fc9709a3 622 */
AnnaBridge 189:f392fc9709a3 623 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */
AnnaBridge 189:f392fc9709a3 624 /**
AnnaBridge 189:f392fc9709a3 625 * @}
AnnaBridge 189:f392fc9709a3 626 */
AnnaBridge 189:f392fc9709a3 627
AnnaBridge 189:f392fc9709a3 628 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
AnnaBridge 189:f392fc9709a3 629 * @{
AnnaBridge 189:f392fc9709a3 630 */
AnnaBridge 189:f392fc9709a3 631 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
AnnaBridge 189:f392fc9709a3 632 /**
AnnaBridge 189:f392fc9709a3 633 * @}
AnnaBridge 189:f392fc9709a3 634 */
AnnaBridge 189:f392fc9709a3 635
AnnaBridge 189:f392fc9709a3 636 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
AnnaBridge 189:f392fc9709a3 637 * @{
AnnaBridge 189:f392fc9709a3 638 */
AnnaBridge 189:f392fc9709a3 639 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */
AnnaBridge 189:f392fc9709a3 640 /**
AnnaBridge 189:f392fc9709a3 641 * @}
AnnaBridge 189:f392fc9709a3 642 */
AnnaBridge 189:f392fc9709a3 643
AnnaBridge 189:f392fc9709a3 644 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
AnnaBridge 189:f392fc9709a3 645 * @{
AnnaBridge 189:f392fc9709a3 646 */
AnnaBridge 189:f392fc9709a3 647 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
AnnaBridge 189:f392fc9709a3 648 /**
AnnaBridge 189:f392fc9709a3 649 * @}
AnnaBridge 189:f392fc9709a3 650 */
AnnaBridge 189:f392fc9709a3 651
AnnaBridge 189:f392fc9709a3 652 /** @defgroup UART_Flags UART Status Flags
AnnaBridge 189:f392fc9709a3 653 * Elements values convention: 0xXXXX
AnnaBridge 189:f392fc9709a3 654 * - 0xXXXX : Flag mask in the ISR register
AnnaBridge 189:f392fc9709a3 655 * @{
AnnaBridge 189:f392fc9709a3 656 */
AnnaBridge 189:f392fc9709a3 657 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */
AnnaBridge 189:f392fc9709a3 658 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */
AnnaBridge 189:f392fc9709a3 659 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */
AnnaBridge 189:f392fc9709a3 660 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */
AnnaBridge 189:f392fc9709a3 661 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */
AnnaBridge 189:f392fc9709a3 662 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */
AnnaBridge 189:f392fc9709a3 663 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */
AnnaBridge 189:f392fc9709a3 664 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */
AnnaBridge 189:f392fc9709a3 665 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */
AnnaBridge 189:f392fc9709a3 666 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */
AnnaBridge 189:f392fc9709a3 667 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */
AnnaBridge 189:f392fc9709a3 668 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */
AnnaBridge 189:f392fc9709a3 669 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */
AnnaBridge 189:f392fc9709a3 670 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */
AnnaBridge 189:f392fc9709a3 671 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */
AnnaBridge 189:f392fc9709a3 672 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */
AnnaBridge 189:f392fc9709a3 673 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 674 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */
AnnaBridge 189:f392fc9709a3 675 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */
AnnaBridge 189:f392fc9709a3 676 #else
AnnaBridge 189:f392fc9709a3 677 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */
AnnaBridge 189:f392fc9709a3 678 #endif
AnnaBridge 189:f392fc9709a3 679 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */
AnnaBridge 189:f392fc9709a3 680 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 681 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */
AnnaBridge 189:f392fc9709a3 682 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */
AnnaBridge 189:f392fc9709a3 683 #else
AnnaBridge 189:f392fc9709a3 684 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */
AnnaBridge 189:f392fc9709a3 685 #endif
AnnaBridge 189:f392fc9709a3 686 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */
AnnaBridge 189:f392fc9709a3 687 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */
AnnaBridge 189:f392fc9709a3 688 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */
AnnaBridge 189:f392fc9709a3 689 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */
AnnaBridge 189:f392fc9709a3 690 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */
AnnaBridge 189:f392fc9709a3 691 /**
AnnaBridge 189:f392fc9709a3 692 * @}
AnnaBridge 189:f392fc9709a3 693 */
AnnaBridge 189:f392fc9709a3 694
AnnaBridge 189:f392fc9709a3 695 /** @defgroup UART_Interrupt_definition UART Interrupts Definition
AnnaBridge 189:f392fc9709a3 696 * Elements values convention: 000ZZZZZ0XXYYYYYb
AnnaBridge 189:f392fc9709a3 697 * - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge 189:f392fc9709a3 698 * - XX : Interrupt source register (2bits)
AnnaBridge 189:f392fc9709a3 699 * - 01: CR1 register
AnnaBridge 189:f392fc9709a3 700 * - 10: CR2 register
AnnaBridge 189:f392fc9709a3 701 * - 11: CR3 register
AnnaBridge 189:f392fc9709a3 702 * - ZZZZZ : Flag position in the ISR register(5bits)
AnnaBridge 189:f392fc9709a3 703 * @{
AnnaBridge 189:f392fc9709a3 704 */
AnnaBridge 189:f392fc9709a3 705 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */
AnnaBridge 189:f392fc9709a3 706 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */
AnnaBridge 189:f392fc9709a3 707 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 708 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */
AnnaBridge 189:f392fc9709a3 709 #endif
AnnaBridge 189:f392fc9709a3 710 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */
AnnaBridge 189:f392fc9709a3 711 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */
AnnaBridge 189:f392fc9709a3 712 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 713 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */
AnnaBridge 189:f392fc9709a3 714 #endif
AnnaBridge 189:f392fc9709a3 715 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */
AnnaBridge 189:f392fc9709a3 716 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */
AnnaBridge 189:f392fc9709a3 717 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */
AnnaBridge 189:f392fc9709a3 718 #define UART_IT_CM 0x112EU /*!< UART character match interruption */
AnnaBridge 189:f392fc9709a3 719 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */
AnnaBridge 189:f392fc9709a3 720 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 721 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */
AnnaBridge 189:f392fc9709a3 722 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */
AnnaBridge 189:f392fc9709a3 723 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */
AnnaBridge 189:f392fc9709a3 724 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */
AnnaBridge 189:f392fc9709a3 725 #endif
AnnaBridge 189:f392fc9709a3 726
AnnaBridge 189:f392fc9709a3 727 /* Elements values convention: 000000000XXYYYYYb
AnnaBridge 189:f392fc9709a3 728 - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge 189:f392fc9709a3 729 - XX : Interrupt source register (2bits)
AnnaBridge 189:f392fc9709a3 730 - 01: CR1 register
AnnaBridge 189:f392fc9709a3 731 - 10: CR2 register
AnnaBridge 189:f392fc9709a3 732 - 11: CR3 register */
AnnaBridge 189:f392fc9709a3 733 #define UART_IT_ERR 0x0060U /*!< UART error interruption */
AnnaBridge 189:f392fc9709a3 734
AnnaBridge 189:f392fc9709a3 735 /* Elements values convention: 0000ZZZZ00000000b
AnnaBridge 189:f392fc9709a3 736 - ZZZZ : Flag position in the ISR register(4bits) */
AnnaBridge 189:f392fc9709a3 737 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */
AnnaBridge 189:f392fc9709a3 738 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */
AnnaBridge 189:f392fc9709a3 739 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */
AnnaBridge 189:f392fc9709a3 740 /**
AnnaBridge 189:f392fc9709a3 741 * @}
AnnaBridge 189:f392fc9709a3 742 */
AnnaBridge 189:f392fc9709a3 743
AnnaBridge 189:f392fc9709a3 744 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
AnnaBridge 189:f392fc9709a3 745 * @{
AnnaBridge 189:f392fc9709a3 746 */
AnnaBridge 189:f392fc9709a3 747 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
AnnaBridge 189:f392fc9709a3 748 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
AnnaBridge 189:f392fc9709a3 749 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
AnnaBridge 189:f392fc9709a3 750 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
AnnaBridge 189:f392fc9709a3 751 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
AnnaBridge 189:f392fc9709a3 752 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 753 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */
AnnaBridge 189:f392fc9709a3 754 #endif
AnnaBridge 189:f392fc9709a3 755 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
AnnaBridge 189:f392fc9709a3 756 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
AnnaBridge 189:f392fc9709a3 757 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
AnnaBridge 189:f392fc9709a3 758 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
AnnaBridge 189:f392fc9709a3 759 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
AnnaBridge 189:f392fc9709a3 760 /**
AnnaBridge 189:f392fc9709a3 761 * @}
AnnaBridge 189:f392fc9709a3 762 */
AnnaBridge 189:f392fc9709a3 763
AnnaBridge 189:f392fc9709a3 764
AnnaBridge 189:f392fc9709a3 765 /**
AnnaBridge 189:f392fc9709a3 766 * @}
AnnaBridge 189:f392fc9709a3 767 */
AnnaBridge 189:f392fc9709a3 768
AnnaBridge 189:f392fc9709a3 769 /* Exported macros -----------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 770 /** @defgroup UART_Exported_Macros UART Exported Macros
AnnaBridge 189:f392fc9709a3 771 * @{
AnnaBridge 189:f392fc9709a3 772 */
AnnaBridge 189:f392fc9709a3 773
AnnaBridge 189:f392fc9709a3 774 /** @brief Reset UART handle states.
AnnaBridge 189:f392fc9709a3 775 * @param __HANDLE__ UART handle.
AnnaBridge 189:f392fc9709a3 776 * @retval None
AnnaBridge 189:f392fc9709a3 777 */
AnnaBridge 189:f392fc9709a3 778 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge 189:f392fc9709a3 779 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
AnnaBridge 189:f392fc9709a3 780 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
AnnaBridge 189:f392fc9709a3 781 } while(0)
AnnaBridge 189:f392fc9709a3 782 /** @brief Flush the UART Data registers.
AnnaBridge 189:f392fc9709a3 783 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 784 * @retval None
AnnaBridge 189:f392fc9709a3 785 */
AnnaBridge 189:f392fc9709a3 786 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 787 do{ \
AnnaBridge 189:f392fc9709a3 788 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
AnnaBridge 189:f392fc9709a3 789 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
AnnaBridge 189:f392fc9709a3 790 } while(0)
AnnaBridge 189:f392fc9709a3 791
AnnaBridge 189:f392fc9709a3 792 /** @brief Clear the specified UART pending flag.
AnnaBridge 189:f392fc9709a3 793 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 794 * @param __FLAG__ specifies the flag to check.
AnnaBridge 189:f392fc9709a3 795 * This parameter can be any combination of the following values:
AnnaBridge 189:f392fc9709a3 796 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
AnnaBridge 189:f392fc9709a3 797 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
AnnaBridge 189:f392fc9709a3 798 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
AnnaBridge 189:f392fc9709a3 799 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
AnnaBridge 189:f392fc9709a3 800 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
AnnaBridge 189:f392fc9709a3 801 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag
AnnaBridge 189:f392fc9709a3 802 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
AnnaBridge 189:f392fc9709a3 803 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
AnnaBridge 189:f392fc9709a3 804 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
AnnaBridge 189:f392fc9709a3 805 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
AnnaBridge 189:f392fc9709a3 806 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
AnnaBridge 189:f392fc9709a3 807 * @retval None
AnnaBridge 189:f392fc9709a3 808 */
AnnaBridge 189:f392fc9709a3 809 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge 189:f392fc9709a3 810
AnnaBridge 189:f392fc9709a3 811 /** @brief Clear the UART PE pending flag.
AnnaBridge 189:f392fc9709a3 812 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 813 * @retval None
AnnaBridge 189:f392fc9709a3 814 */
AnnaBridge 189:f392fc9709a3 815 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
AnnaBridge 189:f392fc9709a3 816
AnnaBridge 189:f392fc9709a3 817 /** @brief Clear the UART FE pending flag.
AnnaBridge 189:f392fc9709a3 818 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 819 * @retval None
AnnaBridge 189:f392fc9709a3 820 */
AnnaBridge 189:f392fc9709a3 821 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
AnnaBridge 189:f392fc9709a3 822
AnnaBridge 189:f392fc9709a3 823 /** @brief Clear the UART NE pending flag.
AnnaBridge 189:f392fc9709a3 824 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 825 * @retval None
AnnaBridge 189:f392fc9709a3 826 */
AnnaBridge 189:f392fc9709a3 827 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
AnnaBridge 189:f392fc9709a3 828
AnnaBridge 189:f392fc9709a3 829 /** @brief Clear the UART ORE pending flag.
AnnaBridge 189:f392fc9709a3 830 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 831 * @retval None
AnnaBridge 189:f392fc9709a3 832 */
AnnaBridge 189:f392fc9709a3 833 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
AnnaBridge 189:f392fc9709a3 834
AnnaBridge 189:f392fc9709a3 835 /** @brief Clear the UART IDLE pending flag.
AnnaBridge 189:f392fc9709a3 836 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 837 * @retval None
AnnaBridge 189:f392fc9709a3 838 */
AnnaBridge 189:f392fc9709a3 839 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
AnnaBridge 189:f392fc9709a3 840
AnnaBridge 189:f392fc9709a3 841 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 842 /** @brief Clear the UART TX FIFO empty clear flag.
AnnaBridge 189:f392fc9709a3 843 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 844 * @retval None
AnnaBridge 189:f392fc9709a3 845 */
AnnaBridge 189:f392fc9709a3 846 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF)
AnnaBridge 189:f392fc9709a3 847 #endif
AnnaBridge 189:f392fc9709a3 848
AnnaBridge 189:f392fc9709a3 849 /** @brief Check whether the specified UART flag is set or not.
AnnaBridge 189:f392fc9709a3 850 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 851 * @param __FLAG__ specifies the flag to check.
AnnaBridge 189:f392fc9709a3 852 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 853 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag
AnnaBridge 189:f392fc9709a3 854 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag
AnnaBridge 189:f392fc9709a3 855 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag
AnnaBridge 189:f392fc9709a3 856 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag
AnnaBridge 189:f392fc9709a3 857 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
AnnaBridge 189:f392fc9709a3 858 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
AnnaBridge 189:f392fc9709a3 859 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag
AnnaBridge 189:f392fc9709a3 860 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
AnnaBridge 189:f392fc9709a3 861 * @arg @ref UART_FLAG_SBKF Send Break flag
AnnaBridge 189:f392fc9709a3 862 * @arg @ref UART_FLAG_CMF Character match flag
AnnaBridge 189:f392fc9709a3 863 * @arg @ref UART_FLAG_BUSY Busy flag
AnnaBridge 189:f392fc9709a3 864 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
AnnaBridge 189:f392fc9709a3 865 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
AnnaBridge 189:f392fc9709a3 866 * @arg @ref UART_FLAG_CTS CTS Change flag
AnnaBridge 189:f392fc9709a3 867 * @arg @ref UART_FLAG_LBDF LIN Break detection flag
AnnaBridge 189:f392fc9709a3 868 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
AnnaBridge 189:f392fc9709a3 869 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag
AnnaBridge 189:f392fc9709a3 870 * @arg @ref UART_FLAG_TC Transmission Complete flag
AnnaBridge 189:f392fc9709a3 871 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
AnnaBridge 189:f392fc9709a3 872 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag
AnnaBridge 189:f392fc9709a3 873 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
AnnaBridge 189:f392fc9709a3 874 * @arg @ref UART_FLAG_ORE Overrun Error flag
AnnaBridge 189:f392fc9709a3 875 * @arg @ref UART_FLAG_NE Noise Error flag
AnnaBridge 189:f392fc9709a3 876 * @arg @ref UART_FLAG_FE Framing Error flag
AnnaBridge 189:f392fc9709a3 877 * @arg @ref UART_FLAG_PE Parity Error flag
AnnaBridge 189:f392fc9709a3 878 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 189:f392fc9709a3 879 */
AnnaBridge 189:f392fc9709a3 880 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
AnnaBridge 189:f392fc9709a3 881
AnnaBridge 189:f392fc9709a3 882 /** @brief Enable the specified UART interrupt.
AnnaBridge 189:f392fc9709a3 883 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 884 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
AnnaBridge 189:f392fc9709a3 885 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 886 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
AnnaBridge 189:f392fc9709a3 887 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
AnnaBridge 189:f392fc9709a3 888 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 889 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 890 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
AnnaBridge 189:f392fc9709a3 891 * @arg @ref UART_IT_CM Character match interrupt
AnnaBridge 189:f392fc9709a3 892 * @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge 189:f392fc9709a3 893 * @arg @ref UART_IT_LBD LIN Break detection interrupt
AnnaBridge 189:f392fc9709a3 894 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 189:f392fc9709a3 895 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
AnnaBridge 189:f392fc9709a3 896 * @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge 189:f392fc9709a3 897 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 189:f392fc9709a3 898 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
AnnaBridge 189:f392fc9709a3 899 * @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge 189:f392fc9709a3 900 * @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge 189:f392fc9709a3 901 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge 189:f392fc9709a3 902 * @retval None
AnnaBridge 189:f392fc9709a3 903 */
AnnaBridge 189:f392fc9709a3 904 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge 189:f392fc9709a3 905 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge 189:f392fc9709a3 906 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
AnnaBridge 189:f392fc9709a3 907
AnnaBridge 189:f392fc9709a3 908
AnnaBridge 189:f392fc9709a3 909 /** @brief Disable the specified UART interrupt.
AnnaBridge 189:f392fc9709a3 910 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 911 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
AnnaBridge 189:f392fc9709a3 912 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 913 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
AnnaBridge 189:f392fc9709a3 914 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
AnnaBridge 189:f392fc9709a3 915 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 916 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 917 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
AnnaBridge 189:f392fc9709a3 918 * @arg @ref UART_IT_CM Character match interrupt
AnnaBridge 189:f392fc9709a3 919 * @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge 189:f392fc9709a3 920 * @arg @ref UART_IT_LBD LIN Break detection interrupt
AnnaBridge 189:f392fc9709a3 921 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 189:f392fc9709a3 922 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
AnnaBridge 189:f392fc9709a3 923 * @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge 189:f392fc9709a3 924 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 189:f392fc9709a3 925 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
AnnaBridge 189:f392fc9709a3 926 * @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge 189:f392fc9709a3 927 * @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge 189:f392fc9709a3 928 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge 189:f392fc9709a3 929 * @retval None
AnnaBridge 189:f392fc9709a3 930 */
AnnaBridge 189:f392fc9709a3 931 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge 189:f392fc9709a3 932 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge 189:f392fc9709a3 933 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
AnnaBridge 189:f392fc9709a3 934
AnnaBridge 189:f392fc9709a3 935 /** @brief Check whether the specified UART interrupt has occurred or not.
AnnaBridge 189:f392fc9709a3 936 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 937 * @param __INTERRUPT__ specifies the UART interrupt to check.
AnnaBridge 189:f392fc9709a3 938 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 939 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
AnnaBridge 189:f392fc9709a3 940 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
AnnaBridge 189:f392fc9709a3 941 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 942 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 943 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
AnnaBridge 189:f392fc9709a3 944 * @arg @ref UART_IT_CM Character match interrupt
AnnaBridge 189:f392fc9709a3 945 * @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge 189:f392fc9709a3 946 * @arg @ref UART_IT_LBD LIN Break detection interrupt
AnnaBridge 189:f392fc9709a3 947 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 189:f392fc9709a3 948 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
AnnaBridge 189:f392fc9709a3 949 * @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge 189:f392fc9709a3 950 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 189:f392fc9709a3 951 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
AnnaBridge 189:f392fc9709a3 952 * @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge 189:f392fc9709a3 953 * @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge 189:f392fc9709a3 954 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge 189:f392fc9709a3 955 * @retval The new state of __INTERRUPT__ (SET or RESET).
AnnaBridge 189:f392fc9709a3 956 */
AnnaBridge 189:f392fc9709a3 957 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET)
AnnaBridge 189:f392fc9709a3 958
AnnaBridge 189:f392fc9709a3 959 /** @brief Check whether the specified UART interrupt source is enabled or not.
AnnaBridge 189:f392fc9709a3 960 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 961 * @param __INTERRUPT__ specifies the UART interrupt source to check.
AnnaBridge 189:f392fc9709a3 962 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 963 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
AnnaBridge 189:f392fc9709a3 964 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
AnnaBridge 189:f392fc9709a3 965 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 966 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
AnnaBridge 189:f392fc9709a3 967 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
AnnaBridge 189:f392fc9709a3 968 * @arg @ref UART_IT_CM Character match interrupt
AnnaBridge 189:f392fc9709a3 969 * @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge 189:f392fc9709a3 970 * @arg @ref UART_IT_LBD LIN Break detection interrupt
AnnaBridge 189:f392fc9709a3 971 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 189:f392fc9709a3 972 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
AnnaBridge 189:f392fc9709a3 973 * @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge 189:f392fc9709a3 974 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 189:f392fc9709a3 975 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
AnnaBridge 189:f392fc9709a3 976 * @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge 189:f392fc9709a3 977 * @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge 189:f392fc9709a3 978 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge 189:f392fc9709a3 979 * @retval The new state of __INTERRUPT__ (SET or RESET).
AnnaBridge 189:f392fc9709a3 980 */
AnnaBridge 189:f392fc9709a3 981 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \
AnnaBridge 189:f392fc9709a3 982 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \
AnnaBridge 189:f392fc9709a3 983 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET)
AnnaBridge 189:f392fc9709a3 984
AnnaBridge 189:f392fc9709a3 985 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
AnnaBridge 189:f392fc9709a3 986 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 987 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
AnnaBridge 189:f392fc9709a3 988 * to clear the corresponding interrupt
AnnaBridge 189:f392fc9709a3 989 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 990 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
AnnaBridge 189:f392fc9709a3 991 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
AnnaBridge 189:f392fc9709a3 992 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
AnnaBridge 189:f392fc9709a3 993 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
AnnaBridge 189:f392fc9709a3 994 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
AnnaBridge 189:f392fc9709a3 995 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag
AnnaBridge 189:f392fc9709a3 996 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
AnnaBridge 189:f392fc9709a3 997 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
AnnaBridge 189:f392fc9709a3 998 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
AnnaBridge 189:f392fc9709a3 999 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
AnnaBridge 189:f392fc9709a3 1000 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
AnnaBridge 189:f392fc9709a3 1001 * @retval None
AnnaBridge 189:f392fc9709a3 1002 */
AnnaBridge 189:f392fc9709a3 1003 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
AnnaBridge 189:f392fc9709a3 1004
AnnaBridge 189:f392fc9709a3 1005 /** @brief Set a specific UART request flag.
AnnaBridge 189:f392fc9709a3 1006 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1007 * @param __REQ__ specifies the request flag to set
AnnaBridge 189:f392fc9709a3 1008 * This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 1009 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
AnnaBridge 189:f392fc9709a3 1010 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
AnnaBridge 189:f392fc9709a3 1011 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
AnnaBridge 189:f392fc9709a3 1012 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
AnnaBridge 189:f392fc9709a3 1013 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
AnnaBridge 189:f392fc9709a3 1014 * @retval None
AnnaBridge 189:f392fc9709a3 1015 */
AnnaBridge 189:f392fc9709a3 1016 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__))
AnnaBridge 189:f392fc9709a3 1017
AnnaBridge 189:f392fc9709a3 1018 /** @brief Enable the UART one bit sample method.
AnnaBridge 189:f392fc9709a3 1019 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1020 * @retval None
AnnaBridge 189:f392fc9709a3 1021 */
AnnaBridge 189:f392fc9709a3 1022 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
AnnaBridge 189:f392fc9709a3 1023
AnnaBridge 189:f392fc9709a3 1024 /** @brief Disable the UART one bit sample method.
AnnaBridge 189:f392fc9709a3 1025 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1026 * @retval None
AnnaBridge 189:f392fc9709a3 1027 */
AnnaBridge 189:f392fc9709a3 1028 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
AnnaBridge 189:f392fc9709a3 1029
AnnaBridge 189:f392fc9709a3 1030 /** @brief Enable UART.
AnnaBridge 189:f392fc9709a3 1031 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1032 * @retval None
AnnaBridge 189:f392fc9709a3 1033 */
AnnaBridge 189:f392fc9709a3 1034 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
AnnaBridge 189:f392fc9709a3 1035
AnnaBridge 189:f392fc9709a3 1036 /** @brief Disable UART.
AnnaBridge 189:f392fc9709a3 1037 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1038 * @retval None
AnnaBridge 189:f392fc9709a3 1039 */
AnnaBridge 189:f392fc9709a3 1040 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
AnnaBridge 189:f392fc9709a3 1041
AnnaBridge 189:f392fc9709a3 1042 /** @brief Enable CTS flow control.
AnnaBridge 189:f392fc9709a3 1043 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
AnnaBridge 189:f392fc9709a3 1044 * without need to call HAL_UART_Init() function.
AnnaBridge 189:f392fc9709a3 1045 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 189:f392fc9709a3 1046 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge 189:f392fc9709a3 1047 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 189:f392fc9709a3 1048 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 189:f392fc9709a3 1049 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 189:f392fc9709a3 1050 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 189:f392fc9709a3 1051 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1052 * @retval None
AnnaBridge 189:f392fc9709a3 1053 */
AnnaBridge 189:f392fc9709a3 1054 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 1055 do{ \
AnnaBridge 189:f392fc9709a3 1056 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge 189:f392fc9709a3 1057 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
AnnaBridge 189:f392fc9709a3 1058 } while(0)
AnnaBridge 189:f392fc9709a3 1059
AnnaBridge 189:f392fc9709a3 1060 /** @brief Disable CTS flow control.
AnnaBridge 189:f392fc9709a3 1061 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
AnnaBridge 189:f392fc9709a3 1062 * without need to call HAL_UART_Init() function.
AnnaBridge 189:f392fc9709a3 1063 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 189:f392fc9709a3 1064 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge 189:f392fc9709a3 1065 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 189:f392fc9709a3 1066 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 189:f392fc9709a3 1067 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 189:f392fc9709a3 1068 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 189:f392fc9709a3 1069 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1070 * @retval None
AnnaBridge 189:f392fc9709a3 1071 */
AnnaBridge 189:f392fc9709a3 1072 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 1073 do{ \
AnnaBridge 189:f392fc9709a3 1074 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge 189:f392fc9709a3 1075 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
AnnaBridge 189:f392fc9709a3 1076 } while(0)
AnnaBridge 189:f392fc9709a3 1077
AnnaBridge 189:f392fc9709a3 1078 /** @brief Enable RTS flow control.
AnnaBridge 189:f392fc9709a3 1079 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
AnnaBridge 189:f392fc9709a3 1080 * without need to call HAL_UART_Init() function.
AnnaBridge 189:f392fc9709a3 1081 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 189:f392fc9709a3 1082 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge 189:f392fc9709a3 1083 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 189:f392fc9709a3 1084 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 189:f392fc9709a3 1085 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 189:f392fc9709a3 1086 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 189:f392fc9709a3 1087 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1088 * @retval None
AnnaBridge 189:f392fc9709a3 1089 */
AnnaBridge 189:f392fc9709a3 1090 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 1091 do{ \
AnnaBridge 189:f392fc9709a3 1092 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
AnnaBridge 189:f392fc9709a3 1093 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
AnnaBridge 189:f392fc9709a3 1094 } while(0)
AnnaBridge 189:f392fc9709a3 1095
AnnaBridge 189:f392fc9709a3 1096 /** @brief Disable RTS flow control.
AnnaBridge 189:f392fc9709a3 1097 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
AnnaBridge 189:f392fc9709a3 1098 * without need to call HAL_UART_Init() function.
AnnaBridge 189:f392fc9709a3 1099 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 189:f392fc9709a3 1100 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge 189:f392fc9709a3 1101 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 189:f392fc9709a3 1102 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 189:f392fc9709a3 1103 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 189:f392fc9709a3 1104 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 189:f392fc9709a3 1105 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1106 * @retval None
AnnaBridge 189:f392fc9709a3 1107 */
AnnaBridge 189:f392fc9709a3 1108 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
AnnaBridge 189:f392fc9709a3 1109 do{ \
AnnaBridge 189:f392fc9709a3 1110 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
AnnaBridge 189:f392fc9709a3 1111 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
AnnaBridge 189:f392fc9709a3 1112 } while(0)
AnnaBridge 189:f392fc9709a3 1113 /**
AnnaBridge 189:f392fc9709a3 1114 * @}
AnnaBridge 189:f392fc9709a3 1115 */
AnnaBridge 189:f392fc9709a3 1116
AnnaBridge 189:f392fc9709a3 1117 /* Private variables -----------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 1118 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 1119 /** @defgroup UART_Private_Variables UART Private Variables
AnnaBridge 189:f392fc9709a3 1120 * @{
AnnaBridge 189:f392fc9709a3 1121 */
AnnaBridge 189:f392fc9709a3 1122 static const uint16_t UARTPrescTable[12] = {1, 2, 4, 6, 8, 10, 12, 16, 32, 64, 128, 256};
AnnaBridge 189:f392fc9709a3 1123 /**
AnnaBridge 189:f392fc9709a3 1124 * @}
AnnaBridge 189:f392fc9709a3 1125 */
AnnaBridge 189:f392fc9709a3 1126 #endif
AnnaBridge 189:f392fc9709a3 1127
AnnaBridge 189:f392fc9709a3 1128 /* Private macros --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 1129 /** @defgroup UART_Private_Macros UART Private Macros
AnnaBridge 189:f392fc9709a3 1130 * @{
AnnaBridge 189:f392fc9709a3 1131 */
AnnaBridge 189:f392fc9709a3 1132 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 1133
AnnaBridge 189:f392fc9709a3 1134 /** @brief BRR division operation to set BRR register with LPUART.
AnnaBridge 189:f392fc9709a3 1135 * @param __PCLK__ LPUART clock.
AnnaBridge 189:f392fc9709a3 1136 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 189:f392fc9709a3 1137 * @param __CLOCKPRESCALER__ UART prescaler value.
AnnaBridge 189:f392fc9709a3 1138 * @retval Division result
AnnaBridge 189:f392fc9709a3 1139 */
AnnaBridge 189:f392fc9709a3 1140 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((((uint64_t)(__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*256)) + ((__BAUD__)/2)) / (__BAUD__))
AnnaBridge 189:f392fc9709a3 1141
AnnaBridge 189:f392fc9709a3 1142 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
AnnaBridge 189:f392fc9709a3 1143 * @param __PCLK__ UART clock.
AnnaBridge 189:f392fc9709a3 1144 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 189:f392fc9709a3 1145 * @param __CLOCKPRESCALER__ UART prescaler value.
AnnaBridge 189:f392fc9709a3 1146 * @retval Division result
AnnaBridge 189:f392fc9709a3 1147 */
AnnaBridge 189:f392fc9709a3 1148 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2) + ((__BAUD__)/2)) / (__BAUD__))
AnnaBridge 189:f392fc9709a3 1149
AnnaBridge 189:f392fc9709a3 1150 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
AnnaBridge 189:f392fc9709a3 1151 * @param __PCLK__ UART clock.
AnnaBridge 189:f392fc9709a3 1152 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 189:f392fc9709a3 1153 * @param __CLOCKPRESCALER__ UART prescaler value.
AnnaBridge 189:f392fc9709a3 1154 * @retval Division result
AnnaBridge 189:f392fc9709a3 1155 */
AnnaBridge 189:f392fc9709a3 1156 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2)) / (__BAUD__))
AnnaBridge 189:f392fc9709a3 1157
AnnaBridge 189:f392fc9709a3 1158 #else
AnnaBridge 189:f392fc9709a3 1159
AnnaBridge 189:f392fc9709a3 1160 /** @brief BRR division operation to set BRR register with LPUART.
AnnaBridge 189:f392fc9709a3 1161 * @param __PCLK__ LPUART clock.
AnnaBridge 189:f392fc9709a3 1162 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 189:f392fc9709a3 1163 * @retval Division result
AnnaBridge 189:f392fc9709a3 1164 */
AnnaBridge 189:f392fc9709a3 1165 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256)) + ((__BAUD__)/2)) / (__BAUD__))
AnnaBridge 189:f392fc9709a3 1166
AnnaBridge 189:f392fc9709a3 1167 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
AnnaBridge 189:f392fc9709a3 1168 * @param __PCLK__ UART clock.
AnnaBridge 189:f392fc9709a3 1169 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 189:f392fc9709a3 1170 * @retval Division result
AnnaBridge 189:f392fc9709a3 1171 */
AnnaBridge 189:f392fc9709a3 1172 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2) + ((__BAUD__)/2)) / (__BAUD__))
AnnaBridge 189:f392fc9709a3 1173
AnnaBridge 189:f392fc9709a3 1174 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
AnnaBridge 189:f392fc9709a3 1175 * @param __PCLK__ UART clock.
AnnaBridge 189:f392fc9709a3 1176 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 189:f392fc9709a3 1177 * @retval Division result
AnnaBridge 189:f392fc9709a3 1178 */
AnnaBridge 189:f392fc9709a3 1179 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2)) / (__BAUD__))
AnnaBridge 189:f392fc9709a3 1180
AnnaBridge 189:f392fc9709a3 1181 #endif /* USART_PRESC_PRESCALER */
AnnaBridge 189:f392fc9709a3 1182
AnnaBridge 189:f392fc9709a3 1183 /** @brief Check whether or not UART instance is Low Power UART.
AnnaBridge 189:f392fc9709a3 1184 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 189:f392fc9709a3 1185 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
AnnaBridge 189:f392fc9709a3 1186 */
AnnaBridge 189:f392fc9709a3 1187 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE(__HANDLE__->Instance))
AnnaBridge 189:f392fc9709a3 1188
AnnaBridge 189:f392fc9709a3 1189 /** @brief Check UART Baud rate.
AnnaBridge 189:f392fc9709a3 1190 * @param __BAUDRATE__ Baudrate specified by the user.
AnnaBridge 189:f392fc9709a3 1191 * The maximum Baud Rate is derived from the maximum clock on G0 (i.e. 52 MHz)
AnnaBridge 189:f392fc9709a3 1192 * divided by the smallest oversampling used on the USART (i.e. 8)
AnnaBridge 189:f392fc9709a3 1193 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
AnnaBridge 189:f392fc9709a3 1194 */
AnnaBridge 189:f392fc9709a3 1195 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6500001U)
AnnaBridge 189:f392fc9709a3 1196
AnnaBridge 189:f392fc9709a3 1197 /** @brief Check UART assertion time.
AnnaBridge 189:f392fc9709a3 1198 * @param __TIME__ 5-bit value assertion time.
AnnaBridge 189:f392fc9709a3 1199 * @retval Test result (TRUE or FALSE).
AnnaBridge 189:f392fc9709a3 1200 */
AnnaBridge 189:f392fc9709a3 1201 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
AnnaBridge 189:f392fc9709a3 1202
AnnaBridge 189:f392fc9709a3 1203 /** @brief Check UART deassertion time.
AnnaBridge 189:f392fc9709a3 1204 * @param __TIME__ 5-bit value deassertion time.
AnnaBridge 189:f392fc9709a3 1205 * @retval Test result (TRUE or FALSE).
AnnaBridge 189:f392fc9709a3 1206 */
AnnaBridge 189:f392fc9709a3 1207 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
AnnaBridge 189:f392fc9709a3 1208
AnnaBridge 189:f392fc9709a3 1209 /**
AnnaBridge 189:f392fc9709a3 1210 * @brief Ensure that UART frame number of stop bits is valid.
AnnaBridge 189:f392fc9709a3 1211 * @param __STOPBITS__ UART frame number of stop bits.
AnnaBridge 189:f392fc9709a3 1212 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
AnnaBridge 189:f392fc9709a3 1213 */
AnnaBridge 189:f392fc9709a3 1214 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
AnnaBridge 189:f392fc9709a3 1215 ((__STOPBITS__) == UART_STOPBITS_1) || \
AnnaBridge 189:f392fc9709a3 1216 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
AnnaBridge 189:f392fc9709a3 1217 ((__STOPBITS__) == UART_STOPBITS_2))
AnnaBridge 189:f392fc9709a3 1218
AnnaBridge 189:f392fc9709a3 1219 /**
AnnaBridge 189:f392fc9709a3 1220 * @brief Ensure that LPUART frame number of stop bits is valid.
AnnaBridge 189:f392fc9709a3 1221 * @param __STOPBITS__ LPUART frame number of stop bits.
AnnaBridge 189:f392fc9709a3 1222 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
AnnaBridge 189:f392fc9709a3 1223 */
AnnaBridge 189:f392fc9709a3 1224 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
AnnaBridge 189:f392fc9709a3 1225 ((__STOPBITS__) == UART_STOPBITS_2))
AnnaBridge 189:f392fc9709a3 1226
AnnaBridge 189:f392fc9709a3 1227 /**
AnnaBridge 189:f392fc9709a3 1228 * @brief Ensure that UART frame parity is valid.
AnnaBridge 189:f392fc9709a3 1229 * @param __PARITY__ UART frame parity.
AnnaBridge 189:f392fc9709a3 1230 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
AnnaBridge 189:f392fc9709a3 1231 */
AnnaBridge 189:f392fc9709a3 1232 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
AnnaBridge 189:f392fc9709a3 1233 ((__PARITY__) == UART_PARITY_EVEN) || \
AnnaBridge 189:f392fc9709a3 1234 ((__PARITY__) == UART_PARITY_ODD))
AnnaBridge 189:f392fc9709a3 1235
AnnaBridge 189:f392fc9709a3 1236 /**
AnnaBridge 189:f392fc9709a3 1237 * @brief Ensure that UART hardware flow control is valid.
AnnaBridge 189:f392fc9709a3 1238 * @param __CONTROL__ UART hardware flow control.
AnnaBridge 189:f392fc9709a3 1239 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
AnnaBridge 189:f392fc9709a3 1240 */
AnnaBridge 189:f392fc9709a3 1241 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
AnnaBridge 189:f392fc9709a3 1242 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
AnnaBridge 189:f392fc9709a3 1243 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
AnnaBridge 189:f392fc9709a3 1244 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
AnnaBridge 189:f392fc9709a3 1245 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
AnnaBridge 189:f392fc9709a3 1246
AnnaBridge 189:f392fc9709a3 1247 /**
AnnaBridge 189:f392fc9709a3 1248 * @brief Ensure that UART communication mode is valid.
AnnaBridge 189:f392fc9709a3 1249 * @param __MODE__ UART communication mode.
AnnaBridge 189:f392fc9709a3 1250 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
AnnaBridge 189:f392fc9709a3 1251 */
AnnaBridge 189:f392fc9709a3 1252 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
AnnaBridge 189:f392fc9709a3 1253
AnnaBridge 189:f392fc9709a3 1254 /**
AnnaBridge 189:f392fc9709a3 1255 * @brief Ensure that UART state is valid.
AnnaBridge 189:f392fc9709a3 1256 * @param __STATE__ UART state.
AnnaBridge 189:f392fc9709a3 1257 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
AnnaBridge 189:f392fc9709a3 1258 */
AnnaBridge 189:f392fc9709a3 1259 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1260 ((__STATE__) == UART_STATE_ENABLE))
AnnaBridge 189:f392fc9709a3 1261
AnnaBridge 189:f392fc9709a3 1262 /**
AnnaBridge 189:f392fc9709a3 1263 * @brief Ensure that UART oversampling is valid.
AnnaBridge 189:f392fc9709a3 1264 * @param __SAMPLING__ UART oversampling.
AnnaBridge 189:f392fc9709a3 1265 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
AnnaBridge 189:f392fc9709a3 1266 */
AnnaBridge 189:f392fc9709a3 1267 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
AnnaBridge 189:f392fc9709a3 1268 ((__SAMPLING__) == UART_OVERSAMPLING_8))
AnnaBridge 189:f392fc9709a3 1269
AnnaBridge 189:f392fc9709a3 1270 /**
AnnaBridge 189:f392fc9709a3 1271 * @brief Ensure that UART frame sampling is valid.
AnnaBridge 189:f392fc9709a3 1272 * @param __ONEBIT__ UART frame sampling.
AnnaBridge 189:f392fc9709a3 1273 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
AnnaBridge 189:f392fc9709a3 1274 */
AnnaBridge 189:f392fc9709a3 1275 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1276 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
AnnaBridge 189:f392fc9709a3 1277
AnnaBridge 189:f392fc9709a3 1278 /**
AnnaBridge 189:f392fc9709a3 1279 * @brief Ensure that UART auto Baud rate detection mode is valid.
AnnaBridge 189:f392fc9709a3 1280 * @param __MODE__ UART auto Baud rate detection mode.
AnnaBridge 189:f392fc9709a3 1281 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
AnnaBridge 189:f392fc9709a3 1282 */
AnnaBridge 189:f392fc9709a3 1283 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
AnnaBridge 189:f392fc9709a3 1284 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
AnnaBridge 189:f392fc9709a3 1285 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
AnnaBridge 189:f392fc9709a3 1286 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
AnnaBridge 189:f392fc9709a3 1287
AnnaBridge 189:f392fc9709a3 1288 /**
AnnaBridge 189:f392fc9709a3 1289 * @brief Ensure that UART receiver timeout setting is valid.
AnnaBridge 189:f392fc9709a3 1290 * @param __TIMEOUT__ UART receiver timeout setting.
AnnaBridge 189:f392fc9709a3 1291 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
AnnaBridge 189:f392fc9709a3 1292 */
AnnaBridge 189:f392fc9709a3 1293 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1294 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
AnnaBridge 189:f392fc9709a3 1295
AnnaBridge 189:f392fc9709a3 1296 /**
AnnaBridge 189:f392fc9709a3 1297 * @brief Ensure that UART LIN state is valid.
AnnaBridge 189:f392fc9709a3 1298 * @param __LIN__ UART LIN state.
AnnaBridge 189:f392fc9709a3 1299 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
AnnaBridge 189:f392fc9709a3 1300 */
AnnaBridge 189:f392fc9709a3 1301 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1302 ((__LIN__) == UART_LIN_ENABLE))
AnnaBridge 189:f392fc9709a3 1303
AnnaBridge 189:f392fc9709a3 1304 /**
AnnaBridge 189:f392fc9709a3 1305 * @brief Ensure that UART LIN break detection length is valid.
AnnaBridge 189:f392fc9709a3 1306 * @param __LENGTH__ UART LIN break detection length.
AnnaBridge 189:f392fc9709a3 1307 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
AnnaBridge 189:f392fc9709a3 1308 */
AnnaBridge 189:f392fc9709a3 1309 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
AnnaBridge 189:f392fc9709a3 1310 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
AnnaBridge 189:f392fc9709a3 1311
AnnaBridge 189:f392fc9709a3 1312 /**
AnnaBridge 189:f392fc9709a3 1313 * @brief Ensure that UART DMA TX state is valid.
AnnaBridge 189:f392fc9709a3 1314 * @param __DMATX__ UART DMA TX state.
AnnaBridge 189:f392fc9709a3 1315 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
AnnaBridge 189:f392fc9709a3 1316 */
AnnaBridge 189:f392fc9709a3 1317 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1318 ((__DMATX__) == UART_DMA_TX_ENABLE))
AnnaBridge 189:f392fc9709a3 1319
AnnaBridge 189:f392fc9709a3 1320 /**
AnnaBridge 189:f392fc9709a3 1321 * @brief Ensure that UART DMA RX state is valid.
AnnaBridge 189:f392fc9709a3 1322 * @param __DMARX__ UART DMA RX state.
AnnaBridge 189:f392fc9709a3 1323 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
AnnaBridge 189:f392fc9709a3 1324 */
AnnaBridge 189:f392fc9709a3 1325 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1326 ((__DMARX__) == UART_DMA_RX_ENABLE))
AnnaBridge 189:f392fc9709a3 1327
AnnaBridge 189:f392fc9709a3 1328 /**
AnnaBridge 189:f392fc9709a3 1329 * @brief Ensure that UART half-duplex state is valid.
AnnaBridge 189:f392fc9709a3 1330 * @param __HDSEL__ UART half-duplex state.
AnnaBridge 189:f392fc9709a3 1331 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
AnnaBridge 189:f392fc9709a3 1332 */
AnnaBridge 189:f392fc9709a3 1333 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1334 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
AnnaBridge 189:f392fc9709a3 1335
AnnaBridge 189:f392fc9709a3 1336 /**
AnnaBridge 189:f392fc9709a3 1337 * @brief Ensure that UART wake-up method is valid.
AnnaBridge 189:f392fc9709a3 1338 * @param __WAKEUP__ UART wake-up method .
AnnaBridge 189:f392fc9709a3 1339 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
AnnaBridge 189:f392fc9709a3 1340 */
AnnaBridge 189:f392fc9709a3 1341 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
AnnaBridge 189:f392fc9709a3 1342 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
AnnaBridge 189:f392fc9709a3 1343
AnnaBridge 189:f392fc9709a3 1344 /**
AnnaBridge 189:f392fc9709a3 1345 * @brief Ensure that UART request parameter is valid.
AnnaBridge 189:f392fc9709a3 1346 * @param __PARAM__ UART request parameter.
AnnaBridge 189:f392fc9709a3 1347 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
AnnaBridge 189:f392fc9709a3 1348 */
AnnaBridge 189:f392fc9709a3 1349 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
AnnaBridge 189:f392fc9709a3 1350 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
AnnaBridge 189:f392fc9709a3 1351 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
AnnaBridge 189:f392fc9709a3 1352 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
AnnaBridge 189:f392fc9709a3 1353 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
AnnaBridge 189:f392fc9709a3 1354
AnnaBridge 189:f392fc9709a3 1355 /**
AnnaBridge 189:f392fc9709a3 1356 * @brief Ensure that UART advanced features initialization is valid.
AnnaBridge 189:f392fc9709a3 1357 * @param __INIT__ UART advanced features initialization.
AnnaBridge 189:f392fc9709a3 1358 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
AnnaBridge 189:f392fc9709a3 1359 */
AnnaBridge 189:f392fc9709a3 1360 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
AnnaBridge 189:f392fc9709a3 1361 UART_ADVFEATURE_TXINVERT_INIT | \
AnnaBridge 189:f392fc9709a3 1362 UART_ADVFEATURE_RXINVERT_INIT | \
AnnaBridge 189:f392fc9709a3 1363 UART_ADVFEATURE_DATAINVERT_INIT | \
AnnaBridge 189:f392fc9709a3 1364 UART_ADVFEATURE_SWAP_INIT | \
AnnaBridge 189:f392fc9709a3 1365 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
AnnaBridge 189:f392fc9709a3 1366 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
AnnaBridge 189:f392fc9709a3 1367 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
AnnaBridge 189:f392fc9709a3 1368 UART_ADVFEATURE_MSBFIRST_INIT))
AnnaBridge 189:f392fc9709a3 1369
AnnaBridge 189:f392fc9709a3 1370 /**
AnnaBridge 189:f392fc9709a3 1371 * @brief Ensure that UART frame TX inversion setting is valid.
AnnaBridge 189:f392fc9709a3 1372 * @param __TXINV__ UART frame TX inversion setting.
AnnaBridge 189:f392fc9709a3 1373 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
AnnaBridge 189:f392fc9709a3 1374 */
AnnaBridge 189:f392fc9709a3 1375 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1376 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
AnnaBridge 189:f392fc9709a3 1377
AnnaBridge 189:f392fc9709a3 1378 /**
AnnaBridge 189:f392fc9709a3 1379 * @brief Ensure that UART frame RX inversion setting is valid.
AnnaBridge 189:f392fc9709a3 1380 * @param __RXINV__ UART frame RX inversion setting.
AnnaBridge 189:f392fc9709a3 1381 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
AnnaBridge 189:f392fc9709a3 1382 */
AnnaBridge 189:f392fc9709a3 1383 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1384 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
AnnaBridge 189:f392fc9709a3 1385
AnnaBridge 189:f392fc9709a3 1386 /**
AnnaBridge 189:f392fc9709a3 1387 * @brief Ensure that UART frame data inversion setting is valid.
AnnaBridge 189:f392fc9709a3 1388 * @param __DATAINV__ UART frame data inversion setting.
AnnaBridge 189:f392fc9709a3 1389 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
AnnaBridge 189:f392fc9709a3 1390 */
AnnaBridge 189:f392fc9709a3 1391 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1392 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
AnnaBridge 189:f392fc9709a3 1393
AnnaBridge 189:f392fc9709a3 1394 /**
AnnaBridge 189:f392fc9709a3 1395 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
AnnaBridge 189:f392fc9709a3 1396 * @param __SWAP__ UART frame RX/TX pins swap setting.
AnnaBridge 189:f392fc9709a3 1397 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
AnnaBridge 189:f392fc9709a3 1398 */
AnnaBridge 189:f392fc9709a3 1399 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1400 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
AnnaBridge 189:f392fc9709a3 1401
AnnaBridge 189:f392fc9709a3 1402 /**
AnnaBridge 189:f392fc9709a3 1403 * @brief Ensure that UART frame overrun setting is valid.
AnnaBridge 189:f392fc9709a3 1404 * @param __OVERRUN__ UART frame overrun setting.
AnnaBridge 189:f392fc9709a3 1405 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
AnnaBridge 189:f392fc9709a3 1406 */
AnnaBridge 189:f392fc9709a3 1407 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
AnnaBridge 189:f392fc9709a3 1408 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
AnnaBridge 189:f392fc9709a3 1409
AnnaBridge 189:f392fc9709a3 1410 /**
AnnaBridge 189:f392fc9709a3 1411 * @brief Ensure that UART auto Baud rate state is valid.
AnnaBridge 189:f392fc9709a3 1412 * @param __AUTOBAUDRATE__ UART auto Baud rate state.
AnnaBridge 189:f392fc9709a3 1413 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
AnnaBridge 189:f392fc9709a3 1414 */
AnnaBridge 189:f392fc9709a3 1415 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1416 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
AnnaBridge 189:f392fc9709a3 1417
AnnaBridge 189:f392fc9709a3 1418 /**
AnnaBridge 189:f392fc9709a3 1419 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
AnnaBridge 189:f392fc9709a3 1420 * @param __DMA__ UART DMA enabling or disabling on error setting.
AnnaBridge 189:f392fc9709a3 1421 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
AnnaBridge 189:f392fc9709a3 1422 */
AnnaBridge 189:f392fc9709a3 1423 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
AnnaBridge 189:f392fc9709a3 1424 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
AnnaBridge 189:f392fc9709a3 1425
AnnaBridge 189:f392fc9709a3 1426 /**
AnnaBridge 189:f392fc9709a3 1427 * @brief Ensure that UART frame MSB first setting is valid.
AnnaBridge 189:f392fc9709a3 1428 * @param __MSBFIRST__ UART frame MSB first setting.
AnnaBridge 189:f392fc9709a3 1429 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
AnnaBridge 189:f392fc9709a3 1430 */
AnnaBridge 189:f392fc9709a3 1431 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1432 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
AnnaBridge 189:f392fc9709a3 1433
AnnaBridge 189:f392fc9709a3 1434 /**
AnnaBridge 189:f392fc9709a3 1435 * @brief Ensure that UART stop mode state is valid.
AnnaBridge 189:f392fc9709a3 1436 * @param __STOPMODE__ UART stop mode state.
AnnaBridge 189:f392fc9709a3 1437 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
AnnaBridge 189:f392fc9709a3 1438 */
AnnaBridge 189:f392fc9709a3 1439 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1440 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
AnnaBridge 189:f392fc9709a3 1441
AnnaBridge 189:f392fc9709a3 1442 /**
AnnaBridge 189:f392fc9709a3 1443 * @brief Ensure that UART mute mode state is valid.
AnnaBridge 189:f392fc9709a3 1444 * @param __MUTE__ UART mute mode state.
AnnaBridge 189:f392fc9709a3 1445 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
AnnaBridge 189:f392fc9709a3 1446 */
AnnaBridge 189:f392fc9709a3 1447 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
AnnaBridge 189:f392fc9709a3 1448 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
AnnaBridge 189:f392fc9709a3 1449
AnnaBridge 189:f392fc9709a3 1450 /**
AnnaBridge 189:f392fc9709a3 1451 * @brief Ensure that UART wake-up selection is valid.
AnnaBridge 189:f392fc9709a3 1452 * @param __WAKE__ UART wake-up selection.
AnnaBridge 189:f392fc9709a3 1453 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
AnnaBridge 189:f392fc9709a3 1454 */
AnnaBridge 189:f392fc9709a3 1455 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
AnnaBridge 189:f392fc9709a3 1456 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
AnnaBridge 189:f392fc9709a3 1457 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
AnnaBridge 189:f392fc9709a3 1458
AnnaBridge 189:f392fc9709a3 1459 /**
AnnaBridge 189:f392fc9709a3 1460 * @brief Ensure that UART driver enable polarity is valid.
AnnaBridge 189:f392fc9709a3 1461 * @param __POLARITY__ UART driver enable polarity.
AnnaBridge 189:f392fc9709a3 1462 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
AnnaBridge 189:f392fc9709a3 1463 */
AnnaBridge 189:f392fc9709a3 1464 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
AnnaBridge 189:f392fc9709a3 1465 ((__POLARITY__) == UART_DE_POLARITY_LOW))
AnnaBridge 189:f392fc9709a3 1466
AnnaBridge 189:f392fc9709a3 1467 #if defined(USART_PRESC_PRESCALER)
AnnaBridge 189:f392fc9709a3 1468 /**
AnnaBridge 189:f392fc9709a3 1469 * @brief Ensure that UART Prescaler is valid.
AnnaBridge 189:f392fc9709a3 1470 * @param __CLOCKPRESCALER__ UART Prescaler value.
AnnaBridge 189:f392fc9709a3 1471 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
AnnaBridge 189:f392fc9709a3 1472 */
AnnaBridge 189:f392fc9709a3 1473 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \
AnnaBridge 189:f392fc9709a3 1474 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \
AnnaBridge 189:f392fc9709a3 1475 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \
AnnaBridge 189:f392fc9709a3 1476 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \
AnnaBridge 189:f392fc9709a3 1477 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \
AnnaBridge 189:f392fc9709a3 1478 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \
AnnaBridge 189:f392fc9709a3 1479 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \
AnnaBridge 189:f392fc9709a3 1480 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \
AnnaBridge 189:f392fc9709a3 1481 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \
AnnaBridge 189:f392fc9709a3 1482 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \
AnnaBridge 189:f392fc9709a3 1483 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \
AnnaBridge 189:f392fc9709a3 1484 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256))
AnnaBridge 189:f392fc9709a3 1485 #endif
AnnaBridge 189:f392fc9709a3 1486
AnnaBridge 189:f392fc9709a3 1487 #if defined(USART_CR1_FIFOEN)
AnnaBridge 189:f392fc9709a3 1488 /**
AnnaBridge 189:f392fc9709a3 1489 * @brief Ensure that UART TXFIFO threshold level is valid.
AnnaBridge 189:f392fc9709a3 1490 * @param __THRESHOLD__ UART TXFIFO threshold level.
AnnaBridge 189:f392fc9709a3 1491 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
AnnaBridge 189:f392fc9709a3 1492 */
AnnaBridge 189:f392fc9709a3 1493 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \
AnnaBridge 189:f392fc9709a3 1494 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \
AnnaBridge 189:f392fc9709a3 1495 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \
AnnaBridge 189:f392fc9709a3 1496 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \
AnnaBridge 189:f392fc9709a3 1497 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \
AnnaBridge 189:f392fc9709a3 1498 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))
AnnaBridge 189:f392fc9709a3 1499
AnnaBridge 189:f392fc9709a3 1500 /**
AnnaBridge 189:f392fc9709a3 1501 * @brief Ensure that UART RXFIFO threshold level is valid.
AnnaBridge 189:f392fc9709a3 1502 * @param __THRESHOLD__ UART RXFIFO threshold level.
AnnaBridge 189:f392fc9709a3 1503 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
AnnaBridge 189:f392fc9709a3 1504 */
AnnaBridge 189:f392fc9709a3 1505 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \
AnnaBridge 189:f392fc9709a3 1506 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \
AnnaBridge 189:f392fc9709a3 1507 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \
AnnaBridge 189:f392fc9709a3 1508 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \
AnnaBridge 189:f392fc9709a3 1509 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \
AnnaBridge 189:f392fc9709a3 1510 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))
AnnaBridge 189:f392fc9709a3 1511 #endif
AnnaBridge 189:f392fc9709a3 1512
AnnaBridge 189:f392fc9709a3 1513 /**
AnnaBridge 189:f392fc9709a3 1514 * @}
AnnaBridge 189:f392fc9709a3 1515 */
AnnaBridge 189:f392fc9709a3 1516
AnnaBridge 189:f392fc9709a3 1517 /* Include UART HAL Extended module */
AnnaBridge 189:f392fc9709a3 1518 #include "stm32l4xx_hal_uart_ex.h"
AnnaBridge 189:f392fc9709a3 1519
AnnaBridge 189:f392fc9709a3 1520 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 1521 /** @addtogroup UART_Exported_Functions UART Exported Functions
AnnaBridge 189:f392fc9709a3 1522 * @{
AnnaBridge 189:f392fc9709a3 1523 */
AnnaBridge 189:f392fc9709a3 1524
AnnaBridge 189:f392fc9709a3 1525 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 189:f392fc9709a3 1526 * @{
AnnaBridge 189:f392fc9709a3 1527 */
AnnaBridge 189:f392fc9709a3 1528
AnnaBridge 189:f392fc9709a3 1529 /* Initialization and de-initialization functions ****************************/
AnnaBridge 189:f392fc9709a3 1530 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1531 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1532 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
AnnaBridge 189:f392fc9709a3 1533 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
AnnaBridge 189:f392fc9709a3 1534 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1535 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1536 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1537
AnnaBridge 189:f392fc9709a3 1538 /**
AnnaBridge 189:f392fc9709a3 1539 * @}
AnnaBridge 189:f392fc9709a3 1540 */
AnnaBridge 189:f392fc9709a3 1541
AnnaBridge 189:f392fc9709a3 1542 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
AnnaBridge 189:f392fc9709a3 1543 * @{
AnnaBridge 189:f392fc9709a3 1544 */
AnnaBridge 189:f392fc9709a3 1545
AnnaBridge 189:f392fc9709a3 1546 /* IO operation functions *****************************************************/
AnnaBridge 189:f392fc9709a3 1547 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 1548 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 1549 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 1550 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 1551 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 1552 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 189:f392fc9709a3 1553 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1554 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1555 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1556 /* Transfer Abort functions */
AnnaBridge 189:f392fc9709a3 1557 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1558 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1559 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1560 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1561 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1562 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1563
AnnaBridge 189:f392fc9709a3 1564 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1565 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1566 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1567 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1568 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1569 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1570 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1571 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1572 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1573
AnnaBridge 189:f392fc9709a3 1574 /**
AnnaBridge 189:f392fc9709a3 1575 * @}
AnnaBridge 189:f392fc9709a3 1576 */
AnnaBridge 189:f392fc9709a3 1577
AnnaBridge 189:f392fc9709a3 1578 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 189:f392fc9709a3 1579 * @{
AnnaBridge 189:f392fc9709a3 1580 */
AnnaBridge 189:f392fc9709a3 1581
AnnaBridge 189:f392fc9709a3 1582 /* Peripheral Control functions ************************************************/
AnnaBridge 189:f392fc9709a3 1583 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1584 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1585 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1586 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1587 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1588 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1589
AnnaBridge 189:f392fc9709a3 1590 /**
AnnaBridge 189:f392fc9709a3 1591 * @}
AnnaBridge 189:f392fc9709a3 1592 */
AnnaBridge 189:f392fc9709a3 1593
AnnaBridge 189:f392fc9709a3 1594 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
AnnaBridge 189:f392fc9709a3 1595 * @{
AnnaBridge 189:f392fc9709a3 1596 */
AnnaBridge 189:f392fc9709a3 1597
AnnaBridge 189:f392fc9709a3 1598 /* Peripheral State and Errors functions **************************************************/
AnnaBridge 189:f392fc9709a3 1599 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1600 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1601
AnnaBridge 189:f392fc9709a3 1602 /**
AnnaBridge 189:f392fc9709a3 1603 * @}
AnnaBridge 189:f392fc9709a3 1604 */
AnnaBridge 189:f392fc9709a3 1605
AnnaBridge 189:f392fc9709a3 1606 /**
AnnaBridge 189:f392fc9709a3 1607 * @}
AnnaBridge 189:f392fc9709a3 1608 */
AnnaBridge 189:f392fc9709a3 1609
AnnaBridge 189:f392fc9709a3 1610 /* Private functions -----------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 1611 /** @addtogroup UART_Private_Functions UART Private Functions
AnnaBridge 189:f392fc9709a3 1612 * @{
AnnaBridge 189:f392fc9709a3 1613 */
AnnaBridge 189:f392fc9709a3 1614
AnnaBridge 189:f392fc9709a3 1615 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1616 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1617 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
AnnaBridge 189:f392fc9709a3 1618 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
AnnaBridge 189:f392fc9709a3 1619
AnnaBridge 189:f392fc9709a3 1620 /**
AnnaBridge 189:f392fc9709a3 1621 * @}
AnnaBridge 189:f392fc9709a3 1622 */
AnnaBridge 189:f392fc9709a3 1623
AnnaBridge 189:f392fc9709a3 1624 /**
AnnaBridge 189:f392fc9709a3 1625 * @}
AnnaBridge 189:f392fc9709a3 1626 */
AnnaBridge 189:f392fc9709a3 1627
AnnaBridge 189:f392fc9709a3 1628 /**
AnnaBridge 189:f392fc9709a3 1629 * @}
AnnaBridge 189:f392fc9709a3 1630 */
AnnaBridge 189:f392fc9709a3 1631
AnnaBridge 189:f392fc9709a3 1632 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 1633 }
AnnaBridge 189:f392fc9709a3 1634 #endif
AnnaBridge 189:f392fc9709a3 1635
AnnaBridge 189:f392fc9709a3 1636 #endif /* __STM32L4xx_HAL_UART_H */
AnnaBridge 189:f392fc9709a3 1637
AnnaBridge 189:f392fc9709a3 1638 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/