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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_IAR/stm32l4xx_hal_swpmi.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @file stm32l4xx_hal_swpmi.h |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @author MCD Application Team |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @brief Header file of SWPMI HAL module. |
| AnnaBridge | 189:f392fc9709a3 | 6 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 7 | * @attention |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 20 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 21 | * |
| AnnaBridge | 189:f392fc9709a3 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 32 | * |
| AnnaBridge | 189:f392fc9709a3 | 33 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 34 | */ |
| AnnaBridge | 189:f392fc9709a3 | 35 | |
| AnnaBridge | 189:f392fc9709a3 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | #ifndef __STM32L4xx_HAL_SWPMI_H |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __STM32L4xx_HAL_SWPMI_H |
| AnnaBridge | 189:f392fc9709a3 | 39 | |
| AnnaBridge | 189:f392fc9709a3 | 40 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 41 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 42 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | #if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ |
| AnnaBridge | 189:f392fc9709a3 | 45 | defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ |
| AnnaBridge | 189:f392fc9709a3 | 46 | defined(STM32L496xx) || defined(STM32L4A6xx) |
| AnnaBridge | 189:f392fc9709a3 | 47 | |
| AnnaBridge | 189:f392fc9709a3 | 48 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 49 | #include "stm32l4xx_hal_def.h" |
| AnnaBridge | 189:f392fc9709a3 | 50 | |
| AnnaBridge | 189:f392fc9709a3 | 51 | /** @addtogroup STM32L4xx_HAL_Driver |
| AnnaBridge | 189:f392fc9709a3 | 52 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 53 | */ |
| AnnaBridge | 189:f392fc9709a3 | 54 | |
| AnnaBridge | 189:f392fc9709a3 | 55 | /** @addtogroup SWPMI |
| AnnaBridge | 189:f392fc9709a3 | 56 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 57 | */ |
| AnnaBridge | 189:f392fc9709a3 | 58 | |
| AnnaBridge | 189:f392fc9709a3 | 59 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 60 | /** @defgroup SWPMI_Exported_Types SWPMI Exported Types |
| AnnaBridge | 189:f392fc9709a3 | 61 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 62 | */ |
| AnnaBridge | 189:f392fc9709a3 | 63 | |
| AnnaBridge | 189:f392fc9709a3 | 64 | /** |
| AnnaBridge | 189:f392fc9709a3 | 65 | * @brief SWPMI Init Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 66 | */ |
| AnnaBridge | 189:f392fc9709a3 | 67 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 68 | { |
| AnnaBridge | 189:f392fc9709a3 | 69 | uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class. |
| AnnaBridge | 189:f392fc9709a3 | 70 | This parameter can be a value of @ref SWPMI_Voltage_Class */ |
| AnnaBridge | 189:f392fc9709a3 | 71 | |
| AnnaBridge | 189:f392fc9709a3 | 72 | uint32_t BitRate; /*!< Specifies the SWPMI Bitrate. |
| AnnaBridge | 189:f392fc9709a3 | 73 | This parameter must be a number between 0 and 63. |
| AnnaBridge | 189:f392fc9709a3 | 74 | The Bitrate is computed using the following formula: |
| AnnaBridge | 189:f392fc9709a3 | 75 | SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4) |
| AnnaBridge | 189:f392fc9709a3 | 76 | */ |
| AnnaBridge | 189:f392fc9709a3 | 77 | |
| AnnaBridge | 189:f392fc9709a3 | 78 | uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode. |
| AnnaBridge | 189:f392fc9709a3 | 79 | This parameter can be a value of @ref SWPMI_Tx_Buffering_Mode */ |
| AnnaBridge | 189:f392fc9709a3 | 80 | |
| AnnaBridge | 189:f392fc9709a3 | 81 | uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode. |
| AnnaBridge | 189:f392fc9709a3 | 82 | This parameter can be a value of @ref SWPMI_Rx_Buffering_Mode */ |
| AnnaBridge | 189:f392fc9709a3 | 83 | |
| AnnaBridge | 189:f392fc9709a3 | 84 | }SWPMI_InitTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 85 | |
| AnnaBridge | 189:f392fc9709a3 | 86 | |
| AnnaBridge | 189:f392fc9709a3 | 87 | /** |
| AnnaBridge | 189:f392fc9709a3 | 88 | * @brief HAL SWPMI State structures definition |
| AnnaBridge | 189:f392fc9709a3 | 89 | */ |
| AnnaBridge | 189:f392fc9709a3 | 90 | typedef enum |
| AnnaBridge | 189:f392fc9709a3 | 91 | { |
| AnnaBridge | 189:f392fc9709a3 | 92 | HAL_SWPMI_STATE_RESET = 0x00, /*!< Peripheral Reset state */ |
| AnnaBridge | 189:f392fc9709a3 | 93 | HAL_SWPMI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| AnnaBridge | 189:f392fc9709a3 | 94 | HAL_SWPMI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 95 | HAL_SWPMI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 96 | HAL_SWPMI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 97 | HAL_SWPMI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 98 | HAL_SWPMI_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| AnnaBridge | 189:f392fc9709a3 | 99 | HAL_SWPMI_STATE_ERROR = 0x04 /*!< Error */ |
| AnnaBridge | 189:f392fc9709a3 | 100 | }HAL_SWPMI_StateTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 101 | |
| AnnaBridge | 189:f392fc9709a3 | 102 | /** |
| AnnaBridge | 189:f392fc9709a3 | 103 | * @brief SWPMI handle Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 104 | */ |
| AnnaBridge | 189:f392fc9709a3 | 105 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 106 | { |
| AnnaBridge | 189:f392fc9709a3 | 107 | SWPMI_TypeDef *Instance; /* SWPMI registers base address */ |
| AnnaBridge | 189:f392fc9709a3 | 108 | |
| AnnaBridge | 189:f392fc9709a3 | 109 | SWPMI_InitTypeDef Init; /* SWMPI communication parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 110 | |
| AnnaBridge | 189:f392fc9709a3 | 111 | uint32_t *pTxBuffPtr; /* Pointer to SWPMI Tx transfer Buffer */ |
| AnnaBridge | 189:f392fc9709a3 | 112 | |
| AnnaBridge | 189:f392fc9709a3 | 113 | uint32_t TxXferSize; /* SWPMI Tx Transfer size */ |
| AnnaBridge | 189:f392fc9709a3 | 114 | |
| AnnaBridge | 189:f392fc9709a3 | 115 | uint32_t TxXferCount; /* SWPMI Tx Transfer Counter */ |
| AnnaBridge | 189:f392fc9709a3 | 116 | |
| AnnaBridge | 189:f392fc9709a3 | 117 | uint32_t *pRxBuffPtr; /* Pointer to SWPMI Rx transfer Buffer */ |
| AnnaBridge | 189:f392fc9709a3 | 118 | |
| AnnaBridge | 189:f392fc9709a3 | 119 | uint32_t RxXferSize; /* SWPMI Rx Transfer size */ |
| AnnaBridge | 189:f392fc9709a3 | 120 | |
| AnnaBridge | 189:f392fc9709a3 | 121 | uint32_t RxXferCount; /* SWPMI Rx Transfer Counter */ |
| AnnaBridge | 189:f392fc9709a3 | 122 | |
| AnnaBridge | 189:f392fc9709a3 | 123 | DMA_HandleTypeDef *hdmatx; /* SWPMI Tx DMA Handle parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 124 | |
| AnnaBridge | 189:f392fc9709a3 | 125 | DMA_HandleTypeDef *hdmarx; /* SWPMI Rx DMA Handle parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 126 | |
| AnnaBridge | 189:f392fc9709a3 | 127 | HAL_LockTypeDef Lock; /* SWPMI object */ |
| AnnaBridge | 189:f392fc9709a3 | 128 | |
| AnnaBridge | 189:f392fc9709a3 | 129 | __IO HAL_SWPMI_StateTypeDef State; /* SWPMI communication state */ |
| AnnaBridge | 189:f392fc9709a3 | 130 | |
| AnnaBridge | 189:f392fc9709a3 | 131 | __IO uint32_t ErrorCode; /* SWPMI Error code */ |
| AnnaBridge | 189:f392fc9709a3 | 132 | |
| AnnaBridge | 189:f392fc9709a3 | 133 | }SWPMI_HandleTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 134 | |
| AnnaBridge | 189:f392fc9709a3 | 135 | /** |
| AnnaBridge | 189:f392fc9709a3 | 136 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 137 | */ |
| AnnaBridge | 189:f392fc9709a3 | 138 | |
| AnnaBridge | 189:f392fc9709a3 | 139 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 140 | /** @defgroup SWPMI_Exported_Constants SWPMI Exported Constants |
| AnnaBridge | 189:f392fc9709a3 | 141 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 142 | */ |
| AnnaBridge | 189:f392fc9709a3 | 143 | |
| AnnaBridge | 189:f392fc9709a3 | 144 | /** |
| AnnaBridge | 189:f392fc9709a3 | 145 | * @defgroup SWPMI_Error_Code SWPMI Error Code Bitmap |
| AnnaBridge | 189:f392fc9709a3 | 146 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 147 | */ |
| AnnaBridge | 189:f392fc9709a3 | 148 | #define HAL_SWPMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| AnnaBridge | 189:f392fc9709a3 | 149 | #define HAL_SWPMI_ERROR_CRC ((uint32_t)0x00000004) /*!< frame error */ |
| AnnaBridge | 189:f392fc9709a3 | 150 | #define HAL_SWPMI_ERROR_OVR ((uint32_t)0x00000008) /*!< Overrun error */ |
| AnnaBridge | 189:f392fc9709a3 | 151 | #define HAL_SWPMI_ERROR_UDR ((uint32_t)0x0000000C) /*!< Underrun error */ |
| AnnaBridge | 189:f392fc9709a3 | 152 | #define HAL_SWPMI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */ |
| AnnaBridge | 189:f392fc9709a3 | 153 | /** |
| AnnaBridge | 189:f392fc9709a3 | 154 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 155 | */ |
| AnnaBridge | 189:f392fc9709a3 | 156 | |
| AnnaBridge | 189:f392fc9709a3 | 157 | /** @defgroup SWPMI_Voltage_Class SWPMI Voltage Class |
| AnnaBridge | 189:f392fc9709a3 | 158 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 159 | */ |
| AnnaBridge | 189:f392fc9709a3 | 160 | #define SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 161 | #define SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS |
| AnnaBridge | 189:f392fc9709a3 | 162 | /** |
| AnnaBridge | 189:f392fc9709a3 | 163 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 164 | */ |
| AnnaBridge | 189:f392fc9709a3 | 165 | |
| AnnaBridge | 189:f392fc9709a3 | 166 | /** @defgroup SWPMI_Tx_Buffering_Mode SWPMI Tx Buffering Mode |
| AnnaBridge | 189:f392fc9709a3 | 167 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 168 | */ |
| AnnaBridge | 189:f392fc9709a3 | 169 | #define SWPMI_TX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 170 | #define SWPMI_TX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 171 | #define SWPMI_TX_MULTI_SOFTWAREBUFFER SWPMI_CR_TXMODE |
| AnnaBridge | 189:f392fc9709a3 | 172 | /** |
| AnnaBridge | 189:f392fc9709a3 | 173 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 174 | */ |
| AnnaBridge | 189:f392fc9709a3 | 175 | |
| AnnaBridge | 189:f392fc9709a3 | 176 | /** @defgroup SWPMI_Rx_Buffering_Mode SWPMI Rx Buffering Mode |
| AnnaBridge | 189:f392fc9709a3 | 177 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 178 | */ |
| AnnaBridge | 189:f392fc9709a3 | 179 | #define SWPMI_RX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 180 | #define SWPMI_RX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 181 | #define SWPMI_RX_MULTI_SOFTWAREBUFFER SWPMI_CR_RXMODE |
| AnnaBridge | 189:f392fc9709a3 | 182 | /** |
| AnnaBridge | 189:f392fc9709a3 | 183 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 184 | */ |
| AnnaBridge | 189:f392fc9709a3 | 185 | |
| AnnaBridge | 189:f392fc9709a3 | 186 | /** @defgroup SWPMI_Flags SWPMI Status Flags |
| AnnaBridge | 189:f392fc9709a3 | 187 | * Elements values convention: 0xXXXXXXXX |
| AnnaBridge | 189:f392fc9709a3 | 188 | * - 0xXXXXXXXX : Flag mask in the ISR register |
| AnnaBridge | 189:f392fc9709a3 | 189 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 190 | */ |
| AnnaBridge | 189:f392fc9709a3 | 191 | #define SWPMI_FLAG_RXBFF SWPMI_ISR_RXBFF |
| AnnaBridge | 189:f392fc9709a3 | 192 | #define SWPMI_FLAG_TXBEF SWPMI_ISR_TXBEF |
| AnnaBridge | 189:f392fc9709a3 | 193 | #define SWPMI_FLAG_RXBERF SWPMI_ISR_RXBERF |
| AnnaBridge | 189:f392fc9709a3 | 194 | #define SWPMI_FLAG_RXOVRF SWPMI_ISR_RXOVRF |
| AnnaBridge | 189:f392fc9709a3 | 195 | #define SWPMI_FLAG_TXUNRF SWPMI_ISR_TXUNRF |
| AnnaBridge | 189:f392fc9709a3 | 196 | #define SWPMI_FLAG_RXNE SWPMI_ISR_RXNE |
| AnnaBridge | 189:f392fc9709a3 | 197 | #define SWPMI_FLAG_TXE SWPMI_ISR_TXE |
| AnnaBridge | 189:f392fc9709a3 | 198 | #define SWPMI_FLAG_TCF SWPMI_ISR_TCF |
| AnnaBridge | 189:f392fc9709a3 | 199 | #define SWPMI_FLAG_SRF SWPMI_ISR_SRF |
| AnnaBridge | 189:f392fc9709a3 | 200 | #define SWPMI_FLAG_SUSP SWPMI_ISR_SUSP |
| AnnaBridge | 189:f392fc9709a3 | 201 | #define SWPMI_FLAG_DEACTF SWPMI_ISR_DEACTF |
| AnnaBridge | 189:f392fc9709a3 | 202 | /** |
| AnnaBridge | 189:f392fc9709a3 | 203 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 204 | */ |
| AnnaBridge | 189:f392fc9709a3 | 205 | |
| AnnaBridge | 189:f392fc9709a3 | 206 | /** @defgroup SWPMI_Interrupt_definition SWPMI Interrupts Definition |
| AnnaBridge | 189:f392fc9709a3 | 207 | * Elements values convention: 0xXXXX |
| AnnaBridge | 189:f392fc9709a3 | 208 | * - 0xXXXX : Flag mask in the IER register |
| AnnaBridge | 189:f392fc9709a3 | 209 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 210 | */ |
| AnnaBridge | 189:f392fc9709a3 | 211 | #define SWPMI_IT_SRIE SWPMI_IER_SRIE |
| AnnaBridge | 189:f392fc9709a3 | 212 | #define SWPMI_IT_TCIE SWPMI_IER_TCIE |
| AnnaBridge | 189:f392fc9709a3 | 213 | #define SWPMI_IT_TIE SWPMI_IER_TIE |
| AnnaBridge | 189:f392fc9709a3 | 214 | #define SWPMI_IT_RIE SWPMI_IER_RIE |
| AnnaBridge | 189:f392fc9709a3 | 215 | #define SWPMI_IT_TXUNRIE SWPMI_IER_TXUNRIE |
| AnnaBridge | 189:f392fc9709a3 | 216 | #define SWPMI_IT_RXOVRIE SWPMI_IER_RXOVRIE |
| AnnaBridge | 189:f392fc9709a3 | 217 | #define SWPMI_IT_RXBERIE SWPMI_IER_RXBERIE |
| AnnaBridge | 189:f392fc9709a3 | 218 | #define SWPMI_IT_TXBEIE SWPMI_IER_TXBEIE |
| AnnaBridge | 189:f392fc9709a3 | 219 | #define SWPMI_IT_RXBFIE SWPMI_IER_RXBFIE |
| AnnaBridge | 189:f392fc9709a3 | 220 | /** |
| AnnaBridge | 189:f392fc9709a3 | 221 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 222 | */ |
| AnnaBridge | 189:f392fc9709a3 | 223 | |
| AnnaBridge | 189:f392fc9709a3 | 224 | /** |
| AnnaBridge | 189:f392fc9709a3 | 225 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 226 | */ |
| AnnaBridge | 189:f392fc9709a3 | 227 | |
| AnnaBridge | 189:f392fc9709a3 | 228 | /* Exported macros -----------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 229 | /** @defgroup SWPMI_Exported_Macros SWPMI Exported Macros |
| AnnaBridge | 189:f392fc9709a3 | 230 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 231 | */ |
| AnnaBridge | 189:f392fc9709a3 | 232 | |
| AnnaBridge | 189:f392fc9709a3 | 233 | /** @brief Reset SWPMI handle state. |
| AnnaBridge | 189:f392fc9709a3 | 234 | * @param __HANDLE__: specifies the SWPMI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 235 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 236 | */ |
| AnnaBridge | 189:f392fc9709a3 | 237 | #define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SWPMI_STATE_RESET) |
| AnnaBridge | 189:f392fc9709a3 | 238 | |
| AnnaBridge | 189:f392fc9709a3 | 239 | /** |
| AnnaBridge | 189:f392fc9709a3 | 240 | * @brief Enable the SWPMI peripheral. |
| AnnaBridge | 189:f392fc9709a3 | 241 | * @param __HANDLE__: SWPMI handle |
| AnnaBridge | 189:f392fc9709a3 | 242 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 243 | */ |
| AnnaBridge | 189:f392fc9709a3 | 244 | #define __HAL_SWPMI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) |
| AnnaBridge | 189:f392fc9709a3 | 245 | |
| AnnaBridge | 189:f392fc9709a3 | 246 | /** |
| AnnaBridge | 189:f392fc9709a3 | 247 | * @brief Disable the SWPMI peripheral. |
| AnnaBridge | 189:f392fc9709a3 | 248 | * @param __HANDLE__: SWPMI handle |
| AnnaBridge | 189:f392fc9709a3 | 249 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 250 | */ |
| AnnaBridge | 189:f392fc9709a3 | 251 | #define __HAL_SWPMI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) |
| AnnaBridge | 189:f392fc9709a3 | 252 | |
| AnnaBridge | 189:f392fc9709a3 | 253 | /** @brief Check whether the specified SWPMI flag is set or not. |
| AnnaBridge | 189:f392fc9709a3 | 254 | * @param __HANDLE__: specifies the SWPMI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 255 | * @param __FLAG__: specifies the flag to check. |
| AnnaBridge | 189:f392fc9709a3 | 256 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 257 | * @arg SWPMI_FLAG_RXBFF : Receive buffer full flag. |
| AnnaBridge | 189:f392fc9709a3 | 258 | * @arg SWPMI_FLAG_TXBEF : Transmit buffer empty flag. |
| AnnaBridge | 189:f392fc9709a3 | 259 | * @arg SWPMI_FLAG_RXBERF : Receive CRC error flag. |
| AnnaBridge | 189:f392fc9709a3 | 260 | * @arg SWPMI_FLAG_RXOVRF : Receive overrun error flag. |
| AnnaBridge | 189:f392fc9709a3 | 261 | * @arg SWPMI_FLAG_TXUNRF : Transmit underrun error flag. |
| AnnaBridge | 189:f392fc9709a3 | 262 | * @arg SWPMI_FLAG_RXNE : Receive data register not empty. |
| AnnaBridge | 189:f392fc9709a3 | 263 | * @arg SWPMI_FLAG_TXE : Transmit data register empty. |
| AnnaBridge | 189:f392fc9709a3 | 264 | * @arg SWPMI_FLAG_TCF : Transfer complete flag. |
| AnnaBridge | 189:f392fc9709a3 | 265 | * @arg SWPMI_FLAG_SRF : Slave resume flag. |
| AnnaBridge | 189:f392fc9709a3 | 266 | * @arg SWPMI_FLAG_SUSP : SUSPEND flag. |
| AnnaBridge | 189:f392fc9709a3 | 267 | * @arg SWPMI_FLAG_DEACTF : DEACTIVATED flag. |
| AnnaBridge | 189:f392fc9709a3 | 268 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 189:f392fc9709a3 | 269 | */ |
| AnnaBridge | 189:f392fc9709a3 | 270 | #define __HAL_SWPMI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->ISR, (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 271 | |
| AnnaBridge | 189:f392fc9709a3 | 272 | /** @brief Clear the specified SWPMI ISR flag. |
| AnnaBridge | 189:f392fc9709a3 | 273 | * @param __HANDLE__: specifies the SWPMI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 274 | * @param __FLAG__: specifies the flag to clear. |
| AnnaBridge | 189:f392fc9709a3 | 275 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 276 | * @arg SWPMI_FLAG_RXBFF : Receive buffer full flag. |
| AnnaBridge | 189:f392fc9709a3 | 277 | * @arg SWPMI_FLAG_TXBEF : Transmit buffer empty flag. |
| AnnaBridge | 189:f392fc9709a3 | 278 | * @arg SWPMI_FLAG_RXBERF : Receive CRC error flag. |
| AnnaBridge | 189:f392fc9709a3 | 279 | * @arg SWPMI_FLAG_RXOVRF : Receive overrun error flag. |
| AnnaBridge | 189:f392fc9709a3 | 280 | * @arg SWPMI_FLAG_TXUNRF : Transmit underrun error flag. |
| AnnaBridge | 189:f392fc9709a3 | 281 | * @arg SWPMI_FLAG_TCF : Transfer complete flag. |
| AnnaBridge | 189:f392fc9709a3 | 282 | * @arg SWPMI_FLAG_SRF : Slave resume flag. |
| AnnaBridge | 189:f392fc9709a3 | 283 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 284 | */ |
| AnnaBridge | 189:f392fc9709a3 | 285 | #define __HAL_SWPMI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->ICR, (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 286 | |
| AnnaBridge | 189:f392fc9709a3 | 287 | /** @brief Enable the specified SWPMI interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 288 | * @param __HANDLE__: specifies the SWPMI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 289 | * @param __INTERRUPT__: specifies the SWPMI interrupt source to enable. |
| AnnaBridge | 189:f392fc9709a3 | 290 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 291 | * @arg SWPMI_IT_SRIE : Slave resume interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 292 | * @arg SWPMI_IT_TCIE : Transmit complete interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 293 | * @arg SWPMI_IT_TIE : Transmit interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 294 | * @arg SWPMI_IT_RIE : Receive interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 295 | * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 296 | * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 297 | * @arg SWPMI_IT_RXBEIE : Receive CRC error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 298 | * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 299 | * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 300 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 301 | */ |
| AnnaBridge | 189:f392fc9709a3 | 302 | #define __HAL_SWPMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) |
| AnnaBridge | 189:f392fc9709a3 | 303 | |
| AnnaBridge | 189:f392fc9709a3 | 304 | /** @brief Disable the specified SWPMI interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 305 | * @param __HANDLE__: specifies the SWPMI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 306 | * @param __INTERRUPT__: specifies the SWPMI interrupt source to disable. |
| AnnaBridge | 189:f392fc9709a3 | 307 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 308 | * @arg SWPMI_IT_SRIE : Slave resume interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 309 | * @arg SWPMI_IT_TCIE : Transmit complete interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 310 | * @arg SWPMI_IT_TIE : Transmit interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 311 | * @arg SWPMI_IT_RIE : Receive interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 312 | * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 313 | * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 314 | * @arg SWPMI_IT_RXBEIE : Receive CRC error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 315 | * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 316 | * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 317 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 318 | */ |
| AnnaBridge | 189:f392fc9709a3 | 319 | #define __HAL_SWPMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) |
| AnnaBridge | 189:f392fc9709a3 | 320 | |
| AnnaBridge | 189:f392fc9709a3 | 321 | /** @brief Check whether the specified SWPMI interrupt has occurred or not. |
| AnnaBridge | 189:f392fc9709a3 | 322 | * @param __HANDLE__: specifies the SWPMI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 323 | * @param __IT__: specifies the SWPMI interrupt to check. |
| AnnaBridge | 189:f392fc9709a3 | 324 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 325 | * @arg SWPMI_IT_SRIE : Slave resume interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 326 | * @arg SWPMI_IT_TCIE : Transmit complete interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 327 | * @arg SWPMI_IT_TIE : Transmit interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 328 | * @arg SWPMI_IT_RIE : Receive interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 329 | * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 330 | * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 331 | * @arg SWPMI_IT_RXBERIE : Receive CRC error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 332 | * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 333 | * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 334 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 189:f392fc9709a3 | 335 | */ |
| AnnaBridge | 189:f392fc9709a3 | 336 | #define __HAL_SWPMI_GET_IT(__HANDLE__, __IT__) (READ_BIT((__HANDLE__)->Instance->ISR,(__IT__)) == (__IT__)) |
| AnnaBridge | 189:f392fc9709a3 | 337 | |
| AnnaBridge | 189:f392fc9709a3 | 338 | /** @brief Check whether the specified SWPMI interrupt source is enabled or not. |
| AnnaBridge | 189:f392fc9709a3 | 339 | * @param __HANDLE__: specifies the SWPMI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 340 | * @param __IT__: specifies the SWPMI interrupt source to check. |
| AnnaBridge | 189:f392fc9709a3 | 341 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 342 | * @arg SWPMI_IT_SRIE : Slave resume interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 343 | * @arg SWPMI_IT_TCIE : Transmit complete interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 344 | * @arg SWPMI_IT_TIE : Transmit interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 345 | * @arg SWPMI_IT_RIE : Receive interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 346 | * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 347 | * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 348 | * @arg SWPMI_IT_RXBERIE : Receive CRC error interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 349 | * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 350 | * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 351 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 189:f392fc9709a3 | 352 | */ |
| AnnaBridge | 189:f392fc9709a3 | 353 | #define __HAL_SWPMI_GET_IT_SOURCE(__HANDLE__, __IT__) ((READ_BIT((__HANDLE__)->Instance->IER, (__IT__)) == (__IT__)) ? SET : RESET) |
| AnnaBridge | 189:f392fc9709a3 | 354 | |
| AnnaBridge | 189:f392fc9709a3 | 355 | /** |
| AnnaBridge | 189:f392fc9709a3 | 356 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 357 | */ |
| AnnaBridge | 189:f392fc9709a3 | 358 | |
| AnnaBridge | 189:f392fc9709a3 | 359 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 360 | /** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions |
| AnnaBridge | 189:f392fc9709a3 | 361 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 362 | */ |
| AnnaBridge | 189:f392fc9709a3 | 363 | /* Initialization/de-initialization functions ********************************/ |
| AnnaBridge | 189:f392fc9709a3 | 364 | HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 365 | HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 366 | void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 367 | void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 368 | |
| AnnaBridge | 189:f392fc9709a3 | 369 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 370 | HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 189:f392fc9709a3 | 371 | HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 189:f392fc9709a3 | 372 | HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 373 | HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 374 | HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 375 | HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 376 | HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 377 | HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 378 | HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 379 | void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 380 | void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 381 | void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 382 | void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 383 | void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 384 | void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 385 | |
| AnnaBridge | 189:f392fc9709a3 | 386 | /* Peripheral Control and State functions ************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 387 | HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 388 | uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi); |
| AnnaBridge | 189:f392fc9709a3 | 389 | |
| AnnaBridge | 189:f392fc9709a3 | 390 | /** |
| AnnaBridge | 189:f392fc9709a3 | 391 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 392 | */ |
| AnnaBridge | 189:f392fc9709a3 | 393 | |
| AnnaBridge | 189:f392fc9709a3 | 394 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 395 | /** @defgroup SWPMI_Private_Types SWPMI Private Types |
| AnnaBridge | 189:f392fc9709a3 | 396 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 397 | */ |
| AnnaBridge | 189:f392fc9709a3 | 398 | |
| AnnaBridge | 189:f392fc9709a3 | 399 | /** |
| AnnaBridge | 189:f392fc9709a3 | 400 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 401 | */ |
| AnnaBridge | 189:f392fc9709a3 | 402 | |
| AnnaBridge | 189:f392fc9709a3 | 403 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 404 | /** @defgroup SWPMI_Private_Variables SWPMI Private Variables |
| AnnaBridge | 189:f392fc9709a3 | 405 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 406 | */ |
| AnnaBridge | 189:f392fc9709a3 | 407 | |
| AnnaBridge | 189:f392fc9709a3 | 408 | /** |
| AnnaBridge | 189:f392fc9709a3 | 409 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 410 | */ |
| AnnaBridge | 189:f392fc9709a3 | 411 | |
| AnnaBridge | 189:f392fc9709a3 | 412 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 413 | /** @defgroup SWPMI_Private_Constants SWPMI Private Constants |
| AnnaBridge | 189:f392fc9709a3 | 414 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 415 | */ |
| AnnaBridge | 189:f392fc9709a3 | 416 | |
| AnnaBridge | 189:f392fc9709a3 | 417 | /** |
| AnnaBridge | 189:f392fc9709a3 | 418 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 419 | */ |
| AnnaBridge | 189:f392fc9709a3 | 420 | |
| AnnaBridge | 189:f392fc9709a3 | 421 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 422 | /** @defgroup SWPMI_Private_Macros SWPMI Private Macros |
| AnnaBridge | 189:f392fc9709a3 | 423 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 424 | */ |
| AnnaBridge | 189:f392fc9709a3 | 425 | |
| AnnaBridge | 189:f392fc9709a3 | 426 | |
| AnnaBridge | 189:f392fc9709a3 | 427 | #define IS_SWPMI_VOLTAGE_CLASS(__CLASS__) (((__CLASS__) == SWPMI_VOLTAGE_CLASS_C) || \ |
| AnnaBridge | 189:f392fc9709a3 | 428 | ((__CLASS__) == SWPMI_VOLTAGE_CLASS_B)) |
| AnnaBridge | 189:f392fc9709a3 | 429 | |
| AnnaBridge | 189:f392fc9709a3 | 430 | #define IS_SWPMI_BITRATE_VALUE(__VALUE__) (((__VALUE__) <= 63)) |
| AnnaBridge | 189:f392fc9709a3 | 431 | |
| AnnaBridge | 189:f392fc9709a3 | 432 | |
| AnnaBridge | 189:f392fc9709a3 | 433 | #define IS_SWPMI_TX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_TX_NO_SOFTWAREBUFFER) || \ |
| AnnaBridge | 189:f392fc9709a3 | 434 | ((__MODE__) == SWPMI_TX_MULTI_SOFTWAREBUFFER)) |
| AnnaBridge | 189:f392fc9709a3 | 435 | |
| AnnaBridge | 189:f392fc9709a3 | 436 | |
| AnnaBridge | 189:f392fc9709a3 | 437 | #define IS_SWPMI_RX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_RX_NO_SOFTWAREBUFFER) || \ |
| AnnaBridge | 189:f392fc9709a3 | 438 | ((__MODE__) == SWPMI_RX_MULTI_SOFTWAREBUFFER)) |
| AnnaBridge | 189:f392fc9709a3 | 439 | |
| AnnaBridge | 189:f392fc9709a3 | 440 | /** |
| AnnaBridge | 189:f392fc9709a3 | 441 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 442 | */ |
| AnnaBridge | 189:f392fc9709a3 | 443 | |
| AnnaBridge | 189:f392fc9709a3 | 444 | /** |
| AnnaBridge | 189:f392fc9709a3 | 445 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 446 | */ |
| AnnaBridge | 189:f392fc9709a3 | 447 | |
| AnnaBridge | 189:f392fc9709a3 | 448 | /** |
| AnnaBridge | 189:f392fc9709a3 | 449 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 450 | */ |
| AnnaBridge | 189:f392fc9709a3 | 451 | |
| AnnaBridge | 189:f392fc9709a3 | 452 | #endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ |
| AnnaBridge | 189:f392fc9709a3 | 453 | /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ |
| AnnaBridge | 189:f392fc9709a3 | 454 | /* STM32L496xx || STM32L4A6xx */ |
| AnnaBridge | 189:f392fc9709a3 | 455 | |
| AnnaBridge | 189:f392fc9709a3 | 456 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 457 | } |
| AnnaBridge | 189:f392fc9709a3 | 458 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 459 | |
| AnnaBridge | 189:f392fc9709a3 | 460 | #endif /* __STM32L4xx_HAL_SWPMI_H */ |
| AnnaBridge | 189:f392fc9709a3 | 461 | |
| AnnaBridge | 189:f392fc9709a3 | 462 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
