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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_IAR/stm32l4xx_hal_sai.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @file stm32l4xx_hal_sai.h |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @author MCD Application Team |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @brief Header file of SAI HAL module. |
| AnnaBridge | 189:f392fc9709a3 | 6 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 7 | * @attention |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 20 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 21 | * |
| AnnaBridge | 189:f392fc9709a3 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 32 | * |
| AnnaBridge | 189:f392fc9709a3 | 33 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 34 | */ |
| AnnaBridge | 189:f392fc9709a3 | 35 | |
| AnnaBridge | 189:f392fc9709a3 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | #ifndef __STM32L4xx_HAL_SAI_H |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __STM32L4xx_HAL_SAI_H |
| AnnaBridge | 189:f392fc9709a3 | 39 | |
| AnnaBridge | 189:f392fc9709a3 | 40 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 41 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 42 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 45 | #include "stm32l4xx_hal_def.h" |
| AnnaBridge | 189:f392fc9709a3 | 46 | |
| AnnaBridge | 189:f392fc9709a3 | 47 | /** @addtogroup STM32L4xx_HAL_Driver |
| AnnaBridge | 189:f392fc9709a3 | 48 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 49 | */ |
| AnnaBridge | 189:f392fc9709a3 | 50 | |
| AnnaBridge | 189:f392fc9709a3 | 51 | /** @addtogroup SAI |
| AnnaBridge | 189:f392fc9709a3 | 52 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 53 | */ |
| AnnaBridge | 189:f392fc9709a3 | 54 | |
| AnnaBridge | 189:f392fc9709a3 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 56 | /** @defgroup SAI_Exported_Types SAI Exported Types |
| AnnaBridge | 189:f392fc9709a3 | 57 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 58 | */ |
| AnnaBridge | 189:f392fc9709a3 | 59 | |
| AnnaBridge | 189:f392fc9709a3 | 60 | /** |
| AnnaBridge | 189:f392fc9709a3 | 61 | * @brief HAL State structures definition |
| AnnaBridge | 189:f392fc9709a3 | 62 | */ |
| AnnaBridge | 189:f392fc9709a3 | 63 | typedef enum |
| AnnaBridge | 189:f392fc9709a3 | 64 | { |
| AnnaBridge | 189:f392fc9709a3 | 65 | HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ |
| AnnaBridge | 189:f392fc9709a3 | 66 | HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ |
| AnnaBridge | 189:f392fc9709a3 | 67 | HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 68 | HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 69 | HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 70 | }HAL_SAI_StateTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 71 | |
| AnnaBridge | 189:f392fc9709a3 | 72 | /** |
| AnnaBridge | 189:f392fc9709a3 | 73 | * @brief SAI Callback prototype |
| AnnaBridge | 189:f392fc9709a3 | 74 | */ |
| AnnaBridge | 189:f392fc9709a3 | 75 | typedef void (*SAIcallback)(void); |
| AnnaBridge | 189:f392fc9709a3 | 76 | |
| AnnaBridge | 189:f392fc9709a3 | 77 | #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
| AnnaBridge | 189:f392fc9709a3 | 78 | /** |
| AnnaBridge | 189:f392fc9709a3 | 79 | * @brief SAI PDM Init structure definition |
| AnnaBridge | 189:f392fc9709a3 | 80 | */ |
| AnnaBridge | 189:f392fc9709a3 | 81 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 82 | { |
| AnnaBridge | 189:f392fc9709a3 | 83 | FunctionalState Activation; /*!< Enable/disable PDM interface */ |
| AnnaBridge | 189:f392fc9709a3 | 84 | uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used. |
| AnnaBridge | 189:f392fc9709a3 | 85 | This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ |
| AnnaBridge | 189:f392fc9709a3 | 86 | uint32_t ClockEnable; /*!< Specifies which clock must be enabled. |
| AnnaBridge | 189:f392fc9709a3 | 87 | This parameter can be a values combination of @ref SAI_PDM_ClockEnable */ |
| AnnaBridge | 189:f392fc9709a3 | 88 | }SAI_PdmInitTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 89 | #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ |
| AnnaBridge | 189:f392fc9709a3 | 90 | |
| AnnaBridge | 189:f392fc9709a3 | 91 | /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 92 | * @brief SAI Init Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 93 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 94 | */ |
| AnnaBridge | 189:f392fc9709a3 | 95 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 96 | { |
| AnnaBridge | 189:f392fc9709a3 | 97 | uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. |
| AnnaBridge | 189:f392fc9709a3 | 98 | This parameter can be a value of @ref SAI_Block_Mode */ |
| AnnaBridge | 189:f392fc9709a3 | 99 | |
| AnnaBridge | 189:f392fc9709a3 | 100 | uint32_t Synchro; /*!< Specifies SAI Block synchronization |
| AnnaBridge | 189:f392fc9709a3 | 101 | This parameter can be a value of @ref SAI_Block_Synchronization */ |
| AnnaBridge | 189:f392fc9709a3 | 102 | |
| AnnaBridge | 189:f392fc9709a3 | 103 | uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common |
| AnnaBridge | 189:f392fc9709a3 | 104 | for BlockA and BlockB |
| AnnaBridge | 189:f392fc9709a3 | 105 | This parameter can be a value of @ref SAI_Block_SyncExt |
| AnnaBridge | 189:f392fc9709a3 | 106 | @note: If both audio blocks of same SAI are used, this parameter has |
| AnnaBridge | 189:f392fc9709a3 | 107 | to be set to the same value for each audio block */ |
| AnnaBridge | 189:f392fc9709a3 | 108 | |
| AnnaBridge | 189:f392fc9709a3 | 109 | uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. |
| AnnaBridge | 189:f392fc9709a3 | 110 | This parameter can be a value of @ref SAI_Block_Output_Drive |
| AnnaBridge | 189:f392fc9709a3 | 111 | @note this value has to be set before enabling the audio block |
| AnnaBridge | 189:f392fc9709a3 | 112 | but after the audio block configuration. */ |
| AnnaBridge | 189:f392fc9709a3 | 113 | |
| AnnaBridge | 189:f392fc9709a3 | 114 | uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. |
| AnnaBridge | 189:f392fc9709a3 | 115 | This parameter can be a value of @ref SAI_Block_NoDivider |
| AnnaBridge | 189:f392fc9709a3 | 116 | @note: For STM32L4Rx/STM32L4Sx devices : |
| AnnaBridge | 189:f392fc9709a3 | 117 | If bit NOMCK in the SAI_xCR1 register is cleared, the frame length |
| AnnaBridge | 189:f392fc9709a3 | 118 | should be aligned to a number equal to a power of 2, from 8 to 256. |
| AnnaBridge | 189:f392fc9709a3 | 119 | If bit NOMCK in the SAI_xCR1 register is set, the frame length can |
| AnnaBridge | 189:f392fc9709a3 | 120 | take any of the values without constraint. There is no MCLK_x clock |
| AnnaBridge | 189:f392fc9709a3 | 121 | which can be output. |
| AnnaBridge | 189:f392fc9709a3 | 122 | For other devices : |
| AnnaBridge | 189:f392fc9709a3 | 123 | If bit NODIV in the SAI_xCR1 register is cleared, the frame length |
| AnnaBridge | 189:f392fc9709a3 | 124 | should be aligned to a number equal to a power of 2, from 8 to 256. |
| AnnaBridge | 189:f392fc9709a3 | 125 | If bit NODIV in the SAI_xCR1 register is set, the frame length can |
| AnnaBridge | 189:f392fc9709a3 | 126 | take any of the values without constraint since the input clock of |
| AnnaBridge | 189:f392fc9709a3 | 127 | the audio block should be equal to the bit clock. |
| AnnaBridge | 189:f392fc9709a3 | 128 | There is no MCLK_x clock which can be output. */ |
| AnnaBridge | 189:f392fc9709a3 | 129 | |
| AnnaBridge | 189:f392fc9709a3 | 130 | uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. |
| AnnaBridge | 189:f392fc9709a3 | 131 | This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ |
| AnnaBridge | 189:f392fc9709a3 | 132 | |
| AnnaBridge | 189:f392fc9709a3 | 133 | uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. |
| AnnaBridge | 189:f392fc9709a3 | 134 | This parameter can be a value of @ref SAI_Audio_Frequency */ |
| AnnaBridge | 189:f392fc9709a3 | 135 | |
| AnnaBridge | 189:f392fc9709a3 | 136 | uint32_t Mckdiv; /*!< Specifies the master clock divider, the parameter will be used if for |
| AnnaBridge | 189:f392fc9709a3 | 137 | AudioFrequency the user choice |
| AnnaBridge | 189:f392fc9709a3 | 138 | This parameter must be a number between Min_Data = 0 and Max_Data = 63 on STM32L4Rx/STM32L4Sx devices. |
| AnnaBridge | 189:f392fc9709a3 | 139 | This parameter must be a number between Min_Data = 0 and Max_Data = 15 on other devices. */ |
| AnnaBridge | 189:f392fc9709a3 | 140 | |
| AnnaBridge | 189:f392fc9709a3 | 141 | #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
| AnnaBridge | 189:f392fc9709a3 | 142 | uint32_t MckOverSampling; /*!< Specifies the master clock oversampling. |
| AnnaBridge | 189:f392fc9709a3 | 143 | This parameter can be a value of @ref SAI_Block_Mck_OverSampling */ |
| AnnaBridge | 189:f392fc9709a3 | 144 | #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ |
| AnnaBridge | 189:f392fc9709a3 | 145 | |
| AnnaBridge | 189:f392fc9709a3 | 146 | uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. |
| AnnaBridge | 189:f392fc9709a3 | 147 | This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ |
| AnnaBridge | 189:f392fc9709a3 | 148 | |
| AnnaBridge | 189:f392fc9709a3 | 149 | uint32_t CompandingMode; /*!< Specifies the companding mode type. |
| AnnaBridge | 189:f392fc9709a3 | 150 | This parameter can be a value of @ref SAI_Block_Companding_Mode */ |
| AnnaBridge | 189:f392fc9709a3 | 151 | |
| AnnaBridge | 189:f392fc9709a3 | 152 | uint32_t TriState; /*!< Specifies the companding mode type. |
| AnnaBridge | 189:f392fc9709a3 | 153 | This parameter can be a value of @ref SAI_TRIState_Management */ |
| AnnaBridge | 189:f392fc9709a3 | 154 | |
| AnnaBridge | 189:f392fc9709a3 | 155 | #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
| AnnaBridge | 189:f392fc9709a3 | 156 | SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */ |
| AnnaBridge | 189:f392fc9709a3 | 157 | #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ |
| AnnaBridge | 189:f392fc9709a3 | 158 | |
| AnnaBridge | 189:f392fc9709a3 | 159 | /* This part of the structure is automatically filled if your are using the high level initialisation |
| AnnaBridge | 189:f392fc9709a3 | 160 | function HAL_SAI_InitProtocol */ |
| AnnaBridge | 189:f392fc9709a3 | 161 | |
| AnnaBridge | 189:f392fc9709a3 | 162 | uint32_t Protocol; /*!< Specifies the SAI Block protocol. |
| AnnaBridge | 189:f392fc9709a3 | 163 | This parameter can be a value of @ref SAI_Block_Protocol */ |
| AnnaBridge | 189:f392fc9709a3 | 164 | |
| AnnaBridge | 189:f392fc9709a3 | 165 | uint32_t DataSize; /*!< Specifies the SAI Block data size. |
| AnnaBridge | 189:f392fc9709a3 | 166 | This parameter can be a value of @ref SAI_Block_Data_Size */ |
| AnnaBridge | 189:f392fc9709a3 | 167 | |
| AnnaBridge | 189:f392fc9709a3 | 168 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
| AnnaBridge | 189:f392fc9709a3 | 169 | This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ |
| AnnaBridge | 189:f392fc9709a3 | 170 | |
| AnnaBridge | 189:f392fc9709a3 | 171 | uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. |
| AnnaBridge | 189:f392fc9709a3 | 172 | This parameter can be a value of @ref SAI_Block_Clock_Strobing */ |
| AnnaBridge | 189:f392fc9709a3 | 173 | }SAI_InitTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 174 | /** |
| AnnaBridge | 189:f392fc9709a3 | 175 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 176 | */ |
| AnnaBridge | 189:f392fc9709a3 | 177 | |
| AnnaBridge | 189:f392fc9709a3 | 178 | /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 179 | * @brief SAI Frame Init structure definition |
| AnnaBridge | 189:f392fc9709a3 | 180 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 181 | */ |
| AnnaBridge | 189:f392fc9709a3 | 182 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 183 | { |
| AnnaBridge | 189:f392fc9709a3 | 184 | |
| AnnaBridge | 189:f392fc9709a3 | 185 | uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. |
| AnnaBridge | 189:f392fc9709a3 | 186 | This parameter must be a number between Min_Data = 8 and Max_Data = 256. |
| AnnaBridge | 189:f392fc9709a3 | 187 | @note: If master clock MCLK_x pin is declared as an output, the frame length |
| AnnaBridge | 189:f392fc9709a3 | 188 | should be aligned to a number equal to power of 2 in order to keep |
| AnnaBridge | 189:f392fc9709a3 | 189 | in an audio frame, an integer number of MCLK pulses by bit Clock. */ |
| AnnaBridge | 189:f392fc9709a3 | 190 | |
| AnnaBridge | 189:f392fc9709a3 | 191 | uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. |
| AnnaBridge | 189:f392fc9709a3 | 192 | This Parameter specifies the length in number of bit clock (SCK + 1) |
| AnnaBridge | 189:f392fc9709a3 | 193 | of the active level of FS signal in audio frame. |
| AnnaBridge | 189:f392fc9709a3 | 194 | This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ |
| AnnaBridge | 189:f392fc9709a3 | 195 | |
| AnnaBridge | 189:f392fc9709a3 | 196 | uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. |
| AnnaBridge | 189:f392fc9709a3 | 197 | This parameter can be a value of @ref SAI_Block_FS_Definition */ |
| AnnaBridge | 189:f392fc9709a3 | 198 | |
| AnnaBridge | 189:f392fc9709a3 | 199 | uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. |
| AnnaBridge | 189:f392fc9709a3 | 200 | This parameter can be a value of @ref SAI_Block_FS_Polarity */ |
| AnnaBridge | 189:f392fc9709a3 | 201 | |
| AnnaBridge | 189:f392fc9709a3 | 202 | uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. |
| AnnaBridge | 189:f392fc9709a3 | 203 | This parameter can be a value of @ref SAI_Block_FS_Offset */ |
| AnnaBridge | 189:f392fc9709a3 | 204 | |
| AnnaBridge | 189:f392fc9709a3 | 205 | }SAI_FrameInitTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 206 | /** |
| AnnaBridge | 189:f392fc9709a3 | 207 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 208 | */ |
| AnnaBridge | 189:f392fc9709a3 | 209 | |
| AnnaBridge | 189:f392fc9709a3 | 210 | /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 211 | * @brief SAI Block Slot Init Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 212 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 213 | */ |
| AnnaBridge | 189:f392fc9709a3 | 214 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 215 | { |
| AnnaBridge | 189:f392fc9709a3 | 216 | uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. |
| AnnaBridge | 189:f392fc9709a3 | 217 | This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ |
| AnnaBridge | 189:f392fc9709a3 | 218 | |
| AnnaBridge | 189:f392fc9709a3 | 219 | uint32_t SlotSize; /*!< Specifies the Slot Size. |
| AnnaBridge | 189:f392fc9709a3 | 220 | This parameter can be a value of @ref SAI_Block_Slot_Size */ |
| AnnaBridge | 189:f392fc9709a3 | 221 | |
| AnnaBridge | 189:f392fc9709a3 | 222 | uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. |
| AnnaBridge | 189:f392fc9709a3 | 223 | This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ |
| AnnaBridge | 189:f392fc9709a3 | 224 | |
| AnnaBridge | 189:f392fc9709a3 | 225 | uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. |
| AnnaBridge | 189:f392fc9709a3 | 226 | This parameter can be a value of @ref SAI_Block_Slot_Active */ |
| AnnaBridge | 189:f392fc9709a3 | 227 | }SAI_SlotInitTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 228 | /** |
| AnnaBridge | 189:f392fc9709a3 | 229 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 230 | */ |
| AnnaBridge | 189:f392fc9709a3 | 231 | |
| AnnaBridge | 189:f392fc9709a3 | 232 | /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 233 | * @brief SAI handle Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 234 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 235 | */ |
| AnnaBridge | 189:f392fc9709a3 | 236 | typedef struct __SAI_HandleTypeDef |
| AnnaBridge | 189:f392fc9709a3 | 237 | { |
| AnnaBridge | 189:f392fc9709a3 | 238 | SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ |
| AnnaBridge | 189:f392fc9709a3 | 239 | |
| AnnaBridge | 189:f392fc9709a3 | 240 | SAI_InitTypeDef Init; /*!< SAI communication parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 241 | |
| AnnaBridge | 189:f392fc9709a3 | 242 | SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 243 | |
| AnnaBridge | 189:f392fc9709a3 | 244 | SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 245 | |
| AnnaBridge | 189:f392fc9709a3 | 246 | uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ |
| AnnaBridge | 189:f392fc9709a3 | 247 | |
| AnnaBridge | 189:f392fc9709a3 | 248 | uint16_t XferSize; /*!< SAI transfer size */ |
| AnnaBridge | 189:f392fc9709a3 | 249 | |
| AnnaBridge | 189:f392fc9709a3 | 250 | uint16_t XferCount; /*!< SAI transfer counter */ |
| AnnaBridge | 189:f392fc9709a3 | 251 | |
| AnnaBridge | 189:f392fc9709a3 | 252 | DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 253 | |
| AnnaBridge | 189:f392fc9709a3 | 254 | DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 255 | |
| AnnaBridge | 189:f392fc9709a3 | 256 | SAIcallback mutecallback; /*!< SAI mute callback */ |
| AnnaBridge | 189:f392fc9709a3 | 257 | |
| AnnaBridge | 189:f392fc9709a3 | 258 | void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ |
| AnnaBridge | 189:f392fc9709a3 | 259 | |
| AnnaBridge | 189:f392fc9709a3 | 260 | HAL_LockTypeDef Lock; /*!< SAI locking object */ |
| AnnaBridge | 189:f392fc9709a3 | 261 | |
| AnnaBridge | 189:f392fc9709a3 | 262 | __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ |
| AnnaBridge | 189:f392fc9709a3 | 263 | |
| AnnaBridge | 189:f392fc9709a3 | 264 | __IO uint32_t ErrorCode; /*!< SAI Error code */ |
| AnnaBridge | 189:f392fc9709a3 | 265 | }SAI_HandleTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 266 | /** |
| AnnaBridge | 189:f392fc9709a3 | 267 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 268 | */ |
| AnnaBridge | 189:f392fc9709a3 | 269 | |
| AnnaBridge | 189:f392fc9709a3 | 270 | /** |
| AnnaBridge | 189:f392fc9709a3 | 271 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 272 | */ |
| AnnaBridge | 189:f392fc9709a3 | 273 | |
| AnnaBridge | 189:f392fc9709a3 | 274 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 275 | |
| AnnaBridge | 189:f392fc9709a3 | 276 | /** @defgroup SAI_Exported_Constants SAI Exported Constants |
| AnnaBridge | 189:f392fc9709a3 | 277 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 278 | */ |
| AnnaBridge | 189:f392fc9709a3 | 279 | |
| AnnaBridge | 189:f392fc9709a3 | 280 | /** @defgroup SAI_Error_Code SAI Error Code |
| AnnaBridge | 189:f392fc9709a3 | 281 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 282 | */ |
| AnnaBridge | 189:f392fc9709a3 | 283 | #define HAL_SAI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ |
| AnnaBridge | 189:f392fc9709a3 | 284 | #define HAL_SAI_ERROR_OVR ((uint32_t)0x00000001U) /*!< Overrun Error */ |
| AnnaBridge | 189:f392fc9709a3 | 285 | #define HAL_SAI_ERROR_UDR ((uint32_t)0x00000002U) /*!< Underrun error */ |
| AnnaBridge | 189:f392fc9709a3 | 286 | #define HAL_SAI_ERROR_AFSDET ((uint32_t)0x00000004U) /*!< Anticipated Frame synchronisation detection */ |
| AnnaBridge | 189:f392fc9709a3 | 287 | #define HAL_SAI_ERROR_LFSDET ((uint32_t)0x00000008U) /*!< Late Frame synchronisation detection */ |
| AnnaBridge | 189:f392fc9709a3 | 288 | #define HAL_SAI_ERROR_CNREADY ((uint32_t)0x00000010U) /*!< codec not ready */ |
| AnnaBridge | 189:f392fc9709a3 | 289 | #define HAL_SAI_ERROR_WCKCFG ((uint32_t)0x00000020U) /*!< Wrong clock configuration */ |
| AnnaBridge | 189:f392fc9709a3 | 290 | #define HAL_SAI_ERROR_TIMEOUT ((uint32_t)0x00000040U) /*!< Timeout error */ |
| AnnaBridge | 189:f392fc9709a3 | 291 | #define HAL_SAI_ERROR_DMA ((uint32_t)0x00000080U) /*!< DMA error */ |
| AnnaBridge | 189:f392fc9709a3 | 292 | /** |
| AnnaBridge | 189:f392fc9709a3 | 293 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 294 | */ |
| AnnaBridge | 189:f392fc9709a3 | 295 | |
| AnnaBridge | 189:f392fc9709a3 | 296 | /** @defgroup SAI_Block_SyncExt SAI External synchronisation |
| AnnaBridge | 189:f392fc9709a3 | 297 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 298 | */ |
| AnnaBridge | 189:f392fc9709a3 | 299 | #define SAI_SYNCEXT_DISABLE 0 |
| AnnaBridge | 189:f392fc9709a3 | 300 | #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1 |
| AnnaBridge | 189:f392fc9709a3 | 301 | #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2 |
| AnnaBridge | 189:f392fc9709a3 | 302 | /** |
| AnnaBridge | 189:f392fc9709a3 | 303 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 304 | */ |
| AnnaBridge | 189:f392fc9709a3 | 305 | |
| AnnaBridge | 189:f392fc9709a3 | 306 | /** @defgroup SAI_Protocol SAI Supported protocol |
| AnnaBridge | 189:f392fc9709a3 | 307 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 308 | */ |
| AnnaBridge | 189:f392fc9709a3 | 309 | #define SAI_I2S_STANDARD 0 |
| AnnaBridge | 189:f392fc9709a3 | 310 | #define SAI_I2S_MSBJUSTIFIED 1 |
| AnnaBridge | 189:f392fc9709a3 | 311 | #define SAI_I2S_LSBJUSTIFIED 2 |
| AnnaBridge | 189:f392fc9709a3 | 312 | #define SAI_PCM_LONG 3 |
| AnnaBridge | 189:f392fc9709a3 | 313 | #define SAI_PCM_SHORT 4 |
| AnnaBridge | 189:f392fc9709a3 | 314 | /** |
| AnnaBridge | 189:f392fc9709a3 | 315 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 316 | */ |
| AnnaBridge | 189:f392fc9709a3 | 317 | |
| AnnaBridge | 189:f392fc9709a3 | 318 | /** @defgroup SAI_Protocol_DataSize SAI protocol data size |
| AnnaBridge | 189:f392fc9709a3 | 319 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 320 | */ |
| AnnaBridge | 189:f392fc9709a3 | 321 | #define SAI_PROTOCOL_DATASIZE_16BIT 0 |
| AnnaBridge | 189:f392fc9709a3 | 322 | #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1 |
| AnnaBridge | 189:f392fc9709a3 | 323 | #define SAI_PROTOCOL_DATASIZE_24BIT 2 |
| AnnaBridge | 189:f392fc9709a3 | 324 | #define SAI_PROTOCOL_DATASIZE_32BIT 3 |
| AnnaBridge | 189:f392fc9709a3 | 325 | /** |
| AnnaBridge | 189:f392fc9709a3 | 326 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 327 | */ |
| AnnaBridge | 189:f392fc9709a3 | 328 | |
| AnnaBridge | 189:f392fc9709a3 | 329 | /** @defgroup SAI_Audio_Frequency SAI Audio Frequency |
| AnnaBridge | 189:f392fc9709a3 | 330 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 331 | */ |
| AnnaBridge | 189:f392fc9709a3 | 332 | #define SAI_AUDIO_FREQUENCY_192K ((uint32_t)192000U) |
| AnnaBridge | 189:f392fc9709a3 | 333 | #define SAI_AUDIO_FREQUENCY_96K ((uint32_t)96000U) |
| AnnaBridge | 189:f392fc9709a3 | 334 | #define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000U) |
| AnnaBridge | 189:f392fc9709a3 | 335 | #define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100U) |
| AnnaBridge | 189:f392fc9709a3 | 336 | #define SAI_AUDIO_FREQUENCY_32K ((uint32_t)32000U) |
| AnnaBridge | 189:f392fc9709a3 | 337 | #define SAI_AUDIO_FREQUENCY_22K ((uint32_t)22050U) |
| AnnaBridge | 189:f392fc9709a3 | 338 | #define SAI_AUDIO_FREQUENCY_16K ((uint32_t)16000U) |
| AnnaBridge | 189:f392fc9709a3 | 339 | #define SAI_AUDIO_FREQUENCY_11K ((uint32_t)11025U) |
| AnnaBridge | 189:f392fc9709a3 | 340 | #define SAI_AUDIO_FREQUENCY_8K ((uint32_t)8000U) |
| AnnaBridge | 189:f392fc9709a3 | 341 | #define SAI_AUDIO_FREQUENCY_MCKDIV ((uint32_t)0U) |
| AnnaBridge | 189:f392fc9709a3 | 342 | /** |
| AnnaBridge | 189:f392fc9709a3 | 343 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 344 | */ |
| AnnaBridge | 189:f392fc9709a3 | 345 | |
| AnnaBridge | 189:f392fc9709a3 | 346 | #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
| AnnaBridge | 189:f392fc9709a3 | 347 | /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling |
| AnnaBridge | 189:f392fc9709a3 | 348 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 349 | */ |
| AnnaBridge | 189:f392fc9709a3 | 350 | #define SAI_MCK_OVERSAMPLING_DISABLE ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 351 | #define SAI_MCK_OVERSAMPLING_ENABLE ((uint32_t)SAI_xCR1_OSR) |
| AnnaBridge | 189:f392fc9709a3 | 352 | /** |
| AnnaBridge | 189:f392fc9709a3 | 353 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 354 | */ |
| AnnaBridge | 189:f392fc9709a3 | 355 | |
| AnnaBridge | 189:f392fc9709a3 | 356 | /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable |
| AnnaBridge | 189:f392fc9709a3 | 357 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 358 | */ |
| AnnaBridge | 189:f392fc9709a3 | 359 | #define SAI_PDM_CLOCK1_ENABLE ((uint32_t)SAI_PDMCR_CKEN1) |
| AnnaBridge | 189:f392fc9709a3 | 360 | #define SAI_PDM_CLOCK2_ENABLE ((uint32_t)SAI_PDMCR_CKEN2) |
| AnnaBridge | 189:f392fc9709a3 | 361 | /** |
| AnnaBridge | 189:f392fc9709a3 | 362 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 363 | */ |
| AnnaBridge | 189:f392fc9709a3 | 364 | #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ |
| AnnaBridge | 189:f392fc9709a3 | 365 | |
| AnnaBridge | 189:f392fc9709a3 | 366 | /** @defgroup SAI_Block_Mode SAI Block Mode |
| AnnaBridge | 189:f392fc9709a3 | 367 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 368 | */ |
| AnnaBridge | 189:f392fc9709a3 | 369 | #define SAI_MODEMASTER_TX ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 370 | #define SAI_MODEMASTER_RX ((uint32_t)SAI_xCR1_MODE_0) |
| AnnaBridge | 189:f392fc9709a3 | 371 | #define SAI_MODESLAVE_TX ((uint32_t)SAI_xCR1_MODE_1) |
| AnnaBridge | 189:f392fc9709a3 | 372 | #define SAI_MODESLAVE_RX ((uint32_t)(SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0)) |
| AnnaBridge | 189:f392fc9709a3 | 373 | |
| AnnaBridge | 189:f392fc9709a3 | 374 | /** |
| AnnaBridge | 189:f392fc9709a3 | 375 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 376 | */ |
| AnnaBridge | 189:f392fc9709a3 | 377 | |
| AnnaBridge | 189:f392fc9709a3 | 378 | /** @defgroup SAI_Block_Protocol SAI Block Protocol |
| AnnaBridge | 189:f392fc9709a3 | 379 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 380 | */ |
| AnnaBridge | 189:f392fc9709a3 | 381 | #define SAI_FREE_PROTOCOL ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 382 | #define SAI_SPDIF_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_0) |
| AnnaBridge | 189:f392fc9709a3 | 383 | #define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1) |
| AnnaBridge | 189:f392fc9709a3 | 384 | /** |
| AnnaBridge | 189:f392fc9709a3 | 385 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 386 | */ |
| AnnaBridge | 189:f392fc9709a3 | 387 | |
| AnnaBridge | 189:f392fc9709a3 | 388 | /** @defgroup SAI_Block_Data_Size SAI Block Data Size |
| AnnaBridge | 189:f392fc9709a3 | 389 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 390 | */ |
| AnnaBridge | 189:f392fc9709a3 | 391 | #define SAI_DATASIZE_8 ((uint32_t)SAI_xCR1_DS_1) |
| AnnaBridge | 189:f392fc9709a3 | 392 | #define SAI_DATASIZE_10 ((uint32_t)(SAI_xCR1_DS_1 | SAI_xCR1_DS_0)) |
| AnnaBridge | 189:f392fc9709a3 | 393 | #define SAI_DATASIZE_16 ((uint32_t)SAI_xCR1_DS_2) |
| AnnaBridge | 189:f392fc9709a3 | 394 | #define SAI_DATASIZE_20 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_0)) |
| AnnaBridge | 189:f392fc9709a3 | 395 | #define SAI_DATASIZE_24 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1)) |
| AnnaBridge | 189:f392fc9709a3 | 396 | #define SAI_DATASIZE_32 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0)) |
| AnnaBridge | 189:f392fc9709a3 | 397 | /** |
| AnnaBridge | 189:f392fc9709a3 | 398 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 399 | */ |
| AnnaBridge | 189:f392fc9709a3 | 400 | |
| AnnaBridge | 189:f392fc9709a3 | 401 | /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission |
| AnnaBridge | 189:f392fc9709a3 | 402 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 403 | */ |
| AnnaBridge | 189:f392fc9709a3 | 404 | #define SAI_FIRSTBIT_MSB ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 405 | #define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST) |
| AnnaBridge | 189:f392fc9709a3 | 406 | /** |
| AnnaBridge | 189:f392fc9709a3 | 407 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 408 | */ |
| AnnaBridge | 189:f392fc9709a3 | 409 | |
| AnnaBridge | 189:f392fc9709a3 | 410 | /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing |
| AnnaBridge | 189:f392fc9709a3 | 411 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 412 | */ |
| AnnaBridge | 189:f392fc9709a3 | 413 | #define SAI_CLOCKSTROBING_FALLINGEDGE 0 |
| AnnaBridge | 189:f392fc9709a3 | 414 | #define SAI_CLOCKSTROBING_RISINGEDGE 1 |
| AnnaBridge | 189:f392fc9709a3 | 415 | /** |
| AnnaBridge | 189:f392fc9709a3 | 416 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 417 | */ |
| AnnaBridge | 189:f392fc9709a3 | 418 | |
| AnnaBridge | 189:f392fc9709a3 | 419 | /** @defgroup SAI_Block_Synchronization SAI Block Synchronization |
| AnnaBridge | 189:f392fc9709a3 | 420 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 421 | */ |
| AnnaBridge | 189:f392fc9709a3 | 422 | #define SAI_ASYNCHRONOUS 0 /*!< Asynchronous */ |
| AnnaBridge | 189:f392fc9709a3 | 423 | #define SAI_SYNCHRONOUS 1 /*!< Synchronous with other block of same SAI */ |
| AnnaBridge | 189:f392fc9709a3 | 424 | #define SAI_SYNCHRONOUS_EXT_SAI1 2 /*!< Synchronous with other SAI, SAI1 */ |
| AnnaBridge | 189:f392fc9709a3 | 425 | #define SAI_SYNCHRONOUS_EXT_SAI2 3 /*!< Synchronous with other SAI, SAI2 */ |
| AnnaBridge | 189:f392fc9709a3 | 426 | /** |
| AnnaBridge | 189:f392fc9709a3 | 427 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 428 | */ |
| AnnaBridge | 189:f392fc9709a3 | 429 | |
| AnnaBridge | 189:f392fc9709a3 | 430 | /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive |
| AnnaBridge | 189:f392fc9709a3 | 431 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 432 | */ |
| AnnaBridge | 189:f392fc9709a3 | 433 | #define SAI_OUTPUTDRIVE_DISABLE ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 434 | #define SAI_OUTPUTDRIVE_ENABLE ((uint32_t)SAI_xCR1_OUTDRIV) |
| AnnaBridge | 189:f392fc9709a3 | 435 | /** |
| AnnaBridge | 189:f392fc9709a3 | 436 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 437 | */ |
| AnnaBridge | 189:f392fc9709a3 | 438 | |
| AnnaBridge | 189:f392fc9709a3 | 439 | /** @defgroup SAI_Block_NoDivider SAI Block NoDivider |
| AnnaBridge | 189:f392fc9709a3 | 440 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 441 | */ |
| AnnaBridge | 189:f392fc9709a3 | 442 | #define SAI_MASTERDIVIDER_ENABLE ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 443 | #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
| AnnaBridge | 189:f392fc9709a3 | 444 | #define SAI_MASTERDIVIDER_DISABLE ((uint32_t)SAI_xCR1_NOMCK) |
| AnnaBridge | 189:f392fc9709a3 | 445 | #else |
| AnnaBridge | 189:f392fc9709a3 | 446 | #define SAI_MASTERDIVIDER_DISABLE ((uint32_t)SAI_xCR1_NODIV) |
| AnnaBridge | 189:f392fc9709a3 | 447 | #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ |
| AnnaBridge | 189:f392fc9709a3 | 448 | /** |
| AnnaBridge | 189:f392fc9709a3 | 449 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 450 | */ |
| AnnaBridge | 189:f392fc9709a3 | 451 | |
| AnnaBridge | 189:f392fc9709a3 | 452 | |
| AnnaBridge | 189:f392fc9709a3 | 453 | /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition |
| AnnaBridge | 189:f392fc9709a3 | 454 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 455 | */ |
| AnnaBridge | 189:f392fc9709a3 | 456 | #define SAI_FS_STARTFRAME ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 457 | #define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF) |
| AnnaBridge | 189:f392fc9709a3 | 458 | /** |
| AnnaBridge | 189:f392fc9709a3 | 459 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 460 | */ |
| AnnaBridge | 189:f392fc9709a3 | 461 | |
| AnnaBridge | 189:f392fc9709a3 | 462 | /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity |
| AnnaBridge | 189:f392fc9709a3 | 463 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 464 | */ |
| AnnaBridge | 189:f392fc9709a3 | 465 | #define SAI_FS_ACTIVE_LOW ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 466 | #define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPOL) |
| AnnaBridge | 189:f392fc9709a3 | 467 | /** |
| AnnaBridge | 189:f392fc9709a3 | 468 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 469 | */ |
| AnnaBridge | 189:f392fc9709a3 | 470 | |
| AnnaBridge | 189:f392fc9709a3 | 471 | /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset |
| AnnaBridge | 189:f392fc9709a3 | 472 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 473 | */ |
| AnnaBridge | 189:f392fc9709a3 | 474 | #define SAI_FS_FIRSTBIT ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 475 | #define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF) |
| AnnaBridge | 189:f392fc9709a3 | 476 | /** |
| AnnaBridge | 189:f392fc9709a3 | 477 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 478 | */ |
| AnnaBridge | 189:f392fc9709a3 | 479 | |
| AnnaBridge | 189:f392fc9709a3 | 480 | |
| AnnaBridge | 189:f392fc9709a3 | 481 | /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size |
| AnnaBridge | 189:f392fc9709a3 | 482 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 483 | */ |
| AnnaBridge | 189:f392fc9709a3 | 484 | #define SAI_SLOTSIZE_DATASIZE ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 485 | #define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0) |
| AnnaBridge | 189:f392fc9709a3 | 486 | #define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1) |
| AnnaBridge | 189:f392fc9709a3 | 487 | /** |
| AnnaBridge | 189:f392fc9709a3 | 488 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 489 | */ |
| AnnaBridge | 189:f392fc9709a3 | 490 | |
| AnnaBridge | 189:f392fc9709a3 | 491 | /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active |
| AnnaBridge | 189:f392fc9709a3 | 492 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 493 | */ |
| AnnaBridge | 189:f392fc9709a3 | 494 | #define SAI_SLOT_NOTACTIVE ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 495 | #define SAI_SLOTACTIVE_0 ((uint32_t)0x00000001U) |
| AnnaBridge | 189:f392fc9709a3 | 496 | #define SAI_SLOTACTIVE_1 ((uint32_t)0x00000002U) |
| AnnaBridge | 189:f392fc9709a3 | 497 | #define SAI_SLOTACTIVE_2 ((uint32_t)0x00000004U) |
| AnnaBridge | 189:f392fc9709a3 | 498 | #define SAI_SLOTACTIVE_3 ((uint32_t)0x00000008U) |
| AnnaBridge | 189:f392fc9709a3 | 499 | #define SAI_SLOTACTIVE_4 ((uint32_t)0x00000010U) |
| AnnaBridge | 189:f392fc9709a3 | 500 | #define SAI_SLOTACTIVE_5 ((uint32_t)0x00000020U) |
| AnnaBridge | 189:f392fc9709a3 | 501 | #define SAI_SLOTACTIVE_6 ((uint32_t)0x00000040U) |
| AnnaBridge | 189:f392fc9709a3 | 502 | #define SAI_SLOTACTIVE_7 ((uint32_t)0x00000080U) |
| AnnaBridge | 189:f392fc9709a3 | 503 | #define SAI_SLOTACTIVE_8 ((uint32_t)0x00000100U) |
| AnnaBridge | 189:f392fc9709a3 | 504 | #define SAI_SLOTACTIVE_9 ((uint32_t)0x00000200U) |
| AnnaBridge | 189:f392fc9709a3 | 505 | #define SAI_SLOTACTIVE_10 ((uint32_t)0x00000400U) |
| AnnaBridge | 189:f392fc9709a3 | 506 | #define SAI_SLOTACTIVE_11 ((uint32_t)0x00000800U) |
| AnnaBridge | 189:f392fc9709a3 | 507 | #define SAI_SLOTACTIVE_12 ((uint32_t)0x00001000U) |
| AnnaBridge | 189:f392fc9709a3 | 508 | #define SAI_SLOTACTIVE_13 ((uint32_t)0x00002000U) |
| AnnaBridge | 189:f392fc9709a3 | 509 | #define SAI_SLOTACTIVE_14 ((uint32_t)0x00004000U) |
| AnnaBridge | 189:f392fc9709a3 | 510 | #define SAI_SLOTACTIVE_15 ((uint32_t)0x00008000U) |
| AnnaBridge | 189:f392fc9709a3 | 511 | #define SAI_SLOTACTIVE_ALL ((uint32_t)0x0000FFFFU) |
| AnnaBridge | 189:f392fc9709a3 | 512 | /** |
| AnnaBridge | 189:f392fc9709a3 | 513 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 514 | */ |
| AnnaBridge | 189:f392fc9709a3 | 515 | |
| AnnaBridge | 189:f392fc9709a3 | 516 | /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode |
| AnnaBridge | 189:f392fc9709a3 | 517 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 518 | */ |
| AnnaBridge | 189:f392fc9709a3 | 519 | #define SAI_STEREOMODE ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 520 | #define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO) |
| AnnaBridge | 189:f392fc9709a3 | 521 | /** |
| AnnaBridge | 189:f392fc9709a3 | 522 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 523 | */ |
| AnnaBridge | 189:f392fc9709a3 | 524 | |
| AnnaBridge | 189:f392fc9709a3 | 525 | /** @defgroup SAI_TRIState_Management SAI TRIState Management |
| AnnaBridge | 189:f392fc9709a3 | 526 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 527 | */ |
| AnnaBridge | 189:f392fc9709a3 | 528 | #define SAI_OUTPUT_NOTRELEASED ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 529 | #define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS) |
| AnnaBridge | 189:f392fc9709a3 | 530 | /** |
| AnnaBridge | 189:f392fc9709a3 | 531 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 532 | */ |
| AnnaBridge | 189:f392fc9709a3 | 533 | |
| AnnaBridge | 189:f392fc9709a3 | 534 | /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold |
| AnnaBridge | 189:f392fc9709a3 | 535 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 536 | */ |
| AnnaBridge | 189:f392fc9709a3 | 537 | #define SAI_FIFOTHRESHOLD_EMPTY ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 538 | #define SAI_FIFOTHRESHOLD_1QF ((uint32_t)(SAI_xCR2_FTH_0)) |
| AnnaBridge | 189:f392fc9709a3 | 539 | #define SAI_FIFOTHRESHOLD_HF ((uint32_t)(SAI_xCR2_FTH_1)) |
| AnnaBridge | 189:f392fc9709a3 | 540 | #define SAI_FIFOTHRESHOLD_3QF ((uint32_t)(SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0)) |
| AnnaBridge | 189:f392fc9709a3 | 541 | #define SAI_FIFOTHRESHOLD_FULL ((uint32_t)(SAI_xCR2_FTH_2)) |
| AnnaBridge | 189:f392fc9709a3 | 542 | /** |
| AnnaBridge | 189:f392fc9709a3 | 543 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 544 | */ |
| AnnaBridge | 189:f392fc9709a3 | 545 | |
| AnnaBridge | 189:f392fc9709a3 | 546 | /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode |
| AnnaBridge | 189:f392fc9709a3 | 547 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 548 | */ |
| AnnaBridge | 189:f392fc9709a3 | 549 | #define SAI_NOCOMPANDING ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 550 | #define SAI_ULAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1)) |
| AnnaBridge | 189:f392fc9709a3 | 551 | #define SAI_ALAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0)) |
| AnnaBridge | 189:f392fc9709a3 | 552 | #define SAI_ULAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_CPL)) |
| AnnaBridge | 189:f392fc9709a3 | 553 | #define SAI_ALAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL)) |
| AnnaBridge | 189:f392fc9709a3 | 554 | /** |
| AnnaBridge | 189:f392fc9709a3 | 555 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 556 | */ |
| AnnaBridge | 189:f392fc9709a3 | 557 | |
| AnnaBridge | 189:f392fc9709a3 | 558 | /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value |
| AnnaBridge | 189:f392fc9709a3 | 559 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 560 | */ |
| AnnaBridge | 189:f392fc9709a3 | 561 | #define SAI_ZERO_VALUE ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 562 | #define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL) |
| AnnaBridge | 189:f392fc9709a3 | 563 | /** |
| AnnaBridge | 189:f392fc9709a3 | 564 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 565 | */ |
| AnnaBridge | 189:f392fc9709a3 | 566 | |
| AnnaBridge | 189:f392fc9709a3 | 567 | /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition |
| AnnaBridge | 189:f392fc9709a3 | 568 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 569 | */ |
| AnnaBridge | 189:f392fc9709a3 | 570 | #define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE) |
| AnnaBridge | 189:f392fc9709a3 | 571 | #define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE) |
| AnnaBridge | 189:f392fc9709a3 | 572 | #define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE) |
| AnnaBridge | 189:f392fc9709a3 | 573 | #define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE) |
| AnnaBridge | 189:f392fc9709a3 | 574 | #define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE) |
| AnnaBridge | 189:f392fc9709a3 | 575 | #define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE) |
| AnnaBridge | 189:f392fc9709a3 | 576 | #define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE) |
| AnnaBridge | 189:f392fc9709a3 | 577 | /** |
| AnnaBridge | 189:f392fc9709a3 | 578 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 579 | */ |
| AnnaBridge | 189:f392fc9709a3 | 580 | |
| AnnaBridge | 189:f392fc9709a3 | 581 | /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition |
| AnnaBridge | 189:f392fc9709a3 | 582 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 583 | */ |
| AnnaBridge | 189:f392fc9709a3 | 584 | #define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR) |
| AnnaBridge | 189:f392fc9709a3 | 585 | #define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET) |
| AnnaBridge | 189:f392fc9709a3 | 586 | #define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG) |
| AnnaBridge | 189:f392fc9709a3 | 587 | #define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ) |
| AnnaBridge | 189:f392fc9709a3 | 588 | #define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY) |
| AnnaBridge | 189:f392fc9709a3 | 589 | #define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET) |
| AnnaBridge | 189:f392fc9709a3 | 590 | #define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET) |
| AnnaBridge | 189:f392fc9709a3 | 591 | /** |
| AnnaBridge | 189:f392fc9709a3 | 592 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 593 | */ |
| AnnaBridge | 189:f392fc9709a3 | 594 | |
| AnnaBridge | 189:f392fc9709a3 | 595 | /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level |
| AnnaBridge | 189:f392fc9709a3 | 596 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 597 | */ |
| AnnaBridge | 189:f392fc9709a3 | 598 | #define SAI_FIFOSTATUS_EMPTY ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 599 | #define SAI_FIFOSTATUS_LESS1QUARTERFULL ((uint32_t)0x00010000U) |
| AnnaBridge | 189:f392fc9709a3 | 600 | #define SAI_FIFOSTATUS_1QUARTERFULL ((uint32_t)0x00020000U) |
| AnnaBridge | 189:f392fc9709a3 | 601 | #define SAI_FIFOSTATUS_HALFFULL ((uint32_t)0x00030000U) |
| AnnaBridge | 189:f392fc9709a3 | 602 | #define SAI_FIFOSTATUS_3QUARTERFULL ((uint32_t)0x00040000U) |
| AnnaBridge | 189:f392fc9709a3 | 603 | #define SAI_FIFOSTATUS_FULL ((uint32_t)0x00050000U) |
| AnnaBridge | 189:f392fc9709a3 | 604 | /** |
| AnnaBridge | 189:f392fc9709a3 | 605 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 606 | */ |
| AnnaBridge | 189:f392fc9709a3 | 607 | |
| AnnaBridge | 189:f392fc9709a3 | 608 | /** |
| AnnaBridge | 189:f392fc9709a3 | 609 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 610 | */ |
| AnnaBridge | 189:f392fc9709a3 | 611 | |
| AnnaBridge | 189:f392fc9709a3 | 612 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 613 | |
| AnnaBridge | 189:f392fc9709a3 | 614 | /** @defgroup SAI_Exported_Macros SAI Exported Macros |
| AnnaBridge | 189:f392fc9709a3 | 615 | * @brief macros to handle interrupts and specific configurations |
| AnnaBridge | 189:f392fc9709a3 | 616 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 617 | */ |
| AnnaBridge | 189:f392fc9709a3 | 618 | |
| AnnaBridge | 189:f392fc9709a3 | 619 | /** @brief Reset SAI handle state. |
| AnnaBridge | 189:f392fc9709a3 | 620 | * @param __HANDLE__ specifies the SAI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 621 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 622 | */ |
| AnnaBridge | 189:f392fc9709a3 | 623 | #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) |
| AnnaBridge | 189:f392fc9709a3 | 624 | |
| AnnaBridge | 189:f392fc9709a3 | 625 | /** @brief Enable or disable the specified SAI interrupts. |
| AnnaBridge | 189:f392fc9709a3 | 626 | * @param __HANDLE__ specifies the SAI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 627 | * @param __INTERRUPT__ specifies the interrupt source to enable or disable. |
| AnnaBridge | 189:f392fc9709a3 | 628 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 629 | * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 630 | * @arg SAI_IT_MUTEDET: Mute detection interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 631 | * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 632 | * @arg SAI_IT_FREQ: FIFO request interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 633 | * @arg SAI_IT_CNRDY: Codec not ready interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 634 | * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 635 | * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 636 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 637 | */ |
| AnnaBridge | 189:f392fc9709a3 | 638 | #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) |
| AnnaBridge | 189:f392fc9709a3 | 639 | #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) |
| AnnaBridge | 189:f392fc9709a3 | 640 | |
| AnnaBridge | 189:f392fc9709a3 | 641 | /** @brief Check whether the specified SAI interrupt source is enabled or not. |
| AnnaBridge | 189:f392fc9709a3 | 642 | * @param __HANDLE__ specifies the SAI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 643 | * @param __INTERRUPT__ specifies the SAI interrupt source to check. |
| AnnaBridge | 189:f392fc9709a3 | 644 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 645 | * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 646 | * @arg SAI_IT_MUTEDET: Mute detection interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 647 | * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 648 | * @arg SAI_IT_FREQ: FIFO request interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 649 | * @arg SAI_IT_CNRDY: Codec not ready interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 650 | * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 651 | * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable |
| AnnaBridge | 189:f392fc9709a3 | 652 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
| AnnaBridge | 189:f392fc9709a3 | 653 | */ |
| AnnaBridge | 189:f392fc9709a3 | 654 | #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| AnnaBridge | 189:f392fc9709a3 | 655 | |
| AnnaBridge | 189:f392fc9709a3 | 656 | /** @brief Check whether the specified SAI flag is set or not. |
| AnnaBridge | 189:f392fc9709a3 | 657 | * @param __HANDLE__ specifies the SAI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 658 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 189:f392fc9709a3 | 659 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 660 | * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. |
| AnnaBridge | 189:f392fc9709a3 | 661 | * @arg SAI_FLAG_MUTEDET: Mute detection flag. |
| AnnaBridge | 189:f392fc9709a3 | 662 | * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. |
| AnnaBridge | 189:f392fc9709a3 | 663 | * @arg SAI_FLAG_FREQ: FIFO request flag. |
| AnnaBridge | 189:f392fc9709a3 | 664 | * @arg SAI_FLAG_CNRDY: Codec not ready flag. |
| AnnaBridge | 189:f392fc9709a3 | 665 | * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. |
| AnnaBridge | 189:f392fc9709a3 | 666 | * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. |
| AnnaBridge | 189:f392fc9709a3 | 667 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 189:f392fc9709a3 | 668 | */ |
| AnnaBridge | 189:f392fc9709a3 | 669 | #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 670 | |
| AnnaBridge | 189:f392fc9709a3 | 671 | /** @brief Clear the specified SAI pending flag. |
| AnnaBridge | 189:f392fc9709a3 | 672 | * @param __HANDLE__ specifies the SAI Handle. |
| AnnaBridge | 189:f392fc9709a3 | 673 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 189:f392fc9709a3 | 674 | * This parameter can be any combination of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 675 | * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun |
| AnnaBridge | 189:f392fc9709a3 | 676 | * @arg SAI_FLAG_MUTEDET: Clear Mute detection |
| AnnaBridge | 189:f392fc9709a3 | 677 | * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration |
| AnnaBridge | 189:f392fc9709a3 | 678 | * @arg SAI_FLAG_FREQ: Clear FIFO request |
| AnnaBridge | 189:f392fc9709a3 | 679 | * @arg SAI_FLAG_CNRDY: Clear Codec not ready |
| AnnaBridge | 189:f392fc9709a3 | 680 | * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection |
| AnnaBridge | 189:f392fc9709a3 | 681 | * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection |
| AnnaBridge | 189:f392fc9709a3 | 682 | * |
| AnnaBridge | 189:f392fc9709a3 | 683 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 684 | */ |
| AnnaBridge | 189:f392fc9709a3 | 685 | #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 686 | |
| AnnaBridge | 189:f392fc9709a3 | 687 | #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) |
| AnnaBridge | 189:f392fc9709a3 | 688 | #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) |
| AnnaBridge | 189:f392fc9709a3 | 689 | |
| AnnaBridge | 189:f392fc9709a3 | 690 | /** |
| AnnaBridge | 189:f392fc9709a3 | 691 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 692 | */ |
| AnnaBridge | 189:f392fc9709a3 | 693 | |
| AnnaBridge | 189:f392fc9709a3 | 694 | #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
| AnnaBridge | 189:f392fc9709a3 | 695 | /* Include SAI HAL Extension module */ |
| AnnaBridge | 189:f392fc9709a3 | 696 | #include "stm32l4xx_hal_sai_ex.h" |
| AnnaBridge | 189:f392fc9709a3 | 697 | #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ |
| AnnaBridge | 189:f392fc9709a3 | 698 | |
| AnnaBridge | 189:f392fc9709a3 | 699 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 700 | |
| AnnaBridge | 189:f392fc9709a3 | 701 | /** @addtogroup SAI_Exported_Functions |
| AnnaBridge | 189:f392fc9709a3 | 702 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 703 | */ |
| AnnaBridge | 189:f392fc9709a3 | 704 | |
| AnnaBridge | 189:f392fc9709a3 | 705 | /* Initialization/de-initialization functions ********************************/ |
| AnnaBridge | 189:f392fc9709a3 | 706 | |
| AnnaBridge | 189:f392fc9709a3 | 707 | /** @addtogroup SAI_Exported_Functions_Group1 |
| AnnaBridge | 189:f392fc9709a3 | 708 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 709 | */ |
| AnnaBridge | 189:f392fc9709a3 | 710 | HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); |
| AnnaBridge | 189:f392fc9709a3 | 711 | HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 712 | HAL_StatusTypeDef HAL_SAI_DeInit (SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 713 | void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 714 | void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 715 | |
| AnnaBridge | 189:f392fc9709a3 | 716 | /** |
| AnnaBridge | 189:f392fc9709a3 | 717 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 718 | */ |
| AnnaBridge | 189:f392fc9709a3 | 719 | |
| AnnaBridge | 189:f392fc9709a3 | 720 | /* I/O operation functions ***************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 721 | |
| AnnaBridge | 189:f392fc9709a3 | 722 | /** @addtogroup SAI_Exported_Functions_Group2 |
| AnnaBridge | 189:f392fc9709a3 | 723 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 724 | */ |
| AnnaBridge | 189:f392fc9709a3 | 725 | /* Blocking mode: Polling */ |
| AnnaBridge | 189:f392fc9709a3 | 726 | HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 189:f392fc9709a3 | 727 | HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 189:f392fc9709a3 | 728 | |
| AnnaBridge | 189:f392fc9709a3 | 729 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 730 | HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 731 | HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 732 | |
| AnnaBridge | 189:f392fc9709a3 | 733 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 189:f392fc9709a3 | 734 | HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 735 | HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 736 | HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 737 | HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 738 | HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 739 | |
| AnnaBridge | 189:f392fc9709a3 | 740 | /* Abort function */ |
| AnnaBridge | 189:f392fc9709a3 | 741 | HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 742 | |
| AnnaBridge | 189:f392fc9709a3 | 743 | /* Mute management */ |
| AnnaBridge | 189:f392fc9709a3 | 744 | HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); |
| AnnaBridge | 189:f392fc9709a3 | 745 | HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 746 | HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); |
| AnnaBridge | 189:f392fc9709a3 | 747 | HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 748 | |
| AnnaBridge | 189:f392fc9709a3 | 749 | /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
| AnnaBridge | 189:f392fc9709a3 | 750 | void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 751 | void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 752 | void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 753 | void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 754 | void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 755 | void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 756 | /** |
| AnnaBridge | 189:f392fc9709a3 | 757 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 758 | */ |
| AnnaBridge | 189:f392fc9709a3 | 759 | |
| AnnaBridge | 189:f392fc9709a3 | 760 | /** @addtogroup SAI_Exported_Functions_Group3 |
| AnnaBridge | 189:f392fc9709a3 | 761 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 762 | */ |
| AnnaBridge | 189:f392fc9709a3 | 763 | /* Peripheral State functions ************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 764 | HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 765 | uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai); |
| AnnaBridge | 189:f392fc9709a3 | 766 | /** |
| AnnaBridge | 189:f392fc9709a3 | 767 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 768 | */ |
| AnnaBridge | 189:f392fc9709a3 | 769 | |
| AnnaBridge | 189:f392fc9709a3 | 770 | /** |
| AnnaBridge | 189:f392fc9709a3 | 771 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 772 | */ |
| AnnaBridge | 189:f392fc9709a3 | 773 | |
| AnnaBridge | 189:f392fc9709a3 | 774 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 775 | /** @addtogroup SAI_Private_Macros |
| AnnaBridge | 189:f392fc9709a3 | 776 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 777 | */ |
| AnnaBridge | 189:f392fc9709a3 | 778 | #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 779 | ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 780 | ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 781 | |
| AnnaBridge | 189:f392fc9709a3 | 782 | #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 783 | ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 784 | ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 785 | ((PROTOCOL) == SAI_PCM_LONG) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 786 | ((PROTOCOL) == SAI_PCM_SHORT)) |
| AnnaBridge | 189:f392fc9709a3 | 787 | |
| AnnaBridge | 189:f392fc9709a3 | 788 | #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 789 | ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 790 | ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 791 | ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) |
| AnnaBridge | 189:f392fc9709a3 | 792 | |
| AnnaBridge | 189:f392fc9709a3 | 793 | #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ |
| AnnaBridge | 189:f392fc9709a3 | 794 | ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ |
| AnnaBridge | 189:f392fc9709a3 | 795 | ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ |
| AnnaBridge | 189:f392fc9709a3 | 796 | ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ |
| AnnaBridge | 189:f392fc9709a3 | 797 | ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) |
| AnnaBridge | 189:f392fc9709a3 | 798 | |
| AnnaBridge | 189:f392fc9709a3 | 799 | #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
| AnnaBridge | 189:f392fc9709a3 | 800 | #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 801 | ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 802 | |
| AnnaBridge | 189:f392fc9709a3 | 803 | #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U)) |
| AnnaBridge | 189:f392fc9709a3 | 804 | |
| AnnaBridge | 189:f392fc9709a3 | 805 | #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \ |
| AnnaBridge | 189:f392fc9709a3 | 806 | (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U)) |
| AnnaBridge | 189:f392fc9709a3 | 807 | #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ |
| AnnaBridge | 189:f392fc9709a3 | 808 | |
| AnnaBridge | 189:f392fc9709a3 | 809 | #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ |
| AnnaBridge | 189:f392fc9709a3 | 810 | ((MODE) == SAI_MODEMASTER_RX) || \ |
| AnnaBridge | 189:f392fc9709a3 | 811 | ((MODE) == SAI_MODESLAVE_TX) || \ |
| AnnaBridge | 189:f392fc9709a3 | 812 | ((MODE) == SAI_MODESLAVE_RX)) |
| AnnaBridge | 189:f392fc9709a3 | 813 | |
| AnnaBridge | 189:f392fc9709a3 | 814 | #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ |
| AnnaBridge | 189:f392fc9709a3 | 815 | ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ |
| AnnaBridge | 189:f392fc9709a3 | 816 | ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) |
| AnnaBridge | 189:f392fc9709a3 | 817 | |
| AnnaBridge | 189:f392fc9709a3 | 818 | #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 819 | ((DATASIZE) == SAI_DATASIZE_10) || \ |
| AnnaBridge | 189:f392fc9709a3 | 820 | ((DATASIZE) == SAI_DATASIZE_16) || \ |
| AnnaBridge | 189:f392fc9709a3 | 821 | ((DATASIZE) == SAI_DATASIZE_20) || \ |
| AnnaBridge | 189:f392fc9709a3 | 822 | ((DATASIZE) == SAI_DATASIZE_24) || \ |
| AnnaBridge | 189:f392fc9709a3 | 823 | ((DATASIZE) == SAI_DATASIZE_32)) |
| AnnaBridge | 189:f392fc9709a3 | 824 | |
| AnnaBridge | 189:f392fc9709a3 | 825 | #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ |
| AnnaBridge | 189:f392fc9709a3 | 826 | ((BIT) == SAI_FIRSTBIT_LSB)) |
| AnnaBridge | 189:f392fc9709a3 | 827 | |
| AnnaBridge | 189:f392fc9709a3 | 828 | #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 829 | ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) |
| AnnaBridge | 189:f392fc9709a3 | 830 | |
| AnnaBridge | 189:f392fc9709a3 | 831 | #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ |
| AnnaBridge | 189:f392fc9709a3 | 832 | ((SYNCHRO) == SAI_SYNCHRONOUS) || \ |
| AnnaBridge | 189:f392fc9709a3 | 833 | ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ |
| AnnaBridge | 189:f392fc9709a3 | 834 | ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) |
| AnnaBridge | 189:f392fc9709a3 | 835 | |
| AnnaBridge | 189:f392fc9709a3 | 836 | #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 837 | ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 838 | |
| AnnaBridge | 189:f392fc9709a3 | 839 | #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 840 | ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 841 | |
| AnnaBridge | 189:f392fc9709a3 | 842 | #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63) |
| AnnaBridge | 189:f392fc9709a3 | 843 | |
| AnnaBridge | 189:f392fc9709a3 | 844 | #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 845 | ((VALUE) == SAI_LAST_SENT_VALUE)) |
| AnnaBridge | 189:f392fc9709a3 | 846 | |
| AnnaBridge | 189:f392fc9709a3 | 847 | #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ |
| AnnaBridge | 189:f392fc9709a3 | 848 | ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ |
| AnnaBridge | 189:f392fc9709a3 | 849 | ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ |
| AnnaBridge | 189:f392fc9709a3 | 850 | ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ |
| AnnaBridge | 189:f392fc9709a3 | 851 | ((MODE) == SAI_ALAW_2CPL_COMPANDING)) |
| AnnaBridge | 189:f392fc9709a3 | 852 | |
| AnnaBridge | 189:f392fc9709a3 | 853 | #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ |
| AnnaBridge | 189:f392fc9709a3 | 854 | ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ |
| AnnaBridge | 189:f392fc9709a3 | 855 | ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ |
| AnnaBridge | 189:f392fc9709a3 | 856 | ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ |
| AnnaBridge | 189:f392fc9709a3 | 857 | ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) |
| AnnaBridge | 189:f392fc9709a3 | 858 | |
| AnnaBridge | 189:f392fc9709a3 | 859 | #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 860 | ((STATE) == SAI_OUTPUT_RELEASED)) |
| AnnaBridge | 189:f392fc9709a3 | 861 | |
| AnnaBridge | 189:f392fc9709a3 | 862 | #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ |
| AnnaBridge | 189:f392fc9709a3 | 863 | ((MODE) == SAI_STEREOMODE)) |
| AnnaBridge | 189:f392fc9709a3 | 864 | |
| AnnaBridge | 189:f392fc9709a3 | 865 | #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) |
| AnnaBridge | 189:f392fc9709a3 | 866 | |
| AnnaBridge | 189:f392fc9709a3 | 867 | #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1 <= (NUMBER)) && ((NUMBER) <= 16)) |
| AnnaBridge | 189:f392fc9709a3 | 868 | |
| AnnaBridge | 189:f392fc9709a3 | 869 | #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 870 | ((SIZE) == SAI_SLOTSIZE_16B) || \ |
| AnnaBridge | 189:f392fc9709a3 | 871 | ((SIZE) == SAI_SLOTSIZE_32B)) |
| AnnaBridge | 189:f392fc9709a3 | 872 | |
| AnnaBridge | 189:f392fc9709a3 | 873 | #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24) |
| AnnaBridge | 189:f392fc9709a3 | 874 | |
| AnnaBridge | 189:f392fc9709a3 | 875 | #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ |
| AnnaBridge | 189:f392fc9709a3 | 876 | ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) |
| AnnaBridge | 189:f392fc9709a3 | 877 | |
| AnnaBridge | 189:f392fc9709a3 | 878 | #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ |
| AnnaBridge | 189:f392fc9709a3 | 879 | ((POLARITY) == SAI_FS_ACTIVE_HIGH)) |
| AnnaBridge | 189:f392fc9709a3 | 880 | |
| AnnaBridge | 189:f392fc9709a3 | 881 | #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ |
| AnnaBridge | 189:f392fc9709a3 | 882 | ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) |
| AnnaBridge | 189:f392fc9709a3 | 883 | |
| AnnaBridge | 189:f392fc9709a3 | 884 | #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15) |
| AnnaBridge | 189:f392fc9709a3 | 885 | |
| AnnaBridge | 189:f392fc9709a3 | 886 | #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8 <= (LENGTH)) && ((LENGTH) <= 256)) |
| AnnaBridge | 189:f392fc9709a3 | 887 | |
| AnnaBridge | 189:f392fc9709a3 | 888 | #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1 <= (LENGTH)) && ((LENGTH) <= 128)) |
| AnnaBridge | 189:f392fc9709a3 | 889 | |
| AnnaBridge | 189:f392fc9709a3 | 890 | /** |
| AnnaBridge | 189:f392fc9709a3 | 891 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 892 | */ |
| AnnaBridge | 189:f392fc9709a3 | 893 | |
| AnnaBridge | 189:f392fc9709a3 | 894 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 895 | /** @defgroup SAI_Private_Functions SAI Private Functions |
| AnnaBridge | 189:f392fc9709a3 | 896 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 897 | */ |
| AnnaBridge | 189:f392fc9709a3 | 898 | |
| AnnaBridge | 189:f392fc9709a3 | 899 | /** |
| AnnaBridge | 189:f392fc9709a3 | 900 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 901 | */ |
| AnnaBridge | 189:f392fc9709a3 | 902 | |
| AnnaBridge | 189:f392fc9709a3 | 903 | /** |
| AnnaBridge | 189:f392fc9709a3 | 904 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 905 | */ |
| AnnaBridge | 189:f392fc9709a3 | 906 | |
| AnnaBridge | 189:f392fc9709a3 | 907 | /** |
| AnnaBridge | 189:f392fc9709a3 | 908 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 909 | */ |
| AnnaBridge | 189:f392fc9709a3 | 910 | |
| AnnaBridge | 189:f392fc9709a3 | 911 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 912 | } |
| AnnaBridge | 189:f392fc9709a3 | 913 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 914 | |
| AnnaBridge | 189:f392fc9709a3 | 915 | #endif /* __STM32L4xx_HAL_SAI_H */ |
| AnnaBridge | 189:f392fc9709a3 | 916 | |
| AnnaBridge | 189:f392fc9709a3 | 917 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
