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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_ARM_STD/stm32l4xx_ll_lptim.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

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AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32l4xx_ll_lptim.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file of LPTIM LL module.
AnnaBridge 189:f392fc9709a3 6 ******************************************************************************
AnnaBridge 189:f392fc9709a3 7 * @attention
AnnaBridge 189:f392fc9709a3 8 *
AnnaBridge 189:f392fc9709a3 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 189:f392fc9709a3 10 *
AnnaBridge 189:f392fc9709a3 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 12 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 189:f392fc9709a3 14 * this list of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 189:f392fc9709a3 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 189:f392fc9709a3 17 * and/or other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 189:f392fc9709a3 19 * may be used to endorse or promote products derived from this software
AnnaBridge 189:f392fc9709a3 20 * without specific prior written permission.
AnnaBridge 189:f392fc9709a3 21 *
AnnaBridge 189:f392fc9709a3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 189:f392fc9709a3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 189:f392fc9709a3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 189:f392fc9709a3 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 189:f392fc9709a3 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 189:f392fc9709a3 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 189:f392fc9709a3 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 189:f392fc9709a3 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 189:f392fc9709a3 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 32 *
AnnaBridge 189:f392fc9709a3 33 ******************************************************************************
AnnaBridge 189:f392fc9709a3 34 */
AnnaBridge 189:f392fc9709a3 35
AnnaBridge 189:f392fc9709a3 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 37 #ifndef __STM32L4xx_LL_LPTIM_H
AnnaBridge 189:f392fc9709a3 38 #define __STM32L4xx_LL_LPTIM_H
AnnaBridge 189:f392fc9709a3 39
AnnaBridge 189:f392fc9709a3 40 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 41 extern "C" {
AnnaBridge 189:f392fc9709a3 42 #endif
AnnaBridge 189:f392fc9709a3 43
AnnaBridge 189:f392fc9709a3 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 45 #include "stm32l4xx.h"
AnnaBridge 189:f392fc9709a3 46
AnnaBridge 189:f392fc9709a3 47 /** @addtogroup STM32L4xx_LL_Driver
AnnaBridge 189:f392fc9709a3 48 * @{
AnnaBridge 189:f392fc9709a3 49 */
AnnaBridge 189:f392fc9709a3 50 #if defined (LPTIM1) || defined (LPTIM2)
AnnaBridge 189:f392fc9709a3 51
AnnaBridge 189:f392fc9709a3 52 /** @defgroup LPTIM_LL LPTIM
AnnaBridge 189:f392fc9709a3 53 * @{
AnnaBridge 189:f392fc9709a3 54 */
AnnaBridge 189:f392fc9709a3 55
AnnaBridge 189:f392fc9709a3 56 /* Private types -------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 57 /* Private variables ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 58
AnnaBridge 189:f392fc9709a3 59 /* Private constants ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 60
AnnaBridge 189:f392fc9709a3 61 /* Private macros ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 62 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 189:f392fc9709a3 63 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
AnnaBridge 189:f392fc9709a3 64 * @{
AnnaBridge 189:f392fc9709a3 65 */
AnnaBridge 189:f392fc9709a3 66 /**
AnnaBridge 189:f392fc9709a3 67 * @}
AnnaBridge 189:f392fc9709a3 68 */
AnnaBridge 189:f392fc9709a3 69 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 189:f392fc9709a3 70
AnnaBridge 189:f392fc9709a3 71 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 72 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 189:f392fc9709a3 73 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
AnnaBridge 189:f392fc9709a3 74 * @{
AnnaBridge 189:f392fc9709a3 75 */
AnnaBridge 189:f392fc9709a3 76
AnnaBridge 189:f392fc9709a3 77 /**
AnnaBridge 189:f392fc9709a3 78 * @brief LPTIM Init structure definition
AnnaBridge 189:f392fc9709a3 79 */
AnnaBridge 189:f392fc9709a3 80 typedef struct
AnnaBridge 189:f392fc9709a3 81 {
AnnaBridge 189:f392fc9709a3 82 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
AnnaBridge 189:f392fc9709a3 83 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
AnnaBridge 189:f392fc9709a3 84
AnnaBridge 189:f392fc9709a3 85 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
AnnaBridge 189:f392fc9709a3 86
AnnaBridge 189:f392fc9709a3 87 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
AnnaBridge 189:f392fc9709a3 88 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
AnnaBridge 189:f392fc9709a3 89
AnnaBridge 189:f392fc9709a3 90 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
AnnaBridge 189:f392fc9709a3 91
AnnaBridge 189:f392fc9709a3 92 uint32_t Waveform; /*!< Specifies the waveform shape.
AnnaBridge 189:f392fc9709a3 93 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
AnnaBridge 189:f392fc9709a3 94
AnnaBridge 189:f392fc9709a3 95 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
AnnaBridge 189:f392fc9709a3 96
AnnaBridge 189:f392fc9709a3 97 uint32_t Polarity; /*!< Specifies waveform polarity.
AnnaBridge 189:f392fc9709a3 98 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
AnnaBridge 189:f392fc9709a3 99
AnnaBridge 189:f392fc9709a3 100 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
AnnaBridge 189:f392fc9709a3 101 } LL_LPTIM_InitTypeDef;
AnnaBridge 189:f392fc9709a3 102
AnnaBridge 189:f392fc9709a3 103 /**
AnnaBridge 189:f392fc9709a3 104 * @}
AnnaBridge 189:f392fc9709a3 105 */
AnnaBridge 189:f392fc9709a3 106 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 189:f392fc9709a3 107
AnnaBridge 189:f392fc9709a3 108 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 109 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
AnnaBridge 189:f392fc9709a3 110 * @{
AnnaBridge 189:f392fc9709a3 111 */
AnnaBridge 189:f392fc9709a3 112
AnnaBridge 189:f392fc9709a3 113 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 189:f392fc9709a3 114 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
AnnaBridge 189:f392fc9709a3 115 * @{
AnnaBridge 189:f392fc9709a3 116 */
AnnaBridge 189:f392fc9709a3 117 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
AnnaBridge 189:f392fc9709a3 118 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
AnnaBridge 189:f392fc9709a3 119 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
AnnaBridge 189:f392fc9709a3 120 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
AnnaBridge 189:f392fc9709a3 121 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
AnnaBridge 189:f392fc9709a3 122 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
AnnaBridge 189:f392fc9709a3 123 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
AnnaBridge 189:f392fc9709a3 124 /**
AnnaBridge 189:f392fc9709a3 125 * @}
AnnaBridge 189:f392fc9709a3 126 */
AnnaBridge 189:f392fc9709a3 127
AnnaBridge 189:f392fc9709a3 128 /** @defgroup LPTIM_LL_EC_IT IT Defines
AnnaBridge 189:f392fc9709a3 129 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
AnnaBridge 189:f392fc9709a3 130 * @{
AnnaBridge 189:f392fc9709a3 131 */
AnnaBridge 189:f392fc9709a3 132 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */
AnnaBridge 189:f392fc9709a3 133 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */
AnnaBridge 189:f392fc9709a3 134 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */
AnnaBridge 189:f392fc9709a3 135 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */
AnnaBridge 189:f392fc9709a3 136 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */
AnnaBridge 189:f392fc9709a3 137 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */
AnnaBridge 189:f392fc9709a3 138 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */
AnnaBridge 189:f392fc9709a3 139 /**
AnnaBridge 189:f392fc9709a3 140 * @}
AnnaBridge 189:f392fc9709a3 141 */
AnnaBridge 189:f392fc9709a3 142
AnnaBridge 189:f392fc9709a3 143 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
AnnaBridge 189:f392fc9709a3 144 * @{
AnnaBridge 189:f392fc9709a3 145 */
AnnaBridge 189:f392fc9709a3 146 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
AnnaBridge 189:f392fc9709a3 147 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
AnnaBridge 189:f392fc9709a3 148 /**
AnnaBridge 189:f392fc9709a3 149 * @}
AnnaBridge 189:f392fc9709a3 150 */
AnnaBridge 189:f392fc9709a3 151
AnnaBridge 189:f392fc9709a3 152 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
AnnaBridge 189:f392fc9709a3 153 * @{
AnnaBridge 189:f392fc9709a3 154 */
AnnaBridge 189:f392fc9709a3 155 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
AnnaBridge 189:f392fc9709a3 156 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
AnnaBridge 189:f392fc9709a3 157 /**
AnnaBridge 189:f392fc9709a3 158 * @}
AnnaBridge 189:f392fc9709a3 159 */
AnnaBridge 189:f392fc9709a3 160
AnnaBridge 189:f392fc9709a3 161 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
AnnaBridge 189:f392fc9709a3 162 * @{
AnnaBridge 189:f392fc9709a3 163 */
AnnaBridge 189:f392fc9709a3 164 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
AnnaBridge 189:f392fc9709a3 165 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
AnnaBridge 189:f392fc9709a3 166 /**
AnnaBridge 189:f392fc9709a3 167 * @}
AnnaBridge 189:f392fc9709a3 168 */
AnnaBridge 189:f392fc9709a3 169
AnnaBridge 189:f392fc9709a3 170 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
AnnaBridge 189:f392fc9709a3 171 * @{
AnnaBridge 189:f392fc9709a3 172 */
AnnaBridge 189:f392fc9709a3 173 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
AnnaBridge 189:f392fc9709a3 174 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
AnnaBridge 189:f392fc9709a3 175 /**
AnnaBridge 189:f392fc9709a3 176 * @}
AnnaBridge 189:f392fc9709a3 177 */
AnnaBridge 189:f392fc9709a3 178
AnnaBridge 189:f392fc9709a3 179 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
AnnaBridge 189:f392fc9709a3 180 * @{
AnnaBridge 189:f392fc9709a3 181 */
AnnaBridge 189:f392fc9709a3 182 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
AnnaBridge 189:f392fc9709a3 183 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
AnnaBridge 189:f392fc9709a3 184 /**
AnnaBridge 189:f392fc9709a3 185 * @}
AnnaBridge 189:f392fc9709a3 186 */
AnnaBridge 189:f392fc9709a3 187
AnnaBridge 189:f392fc9709a3 188 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
AnnaBridge 189:f392fc9709a3 189 * @{
AnnaBridge 189:f392fc9709a3 190 */
AnnaBridge 189:f392fc9709a3 191 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
AnnaBridge 189:f392fc9709a3 192 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
AnnaBridge 189:f392fc9709a3 193 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
AnnaBridge 189:f392fc9709a3 194 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
AnnaBridge 189:f392fc9709a3 195 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
AnnaBridge 189:f392fc9709a3 196 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
AnnaBridge 189:f392fc9709a3 197 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
AnnaBridge 189:f392fc9709a3 198 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
AnnaBridge 189:f392fc9709a3 199 /**
AnnaBridge 189:f392fc9709a3 200 * @}
AnnaBridge 189:f392fc9709a3 201 */
AnnaBridge 189:f392fc9709a3 202
AnnaBridge 189:f392fc9709a3 203 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
AnnaBridge 189:f392fc9709a3 204 * @{
AnnaBridge 189:f392fc9709a3 205 */
AnnaBridge 189:f392fc9709a3 206 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
AnnaBridge 189:f392fc9709a3 207 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
AnnaBridge 189:f392fc9709a3 208 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
AnnaBridge 189:f392fc9709a3 209 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
AnnaBridge 189:f392fc9709a3 210 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
AnnaBridge 189:f392fc9709a3 211 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
AnnaBridge 189:f392fc9709a3 212 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
AnnaBridge 189:f392fc9709a3 213 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
AnnaBridge 189:f392fc9709a3 214 /**
AnnaBridge 189:f392fc9709a3 215 * @}
AnnaBridge 189:f392fc9709a3 216 */
AnnaBridge 189:f392fc9709a3 217
AnnaBridge 189:f392fc9709a3 218 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
AnnaBridge 189:f392fc9709a3 219 * @{
AnnaBridge 189:f392fc9709a3 220 */
AnnaBridge 189:f392fc9709a3 221 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
AnnaBridge 189:f392fc9709a3 222 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
AnnaBridge 189:f392fc9709a3 223 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
AnnaBridge 189:f392fc9709a3 224 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
AnnaBridge 189:f392fc9709a3 225 /**
AnnaBridge 189:f392fc9709a3 226 * @}
AnnaBridge 189:f392fc9709a3 227 */
AnnaBridge 189:f392fc9709a3 228
AnnaBridge 189:f392fc9709a3 229 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
AnnaBridge 189:f392fc9709a3 230 * @{
AnnaBridge 189:f392fc9709a3 231 */
AnnaBridge 189:f392fc9709a3 232 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
AnnaBridge 189:f392fc9709a3 233 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
AnnaBridge 189:f392fc9709a3 234 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
AnnaBridge 189:f392fc9709a3 235 /**
AnnaBridge 189:f392fc9709a3 236 * @}
AnnaBridge 189:f392fc9709a3 237 */
AnnaBridge 189:f392fc9709a3 238
AnnaBridge 189:f392fc9709a3 239 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
AnnaBridge 189:f392fc9709a3 240 * @{
AnnaBridge 189:f392fc9709a3 241 */
AnnaBridge 189:f392fc9709a3 242 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
AnnaBridge 189:f392fc9709a3 243 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
AnnaBridge 189:f392fc9709a3 244 /**
AnnaBridge 189:f392fc9709a3 245 * @}
AnnaBridge 189:f392fc9709a3 246 */
AnnaBridge 189:f392fc9709a3 247
AnnaBridge 189:f392fc9709a3 248 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
AnnaBridge 189:f392fc9709a3 249 * @{
AnnaBridge 189:f392fc9709a3 250 */
AnnaBridge 189:f392fc9709a3 251 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
AnnaBridge 189:f392fc9709a3 252 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
AnnaBridge 189:f392fc9709a3 253 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
AnnaBridge 189:f392fc9709a3 254 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
AnnaBridge 189:f392fc9709a3 255 /**
AnnaBridge 189:f392fc9709a3 256 * @}
AnnaBridge 189:f392fc9709a3 257 */
AnnaBridge 189:f392fc9709a3 258
AnnaBridge 189:f392fc9709a3 259 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
AnnaBridge 189:f392fc9709a3 260 * @{
AnnaBridge 189:f392fc9709a3 261 */
AnnaBridge 189:f392fc9709a3 262 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
AnnaBridge 189:f392fc9709a3 263 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
AnnaBridge 189:f392fc9709a3 264 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
AnnaBridge 189:f392fc9709a3 265 /**
AnnaBridge 189:f392fc9709a3 266 * @}
AnnaBridge 189:f392fc9709a3 267 */
AnnaBridge 189:f392fc9709a3 268
AnnaBridge 189:f392fc9709a3 269 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
AnnaBridge 189:f392fc9709a3 270 * @{
AnnaBridge 189:f392fc9709a3 271 */
AnnaBridge 189:f392fc9709a3 272 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
AnnaBridge 189:f392fc9709a3 273 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
AnnaBridge 189:f392fc9709a3 274 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
AnnaBridge 189:f392fc9709a3 275 /**
AnnaBridge 189:f392fc9709a3 276 * @}
AnnaBridge 189:f392fc9709a3 277 */
AnnaBridge 189:f392fc9709a3 278
AnnaBridge 189:f392fc9709a3 279 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
AnnaBridge 189:f392fc9709a3 280 * @{
AnnaBridge 189:f392fc9709a3 281 */
AnnaBridge 189:f392fc9709a3 282 #define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
AnnaBridge 189:f392fc9709a3 283 #define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_OR_OR_0 /*!< For LPTIM1 and LPTIM2 */
AnnaBridge 189:f392fc9709a3 284 #define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM2 */
AnnaBridge 189:f392fc9709a3 285 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 LPTIM_OR_OR /*!< For LPTIM2 */
AnnaBridge 189:f392fc9709a3 286 /**
AnnaBridge 189:f392fc9709a3 287 * @}
AnnaBridge 189:f392fc9709a3 288 */
AnnaBridge 189:f392fc9709a3 289
AnnaBridge 189:f392fc9709a3 290 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
AnnaBridge 189:f392fc9709a3 291 * @{
AnnaBridge 189:f392fc9709a3 292 */
AnnaBridge 189:f392fc9709a3 293 #define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /*!< For LPTIM1 */
AnnaBridge 189:f392fc9709a3 294 #define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM1 */
AnnaBridge 189:f392fc9709a3 295 /**
AnnaBridge 189:f392fc9709a3 296 * @}
AnnaBridge 189:f392fc9709a3 297 */
AnnaBridge 189:f392fc9709a3 298
AnnaBridge 189:f392fc9709a3 299 /**
AnnaBridge 189:f392fc9709a3 300 * @}
AnnaBridge 189:f392fc9709a3 301 */
AnnaBridge 189:f392fc9709a3 302
AnnaBridge 189:f392fc9709a3 303 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 304 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
AnnaBridge 189:f392fc9709a3 305 * @{
AnnaBridge 189:f392fc9709a3 306 */
AnnaBridge 189:f392fc9709a3 307
AnnaBridge 189:f392fc9709a3 308 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 189:f392fc9709a3 309 * @{
AnnaBridge 189:f392fc9709a3 310 */
AnnaBridge 189:f392fc9709a3 311
AnnaBridge 189:f392fc9709a3 312 /**
AnnaBridge 189:f392fc9709a3 313 * @brief Write a value in LPTIM register
AnnaBridge 189:f392fc9709a3 314 * @param __INSTANCE__ LPTIM Instance
AnnaBridge 189:f392fc9709a3 315 * @param __REG__ Register to be written
AnnaBridge 189:f392fc9709a3 316 * @param __VALUE__ Value to be written in the register
AnnaBridge 189:f392fc9709a3 317 * @retval None
AnnaBridge 189:f392fc9709a3 318 */
AnnaBridge 189:f392fc9709a3 319 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 189:f392fc9709a3 320
AnnaBridge 189:f392fc9709a3 321 /**
AnnaBridge 189:f392fc9709a3 322 * @brief Read a value in LPTIM register
AnnaBridge 189:f392fc9709a3 323 * @param __INSTANCE__ LPTIM Instance
AnnaBridge 189:f392fc9709a3 324 * @param __REG__ Register to be read
AnnaBridge 189:f392fc9709a3 325 * @retval Register value
AnnaBridge 189:f392fc9709a3 326 */
AnnaBridge 189:f392fc9709a3 327 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 189:f392fc9709a3 328 /**
AnnaBridge 189:f392fc9709a3 329 * @}
AnnaBridge 189:f392fc9709a3 330 */
AnnaBridge 189:f392fc9709a3 331
AnnaBridge 189:f392fc9709a3 332 /**
AnnaBridge 189:f392fc9709a3 333 * @}
AnnaBridge 189:f392fc9709a3 334 */
AnnaBridge 189:f392fc9709a3 335
AnnaBridge 189:f392fc9709a3 336
AnnaBridge 189:f392fc9709a3 337 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 338 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
AnnaBridge 189:f392fc9709a3 339 * @{
AnnaBridge 189:f392fc9709a3 340 */
AnnaBridge 189:f392fc9709a3 341
AnnaBridge 189:f392fc9709a3 342 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
AnnaBridge 189:f392fc9709a3 343 * @{
AnnaBridge 189:f392fc9709a3 344 */
AnnaBridge 189:f392fc9709a3 345
AnnaBridge 189:f392fc9709a3 346 /**
AnnaBridge 189:f392fc9709a3 347 * @brief Enable the LPTIM instance
AnnaBridge 189:f392fc9709a3 348 * @note After setting the ENABLE bit, a delay of two counter clock is needed
AnnaBridge 189:f392fc9709a3 349 * before the LPTIM instance is actually enabled.
AnnaBridge 189:f392fc9709a3 350 * @rmtoll CR ENABLE LL_LPTIM_Enable
AnnaBridge 189:f392fc9709a3 351 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 352 * @retval None
AnnaBridge 189:f392fc9709a3 353 */
AnnaBridge 189:f392fc9709a3 354 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 355 {
AnnaBridge 189:f392fc9709a3 356 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
AnnaBridge 189:f392fc9709a3 357 }
AnnaBridge 189:f392fc9709a3 358
AnnaBridge 189:f392fc9709a3 359 /**
AnnaBridge 189:f392fc9709a3 360 * @brief Disable the LPTIM instance
AnnaBridge 189:f392fc9709a3 361 * @rmtoll CR ENABLE LL_LPTIM_Disable
AnnaBridge 189:f392fc9709a3 362 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 363 * @retval None
AnnaBridge 189:f392fc9709a3 364 */
AnnaBridge 189:f392fc9709a3 365 __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 366 {
AnnaBridge 189:f392fc9709a3 367 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
AnnaBridge 189:f392fc9709a3 368 }
AnnaBridge 189:f392fc9709a3 369
AnnaBridge 189:f392fc9709a3 370 /**
AnnaBridge 189:f392fc9709a3 371 * @brief Indicates whether the LPTIM instance is enabled.
AnnaBridge 189:f392fc9709a3 372 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
AnnaBridge 189:f392fc9709a3 373 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 374 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 375 */
AnnaBridge 189:f392fc9709a3 376 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 377 {
AnnaBridge 189:f392fc9709a3 378 return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
AnnaBridge 189:f392fc9709a3 379 }
AnnaBridge 189:f392fc9709a3 380
AnnaBridge 189:f392fc9709a3 381 /**
AnnaBridge 189:f392fc9709a3 382 * @brief Starts the LPTIM counter in the desired mode.
AnnaBridge 189:f392fc9709a3 383 * @note LPTIM instance must be enabled before starting the counter.
AnnaBridge 189:f392fc9709a3 384 * @note It is possible to change on the fly from One Shot mode to
AnnaBridge 189:f392fc9709a3 385 * Continuous mode.
AnnaBridge 189:f392fc9709a3 386 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
AnnaBridge 189:f392fc9709a3 387 * CR SNGSTRT LL_LPTIM_StartCounter
AnnaBridge 189:f392fc9709a3 388 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 389 * @param OperatingMode This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 390 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
AnnaBridge 189:f392fc9709a3 391 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
AnnaBridge 189:f392fc9709a3 392 * @retval None
AnnaBridge 189:f392fc9709a3 393 */
AnnaBridge 189:f392fc9709a3 394 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
AnnaBridge 189:f392fc9709a3 395 {
AnnaBridge 189:f392fc9709a3 396 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
AnnaBridge 189:f392fc9709a3 397 }
AnnaBridge 189:f392fc9709a3 398
AnnaBridge 189:f392fc9709a3 399
AnnaBridge 189:f392fc9709a3 400 /**
AnnaBridge 189:f392fc9709a3 401 * @brief Set the LPTIM registers update mode (enable/disable register preload)
AnnaBridge 189:f392fc9709a3 402 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 403 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
AnnaBridge 189:f392fc9709a3 404 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 405 * @param UpdateMode This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 406 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
AnnaBridge 189:f392fc9709a3 407 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
AnnaBridge 189:f392fc9709a3 408 * @retval None
AnnaBridge 189:f392fc9709a3 409 */
AnnaBridge 189:f392fc9709a3 410 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
AnnaBridge 189:f392fc9709a3 411 {
AnnaBridge 189:f392fc9709a3 412 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
AnnaBridge 189:f392fc9709a3 413 }
AnnaBridge 189:f392fc9709a3 414
AnnaBridge 189:f392fc9709a3 415 /**
AnnaBridge 189:f392fc9709a3 416 * @brief Get the LPTIM registers update mode
AnnaBridge 189:f392fc9709a3 417 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
AnnaBridge 189:f392fc9709a3 418 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 419 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 420 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
AnnaBridge 189:f392fc9709a3 421 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
AnnaBridge 189:f392fc9709a3 422 */
AnnaBridge 189:f392fc9709a3 423 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 424 {
AnnaBridge 189:f392fc9709a3 425 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
AnnaBridge 189:f392fc9709a3 426 }
AnnaBridge 189:f392fc9709a3 427
AnnaBridge 189:f392fc9709a3 428 /**
AnnaBridge 189:f392fc9709a3 429 * @brief Set the auto reload value
AnnaBridge 189:f392fc9709a3 430 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
AnnaBridge 189:f392fc9709a3 431 * @note After a write to the LPTIMx_ARR register a new write operation to the
AnnaBridge 189:f392fc9709a3 432 * same register can only be performed when the previous write operation
AnnaBridge 189:f392fc9709a3 433 * is completed. Any successive write before the ARROK flag be set, will
AnnaBridge 189:f392fc9709a3 434 * lead to unpredictable results.
AnnaBridge 189:f392fc9709a3 435 * @note autoreload value be strictly greater than the compare value.
AnnaBridge 189:f392fc9709a3 436 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
AnnaBridge 189:f392fc9709a3 437 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 438 * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 189:f392fc9709a3 439 * @retval None
AnnaBridge 189:f392fc9709a3 440 */
AnnaBridge 189:f392fc9709a3 441 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
AnnaBridge 189:f392fc9709a3 442 {
AnnaBridge 189:f392fc9709a3 443 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
AnnaBridge 189:f392fc9709a3 444 }
AnnaBridge 189:f392fc9709a3 445
AnnaBridge 189:f392fc9709a3 446 /**
AnnaBridge 189:f392fc9709a3 447 * @brief Get actual auto reload value
AnnaBridge 189:f392fc9709a3 448 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
AnnaBridge 189:f392fc9709a3 449 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 450 * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 189:f392fc9709a3 451 */
AnnaBridge 189:f392fc9709a3 452 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 453 {
AnnaBridge 189:f392fc9709a3 454 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
AnnaBridge 189:f392fc9709a3 455 }
AnnaBridge 189:f392fc9709a3 456
AnnaBridge 189:f392fc9709a3 457 /**
AnnaBridge 189:f392fc9709a3 458 * @brief Set the compare value
AnnaBridge 189:f392fc9709a3 459 * @note After a write to the LPTIMx_CMP register a new write operation to the
AnnaBridge 189:f392fc9709a3 460 * same register can only be performed when the previous write operation
AnnaBridge 189:f392fc9709a3 461 * is completed. Any successive write before the CMPOK flag be set, will
AnnaBridge 189:f392fc9709a3 462 * lead to unpredictable results.
AnnaBridge 189:f392fc9709a3 463 * @rmtoll CMP CMP LL_LPTIM_SetCompare
AnnaBridge 189:f392fc9709a3 464 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 465 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 189:f392fc9709a3 466 * @retval None
AnnaBridge 189:f392fc9709a3 467 */
AnnaBridge 189:f392fc9709a3 468 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
AnnaBridge 189:f392fc9709a3 469 {
AnnaBridge 189:f392fc9709a3 470 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
AnnaBridge 189:f392fc9709a3 471 }
AnnaBridge 189:f392fc9709a3 472
AnnaBridge 189:f392fc9709a3 473 /**
AnnaBridge 189:f392fc9709a3 474 * @brief Get actual compare value
AnnaBridge 189:f392fc9709a3 475 * @rmtoll CMP CMP LL_LPTIM_GetCompare
AnnaBridge 189:f392fc9709a3 476 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 477 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 189:f392fc9709a3 478 */
AnnaBridge 189:f392fc9709a3 479 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 480 {
AnnaBridge 189:f392fc9709a3 481 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
AnnaBridge 189:f392fc9709a3 482 }
AnnaBridge 189:f392fc9709a3 483
AnnaBridge 189:f392fc9709a3 484 /**
AnnaBridge 189:f392fc9709a3 485 * @brief Get actual counter value
AnnaBridge 189:f392fc9709a3 486 * @note When the LPTIM instance is running with an asynchronous clock, reading
AnnaBridge 189:f392fc9709a3 487 * the LPTIMx_CNT register may return unreliable values. So in this case
AnnaBridge 189:f392fc9709a3 488 * it is necessary to perform two consecutive read accesses and verify
AnnaBridge 189:f392fc9709a3 489 * that the two returned values are identical.
AnnaBridge 189:f392fc9709a3 490 * @rmtoll CNT CNT LL_LPTIM_GetCounter
AnnaBridge 189:f392fc9709a3 491 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 492 * @retval Counter value
AnnaBridge 189:f392fc9709a3 493 */
AnnaBridge 189:f392fc9709a3 494 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 495 {
AnnaBridge 189:f392fc9709a3 496 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
AnnaBridge 189:f392fc9709a3 497 }
AnnaBridge 189:f392fc9709a3 498
AnnaBridge 189:f392fc9709a3 499 /**
AnnaBridge 189:f392fc9709a3 500 * @brief Set the counter mode (selection of the LPTIM counter clock source).
AnnaBridge 189:f392fc9709a3 501 * @note The counter mode can be set only when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 502 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
AnnaBridge 189:f392fc9709a3 503 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 504 * @param CounterMode This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 505 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
AnnaBridge 189:f392fc9709a3 506 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
AnnaBridge 189:f392fc9709a3 507 * @retval None
AnnaBridge 189:f392fc9709a3 508 */
AnnaBridge 189:f392fc9709a3 509 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
AnnaBridge 189:f392fc9709a3 510 {
AnnaBridge 189:f392fc9709a3 511 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
AnnaBridge 189:f392fc9709a3 512 }
AnnaBridge 189:f392fc9709a3 513
AnnaBridge 189:f392fc9709a3 514 /**
AnnaBridge 189:f392fc9709a3 515 * @brief Get the counter mode
AnnaBridge 189:f392fc9709a3 516 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
AnnaBridge 189:f392fc9709a3 517 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 518 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 519 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
AnnaBridge 189:f392fc9709a3 520 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
AnnaBridge 189:f392fc9709a3 521 */
AnnaBridge 189:f392fc9709a3 522 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 523 {
AnnaBridge 189:f392fc9709a3 524 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
AnnaBridge 189:f392fc9709a3 525 }
AnnaBridge 189:f392fc9709a3 526
AnnaBridge 189:f392fc9709a3 527 /**
AnnaBridge 189:f392fc9709a3 528 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
AnnaBridge 189:f392fc9709a3 529 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 530 * @note Regarding the LPTIM output polarity the change takes effect
AnnaBridge 189:f392fc9709a3 531 * immediately, so the output default value will change immediately after
AnnaBridge 189:f392fc9709a3 532 * the polarity is re-configured, even before the timer is enabled.
AnnaBridge 189:f392fc9709a3 533 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
AnnaBridge 189:f392fc9709a3 534 * CFGR WAVPOL LL_LPTIM_ConfigOutput
AnnaBridge 189:f392fc9709a3 535 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 536 * @param Waveform This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 537 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge 189:f392fc9709a3 538 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge 189:f392fc9709a3 539 * @param Polarity This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 540 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge 189:f392fc9709a3 541 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge 189:f392fc9709a3 542 * @retval None
AnnaBridge 189:f392fc9709a3 543 */
AnnaBridge 189:f392fc9709a3 544 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
AnnaBridge 189:f392fc9709a3 545 {
AnnaBridge 189:f392fc9709a3 546 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
AnnaBridge 189:f392fc9709a3 547 }
AnnaBridge 189:f392fc9709a3 548
AnnaBridge 189:f392fc9709a3 549 /**
AnnaBridge 189:f392fc9709a3 550 * @brief Set waveform shape
AnnaBridge 189:f392fc9709a3 551 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
AnnaBridge 189:f392fc9709a3 552 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 553 * @param Waveform This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 554 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge 189:f392fc9709a3 555 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge 189:f392fc9709a3 556 * @retval None
AnnaBridge 189:f392fc9709a3 557 */
AnnaBridge 189:f392fc9709a3 558 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
AnnaBridge 189:f392fc9709a3 559 {
AnnaBridge 189:f392fc9709a3 560 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
AnnaBridge 189:f392fc9709a3 561 }
AnnaBridge 189:f392fc9709a3 562
AnnaBridge 189:f392fc9709a3 563 /**
AnnaBridge 189:f392fc9709a3 564 * @brief Get actual waveform shape
AnnaBridge 189:f392fc9709a3 565 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
AnnaBridge 189:f392fc9709a3 566 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 567 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 568 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge 189:f392fc9709a3 569 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge 189:f392fc9709a3 570 */
AnnaBridge 189:f392fc9709a3 571 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 572 {
AnnaBridge 189:f392fc9709a3 573 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
AnnaBridge 189:f392fc9709a3 574 }
AnnaBridge 189:f392fc9709a3 575
AnnaBridge 189:f392fc9709a3 576 /**
AnnaBridge 189:f392fc9709a3 577 * @brief Set output polarity
AnnaBridge 189:f392fc9709a3 578 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
AnnaBridge 189:f392fc9709a3 579 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 580 * @param Polarity This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 581 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge 189:f392fc9709a3 582 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge 189:f392fc9709a3 583 * @retval None
AnnaBridge 189:f392fc9709a3 584 */
AnnaBridge 189:f392fc9709a3 585 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
AnnaBridge 189:f392fc9709a3 586 {
AnnaBridge 189:f392fc9709a3 587 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
AnnaBridge 189:f392fc9709a3 588 }
AnnaBridge 189:f392fc9709a3 589
AnnaBridge 189:f392fc9709a3 590 /**
AnnaBridge 189:f392fc9709a3 591 * @brief Get actual output polarity
AnnaBridge 189:f392fc9709a3 592 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
AnnaBridge 189:f392fc9709a3 593 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 594 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 595 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge 189:f392fc9709a3 596 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge 189:f392fc9709a3 597 */
AnnaBridge 189:f392fc9709a3 598 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 599 {
AnnaBridge 189:f392fc9709a3 600 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
AnnaBridge 189:f392fc9709a3 601 }
AnnaBridge 189:f392fc9709a3 602
AnnaBridge 189:f392fc9709a3 603 /**
AnnaBridge 189:f392fc9709a3 604 * @brief Set actual prescaler division ratio.
AnnaBridge 189:f392fc9709a3 605 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 606 * @note When the LPTIM is configured to be clocked by an internal clock source
AnnaBridge 189:f392fc9709a3 607 * and the LPTIM counter is configured to be updated by active edges
AnnaBridge 189:f392fc9709a3 608 * detected on the LPTIM external Input1, the internal clock provided to
AnnaBridge 189:f392fc9709a3 609 * the LPTIM must be not be prescaled.
AnnaBridge 189:f392fc9709a3 610 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
AnnaBridge 189:f392fc9709a3 611 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 612 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 613 * @arg @ref LL_LPTIM_PRESCALER_DIV1
AnnaBridge 189:f392fc9709a3 614 * @arg @ref LL_LPTIM_PRESCALER_DIV2
AnnaBridge 189:f392fc9709a3 615 * @arg @ref LL_LPTIM_PRESCALER_DIV4
AnnaBridge 189:f392fc9709a3 616 * @arg @ref LL_LPTIM_PRESCALER_DIV8
AnnaBridge 189:f392fc9709a3 617 * @arg @ref LL_LPTIM_PRESCALER_DIV16
AnnaBridge 189:f392fc9709a3 618 * @arg @ref LL_LPTIM_PRESCALER_DIV32
AnnaBridge 189:f392fc9709a3 619 * @arg @ref LL_LPTIM_PRESCALER_DIV64
AnnaBridge 189:f392fc9709a3 620 * @arg @ref LL_LPTIM_PRESCALER_DIV128
AnnaBridge 189:f392fc9709a3 621 * @retval None
AnnaBridge 189:f392fc9709a3 622 */
AnnaBridge 189:f392fc9709a3 623 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
AnnaBridge 189:f392fc9709a3 624 {
AnnaBridge 189:f392fc9709a3 625 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
AnnaBridge 189:f392fc9709a3 626 }
AnnaBridge 189:f392fc9709a3 627
AnnaBridge 189:f392fc9709a3 628 /**
AnnaBridge 189:f392fc9709a3 629 * @brief Get actual prescaler division ratio.
AnnaBridge 189:f392fc9709a3 630 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
AnnaBridge 189:f392fc9709a3 631 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 632 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 633 * @arg @ref LL_LPTIM_PRESCALER_DIV1
AnnaBridge 189:f392fc9709a3 634 * @arg @ref LL_LPTIM_PRESCALER_DIV2
AnnaBridge 189:f392fc9709a3 635 * @arg @ref LL_LPTIM_PRESCALER_DIV4
AnnaBridge 189:f392fc9709a3 636 * @arg @ref LL_LPTIM_PRESCALER_DIV8
AnnaBridge 189:f392fc9709a3 637 * @arg @ref LL_LPTIM_PRESCALER_DIV16
AnnaBridge 189:f392fc9709a3 638 * @arg @ref LL_LPTIM_PRESCALER_DIV32
AnnaBridge 189:f392fc9709a3 639 * @arg @ref LL_LPTIM_PRESCALER_DIV64
AnnaBridge 189:f392fc9709a3 640 * @arg @ref LL_LPTIM_PRESCALER_DIV128
AnnaBridge 189:f392fc9709a3 641 */
AnnaBridge 189:f392fc9709a3 642 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 643 {
AnnaBridge 189:f392fc9709a3 644 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
AnnaBridge 189:f392fc9709a3 645 }
AnnaBridge 189:f392fc9709a3 646
AnnaBridge 189:f392fc9709a3 647 /**
AnnaBridge 189:f392fc9709a3 648 * @brief Set LPTIM input 1 source (default GPIO).
AnnaBridge 189:f392fc9709a3 649 * @rmtoll OR OR_0 LL_LPTIM_SetInput1Src
AnnaBridge 189:f392fc9709a3 650 * @rmtoll OR OR_1 LL_LPTIM_SetInput1Src
AnnaBridge 189:f392fc9709a3 651 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 652 * @param Src This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 653 * @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
AnnaBridge 189:f392fc9709a3 654 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
AnnaBridge 189:f392fc9709a3 655 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
AnnaBridge 189:f392fc9709a3 656 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
AnnaBridge 189:f392fc9709a3 657 * @retval None
AnnaBridge 189:f392fc9709a3 658 */
AnnaBridge 189:f392fc9709a3 659 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
AnnaBridge 189:f392fc9709a3 660 {
AnnaBridge 189:f392fc9709a3 661 WRITE_REG(LPTIMx->OR, Src);
AnnaBridge 189:f392fc9709a3 662 }
AnnaBridge 189:f392fc9709a3 663
AnnaBridge 189:f392fc9709a3 664 /**
AnnaBridge 189:f392fc9709a3 665 * @brief Set LPTIM input 2 source (default GPIO).
AnnaBridge 189:f392fc9709a3 666 * @rmtoll OR OR_0 LL_LPTIM_SetInput2Src
AnnaBridge 189:f392fc9709a3 667 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 668 * @param Src This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 669 * @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
AnnaBridge 189:f392fc9709a3 670 * @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
AnnaBridge 189:f392fc9709a3 671 * @retval None
AnnaBridge 189:f392fc9709a3 672 */
AnnaBridge 189:f392fc9709a3 673 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
AnnaBridge 189:f392fc9709a3 674 {
AnnaBridge 189:f392fc9709a3 675 WRITE_REG(LPTIMx->OR, Src);
AnnaBridge 189:f392fc9709a3 676 }
AnnaBridge 189:f392fc9709a3 677
AnnaBridge 189:f392fc9709a3 678 /**
AnnaBridge 189:f392fc9709a3 679 * @}
AnnaBridge 189:f392fc9709a3 680 */
AnnaBridge 189:f392fc9709a3 681
AnnaBridge 189:f392fc9709a3 682 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
AnnaBridge 189:f392fc9709a3 683 * @{
AnnaBridge 189:f392fc9709a3 684 */
AnnaBridge 189:f392fc9709a3 685
AnnaBridge 189:f392fc9709a3 686 /**
AnnaBridge 189:f392fc9709a3 687 * @brief Enable the timeout function
AnnaBridge 189:f392fc9709a3 688 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 689 * @note The first trigger event will start the timer, any successive trigger
AnnaBridge 189:f392fc9709a3 690 * event will reset the counter and the timer will restart.
AnnaBridge 189:f392fc9709a3 691 * @note The timeout value corresponds to the compare value; if no trigger
AnnaBridge 189:f392fc9709a3 692 * occurs within the expected time frame, the MCU is waked-up by the
AnnaBridge 189:f392fc9709a3 693 * compare match event.
AnnaBridge 189:f392fc9709a3 694 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
AnnaBridge 189:f392fc9709a3 695 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 696 * @retval None
AnnaBridge 189:f392fc9709a3 697 */
AnnaBridge 189:f392fc9709a3 698 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 699 {
AnnaBridge 189:f392fc9709a3 700 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
AnnaBridge 189:f392fc9709a3 701 }
AnnaBridge 189:f392fc9709a3 702
AnnaBridge 189:f392fc9709a3 703 /**
AnnaBridge 189:f392fc9709a3 704 * @brief Disable the timeout function
AnnaBridge 189:f392fc9709a3 705 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 706 * @note A trigger event arriving when the timer is already started will be
AnnaBridge 189:f392fc9709a3 707 * ignored.
AnnaBridge 189:f392fc9709a3 708 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
AnnaBridge 189:f392fc9709a3 709 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 710 * @retval None
AnnaBridge 189:f392fc9709a3 711 */
AnnaBridge 189:f392fc9709a3 712 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 713 {
AnnaBridge 189:f392fc9709a3 714 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
AnnaBridge 189:f392fc9709a3 715 }
AnnaBridge 189:f392fc9709a3 716
AnnaBridge 189:f392fc9709a3 717 /**
AnnaBridge 189:f392fc9709a3 718 * @brief Indicate whether the timeout function is enabled.
AnnaBridge 189:f392fc9709a3 719 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
AnnaBridge 189:f392fc9709a3 720 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 721 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 722 */
AnnaBridge 189:f392fc9709a3 723 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 724 {
AnnaBridge 189:f392fc9709a3 725 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
AnnaBridge 189:f392fc9709a3 726 }
AnnaBridge 189:f392fc9709a3 727
AnnaBridge 189:f392fc9709a3 728 /**
AnnaBridge 189:f392fc9709a3 729 * @brief Start the LPTIM counter
AnnaBridge 189:f392fc9709a3 730 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 731 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
AnnaBridge 189:f392fc9709a3 732 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 733 * @retval None
AnnaBridge 189:f392fc9709a3 734 */
AnnaBridge 189:f392fc9709a3 735 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 736 {
AnnaBridge 189:f392fc9709a3 737 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
AnnaBridge 189:f392fc9709a3 738 }
AnnaBridge 189:f392fc9709a3 739
AnnaBridge 189:f392fc9709a3 740 /**
AnnaBridge 189:f392fc9709a3 741 * @brief Configure the external trigger used as a trigger event for the LPTIM.
AnnaBridge 189:f392fc9709a3 742 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 743 * @note An internal clock source must be present when a digital filter is
AnnaBridge 189:f392fc9709a3 744 * required for the trigger.
AnnaBridge 189:f392fc9709a3 745 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
AnnaBridge 189:f392fc9709a3 746 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
AnnaBridge 189:f392fc9709a3 747 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
AnnaBridge 189:f392fc9709a3 748 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 749 * @param Source This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 750 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
AnnaBridge 189:f392fc9709a3 751 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
AnnaBridge 189:f392fc9709a3 752 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
AnnaBridge 189:f392fc9709a3 753 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
AnnaBridge 189:f392fc9709a3 754 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
AnnaBridge 189:f392fc9709a3 755 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
AnnaBridge 189:f392fc9709a3 756 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
AnnaBridge 189:f392fc9709a3 757 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
AnnaBridge 189:f392fc9709a3 758 * @param Filter This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 759 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
AnnaBridge 189:f392fc9709a3 760 * @arg @ref LL_LPTIM_TRIG_FILTER_2
AnnaBridge 189:f392fc9709a3 761 * @arg @ref LL_LPTIM_TRIG_FILTER_4
AnnaBridge 189:f392fc9709a3 762 * @arg @ref LL_LPTIM_TRIG_FILTER_8
AnnaBridge 189:f392fc9709a3 763 * @param Polarity This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 764 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
AnnaBridge 189:f392fc9709a3 765 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
AnnaBridge 189:f392fc9709a3 766 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
AnnaBridge 189:f392fc9709a3 767 * @retval None
AnnaBridge 189:f392fc9709a3 768 */
AnnaBridge 189:f392fc9709a3 769 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
AnnaBridge 189:f392fc9709a3 770 {
AnnaBridge 189:f392fc9709a3 771 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
AnnaBridge 189:f392fc9709a3 772 }
AnnaBridge 189:f392fc9709a3 773
AnnaBridge 189:f392fc9709a3 774 /**
AnnaBridge 189:f392fc9709a3 775 * @brief Get actual external trigger source.
AnnaBridge 189:f392fc9709a3 776 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
AnnaBridge 189:f392fc9709a3 777 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 778 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 779 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
AnnaBridge 189:f392fc9709a3 780 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
AnnaBridge 189:f392fc9709a3 781 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
AnnaBridge 189:f392fc9709a3 782 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
AnnaBridge 189:f392fc9709a3 783 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
AnnaBridge 189:f392fc9709a3 784 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
AnnaBridge 189:f392fc9709a3 785 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
AnnaBridge 189:f392fc9709a3 786 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
AnnaBridge 189:f392fc9709a3 787 */
AnnaBridge 189:f392fc9709a3 788 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 789 {
AnnaBridge 189:f392fc9709a3 790 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
AnnaBridge 189:f392fc9709a3 791 }
AnnaBridge 189:f392fc9709a3 792
AnnaBridge 189:f392fc9709a3 793 /**
AnnaBridge 189:f392fc9709a3 794 * @brief Get actual external trigger filter.
AnnaBridge 189:f392fc9709a3 795 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
AnnaBridge 189:f392fc9709a3 796 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 797 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 798 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
AnnaBridge 189:f392fc9709a3 799 * @arg @ref LL_LPTIM_TRIG_FILTER_2
AnnaBridge 189:f392fc9709a3 800 * @arg @ref LL_LPTIM_TRIG_FILTER_4
AnnaBridge 189:f392fc9709a3 801 * @arg @ref LL_LPTIM_TRIG_FILTER_8
AnnaBridge 189:f392fc9709a3 802 */
AnnaBridge 189:f392fc9709a3 803 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 804 {
AnnaBridge 189:f392fc9709a3 805 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
AnnaBridge 189:f392fc9709a3 806 }
AnnaBridge 189:f392fc9709a3 807
AnnaBridge 189:f392fc9709a3 808 /**
AnnaBridge 189:f392fc9709a3 809 * @brief Get actual external trigger polarity.
AnnaBridge 189:f392fc9709a3 810 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
AnnaBridge 189:f392fc9709a3 811 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 812 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 813 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
AnnaBridge 189:f392fc9709a3 814 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
AnnaBridge 189:f392fc9709a3 815 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
AnnaBridge 189:f392fc9709a3 816 */
AnnaBridge 189:f392fc9709a3 817 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 818 {
AnnaBridge 189:f392fc9709a3 819 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
AnnaBridge 189:f392fc9709a3 820 }
AnnaBridge 189:f392fc9709a3 821
AnnaBridge 189:f392fc9709a3 822 /**
AnnaBridge 189:f392fc9709a3 823 * @}
AnnaBridge 189:f392fc9709a3 824 */
AnnaBridge 189:f392fc9709a3 825
AnnaBridge 189:f392fc9709a3 826 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
AnnaBridge 189:f392fc9709a3 827 * @{
AnnaBridge 189:f392fc9709a3 828 */
AnnaBridge 189:f392fc9709a3 829
AnnaBridge 189:f392fc9709a3 830 /**
AnnaBridge 189:f392fc9709a3 831 * @brief Set the source of the clock used by the LPTIM instance.
AnnaBridge 189:f392fc9709a3 832 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 833 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
AnnaBridge 189:f392fc9709a3 834 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 835 * @param ClockSource This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 836 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
AnnaBridge 189:f392fc9709a3 837 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
AnnaBridge 189:f392fc9709a3 838 * @retval None
AnnaBridge 189:f392fc9709a3 839 */
AnnaBridge 189:f392fc9709a3 840 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
AnnaBridge 189:f392fc9709a3 841 {
AnnaBridge 189:f392fc9709a3 842 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
AnnaBridge 189:f392fc9709a3 843 }
AnnaBridge 189:f392fc9709a3 844
AnnaBridge 189:f392fc9709a3 845 /**
AnnaBridge 189:f392fc9709a3 846 * @brief Get actual LPTIM instance clock source.
AnnaBridge 189:f392fc9709a3 847 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
AnnaBridge 189:f392fc9709a3 848 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 849 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 850 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
AnnaBridge 189:f392fc9709a3 851 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
AnnaBridge 189:f392fc9709a3 852 */
AnnaBridge 189:f392fc9709a3 853 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 854 {
AnnaBridge 189:f392fc9709a3 855 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
AnnaBridge 189:f392fc9709a3 856 }
AnnaBridge 189:f392fc9709a3 857
AnnaBridge 189:f392fc9709a3 858 /**
AnnaBridge 189:f392fc9709a3 859 * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
AnnaBridge 189:f392fc9709a3 860 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 861 * @note When both external clock signal edges are considered active ones,
AnnaBridge 189:f392fc9709a3 862 * the LPTIM must also be clocked by an internal clock source with a
AnnaBridge 189:f392fc9709a3 863 * frequency equal to at least four times the external clock frequency.
AnnaBridge 189:f392fc9709a3 864 * @note An internal clock source must be present when a digital filter is
AnnaBridge 189:f392fc9709a3 865 * required for external clock.
AnnaBridge 189:f392fc9709a3 866 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
AnnaBridge 189:f392fc9709a3 867 * CFGR CKPOL LL_LPTIM_ConfigClock
AnnaBridge 189:f392fc9709a3 868 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 869 * @param ClockFilter This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 870 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
AnnaBridge 189:f392fc9709a3 871 * @arg @ref LL_LPTIM_CLK_FILTER_2
AnnaBridge 189:f392fc9709a3 872 * @arg @ref LL_LPTIM_CLK_FILTER_4
AnnaBridge 189:f392fc9709a3 873 * @arg @ref LL_LPTIM_CLK_FILTER_8
AnnaBridge 189:f392fc9709a3 874 * @param ClockPolarity This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 875 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
AnnaBridge 189:f392fc9709a3 876 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
AnnaBridge 189:f392fc9709a3 877 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
AnnaBridge 189:f392fc9709a3 878 * @retval None
AnnaBridge 189:f392fc9709a3 879 */
AnnaBridge 189:f392fc9709a3 880 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
AnnaBridge 189:f392fc9709a3 881 {
AnnaBridge 189:f392fc9709a3 882 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
AnnaBridge 189:f392fc9709a3 883 }
AnnaBridge 189:f392fc9709a3 884
AnnaBridge 189:f392fc9709a3 885 /**
AnnaBridge 189:f392fc9709a3 886 * @brief Get actual clock polarity
AnnaBridge 189:f392fc9709a3 887 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
AnnaBridge 189:f392fc9709a3 888 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 889 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 890 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
AnnaBridge 189:f392fc9709a3 891 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
AnnaBridge 189:f392fc9709a3 892 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
AnnaBridge 189:f392fc9709a3 893 */
AnnaBridge 189:f392fc9709a3 894 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 895 {
AnnaBridge 189:f392fc9709a3 896 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
AnnaBridge 189:f392fc9709a3 897 }
AnnaBridge 189:f392fc9709a3 898
AnnaBridge 189:f392fc9709a3 899 /**
AnnaBridge 189:f392fc9709a3 900 * @brief Get actual clock digital filter
AnnaBridge 189:f392fc9709a3 901 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
AnnaBridge 189:f392fc9709a3 902 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 903 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 904 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
AnnaBridge 189:f392fc9709a3 905 * @arg @ref LL_LPTIM_CLK_FILTER_2
AnnaBridge 189:f392fc9709a3 906 * @arg @ref LL_LPTIM_CLK_FILTER_4
AnnaBridge 189:f392fc9709a3 907 * @arg @ref LL_LPTIM_CLK_FILTER_8
AnnaBridge 189:f392fc9709a3 908 */
AnnaBridge 189:f392fc9709a3 909 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 910 {
AnnaBridge 189:f392fc9709a3 911 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
AnnaBridge 189:f392fc9709a3 912 }
AnnaBridge 189:f392fc9709a3 913
AnnaBridge 189:f392fc9709a3 914 /**
AnnaBridge 189:f392fc9709a3 915 * @}
AnnaBridge 189:f392fc9709a3 916 */
AnnaBridge 189:f392fc9709a3 917
AnnaBridge 189:f392fc9709a3 918 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
AnnaBridge 189:f392fc9709a3 919 * @{
AnnaBridge 189:f392fc9709a3 920 */
AnnaBridge 189:f392fc9709a3 921
AnnaBridge 189:f392fc9709a3 922 /**
AnnaBridge 189:f392fc9709a3 923 * @brief Configure the encoder mode.
AnnaBridge 189:f392fc9709a3 924 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 925 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
AnnaBridge 189:f392fc9709a3 926 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 927 * @param EncoderMode This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 928 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
AnnaBridge 189:f392fc9709a3 929 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
AnnaBridge 189:f392fc9709a3 930 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
AnnaBridge 189:f392fc9709a3 931 * @retval None
AnnaBridge 189:f392fc9709a3 932 */
AnnaBridge 189:f392fc9709a3 933 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
AnnaBridge 189:f392fc9709a3 934 {
AnnaBridge 189:f392fc9709a3 935 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
AnnaBridge 189:f392fc9709a3 936 }
AnnaBridge 189:f392fc9709a3 937
AnnaBridge 189:f392fc9709a3 938 /**
AnnaBridge 189:f392fc9709a3 939 * @brief Get actual encoder mode.
AnnaBridge 189:f392fc9709a3 940 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
AnnaBridge 189:f392fc9709a3 941 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 942 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 943 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
AnnaBridge 189:f392fc9709a3 944 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
AnnaBridge 189:f392fc9709a3 945 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
AnnaBridge 189:f392fc9709a3 946 */
AnnaBridge 189:f392fc9709a3 947 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 948 {
AnnaBridge 189:f392fc9709a3 949 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
AnnaBridge 189:f392fc9709a3 950 }
AnnaBridge 189:f392fc9709a3 951
AnnaBridge 189:f392fc9709a3 952 /**
AnnaBridge 189:f392fc9709a3 953 * @brief Enable the encoder mode
AnnaBridge 189:f392fc9709a3 954 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 955 * @note In this mode the LPTIM instance must be clocked by an internal clock
AnnaBridge 189:f392fc9709a3 956 * source. Also, the prescaler division ratio must be equal to 1.
AnnaBridge 189:f392fc9709a3 957 * @note LPTIM instance must be configured in continuous mode prior enabling
AnnaBridge 189:f392fc9709a3 958 * the encoder mode.
AnnaBridge 189:f392fc9709a3 959 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
AnnaBridge 189:f392fc9709a3 960 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 961 * @retval None
AnnaBridge 189:f392fc9709a3 962 */
AnnaBridge 189:f392fc9709a3 963 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 964 {
AnnaBridge 189:f392fc9709a3 965 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
AnnaBridge 189:f392fc9709a3 966 }
AnnaBridge 189:f392fc9709a3 967
AnnaBridge 189:f392fc9709a3 968 /**
AnnaBridge 189:f392fc9709a3 969 * @brief Disable the encoder mode
AnnaBridge 189:f392fc9709a3 970 * @note This function must be called when the LPTIM instance is disabled.
AnnaBridge 189:f392fc9709a3 971 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
AnnaBridge 189:f392fc9709a3 972 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 973 * @retval None
AnnaBridge 189:f392fc9709a3 974 */
AnnaBridge 189:f392fc9709a3 975 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 976 {
AnnaBridge 189:f392fc9709a3 977 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
AnnaBridge 189:f392fc9709a3 978 }
AnnaBridge 189:f392fc9709a3 979
AnnaBridge 189:f392fc9709a3 980 /**
AnnaBridge 189:f392fc9709a3 981 * @brief Indicates whether the LPTIM operates in encoder mode.
AnnaBridge 189:f392fc9709a3 982 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
AnnaBridge 189:f392fc9709a3 983 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 984 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 985 */
AnnaBridge 189:f392fc9709a3 986 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 987 {
AnnaBridge 189:f392fc9709a3 988 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
AnnaBridge 189:f392fc9709a3 989 }
AnnaBridge 189:f392fc9709a3 990
AnnaBridge 189:f392fc9709a3 991 /**
AnnaBridge 189:f392fc9709a3 992 * @}
AnnaBridge 189:f392fc9709a3 993 */
AnnaBridge 189:f392fc9709a3 994
AnnaBridge 189:f392fc9709a3 995 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
AnnaBridge 189:f392fc9709a3 996 * @{
AnnaBridge 189:f392fc9709a3 997 */
AnnaBridge 189:f392fc9709a3 998
AnnaBridge 189:f392fc9709a3 999 /**
AnnaBridge 189:f392fc9709a3 1000 * @brief Clear the compare match flag (CMPMCF)
AnnaBridge 189:f392fc9709a3 1001 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
AnnaBridge 189:f392fc9709a3 1002 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1003 * @retval None
AnnaBridge 189:f392fc9709a3 1004 */
AnnaBridge 189:f392fc9709a3 1005 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1006 {
AnnaBridge 189:f392fc9709a3 1007 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
AnnaBridge 189:f392fc9709a3 1008 }
AnnaBridge 189:f392fc9709a3 1009
AnnaBridge 189:f392fc9709a3 1010 /**
AnnaBridge 189:f392fc9709a3 1011 * @brief Inform application whether a compare match interrupt has occurred.
AnnaBridge 189:f392fc9709a3 1012 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
AnnaBridge 189:f392fc9709a3 1013 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1014 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1015 */
AnnaBridge 189:f392fc9709a3 1016 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1017 {
AnnaBridge 189:f392fc9709a3 1018 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
AnnaBridge 189:f392fc9709a3 1019 }
AnnaBridge 189:f392fc9709a3 1020
AnnaBridge 189:f392fc9709a3 1021 /**
AnnaBridge 189:f392fc9709a3 1022 * @brief Clear the autoreload match flag (ARRMCF)
AnnaBridge 189:f392fc9709a3 1023 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
AnnaBridge 189:f392fc9709a3 1024 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1025 * @retval None
AnnaBridge 189:f392fc9709a3 1026 */
AnnaBridge 189:f392fc9709a3 1027 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1028 {
AnnaBridge 189:f392fc9709a3 1029 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
AnnaBridge 189:f392fc9709a3 1030 }
AnnaBridge 189:f392fc9709a3 1031
AnnaBridge 189:f392fc9709a3 1032 /**
AnnaBridge 189:f392fc9709a3 1033 * @brief Inform application whether a autoreload match interrupt has occured.
AnnaBridge 189:f392fc9709a3 1034 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
AnnaBridge 189:f392fc9709a3 1035 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1036 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1037 */
AnnaBridge 189:f392fc9709a3 1038 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1039 {
AnnaBridge 189:f392fc9709a3 1040 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
AnnaBridge 189:f392fc9709a3 1041 }
AnnaBridge 189:f392fc9709a3 1042
AnnaBridge 189:f392fc9709a3 1043 /**
AnnaBridge 189:f392fc9709a3 1044 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
AnnaBridge 189:f392fc9709a3 1045 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
AnnaBridge 189:f392fc9709a3 1046 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1047 * @retval None
AnnaBridge 189:f392fc9709a3 1048 */
AnnaBridge 189:f392fc9709a3 1049 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1050 {
AnnaBridge 189:f392fc9709a3 1051 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
AnnaBridge 189:f392fc9709a3 1052 }
AnnaBridge 189:f392fc9709a3 1053
AnnaBridge 189:f392fc9709a3 1054 /**
AnnaBridge 189:f392fc9709a3 1055 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
AnnaBridge 189:f392fc9709a3 1056 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
AnnaBridge 189:f392fc9709a3 1057 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1058 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1059 */
AnnaBridge 189:f392fc9709a3 1060 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1061 {
AnnaBridge 189:f392fc9709a3 1062 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
AnnaBridge 189:f392fc9709a3 1063 }
AnnaBridge 189:f392fc9709a3 1064
AnnaBridge 189:f392fc9709a3 1065 /**
AnnaBridge 189:f392fc9709a3 1066 * @brief Clear the compare register update interrupt flag (CMPOKCF).
AnnaBridge 189:f392fc9709a3 1067 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
AnnaBridge 189:f392fc9709a3 1068 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1069 * @retval None
AnnaBridge 189:f392fc9709a3 1070 */
AnnaBridge 189:f392fc9709a3 1071 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1072 {
AnnaBridge 189:f392fc9709a3 1073 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
AnnaBridge 189:f392fc9709a3 1074 }
AnnaBridge 189:f392fc9709a3 1075
AnnaBridge 189:f392fc9709a3 1076 /**
AnnaBridge 189:f392fc9709a3 1077 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
AnnaBridge 189:f392fc9709a3 1078 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
AnnaBridge 189:f392fc9709a3 1079 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1080 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1081 */
AnnaBridge 189:f392fc9709a3 1082 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1083 {
AnnaBridge 189:f392fc9709a3 1084 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
AnnaBridge 189:f392fc9709a3 1085 }
AnnaBridge 189:f392fc9709a3 1086
AnnaBridge 189:f392fc9709a3 1087 /**
AnnaBridge 189:f392fc9709a3 1088 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
AnnaBridge 189:f392fc9709a3 1089 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
AnnaBridge 189:f392fc9709a3 1090 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1091 * @retval None
AnnaBridge 189:f392fc9709a3 1092 */
AnnaBridge 189:f392fc9709a3 1093 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1094 {
AnnaBridge 189:f392fc9709a3 1095 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
AnnaBridge 189:f392fc9709a3 1096 }
AnnaBridge 189:f392fc9709a3 1097
AnnaBridge 189:f392fc9709a3 1098 /**
AnnaBridge 189:f392fc9709a3 1099 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
AnnaBridge 189:f392fc9709a3 1100 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
AnnaBridge 189:f392fc9709a3 1101 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1102 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1103 */
AnnaBridge 189:f392fc9709a3 1104 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1105 {
AnnaBridge 189:f392fc9709a3 1106 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
AnnaBridge 189:f392fc9709a3 1107 }
AnnaBridge 189:f392fc9709a3 1108
AnnaBridge 189:f392fc9709a3 1109 /**
AnnaBridge 189:f392fc9709a3 1110 * @brief Clear the counter direction change to up interrupt flag (UPCF).
AnnaBridge 189:f392fc9709a3 1111 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
AnnaBridge 189:f392fc9709a3 1112 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1113 * @retval None
AnnaBridge 189:f392fc9709a3 1114 */
AnnaBridge 189:f392fc9709a3 1115 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1116 {
AnnaBridge 189:f392fc9709a3 1117 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
AnnaBridge 189:f392fc9709a3 1118 }
AnnaBridge 189:f392fc9709a3 1119
AnnaBridge 189:f392fc9709a3 1120 /**
AnnaBridge 189:f392fc9709a3 1121 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
AnnaBridge 189:f392fc9709a3 1122 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
AnnaBridge 189:f392fc9709a3 1123 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1124 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1125 */
AnnaBridge 189:f392fc9709a3 1126 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1127 {
AnnaBridge 189:f392fc9709a3 1128 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
AnnaBridge 189:f392fc9709a3 1129 }
AnnaBridge 189:f392fc9709a3 1130
AnnaBridge 189:f392fc9709a3 1131 /**
AnnaBridge 189:f392fc9709a3 1132 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
AnnaBridge 189:f392fc9709a3 1133 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
AnnaBridge 189:f392fc9709a3 1134 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1135 * @retval None
AnnaBridge 189:f392fc9709a3 1136 */
AnnaBridge 189:f392fc9709a3 1137 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1138 {
AnnaBridge 189:f392fc9709a3 1139 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
AnnaBridge 189:f392fc9709a3 1140 }
AnnaBridge 189:f392fc9709a3 1141
AnnaBridge 189:f392fc9709a3 1142 /**
AnnaBridge 189:f392fc9709a3 1143 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
AnnaBridge 189:f392fc9709a3 1144 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
AnnaBridge 189:f392fc9709a3 1145 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1146 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1147 */
AnnaBridge 189:f392fc9709a3 1148 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1149 {
AnnaBridge 189:f392fc9709a3 1150 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
AnnaBridge 189:f392fc9709a3 1151 }
AnnaBridge 189:f392fc9709a3 1152
AnnaBridge 189:f392fc9709a3 1153 /**
AnnaBridge 189:f392fc9709a3 1154 * @}
AnnaBridge 189:f392fc9709a3 1155 */
AnnaBridge 189:f392fc9709a3 1156
AnnaBridge 189:f392fc9709a3 1157 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
AnnaBridge 189:f392fc9709a3 1158 * @{
AnnaBridge 189:f392fc9709a3 1159 */
AnnaBridge 189:f392fc9709a3 1160
AnnaBridge 189:f392fc9709a3 1161 /**
AnnaBridge 189:f392fc9709a3 1162 * @brief Enable compare match interrupt (CMPMIE).
AnnaBridge 189:f392fc9709a3 1163 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
AnnaBridge 189:f392fc9709a3 1164 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1165 * @retval None
AnnaBridge 189:f392fc9709a3 1166 */
AnnaBridge 189:f392fc9709a3 1167 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1168 {
AnnaBridge 189:f392fc9709a3 1169 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
AnnaBridge 189:f392fc9709a3 1170 }
AnnaBridge 189:f392fc9709a3 1171
AnnaBridge 189:f392fc9709a3 1172 /**
AnnaBridge 189:f392fc9709a3 1173 * @brief Disable compare match interrupt (CMPMIE).
AnnaBridge 189:f392fc9709a3 1174 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
AnnaBridge 189:f392fc9709a3 1175 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1176 * @retval None
AnnaBridge 189:f392fc9709a3 1177 */
AnnaBridge 189:f392fc9709a3 1178 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1179 {
AnnaBridge 189:f392fc9709a3 1180 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
AnnaBridge 189:f392fc9709a3 1181 }
AnnaBridge 189:f392fc9709a3 1182
AnnaBridge 189:f392fc9709a3 1183 /**
AnnaBridge 189:f392fc9709a3 1184 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
AnnaBridge 189:f392fc9709a3 1185 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
AnnaBridge 189:f392fc9709a3 1186 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1187 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1188 */
AnnaBridge 189:f392fc9709a3 1189 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1190 {
AnnaBridge 189:f392fc9709a3 1191 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
AnnaBridge 189:f392fc9709a3 1192 }
AnnaBridge 189:f392fc9709a3 1193
AnnaBridge 189:f392fc9709a3 1194 /**
AnnaBridge 189:f392fc9709a3 1195 * @brief Enable autoreload match interrupt (ARRMIE).
AnnaBridge 189:f392fc9709a3 1196 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
AnnaBridge 189:f392fc9709a3 1197 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1198 * @retval None
AnnaBridge 189:f392fc9709a3 1199 */
AnnaBridge 189:f392fc9709a3 1200 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1201 {
AnnaBridge 189:f392fc9709a3 1202 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
AnnaBridge 189:f392fc9709a3 1203 }
AnnaBridge 189:f392fc9709a3 1204
AnnaBridge 189:f392fc9709a3 1205 /**
AnnaBridge 189:f392fc9709a3 1206 * @brief Disable autoreload match interrupt (ARRMIE).
AnnaBridge 189:f392fc9709a3 1207 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
AnnaBridge 189:f392fc9709a3 1208 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1209 * @retval None
AnnaBridge 189:f392fc9709a3 1210 */
AnnaBridge 189:f392fc9709a3 1211 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1212 {
AnnaBridge 189:f392fc9709a3 1213 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
AnnaBridge 189:f392fc9709a3 1214 }
AnnaBridge 189:f392fc9709a3 1215
AnnaBridge 189:f392fc9709a3 1216 /**
AnnaBridge 189:f392fc9709a3 1217 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
AnnaBridge 189:f392fc9709a3 1218 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
AnnaBridge 189:f392fc9709a3 1219 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1220 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1221 */
AnnaBridge 189:f392fc9709a3 1222 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1223 {
AnnaBridge 189:f392fc9709a3 1224 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
AnnaBridge 189:f392fc9709a3 1225 }
AnnaBridge 189:f392fc9709a3 1226
AnnaBridge 189:f392fc9709a3 1227 /**
AnnaBridge 189:f392fc9709a3 1228 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
AnnaBridge 189:f392fc9709a3 1229 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
AnnaBridge 189:f392fc9709a3 1230 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1231 * @retval None
AnnaBridge 189:f392fc9709a3 1232 */
AnnaBridge 189:f392fc9709a3 1233 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1234 {
AnnaBridge 189:f392fc9709a3 1235 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
AnnaBridge 189:f392fc9709a3 1236 }
AnnaBridge 189:f392fc9709a3 1237
AnnaBridge 189:f392fc9709a3 1238 /**
AnnaBridge 189:f392fc9709a3 1239 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
AnnaBridge 189:f392fc9709a3 1240 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
AnnaBridge 189:f392fc9709a3 1241 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1242 * @retval None
AnnaBridge 189:f392fc9709a3 1243 */
AnnaBridge 189:f392fc9709a3 1244 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1245 {
AnnaBridge 189:f392fc9709a3 1246 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
AnnaBridge 189:f392fc9709a3 1247 }
AnnaBridge 189:f392fc9709a3 1248
AnnaBridge 189:f392fc9709a3 1249 /**
AnnaBridge 189:f392fc9709a3 1250 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
AnnaBridge 189:f392fc9709a3 1251 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
AnnaBridge 189:f392fc9709a3 1252 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1253 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1254 */
AnnaBridge 189:f392fc9709a3 1255 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1256 {
AnnaBridge 189:f392fc9709a3 1257 return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
AnnaBridge 189:f392fc9709a3 1258 }
AnnaBridge 189:f392fc9709a3 1259
AnnaBridge 189:f392fc9709a3 1260 /**
AnnaBridge 189:f392fc9709a3 1261 * @brief Enable compare register write completed interrupt (CMPOKIE).
AnnaBridge 189:f392fc9709a3 1262 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
AnnaBridge 189:f392fc9709a3 1263 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1264 * @retval None
AnnaBridge 189:f392fc9709a3 1265 */
AnnaBridge 189:f392fc9709a3 1266 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1267 {
AnnaBridge 189:f392fc9709a3 1268 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
AnnaBridge 189:f392fc9709a3 1269 }
AnnaBridge 189:f392fc9709a3 1270
AnnaBridge 189:f392fc9709a3 1271 /**
AnnaBridge 189:f392fc9709a3 1272 * @brief Disable compare register write completed interrupt (CMPOKIE).
AnnaBridge 189:f392fc9709a3 1273 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
AnnaBridge 189:f392fc9709a3 1274 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1275 * @retval None
AnnaBridge 189:f392fc9709a3 1276 */
AnnaBridge 189:f392fc9709a3 1277 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1278 {
AnnaBridge 189:f392fc9709a3 1279 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
AnnaBridge 189:f392fc9709a3 1280 }
AnnaBridge 189:f392fc9709a3 1281
AnnaBridge 189:f392fc9709a3 1282 /**
AnnaBridge 189:f392fc9709a3 1283 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
AnnaBridge 189:f392fc9709a3 1284 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
AnnaBridge 189:f392fc9709a3 1285 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1286 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1287 */
AnnaBridge 189:f392fc9709a3 1288 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1289 {
AnnaBridge 189:f392fc9709a3 1290 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
AnnaBridge 189:f392fc9709a3 1291 }
AnnaBridge 189:f392fc9709a3 1292
AnnaBridge 189:f392fc9709a3 1293 /**
AnnaBridge 189:f392fc9709a3 1294 * @brief Enable autoreload register write completed interrupt (ARROKIE).
AnnaBridge 189:f392fc9709a3 1295 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
AnnaBridge 189:f392fc9709a3 1296 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1297 * @retval None
AnnaBridge 189:f392fc9709a3 1298 */
AnnaBridge 189:f392fc9709a3 1299 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1300 {
AnnaBridge 189:f392fc9709a3 1301 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
AnnaBridge 189:f392fc9709a3 1302 }
AnnaBridge 189:f392fc9709a3 1303
AnnaBridge 189:f392fc9709a3 1304 /**
AnnaBridge 189:f392fc9709a3 1305 * @brief Disable autoreload register write completed interrupt (ARROKIE).
AnnaBridge 189:f392fc9709a3 1306 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
AnnaBridge 189:f392fc9709a3 1307 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1308 * @retval None
AnnaBridge 189:f392fc9709a3 1309 */
AnnaBridge 189:f392fc9709a3 1310 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1311 {
AnnaBridge 189:f392fc9709a3 1312 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
AnnaBridge 189:f392fc9709a3 1313 }
AnnaBridge 189:f392fc9709a3 1314
AnnaBridge 189:f392fc9709a3 1315 /**
AnnaBridge 189:f392fc9709a3 1316 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
AnnaBridge 189:f392fc9709a3 1317 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
AnnaBridge 189:f392fc9709a3 1318 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1319 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1320 */
AnnaBridge 189:f392fc9709a3 1321 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1322 {
AnnaBridge 189:f392fc9709a3 1323 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
AnnaBridge 189:f392fc9709a3 1324 }
AnnaBridge 189:f392fc9709a3 1325
AnnaBridge 189:f392fc9709a3 1326 /**
AnnaBridge 189:f392fc9709a3 1327 * @brief Enable direction change to up interrupt (UPIE).
AnnaBridge 189:f392fc9709a3 1328 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
AnnaBridge 189:f392fc9709a3 1329 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1330 * @retval None
AnnaBridge 189:f392fc9709a3 1331 */
AnnaBridge 189:f392fc9709a3 1332 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1333 {
AnnaBridge 189:f392fc9709a3 1334 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
AnnaBridge 189:f392fc9709a3 1335 }
AnnaBridge 189:f392fc9709a3 1336
AnnaBridge 189:f392fc9709a3 1337 /**
AnnaBridge 189:f392fc9709a3 1338 * @brief Disable direction change to up interrupt (UPIE).
AnnaBridge 189:f392fc9709a3 1339 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
AnnaBridge 189:f392fc9709a3 1340 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1341 * @retval None
AnnaBridge 189:f392fc9709a3 1342 */
AnnaBridge 189:f392fc9709a3 1343 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1344 {
AnnaBridge 189:f392fc9709a3 1345 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
AnnaBridge 189:f392fc9709a3 1346 }
AnnaBridge 189:f392fc9709a3 1347
AnnaBridge 189:f392fc9709a3 1348 /**
AnnaBridge 189:f392fc9709a3 1349 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
AnnaBridge 189:f392fc9709a3 1350 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
AnnaBridge 189:f392fc9709a3 1351 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1352 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1353 */
AnnaBridge 189:f392fc9709a3 1354 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1355 {
AnnaBridge 189:f392fc9709a3 1356 return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
AnnaBridge 189:f392fc9709a3 1357 }
AnnaBridge 189:f392fc9709a3 1358
AnnaBridge 189:f392fc9709a3 1359 /**
AnnaBridge 189:f392fc9709a3 1360 * @brief Enable direction change to down interrupt (DOWNIE).
AnnaBridge 189:f392fc9709a3 1361 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
AnnaBridge 189:f392fc9709a3 1362 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1363 * @retval None
AnnaBridge 189:f392fc9709a3 1364 */
AnnaBridge 189:f392fc9709a3 1365 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1366 {
AnnaBridge 189:f392fc9709a3 1367 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
AnnaBridge 189:f392fc9709a3 1368 }
AnnaBridge 189:f392fc9709a3 1369
AnnaBridge 189:f392fc9709a3 1370 /**
AnnaBridge 189:f392fc9709a3 1371 * @brief Disable direction change to down interrupt (DOWNIE).
AnnaBridge 189:f392fc9709a3 1372 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
AnnaBridge 189:f392fc9709a3 1373 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1374 * @retval None
AnnaBridge 189:f392fc9709a3 1375 */
AnnaBridge 189:f392fc9709a3 1376 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1377 {
AnnaBridge 189:f392fc9709a3 1378 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
AnnaBridge 189:f392fc9709a3 1379 }
AnnaBridge 189:f392fc9709a3 1380
AnnaBridge 189:f392fc9709a3 1381 /**
AnnaBridge 189:f392fc9709a3 1382 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
AnnaBridge 189:f392fc9709a3 1383 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
AnnaBridge 189:f392fc9709a3 1384 * @param LPTIMx Low-Power Timer instance
AnnaBridge 189:f392fc9709a3 1385 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1386 */
AnnaBridge 189:f392fc9709a3 1387 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge 189:f392fc9709a3 1388 {
AnnaBridge 189:f392fc9709a3 1389 return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
AnnaBridge 189:f392fc9709a3 1390 }
AnnaBridge 189:f392fc9709a3 1391
AnnaBridge 189:f392fc9709a3 1392 /**
AnnaBridge 189:f392fc9709a3 1393 * @}
AnnaBridge 189:f392fc9709a3 1394 */
AnnaBridge 189:f392fc9709a3 1395
AnnaBridge 189:f392fc9709a3 1396 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 189:f392fc9709a3 1397 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
AnnaBridge 189:f392fc9709a3 1398 * @{
AnnaBridge 189:f392fc9709a3 1399 */
AnnaBridge 189:f392fc9709a3 1400
AnnaBridge 189:f392fc9709a3 1401 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
AnnaBridge 189:f392fc9709a3 1402 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
AnnaBridge 189:f392fc9709a3 1403 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
AnnaBridge 189:f392fc9709a3 1404 /**
AnnaBridge 189:f392fc9709a3 1405 * @}
AnnaBridge 189:f392fc9709a3 1406 */
AnnaBridge 189:f392fc9709a3 1407 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 189:f392fc9709a3 1408
AnnaBridge 189:f392fc9709a3 1409 /**
AnnaBridge 189:f392fc9709a3 1410 * @}
AnnaBridge 189:f392fc9709a3 1411 */
AnnaBridge 189:f392fc9709a3 1412
AnnaBridge 189:f392fc9709a3 1413 /**
AnnaBridge 189:f392fc9709a3 1414 * @}
AnnaBridge 189:f392fc9709a3 1415 */
AnnaBridge 189:f392fc9709a3 1416
AnnaBridge 189:f392fc9709a3 1417 #endif /* LPTIM1 || LPTIM2 */
AnnaBridge 189:f392fc9709a3 1418
AnnaBridge 189:f392fc9709a3 1419 /**
AnnaBridge 189:f392fc9709a3 1420 * @}
AnnaBridge 189:f392fc9709a3 1421 */
AnnaBridge 189:f392fc9709a3 1422
AnnaBridge 189:f392fc9709a3 1423 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 1424 }
AnnaBridge 189:f392fc9709a3 1425 #endif
AnnaBridge 189:f392fc9709a3 1426
AnnaBridge 189:f392fc9709a3 1427 #endif /* __STM32L4xx_LL_LPTIM_H */
AnnaBridge 189:f392fc9709a3 1428
AnnaBridge 189:f392fc9709a3 1429 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/