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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_ARM_STD/stm32l4xx_ll_exti.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32l4xx_ll_exti.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file of EXTI LL module.
AnnaBridge 189:f392fc9709a3 6 ******************************************************************************
AnnaBridge 189:f392fc9709a3 7 * @attention
AnnaBridge 189:f392fc9709a3 8 *
AnnaBridge 189:f392fc9709a3 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 189:f392fc9709a3 10 *
AnnaBridge 189:f392fc9709a3 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 12 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 189:f392fc9709a3 14 * this list of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 189:f392fc9709a3 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 189:f392fc9709a3 17 * and/or other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 189:f392fc9709a3 19 * may be used to endorse or promote products derived from this software
AnnaBridge 189:f392fc9709a3 20 * without specific prior written permission.
AnnaBridge 189:f392fc9709a3 21 *
AnnaBridge 189:f392fc9709a3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 189:f392fc9709a3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 189:f392fc9709a3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 189:f392fc9709a3 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 189:f392fc9709a3 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 189:f392fc9709a3 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 189:f392fc9709a3 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 189:f392fc9709a3 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 189:f392fc9709a3 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 32 *
AnnaBridge 189:f392fc9709a3 33 ******************************************************************************
AnnaBridge 189:f392fc9709a3 34 */
AnnaBridge 189:f392fc9709a3 35
AnnaBridge 189:f392fc9709a3 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 37 #ifndef __STM32L4xx_LL_EXTI_H
AnnaBridge 189:f392fc9709a3 38 #define __STM32L4xx_LL_EXTI_H
AnnaBridge 189:f392fc9709a3 39
AnnaBridge 189:f392fc9709a3 40 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 41 extern "C" {
AnnaBridge 189:f392fc9709a3 42 #endif
AnnaBridge 189:f392fc9709a3 43
AnnaBridge 189:f392fc9709a3 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 45 #include "stm32l4xx.h"
AnnaBridge 189:f392fc9709a3 46
AnnaBridge 189:f392fc9709a3 47 /** @addtogroup STM32L4xx_LL_Driver
AnnaBridge 189:f392fc9709a3 48 * @{
AnnaBridge 189:f392fc9709a3 49 */
AnnaBridge 189:f392fc9709a3 50
AnnaBridge 189:f392fc9709a3 51 #if defined (EXTI)
AnnaBridge 189:f392fc9709a3 52
AnnaBridge 189:f392fc9709a3 53 /** @defgroup EXTI_LL EXTI
AnnaBridge 189:f392fc9709a3 54 * @{
AnnaBridge 189:f392fc9709a3 55 */
AnnaBridge 189:f392fc9709a3 56
AnnaBridge 189:f392fc9709a3 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 59 /* Private constants ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 60 /* Private Macros ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 61 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 189:f392fc9709a3 62 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
AnnaBridge 189:f392fc9709a3 63 * @{
AnnaBridge 189:f392fc9709a3 64 */
AnnaBridge 189:f392fc9709a3 65 /**
AnnaBridge 189:f392fc9709a3 66 * @}
AnnaBridge 189:f392fc9709a3 67 */
AnnaBridge 189:f392fc9709a3 68 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 189:f392fc9709a3 69 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 70 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 189:f392fc9709a3 71 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
AnnaBridge 189:f392fc9709a3 72 * @{
AnnaBridge 189:f392fc9709a3 73 */
AnnaBridge 189:f392fc9709a3 74 typedef struct
AnnaBridge 189:f392fc9709a3 75 {
AnnaBridge 189:f392fc9709a3 76
AnnaBridge 189:f392fc9709a3 77 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 78 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
AnnaBridge 189:f392fc9709a3 79
AnnaBridge 189:f392fc9709a3 80 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 81 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
AnnaBridge 189:f392fc9709a3 82
AnnaBridge 189:f392fc9709a3 83 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
AnnaBridge 189:f392fc9709a3 84 This parameter can be set either to ENABLE or DISABLE */
AnnaBridge 189:f392fc9709a3 85
AnnaBridge 189:f392fc9709a3 86 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
AnnaBridge 189:f392fc9709a3 87 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
AnnaBridge 189:f392fc9709a3 88
AnnaBridge 189:f392fc9709a3 89 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
AnnaBridge 189:f392fc9709a3 90 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
AnnaBridge 189:f392fc9709a3 91 } LL_EXTI_InitTypeDef;
AnnaBridge 189:f392fc9709a3 92
AnnaBridge 189:f392fc9709a3 93 /**
AnnaBridge 189:f392fc9709a3 94 * @}
AnnaBridge 189:f392fc9709a3 95 */
AnnaBridge 189:f392fc9709a3 96 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 189:f392fc9709a3 97
AnnaBridge 189:f392fc9709a3 98 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 99 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
AnnaBridge 189:f392fc9709a3 100 * @{
AnnaBridge 189:f392fc9709a3 101 */
AnnaBridge 189:f392fc9709a3 102
AnnaBridge 189:f392fc9709a3 103 /** @defgroup EXTI_LL_EC_LINE LINE
AnnaBridge 189:f392fc9709a3 104 * @{
AnnaBridge 189:f392fc9709a3 105 */
AnnaBridge 189:f392fc9709a3 106 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
AnnaBridge 189:f392fc9709a3 107 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
AnnaBridge 189:f392fc9709a3 108 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
AnnaBridge 189:f392fc9709a3 109 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
AnnaBridge 189:f392fc9709a3 110 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
AnnaBridge 189:f392fc9709a3 111 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
AnnaBridge 189:f392fc9709a3 112 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
AnnaBridge 189:f392fc9709a3 113 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
AnnaBridge 189:f392fc9709a3 114 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
AnnaBridge 189:f392fc9709a3 115 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
AnnaBridge 189:f392fc9709a3 116 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
AnnaBridge 189:f392fc9709a3 117 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
AnnaBridge 189:f392fc9709a3 118 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
AnnaBridge 189:f392fc9709a3 119 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
AnnaBridge 189:f392fc9709a3 120 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
AnnaBridge 189:f392fc9709a3 121 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
AnnaBridge 189:f392fc9709a3 122 #if defined(EXTI_IMR1_IM16)
AnnaBridge 189:f392fc9709a3 123 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
AnnaBridge 189:f392fc9709a3 124 #endif
AnnaBridge 189:f392fc9709a3 125 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
AnnaBridge 189:f392fc9709a3 126 #if defined(EXTI_IMR1_IM18)
AnnaBridge 189:f392fc9709a3 127 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
AnnaBridge 189:f392fc9709a3 128 #endif
AnnaBridge 189:f392fc9709a3 129 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
AnnaBridge 189:f392fc9709a3 130 #if defined(EXTI_IMR1_IM20)
AnnaBridge 189:f392fc9709a3 131 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
AnnaBridge 189:f392fc9709a3 132 #endif
AnnaBridge 189:f392fc9709a3 133 #if defined(EXTI_IMR1_IM21)
AnnaBridge 189:f392fc9709a3 134 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
AnnaBridge 189:f392fc9709a3 135 #endif
AnnaBridge 189:f392fc9709a3 136 #if defined(EXTI_IMR1_IM22)
AnnaBridge 189:f392fc9709a3 137 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
AnnaBridge 189:f392fc9709a3 138 #endif
AnnaBridge 189:f392fc9709a3 139 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
AnnaBridge 189:f392fc9709a3 140 #if defined(EXTI_IMR1_IM24)
AnnaBridge 189:f392fc9709a3 141 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
AnnaBridge 189:f392fc9709a3 142 #endif
AnnaBridge 189:f392fc9709a3 143 #if defined(EXTI_IMR1_IM25)
AnnaBridge 189:f392fc9709a3 144 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
AnnaBridge 189:f392fc9709a3 145 #endif
AnnaBridge 189:f392fc9709a3 146 #if defined(EXTI_IMR1_IM26)
AnnaBridge 189:f392fc9709a3 147 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
AnnaBridge 189:f392fc9709a3 148 #endif
AnnaBridge 189:f392fc9709a3 149 #if defined(EXTI_IMR1_IM27)
AnnaBridge 189:f392fc9709a3 150 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
AnnaBridge 189:f392fc9709a3 151 #endif
AnnaBridge 189:f392fc9709a3 152 #if defined(EXTI_IMR1_IM28)
AnnaBridge 189:f392fc9709a3 153 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
AnnaBridge 189:f392fc9709a3 154 #endif
AnnaBridge 189:f392fc9709a3 155 #if defined(EXTI_IMR1_IM29)
AnnaBridge 189:f392fc9709a3 156 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
AnnaBridge 189:f392fc9709a3 157 #endif
AnnaBridge 189:f392fc9709a3 158 #if defined(EXTI_IMR1_IM30)
AnnaBridge 189:f392fc9709a3 159 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
AnnaBridge 189:f392fc9709a3 160 #endif
AnnaBridge 189:f392fc9709a3 161 #if defined(EXTI_IMR1_IM31)
AnnaBridge 189:f392fc9709a3 162 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
AnnaBridge 189:f392fc9709a3 163 #endif
AnnaBridge 189:f392fc9709a3 164 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/
AnnaBridge 189:f392fc9709a3 165
AnnaBridge 189:f392fc9709a3 166 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
AnnaBridge 189:f392fc9709a3 167 #if defined(EXTI_IMR2_IM33)
AnnaBridge 189:f392fc9709a3 168 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
AnnaBridge 189:f392fc9709a3 169 #endif
AnnaBridge 189:f392fc9709a3 170 #if defined(EXTI_IMR2_IM34)
AnnaBridge 189:f392fc9709a3 171 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
AnnaBridge 189:f392fc9709a3 172 #endif
AnnaBridge 189:f392fc9709a3 173 #if defined(EXTI_IMR2_IM35)
AnnaBridge 189:f392fc9709a3 174 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
AnnaBridge 189:f392fc9709a3 175 #endif
AnnaBridge 189:f392fc9709a3 176 #if defined(EXTI_IMR2_IM36)
AnnaBridge 189:f392fc9709a3 177 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
AnnaBridge 189:f392fc9709a3 178 #endif
AnnaBridge 189:f392fc9709a3 179 #if defined(EXTI_IMR2_IM37)
AnnaBridge 189:f392fc9709a3 180 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
AnnaBridge 189:f392fc9709a3 181 #endif
AnnaBridge 189:f392fc9709a3 182 #if defined(EXTI_IMR2_IM38)
AnnaBridge 189:f392fc9709a3 183 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
AnnaBridge 189:f392fc9709a3 184 #endif
AnnaBridge 189:f392fc9709a3 185 #if defined(EXTI_IMR2_IM39)
AnnaBridge 189:f392fc9709a3 186 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
AnnaBridge 189:f392fc9709a3 187 #endif
AnnaBridge 189:f392fc9709a3 188 #if defined(EXTI_IMR2_IM40)
AnnaBridge 189:f392fc9709a3 189 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
AnnaBridge 189:f392fc9709a3 190 #endif
AnnaBridge 189:f392fc9709a3 191 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
AnnaBridge 189:f392fc9709a3 192
AnnaBridge 189:f392fc9709a3 193
AnnaBridge 189:f392fc9709a3 194 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
AnnaBridge 189:f392fc9709a3 195
AnnaBridge 189:f392fc9709a3 196 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 189:f392fc9709a3 197 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
AnnaBridge 189:f392fc9709a3 198 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 189:f392fc9709a3 199
AnnaBridge 189:f392fc9709a3 200 /**
AnnaBridge 189:f392fc9709a3 201 * @}
AnnaBridge 189:f392fc9709a3 202 */
AnnaBridge 189:f392fc9709a3 203 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 189:f392fc9709a3 204
AnnaBridge 189:f392fc9709a3 205 /** @defgroup EXTI_LL_EC_MODE Mode
AnnaBridge 189:f392fc9709a3 206 * @{
AnnaBridge 189:f392fc9709a3 207 */
AnnaBridge 189:f392fc9709a3 208 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
AnnaBridge 189:f392fc9709a3 209 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
AnnaBridge 189:f392fc9709a3 210 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
AnnaBridge 189:f392fc9709a3 211 /**
AnnaBridge 189:f392fc9709a3 212 * @}
AnnaBridge 189:f392fc9709a3 213 */
AnnaBridge 189:f392fc9709a3 214
AnnaBridge 189:f392fc9709a3 215 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
AnnaBridge 189:f392fc9709a3 216 * @{
AnnaBridge 189:f392fc9709a3 217 */
AnnaBridge 189:f392fc9709a3 218 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
AnnaBridge 189:f392fc9709a3 219 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
AnnaBridge 189:f392fc9709a3 220 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
AnnaBridge 189:f392fc9709a3 221 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
AnnaBridge 189:f392fc9709a3 222
AnnaBridge 189:f392fc9709a3 223 /**
AnnaBridge 189:f392fc9709a3 224 * @}
AnnaBridge 189:f392fc9709a3 225 */
AnnaBridge 189:f392fc9709a3 226
AnnaBridge 189:f392fc9709a3 227
AnnaBridge 189:f392fc9709a3 228 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 189:f392fc9709a3 229
AnnaBridge 189:f392fc9709a3 230
AnnaBridge 189:f392fc9709a3 231 /**
AnnaBridge 189:f392fc9709a3 232 * @}
AnnaBridge 189:f392fc9709a3 233 */
AnnaBridge 189:f392fc9709a3 234
AnnaBridge 189:f392fc9709a3 235 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 236 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
AnnaBridge 189:f392fc9709a3 237 * @{
AnnaBridge 189:f392fc9709a3 238 */
AnnaBridge 189:f392fc9709a3 239
AnnaBridge 189:f392fc9709a3 240 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 189:f392fc9709a3 241 * @{
AnnaBridge 189:f392fc9709a3 242 */
AnnaBridge 189:f392fc9709a3 243
AnnaBridge 189:f392fc9709a3 244 /**
AnnaBridge 189:f392fc9709a3 245 * @brief Write a value in EXTI register
AnnaBridge 189:f392fc9709a3 246 * @param __REG__ Register to be written
AnnaBridge 189:f392fc9709a3 247 * @param __VALUE__ Value to be written in the register
AnnaBridge 189:f392fc9709a3 248 * @retval None
AnnaBridge 189:f392fc9709a3 249 */
AnnaBridge 189:f392fc9709a3 250 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
AnnaBridge 189:f392fc9709a3 251
AnnaBridge 189:f392fc9709a3 252 /**
AnnaBridge 189:f392fc9709a3 253 * @brief Read a value in EXTI register
AnnaBridge 189:f392fc9709a3 254 * @param __REG__ Register to be read
AnnaBridge 189:f392fc9709a3 255 * @retval Register value
AnnaBridge 189:f392fc9709a3 256 */
AnnaBridge 189:f392fc9709a3 257 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
AnnaBridge 189:f392fc9709a3 258 /**
AnnaBridge 189:f392fc9709a3 259 * @}
AnnaBridge 189:f392fc9709a3 260 */
AnnaBridge 189:f392fc9709a3 261
AnnaBridge 189:f392fc9709a3 262
AnnaBridge 189:f392fc9709a3 263 /**
AnnaBridge 189:f392fc9709a3 264 * @}
AnnaBridge 189:f392fc9709a3 265 */
AnnaBridge 189:f392fc9709a3 266
AnnaBridge 189:f392fc9709a3 267
AnnaBridge 189:f392fc9709a3 268
AnnaBridge 189:f392fc9709a3 269 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 270 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
AnnaBridge 189:f392fc9709a3 271 * @{
AnnaBridge 189:f392fc9709a3 272 */
AnnaBridge 189:f392fc9709a3 273 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
AnnaBridge 189:f392fc9709a3 274 * @{
AnnaBridge 189:f392fc9709a3 275 */
AnnaBridge 189:f392fc9709a3 276
AnnaBridge 189:f392fc9709a3 277 /**
AnnaBridge 189:f392fc9709a3 278 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 279 * @note The reset value for the direct or internal lines (see RM)
AnnaBridge 189:f392fc9709a3 280 * is set to 1 in order to enable the interrupt by default.
AnnaBridge 189:f392fc9709a3 281 * Bits are set automatically at Power on.
AnnaBridge 189:f392fc9709a3 282 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
AnnaBridge 189:f392fc9709a3 283 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 284 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 285 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 286 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 287 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 288 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 289 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 290 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 291 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 292 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 293 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 294 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 295 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 296 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 297 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 298 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 299 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 300 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 301 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 189:f392fc9709a3 302 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 303 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 304 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 305 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 306 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 307 * @arg @ref LL_EXTI_LINE_23
AnnaBridge 189:f392fc9709a3 308 * @arg @ref LL_EXTI_LINE_24
AnnaBridge 189:f392fc9709a3 309 * @arg @ref LL_EXTI_LINE_25
AnnaBridge 189:f392fc9709a3 310 * @arg @ref LL_EXTI_LINE_26
AnnaBridge 189:f392fc9709a3 311 * @arg @ref LL_EXTI_LINE_27
AnnaBridge 189:f392fc9709a3 312 * @arg @ref LL_EXTI_LINE_28
AnnaBridge 189:f392fc9709a3 313 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 314 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 315 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 316 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 189:f392fc9709a3 317 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 318 * @retval None
AnnaBridge 189:f392fc9709a3 319 */
AnnaBridge 189:f392fc9709a3 320 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 321 {
AnnaBridge 189:f392fc9709a3 322 SET_BIT(EXTI->IMR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 323 }
AnnaBridge 189:f392fc9709a3 324 /**
AnnaBridge 189:f392fc9709a3 325 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 326 * @note The reset value for the direct lines (lines from 32 to 34, line
AnnaBridge 189:f392fc9709a3 327 * 39) is set to 1 in order to enable the interrupt by default.
AnnaBridge 189:f392fc9709a3 328 * Bits are set automatically at Power on.
AnnaBridge 189:f392fc9709a3 329 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
AnnaBridge 189:f392fc9709a3 330 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 331 * @arg @ref LL_EXTI_LINE_32
AnnaBridge 189:f392fc9709a3 332 * @arg @ref LL_EXTI_LINE_33
AnnaBridge 189:f392fc9709a3 333 * @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge 189:f392fc9709a3 334 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 335 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 336 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 337 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 338 * @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge 189:f392fc9709a3 339 * @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge 189:f392fc9709a3 340 * @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge 189:f392fc9709a3 341 * @note (*): Available in some devices
AnnaBridge 189:f392fc9709a3 342 * @retval None
AnnaBridge 189:f392fc9709a3 343 */
AnnaBridge 189:f392fc9709a3 344 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 345 {
AnnaBridge 189:f392fc9709a3 346 SET_BIT(EXTI->IMR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 347 }
AnnaBridge 189:f392fc9709a3 348
AnnaBridge 189:f392fc9709a3 349 /**
AnnaBridge 189:f392fc9709a3 350 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 351 * @note The reset value for the direct or internal lines (see RM)
AnnaBridge 189:f392fc9709a3 352 * is set to 1 in order to enable the interrupt by default.
AnnaBridge 189:f392fc9709a3 353 * Bits are set automatically at Power on.
AnnaBridge 189:f392fc9709a3 354 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
AnnaBridge 189:f392fc9709a3 355 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 356 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 357 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 358 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 359 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 360 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 361 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 362 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 363 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 364 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 365 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 366 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 367 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 368 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 369 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 370 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 371 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 372 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 373 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 189:f392fc9709a3 374 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 375 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 376 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 377 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 378 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 379 * @arg @ref LL_EXTI_LINE_23
AnnaBridge 189:f392fc9709a3 380 * @arg @ref LL_EXTI_LINE_24
AnnaBridge 189:f392fc9709a3 381 * @arg @ref LL_EXTI_LINE_25
AnnaBridge 189:f392fc9709a3 382 * @arg @ref LL_EXTI_LINE_26
AnnaBridge 189:f392fc9709a3 383 * @arg @ref LL_EXTI_LINE_27
AnnaBridge 189:f392fc9709a3 384 * @arg @ref LL_EXTI_LINE_28
AnnaBridge 189:f392fc9709a3 385 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 386 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 387 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 388 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 189:f392fc9709a3 389 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 390 * @retval None
AnnaBridge 189:f392fc9709a3 391 */
AnnaBridge 189:f392fc9709a3 392 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 393 {
AnnaBridge 189:f392fc9709a3 394 CLEAR_BIT(EXTI->IMR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 395 }
AnnaBridge 189:f392fc9709a3 396
AnnaBridge 189:f392fc9709a3 397 /**
AnnaBridge 189:f392fc9709a3 398 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 399 * @note The reset value for the direct lines (lines from 32 to 34, line
AnnaBridge 189:f392fc9709a3 400 * 39) is set to 1 in order to enable the interrupt by default.
AnnaBridge 189:f392fc9709a3 401 * Bits are set automatically at Power on.
AnnaBridge 189:f392fc9709a3 402 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
AnnaBridge 189:f392fc9709a3 403 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 404 * @arg @ref LL_EXTI_LINE_32
AnnaBridge 189:f392fc9709a3 405 * @arg @ref LL_EXTI_LINE_33
AnnaBridge 189:f392fc9709a3 406 * @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge 189:f392fc9709a3 407 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 408 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 409 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 410 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 411 * @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge 189:f392fc9709a3 412 * @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge 189:f392fc9709a3 413 * @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge 189:f392fc9709a3 414 * @note (*): Available in some devices
AnnaBridge 189:f392fc9709a3 415 * @retval None
AnnaBridge 189:f392fc9709a3 416 */
AnnaBridge 189:f392fc9709a3 417 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 418 {
AnnaBridge 189:f392fc9709a3 419 CLEAR_BIT(EXTI->IMR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 420 }
AnnaBridge 189:f392fc9709a3 421
AnnaBridge 189:f392fc9709a3 422 /**
AnnaBridge 189:f392fc9709a3 423 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 424 * @note The reset value for the direct or internal lines (see RM)
AnnaBridge 189:f392fc9709a3 425 * is set to 1 in order to enable the interrupt by default.
AnnaBridge 189:f392fc9709a3 426 * Bits are set automatically at Power on.
AnnaBridge 189:f392fc9709a3 427 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
AnnaBridge 189:f392fc9709a3 428 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 429 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 430 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 431 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 432 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 433 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 434 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 435 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 436 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 437 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 438 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 439 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 440 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 441 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 442 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 443 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 444 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 445 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 446 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 189:f392fc9709a3 447 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 448 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 449 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 450 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 451 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 452 * @arg @ref LL_EXTI_LINE_23
AnnaBridge 189:f392fc9709a3 453 * @arg @ref LL_EXTI_LINE_24
AnnaBridge 189:f392fc9709a3 454 * @arg @ref LL_EXTI_LINE_25
AnnaBridge 189:f392fc9709a3 455 * @arg @ref LL_EXTI_LINE_26
AnnaBridge 189:f392fc9709a3 456 * @arg @ref LL_EXTI_LINE_27
AnnaBridge 189:f392fc9709a3 457 * @arg @ref LL_EXTI_LINE_28
AnnaBridge 189:f392fc9709a3 458 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 459 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 460 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 461 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 189:f392fc9709a3 462 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 463 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 464 */
AnnaBridge 189:f392fc9709a3 465 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 466 {
AnnaBridge 189:f392fc9709a3 467 return (READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 468 }
AnnaBridge 189:f392fc9709a3 469
AnnaBridge 189:f392fc9709a3 470 /**
AnnaBridge 189:f392fc9709a3 471 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 472 * @note The reset value for the direct lines (lines from 32 to 34, line
AnnaBridge 189:f392fc9709a3 473 * 39) is set to 1 in order to enable the interrupt by default.
AnnaBridge 189:f392fc9709a3 474 * Bits are set automatically at Power on.
AnnaBridge 189:f392fc9709a3 475 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
AnnaBridge 189:f392fc9709a3 476 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 477 * @arg @ref LL_EXTI_LINE_32
AnnaBridge 189:f392fc9709a3 478 * @arg @ref LL_EXTI_LINE_33
AnnaBridge 189:f392fc9709a3 479 * @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge 189:f392fc9709a3 480 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 481 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 482 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 483 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 484 * @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge 189:f392fc9709a3 485 * @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge 189:f392fc9709a3 486 * @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge 189:f392fc9709a3 487 * @note (*): Available in some devices
AnnaBridge 189:f392fc9709a3 488 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 489 */
AnnaBridge 189:f392fc9709a3 490 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 491 {
AnnaBridge 189:f392fc9709a3 492 return (READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 493 }
AnnaBridge 189:f392fc9709a3 494
AnnaBridge 189:f392fc9709a3 495 /**
AnnaBridge 189:f392fc9709a3 496 * @}
AnnaBridge 189:f392fc9709a3 497 */
AnnaBridge 189:f392fc9709a3 498
AnnaBridge 189:f392fc9709a3 499 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
AnnaBridge 189:f392fc9709a3 500 * @{
AnnaBridge 189:f392fc9709a3 501 */
AnnaBridge 189:f392fc9709a3 502
AnnaBridge 189:f392fc9709a3 503 /**
AnnaBridge 189:f392fc9709a3 504 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 505 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
AnnaBridge 189:f392fc9709a3 506 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 507 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 508 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 509 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 510 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 511 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 512 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 513 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 514 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 515 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 516 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 517 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 518 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 519 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 520 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 521 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 522 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 523 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 524 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 189:f392fc9709a3 525 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 526 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 527 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 528 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 529 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 530 * @arg @ref LL_EXTI_LINE_23
AnnaBridge 189:f392fc9709a3 531 * @arg @ref LL_EXTI_LINE_24
AnnaBridge 189:f392fc9709a3 532 * @arg @ref LL_EXTI_LINE_25
AnnaBridge 189:f392fc9709a3 533 * @arg @ref LL_EXTI_LINE_26
AnnaBridge 189:f392fc9709a3 534 * @arg @ref LL_EXTI_LINE_27
AnnaBridge 189:f392fc9709a3 535 * @arg @ref LL_EXTI_LINE_28
AnnaBridge 189:f392fc9709a3 536 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 537 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 538 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 539 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 189:f392fc9709a3 540 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 541 * @retval None
AnnaBridge 189:f392fc9709a3 542 */
AnnaBridge 189:f392fc9709a3 543 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 544 {
AnnaBridge 189:f392fc9709a3 545 SET_BIT(EXTI->EMR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 546
AnnaBridge 189:f392fc9709a3 547 }
AnnaBridge 189:f392fc9709a3 548
AnnaBridge 189:f392fc9709a3 549 /**
AnnaBridge 189:f392fc9709a3 550 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 551 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
AnnaBridge 189:f392fc9709a3 552 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 553 * @arg @ref LL_EXTI_LINE_32
AnnaBridge 189:f392fc9709a3 554 * @arg @ref LL_EXTI_LINE_33
AnnaBridge 189:f392fc9709a3 555 * @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge 189:f392fc9709a3 556 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 557 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 558 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 559 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 560 * @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge 189:f392fc9709a3 561 * @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge 189:f392fc9709a3 562 * @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge 189:f392fc9709a3 563 * @note (*): Available in some devices
AnnaBridge 189:f392fc9709a3 564 * @retval None
AnnaBridge 189:f392fc9709a3 565 */
AnnaBridge 189:f392fc9709a3 566 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 567 {
AnnaBridge 189:f392fc9709a3 568 SET_BIT(EXTI->EMR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 569 }
AnnaBridge 189:f392fc9709a3 570
AnnaBridge 189:f392fc9709a3 571 /**
AnnaBridge 189:f392fc9709a3 572 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 573 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
AnnaBridge 189:f392fc9709a3 574 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 575 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 576 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 577 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 578 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 579 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 580 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 581 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 582 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 583 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 584 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 585 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 586 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 587 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 588 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 589 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 590 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 591 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 592 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 189:f392fc9709a3 593 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 594 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 595 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 596 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 597 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 598 * @arg @ref LL_EXTI_LINE_23
AnnaBridge 189:f392fc9709a3 599 * @arg @ref LL_EXTI_LINE_24
AnnaBridge 189:f392fc9709a3 600 * @arg @ref LL_EXTI_LINE_25
AnnaBridge 189:f392fc9709a3 601 * @arg @ref LL_EXTI_LINE_26
AnnaBridge 189:f392fc9709a3 602 * @arg @ref LL_EXTI_LINE_27
AnnaBridge 189:f392fc9709a3 603 * @arg @ref LL_EXTI_LINE_28
AnnaBridge 189:f392fc9709a3 604 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 605 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 606 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 607 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 189:f392fc9709a3 608 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 609 * @retval None
AnnaBridge 189:f392fc9709a3 610 */
AnnaBridge 189:f392fc9709a3 611 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 612 {
AnnaBridge 189:f392fc9709a3 613 CLEAR_BIT(EXTI->EMR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 614 }
AnnaBridge 189:f392fc9709a3 615
AnnaBridge 189:f392fc9709a3 616 /**
AnnaBridge 189:f392fc9709a3 617 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 618 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
AnnaBridge 189:f392fc9709a3 619 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 620 * @arg @ref LL_EXTI_LINE_32
AnnaBridge 189:f392fc9709a3 621 * @arg @ref LL_EXTI_LINE_33
AnnaBridge 189:f392fc9709a3 622 * @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge 189:f392fc9709a3 623 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 624 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 625 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 626 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 627 * @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge 189:f392fc9709a3 628 * @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge 189:f392fc9709a3 629 * @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge 189:f392fc9709a3 630 * @note (*): Available in some devices
AnnaBridge 189:f392fc9709a3 631 * @retval None
AnnaBridge 189:f392fc9709a3 632 */
AnnaBridge 189:f392fc9709a3 633 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 634 {
AnnaBridge 189:f392fc9709a3 635 CLEAR_BIT(EXTI->EMR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 636 }
AnnaBridge 189:f392fc9709a3 637
AnnaBridge 189:f392fc9709a3 638 /**
AnnaBridge 189:f392fc9709a3 639 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 640 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
AnnaBridge 189:f392fc9709a3 641 * @param ExtiLine This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 642 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 643 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 644 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 645 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 646 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 647 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 648 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 649 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 650 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 651 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 652 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 653 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 654 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 655 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 656 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 657 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 658 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 659 * @arg @ref LL_EXTI_LINE_17
AnnaBridge 189:f392fc9709a3 660 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 661 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 662 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 663 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 664 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 665 * @arg @ref LL_EXTI_LINE_23
AnnaBridge 189:f392fc9709a3 666 * @arg @ref LL_EXTI_LINE_24
AnnaBridge 189:f392fc9709a3 667 * @arg @ref LL_EXTI_LINE_25
AnnaBridge 189:f392fc9709a3 668 * @arg @ref LL_EXTI_LINE_26
AnnaBridge 189:f392fc9709a3 669 * @arg @ref LL_EXTI_LINE_27
AnnaBridge 189:f392fc9709a3 670 * @arg @ref LL_EXTI_LINE_28
AnnaBridge 189:f392fc9709a3 671 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 672 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 673 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 674 * @arg @ref LL_EXTI_LINE_ALL_0_31
AnnaBridge 189:f392fc9709a3 675 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 676 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 677 */
AnnaBridge 189:f392fc9709a3 678 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 679 {
AnnaBridge 189:f392fc9709a3 680 return (READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 681
AnnaBridge 189:f392fc9709a3 682 }
AnnaBridge 189:f392fc9709a3 683
AnnaBridge 189:f392fc9709a3 684 /**
AnnaBridge 189:f392fc9709a3 685 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 686 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
AnnaBridge 189:f392fc9709a3 687 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 688 * @arg @ref LL_EXTI_LINE_32
AnnaBridge 189:f392fc9709a3 689 * @arg @ref LL_EXTI_LINE_33
AnnaBridge 189:f392fc9709a3 690 * @arg @ref LL_EXTI_LINE_34(*)
AnnaBridge 189:f392fc9709a3 691 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 692 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 693 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 694 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 695 * @arg @ref LL_EXTI_LINE_39(*)
AnnaBridge 189:f392fc9709a3 696 * @arg @ref LL_EXTI_LINE_40(*)
AnnaBridge 189:f392fc9709a3 697 * @arg @ref LL_EXTI_LINE_ALL_32_63
AnnaBridge 189:f392fc9709a3 698 * @note (*): Available in some devices
AnnaBridge 189:f392fc9709a3 699 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 700 */
AnnaBridge 189:f392fc9709a3 701 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 702 {
AnnaBridge 189:f392fc9709a3 703 return (READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 704 }
AnnaBridge 189:f392fc9709a3 705
AnnaBridge 189:f392fc9709a3 706 /**
AnnaBridge 189:f392fc9709a3 707 * @}
AnnaBridge 189:f392fc9709a3 708 */
AnnaBridge 189:f392fc9709a3 709
AnnaBridge 189:f392fc9709a3 710 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
AnnaBridge 189:f392fc9709a3 711 * @{
AnnaBridge 189:f392fc9709a3 712 */
AnnaBridge 189:f392fc9709a3 713
AnnaBridge 189:f392fc9709a3 714 /**
AnnaBridge 189:f392fc9709a3 715 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 716 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 189:f392fc9709a3 717 * generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge 189:f392fc9709a3 718 * line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge 189:f392fc9709a3 719 * pending bit is not set.
AnnaBridge 189:f392fc9709a3 720 * Rising and falling edge triggers can be set for
AnnaBridge 189:f392fc9709a3 721 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 189:f392fc9709a3 722 * condition.
AnnaBridge 189:f392fc9709a3 723 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
AnnaBridge 189:f392fc9709a3 724 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 725 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 726 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 727 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 728 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 729 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 730 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 731 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 732 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 733 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 734 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 735 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 736 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 737 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 738 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 739 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 740 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 741 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 742 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 743 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 744 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 745 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 746 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 747 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 748 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 749 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 750 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 751 * @retval None
AnnaBridge 189:f392fc9709a3 752 */
AnnaBridge 189:f392fc9709a3 753 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 754 {
AnnaBridge 189:f392fc9709a3 755 SET_BIT(EXTI->RTSR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 756
AnnaBridge 189:f392fc9709a3 757 }
AnnaBridge 189:f392fc9709a3 758
AnnaBridge 189:f392fc9709a3 759 /**
AnnaBridge 189:f392fc9709a3 760 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 761 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 189:f392fc9709a3 762 * generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge 189:f392fc9709a3 763 * line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge 189:f392fc9709a3 764 * pending bit is not set.Rising and falling edge triggers can be set for
AnnaBridge 189:f392fc9709a3 765 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 189:f392fc9709a3 766 * condition.
AnnaBridge 189:f392fc9709a3 767 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
AnnaBridge 189:f392fc9709a3 768 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 769 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 770 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 771 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 772 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 773 * @retval None
AnnaBridge 189:f392fc9709a3 774 */
AnnaBridge 189:f392fc9709a3 775 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 776 {
AnnaBridge 189:f392fc9709a3 777 SET_BIT(EXTI->RTSR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 778 }
AnnaBridge 189:f392fc9709a3 779
AnnaBridge 189:f392fc9709a3 780 /**
AnnaBridge 189:f392fc9709a3 781 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 782 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 189:f392fc9709a3 783 * generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge 189:f392fc9709a3 784 * line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge 189:f392fc9709a3 785 * pending bit is not set.
AnnaBridge 189:f392fc9709a3 786 * Rising and falling edge triggers can be set for
AnnaBridge 189:f392fc9709a3 787 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 189:f392fc9709a3 788 * condition.
AnnaBridge 189:f392fc9709a3 789 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
AnnaBridge 189:f392fc9709a3 790 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 791 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 792 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 793 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 794 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 795 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 796 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 797 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 798 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 799 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 800 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 801 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 802 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 803 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 804 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 805 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 806 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 807 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 808 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 809 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 810 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 811 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 812 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 813 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 814 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 815 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 816 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 817 * @retval None
AnnaBridge 189:f392fc9709a3 818 */
AnnaBridge 189:f392fc9709a3 819 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 820 {
AnnaBridge 189:f392fc9709a3 821 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 822
AnnaBridge 189:f392fc9709a3 823 }
AnnaBridge 189:f392fc9709a3 824
AnnaBridge 189:f392fc9709a3 825 /**
AnnaBridge 189:f392fc9709a3 826 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 827 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 189:f392fc9709a3 828 * generated on these lines. If a rising edge on a configurable interrupt
AnnaBridge 189:f392fc9709a3 829 * line occurs during a write operation in the EXTI_RTSR register, the
AnnaBridge 189:f392fc9709a3 830 * pending bit is not set.
AnnaBridge 189:f392fc9709a3 831 * Rising and falling edge triggers can be set for
AnnaBridge 189:f392fc9709a3 832 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 189:f392fc9709a3 833 * condition.
AnnaBridge 189:f392fc9709a3 834 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
AnnaBridge 189:f392fc9709a3 835 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 836 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 837 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 838 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 839 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 840 * @retval None
AnnaBridge 189:f392fc9709a3 841 */
AnnaBridge 189:f392fc9709a3 842 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 843 {
AnnaBridge 189:f392fc9709a3 844 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 845 }
AnnaBridge 189:f392fc9709a3 846
AnnaBridge 189:f392fc9709a3 847 /**
AnnaBridge 189:f392fc9709a3 848 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 849 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
AnnaBridge 189:f392fc9709a3 850 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 851 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 852 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 853 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 854 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 855 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 856 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 857 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 858 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 859 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 860 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 861 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 862 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 863 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 864 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 865 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 866 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 867 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 868 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 869 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 870 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 871 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 872 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 873 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 874 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 875 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 876 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 877 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 878 */
AnnaBridge 189:f392fc9709a3 879 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 880 {
AnnaBridge 189:f392fc9709a3 881 return (READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 882 }
AnnaBridge 189:f392fc9709a3 883
AnnaBridge 189:f392fc9709a3 884 /**
AnnaBridge 189:f392fc9709a3 885 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 886 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
AnnaBridge 189:f392fc9709a3 887 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 888 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 889 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 890 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 891 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 892 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 893 */
AnnaBridge 189:f392fc9709a3 894 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 895 {
AnnaBridge 189:f392fc9709a3 896 return (READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 897 }
AnnaBridge 189:f392fc9709a3 898
AnnaBridge 189:f392fc9709a3 899 /**
AnnaBridge 189:f392fc9709a3 900 * @}
AnnaBridge 189:f392fc9709a3 901 */
AnnaBridge 189:f392fc9709a3 902
AnnaBridge 189:f392fc9709a3 903 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
AnnaBridge 189:f392fc9709a3 904 * @{
AnnaBridge 189:f392fc9709a3 905 */
AnnaBridge 189:f392fc9709a3 906
AnnaBridge 189:f392fc9709a3 907 /**
AnnaBridge 189:f392fc9709a3 908 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 909 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 189:f392fc9709a3 910 * generated on these lines. If a falling edge on a configurable interrupt
AnnaBridge 189:f392fc9709a3 911 * line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge 189:f392fc9709a3 912 * pending bit is not set.
AnnaBridge 189:f392fc9709a3 913 * Rising and falling edge triggers can be set for
AnnaBridge 189:f392fc9709a3 914 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 189:f392fc9709a3 915 * condition.
AnnaBridge 189:f392fc9709a3 916 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
AnnaBridge 189:f392fc9709a3 917 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 918 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 919 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 920 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 921 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 922 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 923 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 924 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 925 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 926 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 927 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 928 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 929 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 930 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 931 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 932 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 933 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 934 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 935 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 936 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 937 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 938 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 939 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 940 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 941 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 942 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 943 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 944 * @retval None
AnnaBridge 189:f392fc9709a3 945 */
AnnaBridge 189:f392fc9709a3 946 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 947 {
AnnaBridge 189:f392fc9709a3 948 SET_BIT(EXTI->FTSR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 949 }
AnnaBridge 189:f392fc9709a3 950
AnnaBridge 189:f392fc9709a3 951 /**
AnnaBridge 189:f392fc9709a3 952 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 953 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 189:f392fc9709a3 954 * generated on these lines. If a Falling edge on a configurable interrupt
AnnaBridge 189:f392fc9709a3 955 * line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge 189:f392fc9709a3 956 * pending bit is not set.
AnnaBridge 189:f392fc9709a3 957 * Rising and falling edge triggers can be set for
AnnaBridge 189:f392fc9709a3 958 * the same interrupt line. In this case, both generate a trigger
AnnaBridge 189:f392fc9709a3 959 * condition.
AnnaBridge 189:f392fc9709a3 960 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
AnnaBridge 189:f392fc9709a3 961 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 962 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 963 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 964 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 965 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 966 * @retval None
AnnaBridge 189:f392fc9709a3 967 */
AnnaBridge 189:f392fc9709a3 968 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 969 {
AnnaBridge 189:f392fc9709a3 970 SET_BIT(EXTI->FTSR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 971 }
AnnaBridge 189:f392fc9709a3 972
AnnaBridge 189:f392fc9709a3 973 /**
AnnaBridge 189:f392fc9709a3 974 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 975 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 189:f392fc9709a3 976 * generated on these lines. If a Falling edge on a configurable interrupt
AnnaBridge 189:f392fc9709a3 977 * line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge 189:f392fc9709a3 978 * pending bit is not set.
AnnaBridge 189:f392fc9709a3 979 * Rising and falling edge triggers can be set for the same interrupt line.
AnnaBridge 189:f392fc9709a3 980 * In this case, both generate a trigger condition.
AnnaBridge 189:f392fc9709a3 981 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
AnnaBridge 189:f392fc9709a3 982 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 983 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 984 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 985 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 986 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 987 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 988 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 989 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 990 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 991 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 992 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 993 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 994 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 995 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 996 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 997 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 998 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 999 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 1000 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 1001 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 1002 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 1003 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 1004 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 1005 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 1006 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 1007 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 1008 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 1009 * @retval None
AnnaBridge 189:f392fc9709a3 1010 */
AnnaBridge 189:f392fc9709a3 1011 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1012 {
AnnaBridge 189:f392fc9709a3 1013 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 1014 }
AnnaBridge 189:f392fc9709a3 1015
AnnaBridge 189:f392fc9709a3 1016 /**
AnnaBridge 189:f392fc9709a3 1017 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 1018 * @note The configurable wakeup lines are edge-triggered. No glitch must be
AnnaBridge 189:f392fc9709a3 1019 * generated on these lines. If a Falling edge on a configurable interrupt
AnnaBridge 189:f392fc9709a3 1020 * line occurs during a write operation in the EXTI_FTSR register, the
AnnaBridge 189:f392fc9709a3 1021 * pending bit is not set.
AnnaBridge 189:f392fc9709a3 1022 * Rising and falling edge triggers can be set for the same interrupt line.
AnnaBridge 189:f392fc9709a3 1023 * In this case, both generate a trigger condition.
AnnaBridge 189:f392fc9709a3 1024 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
AnnaBridge 189:f392fc9709a3 1025 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1026 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 1027 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 1028 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 1029 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 1030 * @retval None
AnnaBridge 189:f392fc9709a3 1031 */
AnnaBridge 189:f392fc9709a3 1032 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1033 {
AnnaBridge 189:f392fc9709a3 1034 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 1035 }
AnnaBridge 189:f392fc9709a3 1036
AnnaBridge 189:f392fc9709a3 1037 /**
AnnaBridge 189:f392fc9709a3 1038 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 1039 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
AnnaBridge 189:f392fc9709a3 1040 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1041 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 1042 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 1043 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 1044 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 1045 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 1046 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 1047 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 1048 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 1049 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 1050 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 1051 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 1052 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 1053 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 1054 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 1055 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 1056 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 1057 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 1058 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 1059 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 1060 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 1061 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 1062 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 1063 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 1064 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 1065 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 1066 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 1067 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1068 */
AnnaBridge 189:f392fc9709a3 1069 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1070 {
AnnaBridge 189:f392fc9709a3 1071 return (READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 1072 }
AnnaBridge 189:f392fc9709a3 1073
AnnaBridge 189:f392fc9709a3 1074 /**
AnnaBridge 189:f392fc9709a3 1075 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 1076 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
AnnaBridge 189:f392fc9709a3 1077 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1078 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 1079 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 1080 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 1081 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 1082 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1083 */
AnnaBridge 189:f392fc9709a3 1084 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1085 {
AnnaBridge 189:f392fc9709a3 1086 return (READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 1087 }
AnnaBridge 189:f392fc9709a3 1088
AnnaBridge 189:f392fc9709a3 1089 /**
AnnaBridge 189:f392fc9709a3 1090 * @}
AnnaBridge 189:f392fc9709a3 1091 */
AnnaBridge 189:f392fc9709a3 1092
AnnaBridge 189:f392fc9709a3 1093 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
AnnaBridge 189:f392fc9709a3 1094 * @{
AnnaBridge 189:f392fc9709a3 1095 */
AnnaBridge 189:f392fc9709a3 1096
AnnaBridge 189:f392fc9709a3 1097 /**
AnnaBridge 189:f392fc9709a3 1098 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 1099 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
AnnaBridge 189:f392fc9709a3 1100 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
AnnaBridge 189:f392fc9709a3 1101 * resulting in an interrupt request generation.
AnnaBridge 189:f392fc9709a3 1102 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
AnnaBridge 189:f392fc9709a3 1103 * register (by writing a 1 into the bit)
AnnaBridge 189:f392fc9709a3 1104 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
AnnaBridge 189:f392fc9709a3 1105 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1106 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 1107 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 1108 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 1109 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 1110 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 1111 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 1112 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 1113 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 1114 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 1115 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 1116 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 1117 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 1118 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 1119 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 1120 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 1121 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 1122 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 1123 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 1124 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 1125 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 1126 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 1127 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 1128 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 1129 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 1130 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 1131 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 1132 * @retval None
AnnaBridge 189:f392fc9709a3 1133 */
AnnaBridge 189:f392fc9709a3 1134 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1135 {
AnnaBridge 189:f392fc9709a3 1136 SET_BIT(EXTI->SWIER1, ExtiLine);
AnnaBridge 189:f392fc9709a3 1137 }
AnnaBridge 189:f392fc9709a3 1138
AnnaBridge 189:f392fc9709a3 1139 /**
AnnaBridge 189:f392fc9709a3 1140 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 1141 * @note If the interrupt is enabled on this line inthe EXTI_IMR2, writing a 1 to
AnnaBridge 189:f392fc9709a3 1142 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
AnnaBridge 189:f392fc9709a3 1143 * resulting in an interrupt request generation.
AnnaBridge 189:f392fc9709a3 1144 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
AnnaBridge 189:f392fc9709a3 1145 * register (by writing a 1 into the bit)
AnnaBridge 189:f392fc9709a3 1146 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
AnnaBridge 189:f392fc9709a3 1147 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1148 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 1149 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 1150 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 1151 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 1152 * @retval None
AnnaBridge 189:f392fc9709a3 1153 */
AnnaBridge 189:f392fc9709a3 1154 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1155 {
AnnaBridge 189:f392fc9709a3 1156 SET_BIT(EXTI->SWIER2, ExtiLine);
AnnaBridge 189:f392fc9709a3 1157 }
AnnaBridge 189:f392fc9709a3 1158
AnnaBridge 189:f392fc9709a3 1159 /**
AnnaBridge 189:f392fc9709a3 1160 * @}
AnnaBridge 189:f392fc9709a3 1161 */
AnnaBridge 189:f392fc9709a3 1162
AnnaBridge 189:f392fc9709a3 1163 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
AnnaBridge 189:f392fc9709a3 1164 * @{
AnnaBridge 189:f392fc9709a3 1165 */
AnnaBridge 189:f392fc9709a3 1166
AnnaBridge 189:f392fc9709a3 1167 /**
AnnaBridge 189:f392fc9709a3 1168 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 1169 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 189:f392fc9709a3 1170 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 189:f392fc9709a3 1171 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
AnnaBridge 189:f392fc9709a3 1172 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1173 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 1174 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 1175 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 1176 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 1177 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 1178 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 1179 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 1180 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 1181 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 1182 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 1183 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 1184 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 1185 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 1186 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 1187 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 1188 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 1189 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 1190 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 1191 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 1192 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 1193 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 1194 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 1195 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 1196 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 1197 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 1198 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 1199 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1200 */
AnnaBridge 189:f392fc9709a3 1201 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1202 {
AnnaBridge 189:f392fc9709a3 1203 return (READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 1204 }
AnnaBridge 189:f392fc9709a3 1205
AnnaBridge 189:f392fc9709a3 1206 /**
AnnaBridge 189:f392fc9709a3 1207 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 1208 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 189:f392fc9709a3 1209 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 189:f392fc9709a3 1210 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
AnnaBridge 189:f392fc9709a3 1211 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1212 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 1213 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 1214 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 1215 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 1216 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 1217 */
AnnaBridge 189:f392fc9709a3 1218 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1219 {
AnnaBridge 189:f392fc9709a3 1220 return (READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine));
AnnaBridge 189:f392fc9709a3 1221 }
AnnaBridge 189:f392fc9709a3 1222
AnnaBridge 189:f392fc9709a3 1223 /**
AnnaBridge 189:f392fc9709a3 1224 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 1225 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 189:f392fc9709a3 1226 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 189:f392fc9709a3 1227 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
AnnaBridge 189:f392fc9709a3 1228 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1229 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 1230 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 1231 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 1232 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 1233 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 1234 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 1235 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 1236 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 1237 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 1238 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 1239 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 1240 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 1241 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 1242 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 1243 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 1244 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 1245 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 1246 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 1247 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 1248 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 1249 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 1250 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 1251 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 1252 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 1253 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 1254 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 1255 * @retval @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 189:f392fc9709a3 1256 */
AnnaBridge 189:f392fc9709a3 1257 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1258 {
AnnaBridge 189:f392fc9709a3 1259 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
AnnaBridge 189:f392fc9709a3 1260 }
AnnaBridge 189:f392fc9709a3 1261
AnnaBridge 189:f392fc9709a3 1262
AnnaBridge 189:f392fc9709a3 1263 /**
AnnaBridge 189:f392fc9709a3 1264 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 1265 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 189:f392fc9709a3 1266 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 189:f392fc9709a3 1267 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
AnnaBridge 189:f392fc9709a3 1268 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1269 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 1270 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 1271 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 1272 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 1273 * @retval @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 189:f392fc9709a3 1274 */
AnnaBridge 189:f392fc9709a3 1275 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1276 {
AnnaBridge 189:f392fc9709a3 1277 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
AnnaBridge 189:f392fc9709a3 1278 }
AnnaBridge 189:f392fc9709a3 1279
AnnaBridge 189:f392fc9709a3 1280 /**
AnnaBridge 189:f392fc9709a3 1281 * @brief Clear ExtLine Flags for Lines in range 0 to 31
AnnaBridge 189:f392fc9709a3 1282 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 189:f392fc9709a3 1283 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 189:f392fc9709a3 1284 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
AnnaBridge 189:f392fc9709a3 1285 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1286 * @arg @ref LL_EXTI_LINE_0
AnnaBridge 189:f392fc9709a3 1287 * @arg @ref LL_EXTI_LINE_1
AnnaBridge 189:f392fc9709a3 1288 * @arg @ref LL_EXTI_LINE_2
AnnaBridge 189:f392fc9709a3 1289 * @arg @ref LL_EXTI_LINE_3
AnnaBridge 189:f392fc9709a3 1290 * @arg @ref LL_EXTI_LINE_4
AnnaBridge 189:f392fc9709a3 1291 * @arg @ref LL_EXTI_LINE_5
AnnaBridge 189:f392fc9709a3 1292 * @arg @ref LL_EXTI_LINE_6
AnnaBridge 189:f392fc9709a3 1293 * @arg @ref LL_EXTI_LINE_7
AnnaBridge 189:f392fc9709a3 1294 * @arg @ref LL_EXTI_LINE_8
AnnaBridge 189:f392fc9709a3 1295 * @arg @ref LL_EXTI_LINE_9
AnnaBridge 189:f392fc9709a3 1296 * @arg @ref LL_EXTI_LINE_10
AnnaBridge 189:f392fc9709a3 1297 * @arg @ref LL_EXTI_LINE_11
AnnaBridge 189:f392fc9709a3 1298 * @arg @ref LL_EXTI_LINE_12
AnnaBridge 189:f392fc9709a3 1299 * @arg @ref LL_EXTI_LINE_13
AnnaBridge 189:f392fc9709a3 1300 * @arg @ref LL_EXTI_LINE_14
AnnaBridge 189:f392fc9709a3 1301 * @arg @ref LL_EXTI_LINE_15
AnnaBridge 189:f392fc9709a3 1302 * @arg @ref LL_EXTI_LINE_16
AnnaBridge 189:f392fc9709a3 1303 * @arg @ref LL_EXTI_LINE_18
AnnaBridge 189:f392fc9709a3 1304 * @arg @ref LL_EXTI_LINE_19
AnnaBridge 189:f392fc9709a3 1305 * @arg @ref LL_EXTI_LINE_20
AnnaBridge 189:f392fc9709a3 1306 * @arg @ref LL_EXTI_LINE_21
AnnaBridge 189:f392fc9709a3 1307 * @arg @ref LL_EXTI_LINE_22
AnnaBridge 189:f392fc9709a3 1308 * @arg @ref LL_EXTI_LINE_29
AnnaBridge 189:f392fc9709a3 1309 * @arg @ref LL_EXTI_LINE_30
AnnaBridge 189:f392fc9709a3 1310 * @arg @ref LL_EXTI_LINE_31
AnnaBridge 189:f392fc9709a3 1311 * @note Please check each device line mapping for EXTI Line availability
AnnaBridge 189:f392fc9709a3 1312 * @retval None
AnnaBridge 189:f392fc9709a3 1313 */
AnnaBridge 189:f392fc9709a3 1314 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1315 {
AnnaBridge 189:f392fc9709a3 1316 WRITE_REG(EXTI->PR1, ExtiLine);
AnnaBridge 189:f392fc9709a3 1317 }
AnnaBridge 189:f392fc9709a3 1318
AnnaBridge 189:f392fc9709a3 1319 /**
AnnaBridge 189:f392fc9709a3 1320 * @brief Clear ExtLine Flags for Lines in range 32 to 63
AnnaBridge 189:f392fc9709a3 1321 * @note This bit is set when the selected edge event arrives on the interrupt
AnnaBridge 189:f392fc9709a3 1322 * line. This bit is cleared by writing a 1 to the bit.
AnnaBridge 189:f392fc9709a3 1323 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
AnnaBridge 189:f392fc9709a3 1324 * @param ExtiLine This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 1325 * @arg @ref LL_EXTI_LINE_35
AnnaBridge 189:f392fc9709a3 1326 * @arg @ref LL_EXTI_LINE_36
AnnaBridge 189:f392fc9709a3 1327 * @arg @ref LL_EXTI_LINE_37
AnnaBridge 189:f392fc9709a3 1328 * @arg @ref LL_EXTI_LINE_38
AnnaBridge 189:f392fc9709a3 1329 * @retval None
AnnaBridge 189:f392fc9709a3 1330 */
AnnaBridge 189:f392fc9709a3 1331 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
AnnaBridge 189:f392fc9709a3 1332 {
AnnaBridge 189:f392fc9709a3 1333 WRITE_REG(EXTI->PR2, ExtiLine);
AnnaBridge 189:f392fc9709a3 1334 }
AnnaBridge 189:f392fc9709a3 1335
AnnaBridge 189:f392fc9709a3 1336 /**
AnnaBridge 189:f392fc9709a3 1337 * @}
AnnaBridge 189:f392fc9709a3 1338 */
AnnaBridge 189:f392fc9709a3 1339
AnnaBridge 189:f392fc9709a3 1340 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 189:f392fc9709a3 1341 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 189:f392fc9709a3 1342 * @{
AnnaBridge 189:f392fc9709a3 1343 */
AnnaBridge 189:f392fc9709a3 1344
AnnaBridge 189:f392fc9709a3 1345 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
AnnaBridge 189:f392fc9709a3 1346 uint32_t LL_EXTI_DeInit(void);
AnnaBridge 189:f392fc9709a3 1347 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
AnnaBridge 189:f392fc9709a3 1348
AnnaBridge 189:f392fc9709a3 1349
AnnaBridge 189:f392fc9709a3 1350 /**
AnnaBridge 189:f392fc9709a3 1351 * @}
AnnaBridge 189:f392fc9709a3 1352 */
AnnaBridge 189:f392fc9709a3 1353 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 189:f392fc9709a3 1354
AnnaBridge 189:f392fc9709a3 1355 /**
AnnaBridge 189:f392fc9709a3 1356 * @}
AnnaBridge 189:f392fc9709a3 1357 */
AnnaBridge 189:f392fc9709a3 1358
AnnaBridge 189:f392fc9709a3 1359 /**
AnnaBridge 189:f392fc9709a3 1360 * @}
AnnaBridge 189:f392fc9709a3 1361 */
AnnaBridge 189:f392fc9709a3 1362
AnnaBridge 189:f392fc9709a3 1363 #endif /* EXTI */
AnnaBridge 189:f392fc9709a3 1364
AnnaBridge 189:f392fc9709a3 1365 /**
AnnaBridge 189:f392fc9709a3 1366 * @}
AnnaBridge 189:f392fc9709a3 1367 */
AnnaBridge 189:f392fc9709a3 1368
AnnaBridge 189:f392fc9709a3 1369 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 1370 }
AnnaBridge 189:f392fc9709a3 1371 #endif
AnnaBridge 189:f392fc9709a3 1372
AnnaBridge 189:f392fc9709a3 1373 #endif /* __STM32L4xx_LL_EXTI_H */
AnnaBridge 189:f392fc9709a3 1374
AnnaBridge 189:f392fc9709a3 1375 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/