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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_ARM_STD/stm32l4xx_hal_usart_ex.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @file stm32l4xx_hal_usart_ex.h |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @author MCD Application Team |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @brief Header file of USART HAL Extended module. |
| AnnaBridge | 189:f392fc9709a3 | 6 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 7 | * @attention |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 20 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 21 | * |
| AnnaBridge | 189:f392fc9709a3 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 32 | * |
| AnnaBridge | 189:f392fc9709a3 | 33 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 34 | */ |
| AnnaBridge | 189:f392fc9709a3 | 35 | |
| AnnaBridge | 189:f392fc9709a3 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | #ifndef __STM32L4xx_HAL_USART_EX_H |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __STM32L4xx_HAL_USART_EX_H |
| AnnaBridge | 189:f392fc9709a3 | 39 | |
| AnnaBridge | 189:f392fc9709a3 | 40 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 41 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 42 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 45 | #include "stm32l4xx_hal_def.h" |
| AnnaBridge | 189:f392fc9709a3 | 46 | |
| AnnaBridge | 189:f392fc9709a3 | 47 | /** @addtogroup STM32L4xx_HAL_Driver |
| AnnaBridge | 189:f392fc9709a3 | 48 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 49 | */ |
| AnnaBridge | 189:f392fc9709a3 | 50 | |
| AnnaBridge | 189:f392fc9709a3 | 51 | /** @addtogroup USARTEx |
| AnnaBridge | 189:f392fc9709a3 | 52 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 53 | */ |
| AnnaBridge | 189:f392fc9709a3 | 54 | |
| AnnaBridge | 189:f392fc9709a3 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 56 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 57 | /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants |
| AnnaBridge | 189:f392fc9709a3 | 58 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 59 | */ |
| AnnaBridge | 189:f392fc9709a3 | 60 | |
| AnnaBridge | 189:f392fc9709a3 | 61 | /** @defgroup USARTEx_Word_Length USARTEx Word Length |
| AnnaBridge | 189:f392fc9709a3 | 62 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 63 | */ |
| AnnaBridge | 189:f392fc9709a3 | 64 | #define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */ |
| AnnaBridge | 189:f392fc9709a3 | 65 | #define USART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long USART frame */ |
| AnnaBridge | 189:f392fc9709a3 | 66 | #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */ |
| AnnaBridge | 189:f392fc9709a3 | 67 | /** |
| AnnaBridge | 189:f392fc9709a3 | 68 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 69 | */ |
| AnnaBridge | 189:f392fc9709a3 | 70 | |
| AnnaBridge | 189:f392fc9709a3 | 71 | #if defined(USART_CR2_SLVEN) |
| AnnaBridge | 189:f392fc9709a3 | 72 | /** @defgroup USARTEx_Slave_Select_management USARTEx Slave Select Management |
| AnnaBridge | 189:f392fc9709a3 | 73 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 74 | */ |
| AnnaBridge | 189:f392fc9709a3 | 75 | #define USART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */ |
| AnnaBridge | 189:f392fc9709a3 | 76 | #define USART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */ |
| AnnaBridge | 189:f392fc9709a3 | 77 | /** |
| AnnaBridge | 189:f392fc9709a3 | 78 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 79 | */ |
| AnnaBridge | 189:f392fc9709a3 | 80 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 81 | |
| AnnaBridge | 189:f392fc9709a3 | 82 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 83 | /** @defgroup USARTEx_TXFIFO_threshold_level USARTEx TXFIFO threshold level |
| AnnaBridge | 189:f392fc9709a3 | 84 | * @brief USART TXFIFO level |
| AnnaBridge | 189:f392fc9709a3 | 85 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 86 | */ |
| AnnaBridge | 189:f392fc9709a3 | 87 | #define USART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 88 | #define USART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 89 | #define USART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 90 | #define USART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 91 | #define USART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 92 | #define USART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ |
| AnnaBridge | 189:f392fc9709a3 | 93 | /** |
| AnnaBridge | 189:f392fc9709a3 | 94 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 95 | */ |
| AnnaBridge | 189:f392fc9709a3 | 96 | |
| AnnaBridge | 189:f392fc9709a3 | 97 | /** @defgroup USARTEx_RXFIFO_threshold_level USARTEx RXFIFO threshold level |
| AnnaBridge | 189:f392fc9709a3 | 98 | * @brief USART RXFIFO level |
| AnnaBridge | 189:f392fc9709a3 | 99 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 100 | */ |
| AnnaBridge | 189:f392fc9709a3 | 101 | #define USART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 102 | #define USART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 103 | #define USART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 104 | #define USART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 105 | #define USART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ |
| AnnaBridge | 189:f392fc9709a3 | 106 | #define USART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ |
| AnnaBridge | 189:f392fc9709a3 | 107 | /** |
| AnnaBridge | 189:f392fc9709a3 | 108 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 109 | */ |
| AnnaBridge | 189:f392fc9709a3 | 110 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 111 | |
| AnnaBridge | 189:f392fc9709a3 | 112 | /** |
| AnnaBridge | 189:f392fc9709a3 | 113 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 114 | */ |
| AnnaBridge | 189:f392fc9709a3 | 115 | |
| AnnaBridge | 189:f392fc9709a3 | 116 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 117 | /** @defgroup USARTEx_Private_Constants USARTEx Private Constants |
| AnnaBridge | 189:f392fc9709a3 | 118 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 119 | */ |
| AnnaBridge | 189:f392fc9709a3 | 120 | #if defined(USART_CR2_SLVEN) |
| AnnaBridge | 189:f392fc9709a3 | 121 | /** @defgroup USARTEx_Slave_Mode USARTEx Synchronous Slave mode |
| AnnaBridge | 189:f392fc9709a3 | 122 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 123 | */ |
| AnnaBridge | 189:f392fc9709a3 | 124 | #define USART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */ |
| AnnaBridge | 189:f392fc9709a3 | 125 | #define USART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */ |
| AnnaBridge | 189:f392fc9709a3 | 126 | /** |
| AnnaBridge | 189:f392fc9709a3 | 127 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 128 | */ |
| AnnaBridge | 189:f392fc9709a3 | 129 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 130 | |
| AnnaBridge | 189:f392fc9709a3 | 131 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 132 | /** @defgroup USARTEx_FIFO_mode USARTEx FIFO mode |
| AnnaBridge | 189:f392fc9709a3 | 133 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 134 | */ |
| AnnaBridge | 189:f392fc9709a3 | 135 | #define USART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ |
| AnnaBridge | 189:f392fc9709a3 | 136 | #define USART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ |
| AnnaBridge | 189:f392fc9709a3 | 137 | /** |
| AnnaBridge | 189:f392fc9709a3 | 138 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 139 | */ |
| AnnaBridge | 189:f392fc9709a3 | 140 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 141 | /** |
| AnnaBridge | 189:f392fc9709a3 | 142 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 143 | */ |
| AnnaBridge | 189:f392fc9709a3 | 144 | |
| AnnaBridge | 189:f392fc9709a3 | 145 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 146 | /** @defgroup USARTEx_Private_Macros USARTEx Private Macros |
| AnnaBridge | 189:f392fc9709a3 | 147 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 148 | */ |
| AnnaBridge | 189:f392fc9709a3 | 149 | |
| AnnaBridge | 189:f392fc9709a3 | 150 | /** @brief Report the USART clock source. |
| AnnaBridge | 189:f392fc9709a3 | 151 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 189:f392fc9709a3 | 152 | * @param __CLOCKSOURCE__: output variable. |
| AnnaBridge | 189:f392fc9709a3 | 153 | * @retval the USART clocking source, written in __CLOCKSOURCE__. |
| AnnaBridge | 189:f392fc9709a3 | 154 | */ |
| AnnaBridge | 189:f392fc9709a3 | 155 | #if defined (STM32L432xx) || defined (STM32L442xx) |
| AnnaBridge | 189:f392fc9709a3 | 156 | #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 157 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 158 | if((__HANDLE__)->Instance == USART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 159 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 160 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 161 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 162 | case RCC_USART1CLKSOURCE_PCLK2: \ |
| AnnaBridge | 189:f392fc9709a3 | 163 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ |
| AnnaBridge | 189:f392fc9709a3 | 164 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 165 | case RCC_USART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 166 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 167 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 168 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 169 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 170 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 171 | case RCC_USART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 172 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 173 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 174 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 175 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 176 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 177 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 178 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 179 | else if((__HANDLE__)->Instance == USART2) \ |
| AnnaBridge | 189:f392fc9709a3 | 180 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 181 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 182 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 183 | case RCC_USART2CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 184 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 185 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 186 | case RCC_USART2CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 187 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 188 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 189 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 190 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 191 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 192 | case RCC_USART2CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 193 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 194 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 195 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 196 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 197 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 198 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 199 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 200 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 201 | #else |
| AnnaBridge | 189:f392fc9709a3 | 202 | #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 203 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 204 | if((__HANDLE__)->Instance == USART1) \ |
| AnnaBridge | 189:f392fc9709a3 | 205 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 206 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 207 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 208 | case RCC_USART1CLKSOURCE_PCLK2: \ |
| AnnaBridge | 189:f392fc9709a3 | 209 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ |
| AnnaBridge | 189:f392fc9709a3 | 210 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 211 | case RCC_USART1CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 212 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 213 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 214 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 215 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 216 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 217 | case RCC_USART1CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 218 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 219 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 220 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 221 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 222 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 223 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 224 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 225 | else if((__HANDLE__)->Instance == USART2) \ |
| AnnaBridge | 189:f392fc9709a3 | 226 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 227 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 228 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 229 | case RCC_USART2CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 230 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 231 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 232 | case RCC_USART2CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 233 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 234 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 235 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 236 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 237 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 238 | case RCC_USART2CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 239 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 240 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 241 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 242 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 243 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 244 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 245 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 246 | else if((__HANDLE__)->Instance == USART3) \ |
| AnnaBridge | 189:f392fc9709a3 | 247 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 248 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ |
| AnnaBridge | 189:f392fc9709a3 | 249 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 250 | case RCC_USART3CLKSOURCE_PCLK1: \ |
| AnnaBridge | 189:f392fc9709a3 | 251 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ |
| AnnaBridge | 189:f392fc9709a3 | 252 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 253 | case RCC_USART3CLKSOURCE_HSI: \ |
| AnnaBridge | 189:f392fc9709a3 | 254 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ |
| AnnaBridge | 189:f392fc9709a3 | 255 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 256 | case RCC_USART3CLKSOURCE_SYSCLK: \ |
| AnnaBridge | 189:f392fc9709a3 | 257 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ |
| AnnaBridge | 189:f392fc9709a3 | 258 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 259 | case RCC_USART3CLKSOURCE_LSE: \ |
| AnnaBridge | 189:f392fc9709a3 | 260 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ |
| AnnaBridge | 189:f392fc9709a3 | 261 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 262 | default: \ |
| AnnaBridge | 189:f392fc9709a3 | 263 | (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ |
| AnnaBridge | 189:f392fc9709a3 | 264 | break; \ |
| AnnaBridge | 189:f392fc9709a3 | 265 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 266 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 267 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 268 | #endif /* STM32L432xx || STM32L442xx */ |
| AnnaBridge | 189:f392fc9709a3 | 269 | |
| AnnaBridge | 189:f392fc9709a3 | 270 | /** @brief Compute the USART mask to apply to retrieve the received data |
| AnnaBridge | 189:f392fc9709a3 | 271 | * according to the word length and to the parity bits activation. |
| AnnaBridge | 189:f392fc9709a3 | 272 | * @note If PCE = 1, the parity bit is not included in the data extracted |
| AnnaBridge | 189:f392fc9709a3 | 273 | * by the reception API(). |
| AnnaBridge | 189:f392fc9709a3 | 274 | * This masking operation is not carried out in the case of |
| AnnaBridge | 189:f392fc9709a3 | 275 | * DMA transfers. |
| AnnaBridge | 189:f392fc9709a3 | 276 | * @param __HANDLE__ specifies the USART Handle. |
| AnnaBridge | 189:f392fc9709a3 | 277 | * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field. |
| AnnaBridge | 189:f392fc9709a3 | 278 | */ |
| AnnaBridge | 189:f392fc9709a3 | 279 | #define USART_MASK_COMPUTATION(__HANDLE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 280 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 281 | if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \ |
| AnnaBridge | 189:f392fc9709a3 | 282 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 283 | if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 284 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 285 | (__HANDLE__)->Mask = 0x01FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 286 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 287 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 288 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 289 | (__HANDLE__)->Mask = 0x00FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 290 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 291 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 292 | else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \ |
| AnnaBridge | 189:f392fc9709a3 | 293 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 294 | if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 295 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 296 | (__HANDLE__)->Mask = 0x00FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 297 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 298 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 299 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 300 | (__HANDLE__)->Mask = 0x007F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 301 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 302 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 303 | else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \ |
| AnnaBridge | 189:f392fc9709a3 | 304 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 305 | if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 306 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 307 | (__HANDLE__)->Mask = 0x007F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 308 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 309 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 310 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 311 | (__HANDLE__)->Mask = 0x003F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 312 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 313 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 314 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 315 | |
| AnnaBridge | 189:f392fc9709a3 | 316 | |
| AnnaBridge | 189:f392fc9709a3 | 317 | /** |
| AnnaBridge | 189:f392fc9709a3 | 318 | * @brief Ensure that USART frame length is valid. |
| AnnaBridge | 189:f392fc9709a3 | 319 | * @param __LENGTH__ USART frame length. |
| AnnaBridge | 189:f392fc9709a3 | 320 | * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 321 | */ |
| AnnaBridge | 189:f392fc9709a3 | 322 | #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \ |
| AnnaBridge | 189:f392fc9709a3 | 323 | ((__LENGTH__) == USART_WORDLENGTH_8B) || \ |
| AnnaBridge | 189:f392fc9709a3 | 324 | ((__LENGTH__) == USART_WORDLENGTH_9B)) |
| AnnaBridge | 189:f392fc9709a3 | 325 | #if defined(USART_CR2_SLVEN) |
| AnnaBridge | 189:f392fc9709a3 | 326 | /** |
| AnnaBridge | 189:f392fc9709a3 | 327 | * @brief Ensure that USART Negative Slave Select (NSS) pin management is valid. |
| AnnaBridge | 189:f392fc9709a3 | 328 | * @param __NSS__ USART Negative Slave Select pin management. |
| AnnaBridge | 189:f392fc9709a3 | 329 | * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 330 | */ |
| AnnaBridge | 189:f392fc9709a3 | 331 | #define IS_USART_NSS(__NSS__) (((__NSS__) == USART_NSS_HARD) || \ |
| AnnaBridge | 189:f392fc9709a3 | 332 | ((__NSS__) == USART_NSS_SOFT)) |
| AnnaBridge | 189:f392fc9709a3 | 333 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 334 | |
| AnnaBridge | 189:f392fc9709a3 | 335 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 336 | /** |
| AnnaBridge | 189:f392fc9709a3 | 337 | * @brief Ensure that USART TXFIFO threshold level is valid. |
| AnnaBridge | 189:f392fc9709a3 | 338 | * @param __THRESHOLD__ USART TXFIFO threshold level. |
| AnnaBridge | 189:f392fc9709a3 | 339 | * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 340 | */ |
| AnnaBridge | 189:f392fc9709a3 | 341 | #define IS_USART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 342 | ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 343 | ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_2) || \ |
| AnnaBridge | 189:f392fc9709a3 | 344 | ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_3_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 345 | ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_7_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 346 | ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_8_8)) |
| AnnaBridge | 189:f392fc9709a3 | 347 | |
| AnnaBridge | 189:f392fc9709a3 | 348 | /** |
| AnnaBridge | 189:f392fc9709a3 | 349 | * @brief Ensure that USART RXFIFO threshold level is valid. |
| AnnaBridge | 189:f392fc9709a3 | 350 | * @param __THRESHOLD__ USART RXFIFO threshold level. |
| AnnaBridge | 189:f392fc9709a3 | 351 | * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 352 | */ |
| AnnaBridge | 189:f392fc9709a3 | 353 | #define IS_USART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 354 | ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 355 | ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_2) || \ |
| AnnaBridge | 189:f392fc9709a3 | 356 | ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_3_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 357 | ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_7_8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 358 | ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_8_8)) |
| AnnaBridge | 189:f392fc9709a3 | 359 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 360 | |
| AnnaBridge | 189:f392fc9709a3 | 361 | /** |
| AnnaBridge | 189:f392fc9709a3 | 362 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 363 | */ |
| AnnaBridge | 189:f392fc9709a3 | 364 | |
| AnnaBridge | 189:f392fc9709a3 | 365 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 366 | /** @addtogroup USARTEx_Exported_Functions |
| AnnaBridge | 189:f392fc9709a3 | 367 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 368 | */ |
| AnnaBridge | 189:f392fc9709a3 | 369 | |
| AnnaBridge | 189:f392fc9709a3 | 370 | /** @addtogroup USARTEx_Exported_Functions_Group2 |
| AnnaBridge | 189:f392fc9709a3 | 371 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 372 | */ |
| AnnaBridge | 189:f392fc9709a3 | 373 | |
| AnnaBridge | 189:f392fc9709a3 | 374 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 375 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 376 | void HAL_USARTEx_RxFifoFullCallback(USART_HandleTypeDef *husart); |
| AnnaBridge | 189:f392fc9709a3 | 377 | void HAL_USARTEx_TxFifoEmptyCallback(USART_HandleTypeDef *husart); |
| AnnaBridge | 189:f392fc9709a3 | 378 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 379 | |
| AnnaBridge | 189:f392fc9709a3 | 380 | /** |
| AnnaBridge | 189:f392fc9709a3 | 381 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 382 | */ |
| AnnaBridge | 189:f392fc9709a3 | 383 | |
| AnnaBridge | 189:f392fc9709a3 | 384 | /** @addtogroup USARTEx_Exported_Functions_Group3 |
| AnnaBridge | 189:f392fc9709a3 | 385 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 386 | */ |
| AnnaBridge | 189:f392fc9709a3 | 387 | |
| AnnaBridge | 189:f392fc9709a3 | 388 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 389 | #if defined(USART_CR2_SLVEN) |
| AnnaBridge | 189:f392fc9709a3 | 390 | HAL_StatusTypeDef HAL_USARTEx_EnableSlaveMode(USART_HandleTypeDef *husart); |
| AnnaBridge | 189:f392fc9709a3 | 391 | HAL_StatusTypeDef HAL_USARTEx_DisableSlaveMode(USART_HandleTypeDef *husart); |
| AnnaBridge | 189:f392fc9709a3 | 392 | HAL_StatusTypeDef HAL_USARTEx_ConfigNSS(USART_HandleTypeDef *husart, uint32_t NSSConfig); |
| AnnaBridge | 189:f392fc9709a3 | 393 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 394 | |
| AnnaBridge | 189:f392fc9709a3 | 395 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 396 | HAL_StatusTypeDef HAL_USARTEx_EnableFifoMode(USART_HandleTypeDef *husart); |
| AnnaBridge | 189:f392fc9709a3 | 397 | HAL_StatusTypeDef HAL_USARTEx_DisableFifoMode(USART_HandleTypeDef *husart); |
| AnnaBridge | 189:f392fc9709a3 | 398 | HAL_StatusTypeDef HAL_USARTEx_SetTxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); |
| AnnaBridge | 189:f392fc9709a3 | 399 | HAL_StatusTypeDef HAL_USARTEx_SetRxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); |
| AnnaBridge | 189:f392fc9709a3 | 400 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 401 | |
| AnnaBridge | 189:f392fc9709a3 | 402 | /** |
| AnnaBridge | 189:f392fc9709a3 | 403 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 404 | */ |
| AnnaBridge | 189:f392fc9709a3 | 405 | |
| AnnaBridge | 189:f392fc9709a3 | 406 | /** |
| AnnaBridge | 189:f392fc9709a3 | 407 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 408 | */ |
| AnnaBridge | 189:f392fc9709a3 | 409 | |
| AnnaBridge | 189:f392fc9709a3 | 410 | /** |
| AnnaBridge | 189:f392fc9709a3 | 411 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 412 | */ |
| AnnaBridge | 189:f392fc9709a3 | 413 | |
| AnnaBridge | 189:f392fc9709a3 | 414 | /** |
| AnnaBridge | 189:f392fc9709a3 | 415 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 416 | */ |
| AnnaBridge | 189:f392fc9709a3 | 417 | |
| AnnaBridge | 189:f392fc9709a3 | 418 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 419 | } |
| AnnaBridge | 189:f392fc9709a3 | 420 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 421 | |
| AnnaBridge | 189:f392fc9709a3 | 422 | #endif /* __STM32L4xx_HAL_USART_EX_H */ |
| AnnaBridge | 189:f392fc9709a3 | 423 | |
| AnnaBridge | 189:f392fc9709a3 | 424 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
