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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_ARM_STD/stm32l4xx_hal_lptim.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @file stm32l4xx_hal_lptim.h |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @author MCD Application Team |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @brief Header file of LPTIM HAL module. |
| AnnaBridge | 189:f392fc9709a3 | 6 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 7 | * @attention |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 20 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 21 | * |
| AnnaBridge | 189:f392fc9709a3 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 32 | * |
| AnnaBridge | 189:f392fc9709a3 | 33 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 34 | */ |
| AnnaBridge | 189:f392fc9709a3 | 35 | |
| AnnaBridge | 189:f392fc9709a3 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | #ifndef __STM32L4xx_HAL_LPTIM_H |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __STM32L4xx_HAL_LPTIM_H |
| AnnaBridge | 189:f392fc9709a3 | 39 | |
| AnnaBridge | 189:f392fc9709a3 | 40 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 41 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 42 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 45 | #include "stm32l4xx_hal_def.h" |
| AnnaBridge | 189:f392fc9709a3 | 46 | |
| AnnaBridge | 189:f392fc9709a3 | 47 | /** @addtogroup STM32L4xx_HAL_Driver |
| AnnaBridge | 189:f392fc9709a3 | 48 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 49 | */ |
| AnnaBridge | 189:f392fc9709a3 | 50 | |
| AnnaBridge | 189:f392fc9709a3 | 51 | /** @addtogroup LPTIM |
| AnnaBridge | 189:f392fc9709a3 | 52 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 53 | */ |
| AnnaBridge | 189:f392fc9709a3 | 54 | |
| AnnaBridge | 189:f392fc9709a3 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 56 | /** @defgroup LPTIM_Exported_Types LPTIM Exported Types |
| AnnaBridge | 189:f392fc9709a3 | 57 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 58 | */ |
| AnnaBridge | 189:f392fc9709a3 | 59 | |
| AnnaBridge | 189:f392fc9709a3 | 60 | /** |
| AnnaBridge | 189:f392fc9709a3 | 61 | * @brief LPTIM Clock configuration definition |
| AnnaBridge | 189:f392fc9709a3 | 62 | */ |
| AnnaBridge | 189:f392fc9709a3 | 63 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 64 | { |
| AnnaBridge | 189:f392fc9709a3 | 65 | uint32_t Source; /*!< Selects the clock source. |
| AnnaBridge | 189:f392fc9709a3 | 66 | This parameter can be a value of @ref LPTIM_Clock_Source */ |
| AnnaBridge | 189:f392fc9709a3 | 67 | |
| AnnaBridge | 189:f392fc9709a3 | 68 | uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. |
| AnnaBridge | 189:f392fc9709a3 | 69 | This parameter can be a value of @ref LPTIM_Clock_Prescaler */ |
| AnnaBridge | 189:f392fc9709a3 | 70 | |
| AnnaBridge | 189:f392fc9709a3 | 71 | }LPTIM_ClockConfigTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 72 | |
| AnnaBridge | 189:f392fc9709a3 | 73 | /** |
| AnnaBridge | 189:f392fc9709a3 | 74 | * @brief LPTIM Clock configuration definition |
| AnnaBridge | 189:f392fc9709a3 | 75 | */ |
| AnnaBridge | 189:f392fc9709a3 | 76 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 77 | { |
| AnnaBridge | 189:f392fc9709a3 | 78 | uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit |
| AnnaBridge | 189:f392fc9709a3 | 79 | if the ULPTIM input is selected. |
| AnnaBridge | 189:f392fc9709a3 | 80 | Note: This parameter is used only when Ultra low power clock source is used. |
| AnnaBridge | 189:f392fc9709a3 | 81 | Note: If the polarity is configured on 'both edges', an auxiliary clock |
| AnnaBridge | 189:f392fc9709a3 | 82 | (one of the Low power oscillator) must be active. |
| AnnaBridge | 189:f392fc9709a3 | 83 | This parameter can be a value of @ref LPTIM_Clock_Polarity */ |
| AnnaBridge | 189:f392fc9709a3 | 84 | |
| AnnaBridge | 189:f392fc9709a3 | 85 | uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. |
| AnnaBridge | 189:f392fc9709a3 | 86 | Note: This parameter is used only when Ultra low power clock source is used. |
| AnnaBridge | 189:f392fc9709a3 | 87 | This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ |
| AnnaBridge | 189:f392fc9709a3 | 88 | |
| AnnaBridge | 189:f392fc9709a3 | 89 | }LPTIM_ULPClockConfigTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 90 | |
| AnnaBridge | 189:f392fc9709a3 | 91 | /** |
| AnnaBridge | 189:f392fc9709a3 | 92 | * @brief LPTIM Trigger configuration definition |
| AnnaBridge | 189:f392fc9709a3 | 93 | */ |
| AnnaBridge | 189:f392fc9709a3 | 94 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 95 | { |
| AnnaBridge | 189:f392fc9709a3 | 96 | uint32_t Source; /*!< Selects the Trigger source. |
| AnnaBridge | 189:f392fc9709a3 | 97 | This parameter can be a value of @ref LPTIM_Trigger_Source */ |
| AnnaBridge | 189:f392fc9709a3 | 98 | |
| AnnaBridge | 189:f392fc9709a3 | 99 | uint32_t ActiveEdge; /*!< Selects the Trigger active edge. |
| AnnaBridge | 189:f392fc9709a3 | 100 | Note: This parameter is used only when an external trigger is used. |
| AnnaBridge | 189:f392fc9709a3 | 101 | This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ |
| AnnaBridge | 189:f392fc9709a3 | 102 | |
| AnnaBridge | 189:f392fc9709a3 | 103 | uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. |
| AnnaBridge | 189:f392fc9709a3 | 104 | Note: This parameter is used only when an external trigger is used. |
| AnnaBridge | 189:f392fc9709a3 | 105 | This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ |
| AnnaBridge | 189:f392fc9709a3 | 106 | }LPTIM_TriggerConfigTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 107 | |
| AnnaBridge | 189:f392fc9709a3 | 108 | /** |
| AnnaBridge | 189:f392fc9709a3 | 109 | * @brief LPTIM Initialization Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 110 | */ |
| AnnaBridge | 189:f392fc9709a3 | 111 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 112 | { |
| AnnaBridge | 189:f392fc9709a3 | 113 | LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 114 | |
| AnnaBridge | 189:f392fc9709a3 | 115 | LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 116 | |
| AnnaBridge | 189:f392fc9709a3 | 117 | LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 118 | |
| AnnaBridge | 189:f392fc9709a3 | 119 | uint32_t OutputPolarity; /*!< Specifies the Output polarity. |
| AnnaBridge | 189:f392fc9709a3 | 120 | This parameter can be a value of @ref LPTIM_Output_Polarity */ |
| AnnaBridge | 189:f392fc9709a3 | 121 | |
| AnnaBridge | 189:f392fc9709a3 | 122 | uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare |
| AnnaBridge | 189:f392fc9709a3 | 123 | values is done immediately or after the end of current period. |
| AnnaBridge | 189:f392fc9709a3 | 124 | This parameter can be a value of @ref LPTIM_Updating_Mode */ |
| AnnaBridge | 189:f392fc9709a3 | 125 | |
| AnnaBridge | 189:f392fc9709a3 | 126 | uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event |
| AnnaBridge | 189:f392fc9709a3 | 127 | or each external event. |
| AnnaBridge | 189:f392fc9709a3 | 128 | This parameter can be a value of @ref LPTIM_Counter_Source */ |
| AnnaBridge | 189:f392fc9709a3 | 129 | |
| AnnaBridge | 189:f392fc9709a3 | 130 | uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). |
| AnnaBridge | 189:f392fc9709a3 | 131 | This parameter can be a value of @ref LPTIM_Input1_Source */ |
| AnnaBridge | 189:f392fc9709a3 | 132 | |
| AnnaBridge | 189:f392fc9709a3 | 133 | uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). |
| AnnaBridge | 189:f392fc9709a3 | 134 | Note: This parameter is used only for encoder feature so is used only |
| AnnaBridge | 189:f392fc9709a3 | 135 | for LPTIM1 instance. |
| AnnaBridge | 189:f392fc9709a3 | 136 | This parameter can be a value of @ref LPTIM_Input2_Source */ |
| AnnaBridge | 189:f392fc9709a3 | 137 | |
| AnnaBridge | 189:f392fc9709a3 | 138 | }LPTIM_InitTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 139 | |
| AnnaBridge | 189:f392fc9709a3 | 140 | /** |
| AnnaBridge | 189:f392fc9709a3 | 141 | * @brief HAL LPTIM State structure definition |
| AnnaBridge | 189:f392fc9709a3 | 142 | */ |
| AnnaBridge | 189:f392fc9709a3 | 143 | typedef enum __HAL_LPTIM_StateTypeDef |
| AnnaBridge | 189:f392fc9709a3 | 144 | { |
| AnnaBridge | 189:f392fc9709a3 | 145 | HAL_LPTIM_STATE_RESET = 0x00, /*!< Peripheral not yet initialized or disabled */ |
| AnnaBridge | 189:f392fc9709a3 | 146 | HAL_LPTIM_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| AnnaBridge | 189:f392fc9709a3 | 147 | HAL_LPTIM_STATE_BUSY = 0x02, /*!< An internal process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 148 | HAL_LPTIM_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| AnnaBridge | 189:f392fc9709a3 | 149 | HAL_LPTIM_STATE_ERROR = 0x04 /*!< Internal Process is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 150 | }HAL_LPTIM_StateTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 151 | |
| AnnaBridge | 189:f392fc9709a3 | 152 | /** |
| AnnaBridge | 189:f392fc9709a3 | 153 | * @brief LPTIM handle Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 154 | */ |
| AnnaBridge | 189:f392fc9709a3 | 155 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 156 | { |
| AnnaBridge | 189:f392fc9709a3 | 157 | LPTIM_TypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 189:f392fc9709a3 | 158 | |
| AnnaBridge | 189:f392fc9709a3 | 159 | LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 160 | |
| AnnaBridge | 189:f392fc9709a3 | 161 | HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ |
| AnnaBridge | 189:f392fc9709a3 | 162 | |
| AnnaBridge | 189:f392fc9709a3 | 163 | HAL_LockTypeDef Lock; /*!< LPTIM locking object */ |
| AnnaBridge | 189:f392fc9709a3 | 164 | |
| AnnaBridge | 189:f392fc9709a3 | 165 | __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ |
| AnnaBridge | 189:f392fc9709a3 | 166 | |
| AnnaBridge | 189:f392fc9709a3 | 167 | }LPTIM_HandleTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 168 | |
| AnnaBridge | 189:f392fc9709a3 | 169 | /** |
| AnnaBridge | 189:f392fc9709a3 | 170 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 171 | */ |
| AnnaBridge | 189:f392fc9709a3 | 172 | |
| AnnaBridge | 189:f392fc9709a3 | 173 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 174 | /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants |
| AnnaBridge | 189:f392fc9709a3 | 175 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 176 | */ |
| AnnaBridge | 189:f392fc9709a3 | 177 | |
| AnnaBridge | 189:f392fc9709a3 | 178 | /** @defgroup LPTIM_Clock_Source LPTIM Clock Source |
| AnnaBridge | 189:f392fc9709a3 | 179 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 180 | */ |
| AnnaBridge | 189:f392fc9709a3 | 181 | #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00) |
| AnnaBridge | 189:f392fc9709a3 | 182 | #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL |
| AnnaBridge | 189:f392fc9709a3 | 183 | /** |
| AnnaBridge | 189:f392fc9709a3 | 184 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 185 | */ |
| AnnaBridge | 189:f392fc9709a3 | 186 | |
| AnnaBridge | 189:f392fc9709a3 | 187 | /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler |
| AnnaBridge | 189:f392fc9709a3 | 188 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 189 | */ |
| AnnaBridge | 189:f392fc9709a3 | 190 | #define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000) |
| AnnaBridge | 189:f392fc9709a3 | 191 | #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 |
| AnnaBridge | 189:f392fc9709a3 | 192 | #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 |
| AnnaBridge | 189:f392fc9709a3 | 193 | #define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)) |
| AnnaBridge | 189:f392fc9709a3 | 194 | #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 |
| AnnaBridge | 189:f392fc9709a3 | 195 | #define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)) |
| AnnaBridge | 189:f392fc9709a3 | 196 | #define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)) |
| AnnaBridge | 189:f392fc9709a3 | 197 | #define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC) |
| AnnaBridge | 189:f392fc9709a3 | 198 | /** |
| AnnaBridge | 189:f392fc9709a3 | 199 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 200 | */ |
| AnnaBridge | 189:f392fc9709a3 | 201 | |
| AnnaBridge | 189:f392fc9709a3 | 202 | /** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity |
| AnnaBridge | 189:f392fc9709a3 | 203 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 204 | */ |
| AnnaBridge | 189:f392fc9709a3 | 205 | |
| AnnaBridge | 189:f392fc9709a3 | 206 | #define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 207 | #define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL) |
| AnnaBridge | 189:f392fc9709a3 | 208 | /** |
| AnnaBridge | 189:f392fc9709a3 | 209 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 210 | */ |
| AnnaBridge | 189:f392fc9709a3 | 211 | |
| AnnaBridge | 189:f392fc9709a3 | 212 | /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time |
| AnnaBridge | 189:f392fc9709a3 | 213 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 214 | */ |
| AnnaBridge | 189:f392fc9709a3 | 215 | #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 216 | #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 |
| AnnaBridge | 189:f392fc9709a3 | 217 | #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 |
| AnnaBridge | 189:f392fc9709a3 | 218 | #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT |
| AnnaBridge | 189:f392fc9709a3 | 219 | /** |
| AnnaBridge | 189:f392fc9709a3 | 220 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 221 | */ |
| AnnaBridge | 189:f392fc9709a3 | 222 | |
| AnnaBridge | 189:f392fc9709a3 | 223 | /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity |
| AnnaBridge | 189:f392fc9709a3 | 224 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 225 | */ |
| AnnaBridge | 189:f392fc9709a3 | 226 | #define LPTIM_CLOCKPOLARITY_RISING ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 227 | #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 |
| AnnaBridge | 189:f392fc9709a3 | 228 | #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 |
| AnnaBridge | 189:f392fc9709a3 | 229 | /** |
| AnnaBridge | 189:f392fc9709a3 | 230 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 231 | */ |
| AnnaBridge | 189:f392fc9709a3 | 232 | |
| AnnaBridge | 189:f392fc9709a3 | 233 | /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source |
| AnnaBridge | 189:f392fc9709a3 | 234 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 235 | */ |
| AnnaBridge | 189:f392fc9709a3 | 236 | #define LPTIM_TRIGSOURCE_SOFTWARE ((uint32_t)0x0000FFFF) |
| AnnaBridge | 189:f392fc9709a3 | 237 | #define LPTIM_TRIGSOURCE_0 ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 238 | #define LPTIM_TRIGSOURCE_1 ((uint32_t)LPTIM_CFGR_TRIGSEL_0) |
| AnnaBridge | 189:f392fc9709a3 | 239 | #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 |
| AnnaBridge | 189:f392fc9709a3 | 240 | #define LPTIM_TRIGSOURCE_3 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) |
| AnnaBridge | 189:f392fc9709a3 | 241 | #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 |
| AnnaBridge | 189:f392fc9709a3 | 242 | #define LPTIM_TRIGSOURCE_5 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) |
| AnnaBridge | 189:f392fc9709a3 | 243 | #define LPTIM_TRIGSOURCE_6 ((uint32_t)LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) |
| AnnaBridge | 189:f392fc9709a3 | 244 | #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL |
| AnnaBridge | 189:f392fc9709a3 | 245 | /** |
| AnnaBridge | 189:f392fc9709a3 | 246 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 247 | */ |
| AnnaBridge | 189:f392fc9709a3 | 248 | |
| AnnaBridge | 189:f392fc9709a3 | 249 | /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity |
| AnnaBridge | 189:f392fc9709a3 | 250 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 251 | */ |
| AnnaBridge | 189:f392fc9709a3 | 252 | #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 |
| AnnaBridge | 189:f392fc9709a3 | 253 | #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 |
| AnnaBridge | 189:f392fc9709a3 | 254 | #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN |
| AnnaBridge | 189:f392fc9709a3 | 255 | /** |
| AnnaBridge | 189:f392fc9709a3 | 256 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 257 | */ |
| AnnaBridge | 189:f392fc9709a3 | 258 | |
| AnnaBridge | 189:f392fc9709a3 | 259 | /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time |
| AnnaBridge | 189:f392fc9709a3 | 260 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 261 | */ |
| AnnaBridge | 189:f392fc9709a3 | 262 | #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 263 | #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 |
| AnnaBridge | 189:f392fc9709a3 | 264 | #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 |
| AnnaBridge | 189:f392fc9709a3 | 265 | #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT |
| AnnaBridge | 189:f392fc9709a3 | 266 | /** |
| AnnaBridge | 189:f392fc9709a3 | 267 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 268 | */ |
| AnnaBridge | 189:f392fc9709a3 | 269 | |
| AnnaBridge | 189:f392fc9709a3 | 270 | /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode |
| AnnaBridge | 189:f392fc9709a3 | 271 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 272 | */ |
| AnnaBridge | 189:f392fc9709a3 | 273 | |
| AnnaBridge | 189:f392fc9709a3 | 274 | #define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 275 | #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD |
| AnnaBridge | 189:f392fc9709a3 | 276 | /** |
| AnnaBridge | 189:f392fc9709a3 | 277 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 278 | */ |
| AnnaBridge | 189:f392fc9709a3 | 279 | |
| AnnaBridge | 189:f392fc9709a3 | 280 | /** @defgroup LPTIM_Counter_Source LPTIM Counter Source |
| AnnaBridge | 189:f392fc9709a3 | 281 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 282 | */ |
| AnnaBridge | 189:f392fc9709a3 | 283 | |
| AnnaBridge | 189:f392fc9709a3 | 284 | #define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000) |
| AnnaBridge | 189:f392fc9709a3 | 285 | #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE |
| AnnaBridge | 189:f392fc9709a3 | 286 | /** |
| AnnaBridge | 189:f392fc9709a3 | 287 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 288 | */ |
| AnnaBridge | 189:f392fc9709a3 | 289 | |
| AnnaBridge | 189:f392fc9709a3 | 290 | /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source |
| AnnaBridge | 189:f392fc9709a3 | 291 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 292 | */ |
| AnnaBridge | 189:f392fc9709a3 | 293 | |
| AnnaBridge | 189:f392fc9709a3 | 294 | #define LPTIM_INPUT1SOURCE_GPIO ((uint32_t)0x00000000) /*!< For LPTIM1 and LPTIM2 */ |
| AnnaBridge | 189:f392fc9709a3 | 295 | #define LPTIM_INPUT1SOURCE_COMP1 LPTIM_OR_OR_0 /*!< For LPTIM1 and LPTIM2 */ |
| AnnaBridge | 189:f392fc9709a3 | 296 | #define LPTIM_INPUT1SOURCE_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM2 */ |
| AnnaBridge | 189:f392fc9709a3 | 297 | #define LPTIM_INPUT1SOURCE_COMP1_COMP2 LPTIM_OR_OR /*!< For LPTIM2 */ |
| AnnaBridge | 189:f392fc9709a3 | 298 | /** |
| AnnaBridge | 189:f392fc9709a3 | 299 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 300 | */ |
| AnnaBridge | 189:f392fc9709a3 | 301 | |
| AnnaBridge | 189:f392fc9709a3 | 302 | /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source |
| AnnaBridge | 189:f392fc9709a3 | 303 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 304 | */ |
| AnnaBridge | 189:f392fc9709a3 | 305 | |
| AnnaBridge | 189:f392fc9709a3 | 306 | #define LPTIM_INPUT2SOURCE_GPIO ((uint32_t)0x00000000) /*!< For LPTIM1 */ |
| AnnaBridge | 189:f392fc9709a3 | 307 | #define LPTIM_INPUT2SOURCE_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM1 */ |
| AnnaBridge | 189:f392fc9709a3 | 308 | /** |
| AnnaBridge | 189:f392fc9709a3 | 309 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 310 | */ |
| AnnaBridge | 189:f392fc9709a3 | 311 | |
| AnnaBridge | 189:f392fc9709a3 | 312 | /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition |
| AnnaBridge | 189:f392fc9709a3 | 313 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 314 | */ |
| AnnaBridge | 189:f392fc9709a3 | 315 | |
| AnnaBridge | 189:f392fc9709a3 | 316 | #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN |
| AnnaBridge | 189:f392fc9709a3 | 317 | #define LPTIM_FLAG_UP LPTIM_ISR_UP |
| AnnaBridge | 189:f392fc9709a3 | 318 | #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK |
| AnnaBridge | 189:f392fc9709a3 | 319 | #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK |
| AnnaBridge | 189:f392fc9709a3 | 320 | #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG |
| AnnaBridge | 189:f392fc9709a3 | 321 | #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM |
| AnnaBridge | 189:f392fc9709a3 | 322 | #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM |
| AnnaBridge | 189:f392fc9709a3 | 323 | /** |
| AnnaBridge | 189:f392fc9709a3 | 324 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 325 | */ |
| AnnaBridge | 189:f392fc9709a3 | 326 | |
| AnnaBridge | 189:f392fc9709a3 | 327 | /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition |
| AnnaBridge | 189:f392fc9709a3 | 328 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 329 | */ |
| AnnaBridge | 189:f392fc9709a3 | 330 | |
| AnnaBridge | 189:f392fc9709a3 | 331 | #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE |
| AnnaBridge | 189:f392fc9709a3 | 332 | #define LPTIM_IT_UP LPTIM_IER_UPIE |
| AnnaBridge | 189:f392fc9709a3 | 333 | #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE |
| AnnaBridge | 189:f392fc9709a3 | 334 | #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE |
| AnnaBridge | 189:f392fc9709a3 | 335 | #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE |
| AnnaBridge | 189:f392fc9709a3 | 336 | #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE |
| AnnaBridge | 189:f392fc9709a3 | 337 | #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE |
| AnnaBridge | 189:f392fc9709a3 | 338 | /** |
| AnnaBridge | 189:f392fc9709a3 | 339 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 340 | */ |
| AnnaBridge | 189:f392fc9709a3 | 341 | |
| AnnaBridge | 189:f392fc9709a3 | 342 | /** |
| AnnaBridge | 189:f392fc9709a3 | 343 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 344 | */ |
| AnnaBridge | 189:f392fc9709a3 | 345 | |
| AnnaBridge | 189:f392fc9709a3 | 346 | /* Exported macros -----------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 347 | /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros |
| AnnaBridge | 189:f392fc9709a3 | 348 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 349 | */ |
| AnnaBridge | 189:f392fc9709a3 | 350 | |
| AnnaBridge | 189:f392fc9709a3 | 351 | /** @brief Reset LPTIM handle state. |
| AnnaBridge | 189:f392fc9709a3 | 352 | * @param __HANDLE__: LPTIM handle |
| AnnaBridge | 189:f392fc9709a3 | 353 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 354 | */ |
| AnnaBridge | 189:f392fc9709a3 | 355 | #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) |
| AnnaBridge | 189:f392fc9709a3 | 356 | |
| AnnaBridge | 189:f392fc9709a3 | 357 | /** |
| AnnaBridge | 189:f392fc9709a3 | 358 | * @brief Enable the LPTIM peripheral. |
| AnnaBridge | 189:f392fc9709a3 | 359 | * @param __HANDLE__: LPTIM handle |
| AnnaBridge | 189:f392fc9709a3 | 360 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 361 | */ |
| AnnaBridge | 189:f392fc9709a3 | 362 | #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 363 | |
| AnnaBridge | 189:f392fc9709a3 | 364 | /** |
| AnnaBridge | 189:f392fc9709a3 | 365 | * @brief Disable the LPTIM peripheral. |
| AnnaBridge | 189:f392fc9709a3 | 366 | * @param __HANDLE__: LPTIM handle |
| AnnaBridge | 189:f392fc9709a3 | 367 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 368 | */ |
| AnnaBridge | 189:f392fc9709a3 | 369 | #define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 370 | |
| AnnaBridge | 189:f392fc9709a3 | 371 | /** |
| AnnaBridge | 189:f392fc9709a3 | 372 | * @brief Start the LPTIM peripheral in Continuous or in single mode. |
| AnnaBridge | 189:f392fc9709a3 | 373 | * @param __HANDLE__: DMA handle |
| AnnaBridge | 189:f392fc9709a3 | 374 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 375 | */ |
| AnnaBridge | 189:f392fc9709a3 | 376 | #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) |
| AnnaBridge | 189:f392fc9709a3 | 377 | #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) |
| AnnaBridge | 189:f392fc9709a3 | 378 | |
| AnnaBridge | 189:f392fc9709a3 | 379 | |
| AnnaBridge | 189:f392fc9709a3 | 380 | /** |
| AnnaBridge | 189:f392fc9709a3 | 381 | * @brief Write the passed parameter in the Autoreload register. |
| AnnaBridge | 189:f392fc9709a3 | 382 | * @param __HANDLE__: LPTIM handle |
| AnnaBridge | 189:f392fc9709a3 | 383 | * @param __VALUE__: Autoreload value |
| AnnaBridge | 189:f392fc9709a3 | 384 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 385 | */ |
| AnnaBridge | 189:f392fc9709a3 | 386 | #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) |
| AnnaBridge | 189:f392fc9709a3 | 387 | |
| AnnaBridge | 189:f392fc9709a3 | 388 | /** |
| AnnaBridge | 189:f392fc9709a3 | 389 | * @brief Write the passed parameter in the Compare register. |
| AnnaBridge | 189:f392fc9709a3 | 390 | * @param __HANDLE__: LPTIM handle |
| AnnaBridge | 189:f392fc9709a3 | 391 | * @param __VALUE__: Compare value |
| AnnaBridge | 189:f392fc9709a3 | 392 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 393 | */ |
| AnnaBridge | 189:f392fc9709a3 | 394 | #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) |
| AnnaBridge | 189:f392fc9709a3 | 395 | |
| AnnaBridge | 189:f392fc9709a3 | 396 | /** |
| AnnaBridge | 189:f392fc9709a3 | 397 | * @brief Check whether the specified LPTIM flag is set or not. |
| AnnaBridge | 189:f392fc9709a3 | 398 | * @param __HANDLE__: LPTIM handle |
| AnnaBridge | 189:f392fc9709a3 | 399 | * @param __FLAG__: LPTIM flag to check |
| AnnaBridge | 189:f392fc9709a3 | 400 | * This parameter can be a value of: |
| AnnaBridge | 189:f392fc9709a3 | 401 | * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
| AnnaBridge | 189:f392fc9709a3 | 402 | * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
| AnnaBridge | 189:f392fc9709a3 | 403 | * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
| AnnaBridge | 189:f392fc9709a3 | 404 | * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
| AnnaBridge | 189:f392fc9709a3 | 405 | * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
| AnnaBridge | 189:f392fc9709a3 | 406 | * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
| AnnaBridge | 189:f392fc9709a3 | 407 | * @arg LPTIM_FLAG_CMPM : Compare match Flag. |
| AnnaBridge | 189:f392fc9709a3 | 408 | * @retval The state of the specified flag (SET or RESET). |
| AnnaBridge | 189:f392fc9709a3 | 409 | */ |
| AnnaBridge | 189:f392fc9709a3 | 410 | #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 411 | |
| AnnaBridge | 189:f392fc9709a3 | 412 | /** |
| AnnaBridge | 189:f392fc9709a3 | 413 | * @brief Clear the specified LPTIM flag. |
| AnnaBridge | 189:f392fc9709a3 | 414 | * @param __HANDLE__: LPTIM handle. |
| AnnaBridge | 189:f392fc9709a3 | 415 | * @param __FLAG__: LPTIM flag to clear. |
| AnnaBridge | 189:f392fc9709a3 | 416 | * This parameter can be a value of: |
| AnnaBridge | 189:f392fc9709a3 | 417 | * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. |
| AnnaBridge | 189:f392fc9709a3 | 418 | * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. |
| AnnaBridge | 189:f392fc9709a3 | 419 | * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. |
| AnnaBridge | 189:f392fc9709a3 | 420 | * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. |
| AnnaBridge | 189:f392fc9709a3 | 421 | * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. |
| AnnaBridge | 189:f392fc9709a3 | 422 | * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. |
| AnnaBridge | 189:f392fc9709a3 | 423 | * @arg LPTIM_FLAG_CMPM : Compare match Flag. |
| AnnaBridge | 189:f392fc9709a3 | 424 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 425 | */ |
| AnnaBridge | 189:f392fc9709a3 | 426 | #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 427 | |
| AnnaBridge | 189:f392fc9709a3 | 428 | /** |
| AnnaBridge | 189:f392fc9709a3 | 429 | * @brief Enable the specified LPTIM interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 430 | * @param __HANDLE__: LPTIM handle. |
| AnnaBridge | 189:f392fc9709a3 | 431 | * @param __INTERRUPT__: LPTIM interrupt to set. |
| AnnaBridge | 189:f392fc9709a3 | 432 | * This parameter can be a value of: |
| AnnaBridge | 189:f392fc9709a3 | 433 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 434 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 435 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 436 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 437 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 438 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 439 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 440 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 441 | */ |
| AnnaBridge | 189:f392fc9709a3 | 442 | #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
| AnnaBridge | 189:f392fc9709a3 | 443 | |
| AnnaBridge | 189:f392fc9709a3 | 444 | /** |
| AnnaBridge | 189:f392fc9709a3 | 445 | * @brief Disable the specified LPTIM interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 446 | * @param __HANDLE__: LPTIM handle. |
| AnnaBridge | 189:f392fc9709a3 | 447 | * @param __INTERRUPT__: LPTIM interrupt to set. |
| AnnaBridge | 189:f392fc9709a3 | 448 | * This parameter can be a value of: |
| AnnaBridge | 189:f392fc9709a3 | 449 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 450 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 451 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 452 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 453 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 454 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 455 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 456 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 457 | */ |
| AnnaBridge | 189:f392fc9709a3 | 458 | #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) |
| AnnaBridge | 189:f392fc9709a3 | 459 | |
| AnnaBridge | 189:f392fc9709a3 | 460 | /** |
| AnnaBridge | 189:f392fc9709a3 | 461 | * @brief Check whether the specified LPTIM interrupt source is enabled or not. |
| AnnaBridge | 189:f392fc9709a3 | 462 | * @param __HANDLE__: LPTIM handle. |
| AnnaBridge | 189:f392fc9709a3 | 463 | * @param __INTERRUPT__: LPTIM interrupt to check. |
| AnnaBridge | 189:f392fc9709a3 | 464 | * This parameter can be a value of: |
| AnnaBridge | 189:f392fc9709a3 | 465 | * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 466 | * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 467 | * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 468 | * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 469 | * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 470 | * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 471 | * @arg LPTIM_IT_CMPM : Compare match Interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 472 | * @retval Interrupt status. |
| AnnaBridge | 189:f392fc9709a3 | 473 | */ |
| AnnaBridge | 189:f392fc9709a3 | 474 | |
| AnnaBridge | 189:f392fc9709a3 | 475 | #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| AnnaBridge | 189:f392fc9709a3 | 476 | |
| AnnaBridge | 189:f392fc9709a3 | 477 | /** |
| AnnaBridge | 189:f392fc9709a3 | 478 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 479 | */ |
| AnnaBridge | 189:f392fc9709a3 | 480 | |
| AnnaBridge | 189:f392fc9709a3 | 481 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 482 | /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions |
| AnnaBridge | 189:f392fc9709a3 | 483 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 484 | */ |
| AnnaBridge | 189:f392fc9709a3 | 485 | |
| AnnaBridge | 189:f392fc9709a3 | 486 | /* Initialization/de-initialization functions ********************************/ |
| AnnaBridge | 189:f392fc9709a3 | 487 | HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 488 | HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 489 | |
| AnnaBridge | 189:f392fc9709a3 | 490 | /* MSP functions *************************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 491 | void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 492 | void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 493 | |
| AnnaBridge | 189:f392fc9709a3 | 494 | /* Start/Stop operation functions *********************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 495 | /* ################################# PWM Mode ################################*/ |
| AnnaBridge | 189:f392fc9709a3 | 496 | /* Blocking mode: Polling */ |
| AnnaBridge | 189:f392fc9709a3 | 497 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 189:f392fc9709a3 | 498 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 499 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 500 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 189:f392fc9709a3 | 501 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 502 | |
| AnnaBridge | 189:f392fc9709a3 | 503 | /* ############################# One Pulse Mode ##############################*/ |
| AnnaBridge | 189:f392fc9709a3 | 504 | /* Blocking mode: Polling */ |
| AnnaBridge | 189:f392fc9709a3 | 505 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 189:f392fc9709a3 | 506 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 507 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 508 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 189:f392fc9709a3 | 509 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 510 | |
| AnnaBridge | 189:f392fc9709a3 | 511 | /* ############################## Set once Mode ##############################*/ |
| AnnaBridge | 189:f392fc9709a3 | 512 | /* Blocking mode: Polling */ |
| AnnaBridge | 189:f392fc9709a3 | 513 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 189:f392fc9709a3 | 514 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 515 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 516 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); |
| AnnaBridge | 189:f392fc9709a3 | 517 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 518 | |
| AnnaBridge | 189:f392fc9709a3 | 519 | /* ############################### Encoder Mode ##############################*/ |
| AnnaBridge | 189:f392fc9709a3 | 520 | /* Blocking mode: Polling */ |
| AnnaBridge | 189:f392fc9709a3 | 521 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| AnnaBridge | 189:f392fc9709a3 | 522 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 523 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 524 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| AnnaBridge | 189:f392fc9709a3 | 525 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 526 | |
| AnnaBridge | 189:f392fc9709a3 | 527 | /* ############################# Time out Mode ##############################*/ |
| AnnaBridge | 189:f392fc9709a3 | 528 | /* Blocking mode: Polling */ |
| AnnaBridge | 189:f392fc9709a3 | 529 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
| AnnaBridge | 189:f392fc9709a3 | 530 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 531 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 532 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); |
| AnnaBridge | 189:f392fc9709a3 | 533 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 534 | |
| AnnaBridge | 189:f392fc9709a3 | 535 | /* ############################## Counter Mode ###############################*/ |
| AnnaBridge | 189:f392fc9709a3 | 536 | /* Blocking mode: Polling */ |
| AnnaBridge | 189:f392fc9709a3 | 537 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| AnnaBridge | 189:f392fc9709a3 | 538 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 539 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 189:f392fc9709a3 | 540 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); |
| AnnaBridge | 189:f392fc9709a3 | 541 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 542 | |
| AnnaBridge | 189:f392fc9709a3 | 543 | /* Reading operation functions ************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 544 | uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 545 | uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 546 | uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 547 | |
| AnnaBridge | 189:f392fc9709a3 | 548 | /* LPTIM IRQ functions *******************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 549 | void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 550 | |
| AnnaBridge | 189:f392fc9709a3 | 551 | /* CallBack functions ********************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 552 | void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 553 | void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 554 | void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 555 | void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 556 | void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 557 | void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 558 | void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 559 | |
| AnnaBridge | 189:f392fc9709a3 | 560 | /* Peripheral State functions ************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 561 | HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); |
| AnnaBridge | 189:f392fc9709a3 | 562 | |
| AnnaBridge | 189:f392fc9709a3 | 563 | /** |
| AnnaBridge | 189:f392fc9709a3 | 564 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 565 | */ |
| AnnaBridge | 189:f392fc9709a3 | 566 | |
| AnnaBridge | 189:f392fc9709a3 | 567 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 568 | /** @defgroup LPTIM_Private_Types LPTIM Private Types |
| AnnaBridge | 189:f392fc9709a3 | 569 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 570 | */ |
| AnnaBridge | 189:f392fc9709a3 | 571 | |
| AnnaBridge | 189:f392fc9709a3 | 572 | /** |
| AnnaBridge | 189:f392fc9709a3 | 573 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 574 | */ |
| AnnaBridge | 189:f392fc9709a3 | 575 | |
| AnnaBridge | 189:f392fc9709a3 | 576 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 577 | /** @defgroup LPTIM_Private_Variables LPTIM Private Variables |
| AnnaBridge | 189:f392fc9709a3 | 578 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 579 | */ |
| AnnaBridge | 189:f392fc9709a3 | 580 | |
| AnnaBridge | 189:f392fc9709a3 | 581 | /** |
| AnnaBridge | 189:f392fc9709a3 | 582 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 583 | */ |
| AnnaBridge | 189:f392fc9709a3 | 584 | |
| AnnaBridge | 189:f392fc9709a3 | 585 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 586 | /** @defgroup LPTIM_Private_Constants LPTIM Private Constants |
| AnnaBridge | 189:f392fc9709a3 | 587 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 588 | */ |
| AnnaBridge | 189:f392fc9709a3 | 589 | |
| AnnaBridge | 189:f392fc9709a3 | 590 | /** |
| AnnaBridge | 189:f392fc9709a3 | 591 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 592 | */ |
| AnnaBridge | 189:f392fc9709a3 | 593 | |
| AnnaBridge | 189:f392fc9709a3 | 594 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 595 | /** @defgroup LPTIM_Private_Macros LPTIM Private Macros |
| AnnaBridge | 189:f392fc9709a3 | 596 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 597 | */ |
| AnnaBridge | 189:f392fc9709a3 | 598 | |
| AnnaBridge | 189:f392fc9709a3 | 599 | #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ |
| AnnaBridge | 189:f392fc9709a3 | 600 | ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) |
| AnnaBridge | 189:f392fc9709a3 | 601 | |
| AnnaBridge | 189:f392fc9709a3 | 602 | |
| AnnaBridge | 189:f392fc9709a3 | 603 | #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 604 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 605 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 606 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 607 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 608 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 609 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 610 | ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) |
| AnnaBridge | 189:f392fc9709a3 | 611 | |
| AnnaBridge | 189:f392fc9709a3 | 612 | #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) |
| AnnaBridge | 189:f392fc9709a3 | 613 | |
| AnnaBridge | 189:f392fc9709a3 | 614 | #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 615 | ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH)) |
| AnnaBridge | 189:f392fc9709a3 | 616 | |
| AnnaBridge | 189:f392fc9709a3 | 617 | #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ |
| AnnaBridge | 189:f392fc9709a3 | 618 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ |
| AnnaBridge | 189:f392fc9709a3 | 619 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ |
| AnnaBridge | 189:f392fc9709a3 | 620 | ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) |
| AnnaBridge | 189:f392fc9709a3 | 621 | |
| AnnaBridge | 189:f392fc9709a3 | 622 | #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ |
| AnnaBridge | 189:f392fc9709a3 | 623 | ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ |
| AnnaBridge | 189:f392fc9709a3 | 624 | ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) |
| AnnaBridge | 189:f392fc9709a3 | 625 | |
| AnnaBridge | 189:f392fc9709a3 | 626 | #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 627 | ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ |
| AnnaBridge | 189:f392fc9709a3 | 628 | ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ |
| AnnaBridge | 189:f392fc9709a3 | 629 | ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ |
| AnnaBridge | 189:f392fc9709a3 | 630 | ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ |
| AnnaBridge | 189:f392fc9709a3 | 631 | ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 632 | ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ |
| AnnaBridge | 189:f392fc9709a3 | 633 | ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ |
| AnnaBridge | 189:f392fc9709a3 | 634 | ((__TRIG__) == LPTIM_TRIGSOURCE_7)) |
| AnnaBridge | 189:f392fc9709a3 | 635 | |
| AnnaBridge | 189:f392fc9709a3 | 636 | #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 637 | ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 638 | ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) |
| AnnaBridge | 189:f392fc9709a3 | 639 | |
| AnnaBridge | 189:f392fc9709a3 | 640 | #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ |
| AnnaBridge | 189:f392fc9709a3 | 641 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 642 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ |
| AnnaBridge | 189:f392fc9709a3 | 643 | ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) |
| AnnaBridge | 189:f392fc9709a3 | 644 | |
| AnnaBridge | 189:f392fc9709a3 | 645 | #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 646 | ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) |
| AnnaBridge | 189:f392fc9709a3 | 647 | |
| AnnaBridge | 189:f392fc9709a3 | 648 | #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ |
| AnnaBridge | 189:f392fc9709a3 | 649 | ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) |
| AnnaBridge | 189:f392fc9709a3 | 650 | |
| AnnaBridge | 189:f392fc9709a3 | 651 | #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFF) |
| AnnaBridge | 189:f392fc9709a3 | 652 | |
| AnnaBridge | 189:f392fc9709a3 | 653 | #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFF) |
| AnnaBridge | 189:f392fc9709a3 | 654 | |
| AnnaBridge | 189:f392fc9709a3 | 655 | #define IS_LPTIM_PERIOD(__PERIOD__) ((__PERIOD__) <= 0x0000FFFF) |
| AnnaBridge | 189:f392fc9709a3 | 656 | |
| AnnaBridge | 189:f392fc9709a3 | 657 | #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFF) |
| AnnaBridge | 189:f392fc9709a3 | 658 | |
| AnnaBridge | 189:f392fc9709a3 | 659 | #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 660 | ((((__INSTANCE__) == LPTIM1) && \ |
| AnnaBridge | 189:f392fc9709a3 | 661 | (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 662 | ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) \ |
| AnnaBridge | 189:f392fc9709a3 | 663 | || \ |
| AnnaBridge | 189:f392fc9709a3 | 664 | (((__INSTANCE__) == LPTIM2) && \ |
| AnnaBridge | 189:f392fc9709a3 | 665 | (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 666 | ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) || \ |
| AnnaBridge | 189:f392fc9709a3 | 667 | ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP2) || \ |
| AnnaBridge | 189:f392fc9709a3 | 668 | ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1_COMP2)))) |
| AnnaBridge | 189:f392fc9709a3 | 669 | |
| AnnaBridge | 189:f392fc9709a3 | 670 | #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 671 | (((__INSTANCE__) == LPTIM1) && \ |
| AnnaBridge | 189:f392fc9709a3 | 672 | (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 673 | ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2))) |
| AnnaBridge | 189:f392fc9709a3 | 674 | |
| AnnaBridge | 189:f392fc9709a3 | 675 | /** |
| AnnaBridge | 189:f392fc9709a3 | 676 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 677 | */ |
| AnnaBridge | 189:f392fc9709a3 | 678 | |
| AnnaBridge | 189:f392fc9709a3 | 679 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 680 | /** @defgroup LPTIM_Private_Functions LPTIM Private Functions |
| AnnaBridge | 189:f392fc9709a3 | 681 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 682 | */ |
| AnnaBridge | 189:f392fc9709a3 | 683 | |
| AnnaBridge | 189:f392fc9709a3 | 684 | /** |
| AnnaBridge | 189:f392fc9709a3 | 685 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 686 | */ |
| AnnaBridge | 189:f392fc9709a3 | 687 | |
| AnnaBridge | 189:f392fc9709a3 | 688 | /** |
| AnnaBridge | 189:f392fc9709a3 | 689 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 690 | */ |
| AnnaBridge | 189:f392fc9709a3 | 691 | |
| AnnaBridge | 189:f392fc9709a3 | 692 | /** |
| AnnaBridge | 189:f392fc9709a3 | 693 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 694 | */ |
| AnnaBridge | 189:f392fc9709a3 | 695 | |
| AnnaBridge | 189:f392fc9709a3 | 696 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 697 | } |
| AnnaBridge | 189:f392fc9709a3 | 698 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 699 | |
| AnnaBridge | 189:f392fc9709a3 | 700 | #endif /* __STM32L4xx_HAL_LPTIM_H */ |
| AnnaBridge | 189:f392fc9709a3 | 701 | |
| AnnaBridge | 189:f392fc9709a3 | 702 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
